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Antti Palosaari88b38be2013-01-07 09:37:30 -03001/*
2 * ITE Tech IT9137 silicon tuner driver
3 *
4 * Copyright (C) 2011 Malcolm Priestley (tvboxspy@gmail.com)
5 * IT9137 Copyright (C) ITE Tech Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 *
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
21 */
22
23#include "it913x_priv.h"
24
25struct it913x_fe_state {
26 struct dvb_frontend frontend;
27 struct i2c_adapter *i2c_adap;
28 struct ite_config *config;
29 u8 i2c_addr;
30 u32 frequency;
31 fe_modulation_t constellation;
32 fe_transmit_mode_t transmission_mode;
33 u8 priority;
34 u32 crystalFrequency;
35 u32 adcFrequency;
36 u8 tuner_type;
37 struct adctable *table;
38 fe_status_t it913x_status;
39 u16 tun_xtal;
40 u8 tun_fdiv;
41 u8 tun_clk_mode;
42 u32 tun_fn_min;
43 u32 ucblocks;
44};
45
46
47static int it913x_read_reg(struct it913x_fe_state *state,
48 u32 reg, u8 *data, u8 count)
49{
50 int ret;
51 u8 b[3];
52 struct i2c_msg msg[2] = {
53 { .addr = state->i2c_addr, .flags = 0,
54 .buf = b, .len = sizeof(b) },
55 { .addr = state->i2c_addr, .flags = I2C_M_RD,
56 .buf = data, .len = count }
57 };
58 b[0] = (u8)(reg >> 16) & 0xff;
59 b[1] = (u8)(reg >> 8) & 0xff;
60 b[2] = (u8) reg & 0xff;
61 b[0] |= 0x80; /* All reads from demodulator */
62
63 ret = i2c_transfer(state->i2c_adap, msg, 2);
64
65 return ret;
66}
67
68static int it913x_read_reg_u8(struct it913x_fe_state *state, u32 reg)
69{
70 int ret;
71 u8 b[1];
72 ret = it913x_read_reg(state, reg, &b[0], sizeof(b));
73 return (ret < 0) ? -ENODEV : b[0];
74}
75
76static int it913x_write(struct it913x_fe_state *state,
77 u8 pro, u32 reg, u8 buf[], u8 count)
78{
79 u8 b[256];
80 struct i2c_msg msg[1] = {
81 { .addr = state->i2c_addr, .flags = 0,
82 .buf = b, .len = 3 + count }
83 };
84 int ret;
85 b[0] = (u8)(reg >> 16) & 0xff;
86 b[1] = (u8)(reg >> 8) & 0xff;
87 b[2] = (u8) reg & 0xff;
88 memcpy(&b[3], buf, count);
89
90 if (pro == PRO_DMOD)
91 b[0] |= 0x80;
92
93 ret = i2c_transfer(state->i2c_adap, msg, 1);
94
95 if (ret < 0)
96 return -EIO;
97
98 return 0;
99}
100
101static int it913x_write_reg(struct it913x_fe_state *state,
102 u8 pro, u32 reg, u32 data)
103{
104 int ret;
105 u8 b[4];
106 u8 s;
107
108 b[0] = data >> 24;
109 b[1] = (data >> 16) & 0xff;
110 b[2] = (data >> 8) & 0xff;
111 b[3] = data & 0xff;
112 /* expand write as needed */
113 if (data < 0x100)
114 s = 3;
115 else if (data < 0x1000)
116 s = 2;
117 else if (data < 0x100000)
118 s = 1;
119 else
120 s = 0;
121
122 ret = it913x_write(state, pro, reg, &b[s], sizeof(b) - s);
123
124 return ret;
125}
126
127static int it913x_fe_script_loader(struct it913x_fe_state *state,
128 struct it913xset *loadscript)
129{
130 int ret, i;
131 if (loadscript == NULL)
132 return -EINVAL;
133
134 for (i = 0; i < 1000; ++i) {
135 if (loadscript[i].pro == 0xff)
136 break;
137 ret = it913x_write(state, loadscript[i].pro,
138 loadscript[i].address,
139 loadscript[i].reg, loadscript[i].count);
140 if (ret < 0)
141 return -ENODEV;
142 }
143 return 0;
144}
145
146static int it913x_init_tuner(struct dvb_frontend *fe)
147{
148 struct it913x_fe_state *state = fe->tuner_priv;
149 int ret, i, reg;
150 u8 val, nv_val;
151 u8 nv[] = {48, 32, 24, 16, 12, 8, 6, 4, 2};
152 u8 b[2];
153
154 reg = it913x_read_reg_u8(state, 0xec86);
155 switch (reg) {
156 case 0:
157 state->tun_clk_mode = reg;
158 state->tun_xtal = 2000;
159 state->tun_fdiv = 3;
160 val = 16;
161 break;
162 case -ENODEV:
163 return -ENODEV;
164 case 1:
165 default:
166 state->tun_clk_mode = reg;
167 state->tun_xtal = 640;
168 state->tun_fdiv = 1;
169 val = 6;
170 break;
171 }
172
173 reg = it913x_read_reg_u8(state, 0xed03);
174
175 if (reg < 0)
176 return -ENODEV;
177 else if (reg < ARRAY_SIZE(nv))
178 nv_val = nv[reg];
179 else
180 nv_val = 2;
181
182 for (i = 0; i < 50; i++) {
183 ret = it913x_read_reg(state, 0xed23, &b[0], sizeof(b));
184 reg = (b[1] << 8) + b[0];
185 if (reg > 0)
186 break;
187 if (ret < 0)
188 return -ENODEV;
189 udelay(2000);
190 }
191 state->tun_fn_min = state->tun_xtal * reg;
192 state->tun_fn_min /= (state->tun_fdiv * nv_val);
193 pr_debug("Tuner fn_min %d\n", state->tun_fn_min);
194
195 if (state->config->chip_ver > 1)
196 msleep(50);
197 else {
198 for (i = 0; i < 50; i++) {
199 reg = it913x_read_reg_u8(state, 0xec82);
200 if (reg > 0)
201 break;
202 if (reg < 0)
203 return -ENODEV;
204 udelay(2000);
205 }
206 }
207
208 return it913x_write_reg(state, PRO_DMOD, 0xed81, val);
209}
210
211static int it9137_set_tuner(struct dvb_frontend *fe)
212{
213 struct it913x_fe_state *state = fe->tuner_priv;
214 struct it913xset *set_tuner = set_it9137_template;
215 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
216 u32 bandwidth = p->bandwidth_hz;
217 u32 frequency_m = p->frequency;
218 int ret, reg;
219 u32 frequency = frequency_m / 1000;
220 u32 freq, temp_f, tmp;
221 u16 iqik_m_cal;
222 u16 n_div;
223 u8 n;
224 u8 l_band;
225 u8 lna_band;
226 u8 bw;
227
228 if (state->config->firmware_ver == 1)
229 set_tuner = set_it9135_template;
230 else
231 set_tuner = set_it9137_template;
232
233 pr_debug("Tuner Frequency %d Bandwidth %d\n", frequency, bandwidth);
234
235 if (frequency >= 51000 && frequency <= 440000) {
236 l_band = 0;
237 lna_band = 0;
238 } else if (frequency > 440000 && frequency <= 484000) {
239 l_band = 1;
240 lna_band = 1;
241 } else if (frequency > 484000 && frequency <= 533000) {
242 l_band = 1;
243 lna_band = 2;
244 } else if (frequency > 533000 && frequency <= 587000) {
245 l_band = 1;
246 lna_band = 3;
247 } else if (frequency > 587000 && frequency <= 645000) {
248 l_band = 1;
249 lna_band = 4;
250 } else if (frequency > 645000 && frequency <= 710000) {
251 l_band = 1;
252 lna_band = 5;
253 } else if (frequency > 710000 && frequency <= 782000) {
254 l_band = 1;
255 lna_band = 6;
256 } else if (frequency > 782000 && frequency <= 860000) {
257 l_band = 1;
258 lna_band = 7;
259 } else if (frequency > 1450000 && frequency <= 1492000) {
260 l_band = 1;
261 lna_band = 0;
262 } else if (frequency > 1660000 && frequency <= 1685000) {
263 l_band = 1;
264 lna_band = 1;
265 } else
266 return -EINVAL;
267 set_tuner[0].reg[0] = lna_band;
268
269 switch (bandwidth) {
270 case 5000000:
271 bw = 0;
272 break;
273 case 6000000:
274 bw = 2;
275 break;
276 case 7000000:
277 bw = 4;
278 break;
279 default:
280 case 8000000:
281 bw = 6;
282 break;
283 }
284
285 set_tuner[1].reg[0] = bw;
286 set_tuner[2].reg[0] = 0xa0 | (l_band << 3);
287
288 if (frequency > 53000 && frequency <= 74000) {
289 n_div = 48;
290 n = 0;
291 } else if (frequency > 74000 && frequency <= 111000) {
292 n_div = 32;
293 n = 1;
294 } else if (frequency > 111000 && frequency <= 148000) {
295 n_div = 24;
296 n = 2;
297 } else if (frequency > 148000 && frequency <= 222000) {
298 n_div = 16;
299 n = 3;
300 } else if (frequency > 222000 && frequency <= 296000) {
301 n_div = 12;
302 n = 4;
303 } else if (frequency > 296000 && frequency <= 445000) {
304 n_div = 8;
305 n = 5;
306 } else if (frequency > 445000 && frequency <= state->tun_fn_min) {
307 n_div = 6;
308 n = 6;
309 } else if (frequency > state->tun_fn_min && frequency <= 950000) {
310 n_div = 4;
311 n = 7;
312 } else if (frequency > 1450000 && frequency <= 1680000) {
313 n_div = 2;
314 n = 0;
315 } else
316 return -EINVAL;
317
318 reg = it913x_read_reg_u8(state, 0xed81);
319 iqik_m_cal = (u16)reg * n_div;
320
321 if (reg < 0x20) {
322 if (state->tun_clk_mode == 0)
323 iqik_m_cal = (iqik_m_cal * 9) >> 5;
324 else
325 iqik_m_cal >>= 1;
326 } else {
327 iqik_m_cal = 0x40 - iqik_m_cal;
328 if (state->tun_clk_mode == 0)
329 iqik_m_cal = ~((iqik_m_cal * 9) >> 5);
330 else
331 iqik_m_cal = ~(iqik_m_cal >> 1);
332 }
333
334 temp_f = frequency * (u32)n_div * (u32)state->tun_fdiv;
335 freq = temp_f / state->tun_xtal;
336 tmp = freq * state->tun_xtal;
337
338 if ((temp_f - tmp) >= (state->tun_xtal >> 1))
339 freq++;
340
341 freq += (u32) n << 13;
342 /* Frequency OMEGA_IQIK_M_CAL_MID*/
343 temp_f = freq + (u32)iqik_m_cal;
344
345 set_tuner[3].reg[0] = temp_f & 0xff;
346 set_tuner[4].reg[0] = (temp_f >> 8) & 0xff;
347
348 pr_debug("High Frequency = %04x\n", temp_f);
349
350 /* Lower frequency */
351 set_tuner[5].reg[0] = freq & 0xff;
352 set_tuner[6].reg[0] = (freq >> 8) & 0xff;
353
354 pr_debug("low Frequency = %04x\n", freq);
355
356 ret = it913x_fe_script_loader(state, set_tuner);
357
358 return (ret < 0) ? -ENODEV : 0;
359}
360
361static int it913x_fe_suspend(struct it913x_fe_state *state)
362{
363 int ret = 0;
364#if 0
365 int ret, i;
366 u8 b;
367
368 ret = it913x_write_reg(state, PRO_DMOD, SUSPEND_FLAG, 0x1);
369
370 ret |= it913x_write_reg(state, PRO_DMOD, TRIGGER_OFSM, 0x0);
371
372 for (i = 0; i < 128; i++) {
373 ret = it913x_read_reg(state, SUSPEND_FLAG, &b, 1);
374 if (ret < 0)
375 return -ENODEV;
376 if (b == 0)
377 break;
378
379 }
380
381 ret |= it913x_write_reg(state, PRO_DMOD, AFE_MEM0, 0x8);
382 /* Turn LED off */
383 ret |= it913x_write_reg(state, PRO_LINK, GPIOH3_O, 0x0);
384#endif
385 ret |= it913x_fe_script_loader(state, it9137_tuner_off);
386
387 return (ret < 0) ? -ENODEV : 0;
388}
389
390/* Power sequence */
391/* Power Up Tuner on -> Frontend suspend off -> Tuner clk on */
392/* Power Down Frontend suspend on -> Tuner clk off -> Tuner off */
393
394static int it913x_fe_sleep(struct dvb_frontend *fe)
395{
396 struct it913x_fe_state *state = fe->tuner_priv;
397 return it913x_fe_suspend(state);
398}
399
400static int it913x_fe_start(struct dvb_frontend *fe)
401{
402 struct it913x_fe_state *state = fe->tuner_priv;
403 struct it913xset *set_lna;
404// struct it913xset *set_mode;
405 int ret;
406// u8 adf = (state->config->adf & 0xf);
407// u32 adc, xtal;
408// u8 b[4];
409
410 if (state->config->chip_ver == 1)
411 ret = it913x_init_tuner(fe);
412
413#if 0
414 pr_info("ADF table value :%02x\n", adf);
415
416 if (adf < 10) {
417 state->crystalFrequency = fe_clockTable[adf].xtal ;
418 state->table = fe_clockTable[adf].table;
419 state->adcFrequency = state->table->adcFrequency;
420
421 adc = compute_div(state->adcFrequency, 1000000ul, 19ul);
422 xtal = compute_div(state->crystalFrequency, 1000000ul, 19ul);
423
424 } else
425 return -EINVAL;
426
427 /* Set LED indicator on GPIOH3 */
428 ret = it913x_write_reg(state, PRO_LINK, GPIOH3_EN, 0x1);
429 ret |= it913x_write_reg(state, PRO_LINK, GPIOH3_ON, 0x1);
430 ret |= it913x_write_reg(state, PRO_LINK, GPIOH3_O, 0x1);
431
432 ret |= it913x_write_reg(state, PRO_LINK, 0xf641, state->tuner_type);
433 ret |= it913x_write_reg(state, PRO_DMOD, 0xf5ca, 0x01);
434 ret |= it913x_write_reg(state, PRO_DMOD, 0xf715, 0x01);
435
436 b[0] = xtal & 0xff;
437 b[1] = (xtal >> 8) & 0xff;
438 b[2] = (xtal >> 16) & 0xff;
439 b[3] = (xtal >> 24);
440 ret |= it913x_write(state, PRO_DMOD, XTAL_CLK, b , 4);
441
442 b[0] = adc & 0xff;
443 b[1] = (adc >> 8) & 0xff;
444 b[2] = (adc >> 16) & 0xff;
445 ret |= it913x_write(state, PRO_DMOD, ADC_FREQ, b, 3);
446
447 if (state->config->adc_x2)
448 ret |= it913x_write_reg(state, PRO_DMOD, ADC_X_2, 0x01);
449 b[0] = 0;
450 b[1] = 0;
451 b[2] = 0;
452 ret |= it913x_write(state, PRO_DMOD, 0x0029, b, 3);
453
454 pr_info("Crystal Frequency :%d Adc Frequency :%d ADC X2: %02x\n",
455 state->crystalFrequency, state->adcFrequency,
456 state->config->adc_x2);
457 pr_debug("Xtal value :%04x Adc value :%04x\n", xtal, adc);
458
459 if (ret < 0)
460 return -ENODEV;
461#endif
462
463 /* v1 or v2 tuner script */
464 if (state->config->chip_ver > 1)
465 ret = it913x_fe_script_loader(state, it9135_v2);
466 else
467 ret = it913x_fe_script_loader(state, it9135_v1);
468 if (ret < 0)
469 return ret;
470
471 /* LNA Scripts */
472 switch (state->tuner_type) {
473 case IT9135_51:
474 set_lna = it9135_51;
475 break;
476 case IT9135_52:
477 set_lna = it9135_52;
478 break;
479 case IT9135_60:
480 set_lna = it9135_60;
481 break;
482 case IT9135_61:
483 set_lna = it9135_61;
484 break;
485 case IT9135_62:
486 set_lna = it9135_62;
487 break;
488 case IT9135_38:
489 default:
490 set_lna = it9135_38;
491 }
492 pr_info("Tuner LNA type :%02x\n", state->tuner_type);
493
494 ret = it913x_fe_script_loader(state, set_lna);
495 if (ret < 0)
496 return ret;
497
498 if (state->config->chip_ver == 2) {
499 ret = it913x_write_reg(state, PRO_DMOD, TRIGGER_OFSM, 0x1);
500 ret |= it913x_write_reg(state, PRO_LINK, PADODPU, 0x0);
501 ret |= it913x_write_reg(state, PRO_LINK, AGC_O_D, 0x0);
502 ret |= it913x_init_tuner(fe);
503 }
504 if (ret < 0)
505 return -ENODEV;
506
507 /* Always solo frontend */
508// set_mode = set_solo_fe;
509// ret |= it913x_fe_script_loader(state, set_mode);
510
511 ret |= it913x_fe_suspend(state);
512 return (ret < 0) ? -ENODEV : 0;
513}
514
515static int it913x_release(struct dvb_frontend *fe)
516{
517 kfree(fe->tuner_priv);
518 return 0;
519}
520
521static const struct dvb_tuner_ops it913x_tuner_ops = {
522 .info = {
523 .name = "ITE Tech IT913X",
524 .frequency_min = 174000000,
525 .frequency_max = 862000000,
526 },
527
528 .release = it913x_release,
529
530 .init = it913x_init_tuner,
531 .sleep = it913x_fe_sleep,
532 .set_params = it9137_set_tuner,
533};
534
535struct dvb_frontend *it913x_attach(struct dvb_frontend *fe,
536 struct i2c_adapter *i2c_adap, u8 i2c_addr, struct ite_config *config)
537{
538 struct it913x_fe_state *state = NULL;
539 int ret;
540
541 /* allocate memory for the internal state */
542 state = kzalloc(sizeof(struct it913x_fe_state), GFP_KERNEL);
543 if (state == NULL)
544 return NULL;
545 if (config == NULL)
546 goto error;
547
548 state->i2c_adap = i2c_adap;
549 state->i2c_addr = i2c_addr;
550 state->config = config;
551
552 switch (state->config->tuner_id_0) {
553 case IT9135_51:
554 case IT9135_52:
555 case IT9135_60:
556 case IT9135_61:
557 case IT9135_62:
558 state->tuner_type = state->config->tuner_id_0;
559 break;
560 default:
561 case IT9135_38:
562 state->tuner_type = IT9135_38;
563 }
564
565 fe->tuner_priv = state;
566 memcpy(&fe->ops.tuner_ops, &it913x_tuner_ops,
567 sizeof(struct dvb_tuner_ops));
568
569 ret = it913x_fe_start(fe);
570 if (ret < 0)
571 goto error;
572
573 pr_info("%s: ITE Tech IT913X attached\n", KBUILD_MODNAME);
574
575 return fe;
576error:
577 kfree(state);
578 return NULL;
579}
580EXPORT_SYMBOL(it913x_attach);
581
582MODULE_DESCRIPTION("ITE Tech IT913X silicon tuner driver");
583MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
584MODULE_LICENSE("GPL");