| Maxime Ripard | 06d71bc | 2013-03-11 20:21:11 +0100 | [diff] [blame] | 1 | Allwinner SoCs Watchdog timer |
| 2 | |
| 3 | Required properties: |
| 4 | |
| Harald Geyer | d418504 | 2018-03-15 16:25:07 +0000 | [diff] [blame] | 5 | - compatible : should be one of |
| 6 | "allwinner,sun4i-a10-wdt" |
| 7 | "allwinner,sun6i-a31-wdt" |
| 8 | "allwinner,sun50i-a64-wdt","allwinner,sun6i-a31-wdt" |
| Maxime Ripard | 06d71bc | 2013-03-11 20:21:11 +0100 | [diff] [blame] | 9 | - reg : Specifies base physical address and size of the registers. |
| 10 | |
| Marcus Folkesson | 1d1dedc | 2018-02-11 21:08:42 +0100 | [diff] [blame] | 11 | Optional properties: |
| 12 | - timeout-sec : Contains the watchdog timeout in seconds |
| 13 | |
| Maxime Ripard | 06d71bc | 2013-03-11 20:21:11 +0100 | [diff] [blame] | 14 | Example: |
| 15 | |
| Marco Franchi | 48c926c | 2017-11-08 14:27:48 -0200 | [diff] [blame] | 16 | wdt: watchdog@1c20c90 { |
| Maxime Ripard | b0f1d8b | 2014-02-07 22:29:24 +0100 | [diff] [blame] | 17 | compatible = "allwinner,sun4i-a10-wdt"; |
| Maxime Ripard | 06d71bc | 2013-03-11 20:21:11 +0100 | [diff] [blame] | 18 | reg = <0x01c20c90 0x10>; |
| Marcus Folkesson | 1d1dedc | 2018-02-11 21:08:42 +0100 | [diff] [blame] | 19 | timeout-sec = <10>; |
| Maxime Ripard | 06d71bc | 2013-03-11 20:21:11 +0100 | [diff] [blame] | 20 | }; |