Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/drivers/ide/pci/ns87415.c Version 2.00 Sep. 10, 2002 |
| 3 | * |
| 4 | * Copyright (C) 1997-1998 Mark Lord <mlord@pobox.com> |
| 5 | * Copyright (C) 1998 Eddie C. Dost <ecd@skynet.be> |
| 6 | * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> |
| 7 | * Copyright (C) 2004 Grant Grundler <grundler at parisc-linux.org> |
| 8 | * |
| 9 | * Inspired by an earlier effort from David S. Miller <davem@redhat.com> |
| 10 | */ |
| 11 | |
| 12 | #include <linux/config.h> |
| 13 | #include <linux/module.h> |
| 14 | #include <linux/types.h> |
| 15 | #include <linux/kernel.h> |
| 16 | #include <linux/timer.h> |
| 17 | #include <linux/mm.h> |
| 18 | #include <linux/ioport.h> |
| 19 | #include <linux/interrupt.h> |
| 20 | #include <linux/blkdev.h> |
| 21 | #include <linux/hdreg.h> |
| 22 | #include <linux/pci.h> |
| 23 | #include <linux/delay.h> |
| 24 | #include <linux/ide.h> |
| 25 | #include <linux/init.h> |
| 26 | |
| 27 | #include <asm/io.h> |
| 28 | |
| 29 | #ifdef CONFIG_SUPERIO |
| 30 | /* SUPERIO 87560 is a PoS chip that NatSem denies exists. |
| 31 | * Unfortunately, it's built-in on all Astro-based PA-RISC workstations |
| 32 | * which use the integrated NS87514 cell for CD-ROM support. |
| 33 | * i.e we have to support for CD-ROM installs. |
| 34 | * See drivers/parisc/superio.c for more gory details. |
| 35 | */ |
| 36 | #include <asm/superio.h> |
| 37 | |
| 38 | static unsigned long superio_ide_status[2]; |
| 39 | static unsigned long superio_ide_select[2]; |
| 40 | static unsigned long superio_ide_dma_status[2]; |
| 41 | |
| 42 | #define SUPERIO_IDE_MAX_RETRIES 25 |
| 43 | |
| 44 | /* Because of a defect in Super I/O, all reads of the PCI DMA status |
| 45 | * registers, IDE status register and the IDE select register need to be |
| 46 | * retried |
| 47 | */ |
| 48 | static u8 superio_ide_inb (unsigned long port) |
| 49 | { |
| 50 | if (port == superio_ide_status[0] || |
| 51 | port == superio_ide_status[1] || |
| 52 | port == superio_ide_select[0] || |
| 53 | port == superio_ide_select[1] || |
| 54 | port == superio_ide_dma_status[0] || |
| 55 | port == superio_ide_dma_status[1]) { |
| 56 | u8 tmp; |
| 57 | int retries = SUPERIO_IDE_MAX_RETRIES; |
| 58 | |
| 59 | /* printk(" [ reading port 0x%x with retry ] ", port); */ |
| 60 | |
| 61 | do { |
| 62 | tmp = inb(port); |
| 63 | if (tmp == 0) |
| 64 | udelay(50); |
| 65 | } while (tmp == 0 && retries-- > 0); |
| 66 | |
| 67 | return tmp; |
| 68 | } |
| 69 | |
| 70 | return inb(port); |
| 71 | } |
| 72 | |
| 73 | static void __devinit superio_ide_init_iops (struct hwif_s *hwif) |
| 74 | { |
| 75 | u32 base, dmabase; |
| 76 | u8 tmp; |
| 77 | struct pci_dev *pdev = hwif->pci_dev; |
| 78 | u8 port = hwif->channel; |
| 79 | |
| 80 | base = pci_resource_start(pdev, port * 2) & ~3; |
| 81 | dmabase = pci_resource_start(pdev, 4) & ~3; |
| 82 | |
| 83 | superio_ide_status[port] = base + IDE_STATUS_OFFSET; |
| 84 | superio_ide_select[port] = base + IDE_SELECT_OFFSET; |
| 85 | superio_ide_dma_status[port] = dmabase + (!port ? 2 : 0xa); |
| 86 | |
| 87 | /* Clear error/interrupt, enable dma */ |
| 88 | tmp = superio_ide_inb(superio_ide_dma_status[port]); |
| 89 | outb(tmp | 0x66, superio_ide_dma_status[port]); |
| 90 | |
| 91 | /* We need to override inb to workaround a SuperIO errata */ |
| 92 | hwif->INB = superio_ide_inb; |
| 93 | } |
| 94 | |
| 95 | static void __devinit init_iops_ns87415(ide_hwif_t *hwif) |
| 96 | { |
| 97 | if (PCI_SLOT(hwif->pci_dev->devfn) == 0xE) { |
| 98 | /* Built-in - assume it's under superio. */ |
| 99 | superio_ide_init_iops(hwif); |
| 100 | } |
| 101 | } |
| 102 | #endif |
| 103 | |
| 104 | static unsigned int ns87415_count = 0, ns87415_control[MAX_HWIFS] = { 0 }; |
| 105 | |
| 106 | /* |
| 107 | * This routine either enables/disables (according to drive->present) |
| 108 | * the IRQ associated with the port (HWIF(drive)), |
| 109 | * and selects either PIO or DMA handshaking for the next I/O operation. |
| 110 | */ |
| 111 | static void ns87415_prepare_drive (ide_drive_t *drive, unsigned int use_dma) |
| 112 | { |
| 113 | ide_hwif_t *hwif = HWIF(drive); |
| 114 | unsigned int bit, other, new, *old = (unsigned int *) hwif->select_data; |
| 115 | struct pci_dev *dev = hwif->pci_dev; |
| 116 | unsigned long flags; |
| 117 | |
| 118 | local_irq_save(flags); |
| 119 | new = *old; |
| 120 | |
| 121 | /* Adjust IRQ enable bit */ |
| 122 | bit = 1 << (8 + hwif->channel); |
| 123 | new = drive->present ? (new & ~bit) : (new | bit); |
| 124 | |
| 125 | /* Select PIO or DMA, DMA may only be selected for one drive/channel. */ |
| 126 | bit = 1 << (20 + drive->select.b.unit + (hwif->channel << 1)); |
| 127 | other = 1 << (20 + (1 - drive->select.b.unit) + (hwif->channel << 1)); |
| 128 | new = use_dma ? ((new & ~other) | bit) : (new & ~bit); |
| 129 | |
| 130 | if (new != *old) { |
| 131 | unsigned char stat; |
| 132 | |
| 133 | /* |
| 134 | * Don't change DMA engine settings while Write Buffers |
| 135 | * are busy. |
| 136 | */ |
| 137 | (void) pci_read_config_byte(dev, 0x43, &stat); |
| 138 | while (stat & 0x03) { |
| 139 | udelay(1); |
| 140 | (void) pci_read_config_byte(dev, 0x43, &stat); |
| 141 | } |
| 142 | |
| 143 | *old = new; |
| 144 | (void) pci_write_config_dword(dev, 0x40, new); |
| 145 | |
| 146 | /* |
| 147 | * And let things settle... |
| 148 | */ |
| 149 | udelay(10); |
| 150 | } |
| 151 | |
| 152 | local_irq_restore(flags); |
| 153 | } |
| 154 | |
| 155 | static void ns87415_selectproc (ide_drive_t *drive) |
| 156 | { |
| 157 | ns87415_prepare_drive (drive, drive->using_dma); |
| 158 | } |
| 159 | |
| 160 | static int ns87415_ide_dma_end (ide_drive_t *drive) |
| 161 | { |
| 162 | ide_hwif_t *hwif = HWIF(drive); |
| 163 | u8 dma_stat = 0, dma_cmd = 0; |
| 164 | |
| 165 | drive->waiting_for_dma = 0; |
| 166 | dma_stat = hwif->INB(hwif->dma_status); |
| 167 | /* get dma command mode */ |
| 168 | dma_cmd = hwif->INB(hwif->dma_command); |
| 169 | /* stop DMA */ |
| 170 | hwif->OUTB(dma_cmd & ~1, hwif->dma_command); |
| 171 | /* from ERRATA: clear the INTR & ERROR bits */ |
| 172 | dma_cmd = hwif->INB(hwif->dma_command); |
| 173 | hwif->OUTB(dma_cmd|6, hwif->dma_command); |
| 174 | /* and free any DMA resources */ |
| 175 | ide_destroy_dmatable(drive); |
| 176 | /* verify good DMA status */ |
| 177 | return (dma_stat & 7) != 4; |
| 178 | } |
| 179 | |
| 180 | static int ns87415_ide_dma_setup(ide_drive_t *drive) |
| 181 | { |
| 182 | /* select DMA xfer */ |
| 183 | ns87415_prepare_drive(drive, 1); |
| 184 | if (!ide_dma_setup(drive)) |
| 185 | return 0; |
| 186 | /* DMA failed: select PIO xfer */ |
| 187 | ns87415_prepare_drive(drive, 0); |
| 188 | return 1; |
| 189 | } |
| 190 | |
| 191 | static int ns87415_ide_dma_check (ide_drive_t *drive) |
| 192 | { |
| 193 | if (drive->media != ide_disk) |
| 194 | return HWIF(drive)->ide_dma_off_quietly(drive); |
| 195 | return __ide_dma_check(drive); |
| 196 | } |
| 197 | |
Herbert Xu | c20530e | 2005-07-03 16:31:04 +0200 | [diff] [blame] | 198 | static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 199 | { |
| 200 | struct pci_dev *dev = hwif->pci_dev; |
| 201 | unsigned int ctrl, using_inta; |
| 202 | u8 progif; |
| 203 | #ifdef __sparc_v9__ |
| 204 | int timeout; |
| 205 | u8 stat; |
| 206 | #endif |
| 207 | |
| 208 | hwif->autodma = 0; |
| 209 | hwif->selectproc = &ns87415_selectproc; |
| 210 | |
| 211 | /* |
| 212 | * We cannot probe for IRQ: both ports share common IRQ on INTA. |
| 213 | * Also, leave IRQ masked during drive probing, to prevent infinite |
| 214 | * interrupts from a potentially floating INTA.. |
| 215 | * |
| 216 | * IRQs get unmasked in selectproc when drive is first used. |
| 217 | */ |
| 218 | (void) pci_read_config_dword(dev, 0x40, &ctrl); |
| 219 | (void) pci_read_config_byte(dev, 0x09, &progif); |
| 220 | /* is irq in "native" mode? */ |
| 221 | using_inta = progif & (1 << (hwif->channel << 1)); |
| 222 | if (!using_inta) |
| 223 | using_inta = ctrl & (1 << (4 + hwif->channel)); |
| 224 | if (hwif->mate) { |
| 225 | hwif->select_data = hwif->mate->select_data; |
| 226 | } else { |
| 227 | hwif->select_data = (unsigned long) |
| 228 | &ns87415_control[ns87415_count++]; |
| 229 | ctrl |= (1 << 8) | (1 << 9); /* mask both IRQs */ |
| 230 | if (using_inta) |
| 231 | ctrl &= ~(1 << 6); /* unmask INTA */ |
| 232 | *((unsigned int *)hwif->select_data) = ctrl; |
| 233 | (void) pci_write_config_dword(dev, 0x40, ctrl); |
| 234 | |
| 235 | /* |
| 236 | * Set prefetch size to 512 bytes for both ports, |
| 237 | * but don't turn on/off prefetching here. |
| 238 | */ |
| 239 | pci_write_config_byte(dev, 0x55, 0xee); |
| 240 | |
| 241 | #ifdef __sparc_v9__ |
| 242 | /* |
| 243 | * XXX: Reset the device, if we don't it will not respond |
| 244 | * to SELECT_DRIVE() properly during first probe_hwif(). |
| 245 | */ |
| 246 | timeout = 10000; |
| 247 | hwif->OUTB(12, hwif->io_ports[IDE_CONTROL_OFFSET]); |
| 248 | udelay(10); |
| 249 | hwif->OUTB(8, hwif->io_ports[IDE_CONTROL_OFFSET]); |
| 250 | do { |
| 251 | udelay(50); |
| 252 | stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]); |
| 253 | if (stat == 0xff) |
| 254 | break; |
| 255 | } while ((stat & BUSY_STAT) && --timeout); |
| 256 | #endif |
| 257 | } |
| 258 | |
| 259 | if (!using_inta) |
| 260 | hwif->irq = ide_default_irq(hwif->io_ports[IDE_DATA_OFFSET]); |
| 261 | else if (!hwif->irq && hwif->mate && hwif->mate->irq) |
| 262 | hwif->irq = hwif->mate->irq; /* share IRQ with mate */ |
| 263 | |
| 264 | if (!hwif->dma_base) |
| 265 | return; |
| 266 | |
| 267 | hwif->OUTB(0x60, hwif->dma_status); |
| 268 | hwif->dma_setup = &ns87415_ide_dma_setup; |
| 269 | hwif->ide_dma_check = &ns87415_ide_dma_check; |
| 270 | hwif->ide_dma_end = &ns87415_ide_dma_end; |
| 271 | |
| 272 | if (!noautodma) |
| 273 | hwif->autodma = 1; |
| 274 | hwif->drives[0].autodma = hwif->autodma; |
| 275 | hwif->drives[1].autodma = hwif->autodma; |
| 276 | } |
| 277 | |
| 278 | static ide_pci_device_t ns87415_chipset __devinitdata = { |
| 279 | .name = "NS87415", |
| 280 | #ifdef CONFIG_SUPERIO |
| 281 | .init_iops = init_iops_ns87415, |
| 282 | #endif |
| 283 | .init_hwif = init_hwif_ns87415, |
| 284 | .channels = 2, |
| 285 | .autodma = AUTODMA, |
| 286 | .bootable = ON_BOARD, |
| 287 | }; |
| 288 | |
| 289 | static int __devinit ns87415_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
| 290 | { |
| 291 | return ide_setup_pci_device(dev, &ns87415_chipset); |
| 292 | } |
| 293 | |
| 294 | static struct pci_device_id ns87415_pci_tbl[] = { |
| 295 | { PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
| 296 | { 0, }, |
| 297 | }; |
| 298 | MODULE_DEVICE_TABLE(pci, ns87415_pci_tbl); |
| 299 | |
| 300 | static struct pci_driver driver = { |
| 301 | .name = "NS87415_IDE", |
| 302 | .id_table = ns87415_pci_tbl, |
| 303 | .probe = ns87415_init_one, |
| 304 | }; |
| 305 | |
| 306 | static int ns87415_ide_init(void) |
| 307 | { |
| 308 | return ide_pci_register_driver(&driver); |
| 309 | } |
| 310 | |
| 311 | module_init(ns87415_ide_init); |
| 312 | |
| 313 | MODULE_AUTHOR("Mark Lord, Eddie Dost, Andre Hedrick"); |
| 314 | MODULE_DESCRIPTION("PCI driver module for NS87415 IDE"); |
| 315 | MODULE_LICENSE("GPL"); |