Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1 | /* |
| 2 | * omap_hwmod implementation for OMAP2/3/4 |
| 3 | * |
Paul Walmsley | 550c809 | 2011-02-28 11:58:14 -0700 | [diff] [blame] | 4 | * Copyright (C) 2009-2011 Nokia Corporation |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 5 | * Copyright (C) 2011-2012 Texas Instruments, Inc. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 6 | * |
Paul Walmsley | 4788da2 | 2010-05-18 20:24:05 -0600 | [diff] [blame] | 7 | * Paul Walmsley, BenoƮt Cousson, Kevin Hilman |
| 8 | * |
| 9 | * Created in collaboration with (alphabetical order): Thara Gopinath, |
| 10 | * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand |
| 11 | * Sawant, Santosh Shilimkar, Richard Woodruff |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 12 | * |
| 13 | * This program is free software; you can redistribute it and/or modify |
| 14 | * it under the terms of the GNU General Public License version 2 as |
| 15 | * published by the Free Software Foundation. |
| 16 | * |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 17 | * Introduction |
| 18 | * ------------ |
| 19 | * One way to view an OMAP SoC is as a collection of largely unrelated |
| 20 | * IP blocks connected by interconnects. The IP blocks include |
| 21 | * devices such as ARM processors, audio serial interfaces, UARTs, |
| 22 | * etc. Some of these devices, like the DSP, are created by TI; |
| 23 | * others, like the SGX, largely originate from external vendors. In |
| 24 | * TI's documentation, on-chip devices are referred to as "OMAP |
| 25 | * modules." Some of these IP blocks are identical across several |
| 26 | * OMAP versions. Others are revised frequently. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 27 | * |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 28 | * These OMAP modules are tied together by various interconnects. |
| 29 | * Most of the address and data flow between modules is via OCP-based |
| 30 | * interconnects such as the L3 and L4 buses; but there are other |
| 31 | * interconnects that distribute the hardware clock tree, handle idle |
| 32 | * and reset signaling, supply power, and connect the modules to |
| 33 | * various pads or balls on the OMAP package. |
| 34 | * |
| 35 | * OMAP hwmod provides a consistent way to describe the on-chip |
| 36 | * hardware blocks and their integration into the rest of the chip. |
| 37 | * This description can be automatically generated from the TI |
| 38 | * hardware database. OMAP hwmod provides a standard, consistent API |
| 39 | * to reset, enable, idle, and disable these hardware blocks. And |
| 40 | * hwmod provides a way for other core code, such as the Linux device |
| 41 | * code or the OMAP power management and address space mapping code, |
| 42 | * to query the hardware database. |
| 43 | * |
| 44 | * Using hwmod |
| 45 | * ----------- |
| 46 | * Drivers won't call hwmod functions directly. That is done by the |
| 47 | * omap_device code, and in rare occasions, by custom integration code |
| 48 | * in arch/arm/ *omap*. The omap_device code includes functions to |
| 49 | * build a struct platform_device using omap_hwmod data, and that is |
| 50 | * currently how hwmod data is communicated to drivers and to the |
| 51 | * Linux driver model. Most drivers will call omap_hwmod functions only |
| 52 | * indirectly, via pm_runtime*() functions. |
| 53 | * |
| 54 | * From a layering perspective, here is where the OMAP hwmod code |
| 55 | * fits into the kernel software stack: |
| 56 | * |
| 57 | * +-------------------------------+ |
| 58 | * | Device driver code | |
| 59 | * | (e.g., drivers/) | |
| 60 | * +-------------------------------+ |
| 61 | * | Linux driver model | |
| 62 | * | (platform_device / | |
| 63 | * | platform_driver data/code) | |
| 64 | * +-------------------------------+ |
| 65 | * | OMAP core-driver integration | |
| 66 | * |(arch/arm/mach-omap2/devices.c)| |
| 67 | * +-------------------------------+ |
| 68 | * | omap_device code | |
| 69 | * | (../plat-omap/omap_device.c) | |
| 70 | * +-------------------------------+ |
| 71 | * ----> | omap_hwmod code/data | <----- |
| 72 | * | (../mach-omap2/omap_hwmod*) | |
| 73 | * +-------------------------------+ |
| 74 | * | OMAP clock/PRCM/register fns | |
Victor Kamensky | edfaf05 | 2014-04-15 20:37:46 +0300 | [diff] [blame] | 75 | * | ({read,write}l_relaxed, clk*) | |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 76 | * +-------------------------------+ |
| 77 | * |
| 78 | * Device drivers should not contain any OMAP-specific code or data in |
| 79 | * them. They should only contain code to operate the IP block that |
| 80 | * the driver is responsible for. This is because these IP blocks can |
| 81 | * also appear in other SoCs, either from TI (such as DaVinci) or from |
| 82 | * other manufacturers; and drivers should be reusable across other |
| 83 | * platforms. |
| 84 | * |
| 85 | * The OMAP hwmod code also will attempt to reset and idle all on-chip |
| 86 | * devices upon boot. The goal here is for the kernel to be |
| 87 | * completely self-reliant and independent from bootloaders. This is |
| 88 | * to ensure a repeatable configuration, both to ensure consistent |
| 89 | * runtime behavior, and to make it easier for others to reproduce |
| 90 | * bugs. |
| 91 | * |
| 92 | * OMAP module activity states |
| 93 | * --------------------------- |
| 94 | * The hwmod code considers modules to be in one of several activity |
| 95 | * states. IP blocks start out in an UNKNOWN state, then once they |
| 96 | * are registered via the hwmod code, proceed to the REGISTERED state. |
| 97 | * Once their clock names are resolved to clock pointers, the module |
| 98 | * enters the CLKS_INITED state; and finally, once the module has been |
| 99 | * reset and the integration registers programmed, the INITIALIZED state |
| 100 | * is entered. The hwmod code will then place the module into either |
| 101 | * the IDLE state to save power, or in the case of a critical system |
| 102 | * module, the ENABLED state. |
| 103 | * |
| 104 | * OMAP core integration code can then call omap_hwmod*() functions |
| 105 | * directly to move the module between the IDLE, ENABLED, and DISABLED |
| 106 | * states, as needed. This is done during both the PM idle loop, and |
| 107 | * in the OMAP core integration code's implementation of the PM runtime |
| 108 | * functions. |
| 109 | * |
| 110 | * References |
| 111 | * ---------- |
| 112 | * This is a partial list. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 113 | * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064) |
| 114 | * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090) |
| 115 | * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108) |
| 116 | * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140) |
| 117 | * - Open Core Protocol Specification 2.2 |
| 118 | * |
| 119 | * To do: |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 120 | * - handle IO mapping |
| 121 | * - bus throughput & module latency measurement code |
| 122 | * |
| 123 | * XXX add tests at the beginning of each function to ensure the hwmod is |
| 124 | * in the appropriate state |
| 125 | * XXX error return values should be checked to ensure that they are |
| 126 | * appropriate |
| 127 | */ |
| 128 | #undef DEBUG |
| 129 | |
| 130 | #include <linux/kernel.h> |
| 131 | #include <linux/errno.h> |
| 132 | #include <linux/io.h> |
Stephen Boyd | f5b00f6 | 2015-06-22 17:05:21 -0700 | [diff] [blame] | 133 | #include <linux/clk.h> |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 134 | #include <linux/clk-provider.h> |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 135 | #include <linux/delay.h> |
| 136 | #include <linux/err.h> |
| 137 | #include <linux/list.h> |
| 138 | #include <linux/mutex.h> |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 139 | #include <linux/spinlock.h> |
Tero Kristo | abc2d54 | 2011-12-16 14:36:59 -0700 | [diff] [blame] | 140 | #include <linux/slab.h> |
Thomas Gleixner | f7b861b | 2013-03-21 22:49:38 +0100 | [diff] [blame] | 141 | #include <linux/cpu.h> |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 142 | #include <linux/of.h> |
| 143 | #include <linux/of_address.h> |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 144 | #include <linux/bootmem.h> |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 145 | |
Tony Lindgren | 49a0a3d | 2017-12-15 09:41:05 -0800 | [diff] [blame] | 146 | #include <linux/platform_data/ti-sysc.h> |
| 147 | |
Tony Lindgren | 8c87970 | 2018-02-22 14:04:56 -0800 | [diff] [blame] | 148 | #include <dt-bindings/bus/ti-sysc.h> |
| 149 | |
Paul Walmsley | fa20022 | 2013-01-26 00:48:56 -0700 | [diff] [blame] | 150 | #include <asm/system_misc.h> |
| 151 | |
Paul Walmsley | a135eaa | 2012-09-27 10:33:34 -0600 | [diff] [blame] | 152 | #include "clock.h" |
Tony Lindgren | 2a296c8 | 2012-10-02 17:41:35 -0700 | [diff] [blame] | 153 | #include "omap_hwmod.h" |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 154 | |
Tony Lindgren | dbc0416 | 2012-08-31 10:59:07 -0700 | [diff] [blame] | 155 | #include "soc.h" |
| 156 | #include "common.h" |
| 157 | #include "clockdomain.h" |
| 158 | #include "powerdomain.h" |
Paul Walmsley | ff4ae5d | 2012-10-21 01:01:11 -0600 | [diff] [blame] | 159 | #include "cm2xxx.h" |
| 160 | #include "cm3xxx.h" |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 161 | #include "cm33xx.h" |
Paul Walmsley | b13159a | 2012-10-29 20:57:44 -0600 | [diff] [blame] | 162 | #include "prm.h" |
Paul Walmsley | 139563a | 2012-10-21 01:01:10 -0600 | [diff] [blame] | 163 | #include "prm3xxx.h" |
Paul Walmsley | d198b51 | 2010-12-21 15:30:54 -0700 | [diff] [blame] | 164 | #include "prm44xx.h" |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 165 | #include "prm33xx.h" |
Benoit Cousson | eaac329 | 2011-07-10 05:56:31 -0600 | [diff] [blame] | 166 | #include "prminst44xx.h" |
Vishwanath BS | 5165882 | 2012-06-22 08:40:04 -0600 | [diff] [blame] | 167 | #include "pm.h" |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 168 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 169 | /* Name of the OMAP hwmod for the MPU */ |
Benoit Cousson | 5c2c029 | 2010-05-20 12:31:10 -0600 | [diff] [blame] | 170 | #define MPU_INITIATOR_NAME "mpu" |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 171 | |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 172 | /* |
| 173 | * Number of struct omap_hwmod_link records per struct |
| 174 | * omap_hwmod_ocp_if record (master->slave and slave->master) |
| 175 | */ |
| 176 | #define LINKS_PER_OCP_IF 2 |
| 177 | |
Tero Kristo | 4ebf5b2 | 2015-05-05 16:33:04 +0300 | [diff] [blame] | 178 | /* |
| 179 | * Address offset (in bytes) between the reset control and the reset |
| 180 | * status registers: 4 bytes on OMAP4 |
| 181 | */ |
| 182 | #define OMAP4_RST_CTRL_ST_OFFSET 4 |
| 183 | |
Tero Kristo | 9fabc1a | 2016-07-04 14:11:48 +0300 | [diff] [blame] | 184 | /* |
| 185 | * Maximum length for module clock handle names |
| 186 | */ |
| 187 | #define MOD_CLK_MAX_NAME_LEN 32 |
| 188 | |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 189 | /** |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 190 | * struct clkctrl_provider - clkctrl provider mapping data |
| 191 | * @addr: base address for the provider |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 192 | * @size: size of the provider address space |
| 193 | * @offset: offset of the provider from PRCM instance base |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 194 | * @node: device node associated with the provider |
| 195 | * @link: list link |
| 196 | */ |
| 197 | struct clkctrl_provider { |
| 198 | u32 addr; |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 199 | u32 size; |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 200 | u16 offset; |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 201 | struct device_node *node; |
| 202 | struct list_head link; |
| 203 | }; |
| 204 | |
| 205 | static LIST_HEAD(clkctrl_providers); |
| 206 | |
| 207 | /** |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 208 | * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations |
| 209 | * @enable_module: function to enable a module (via MODULEMODE) |
| 210 | * @disable_module: function to disable a module (via MODULEMODE) |
| 211 | * |
| 212 | * XXX Eventually this functionality will be hidden inside the PRM/CM |
| 213 | * device drivers. Until then, this should avoid huge blocks of cpu_is_*() |
| 214 | * conditionals in this code. |
| 215 | */ |
| 216 | struct omap_hwmod_soc_ops { |
| 217 | void (*enable_module)(struct omap_hwmod *oh); |
| 218 | int (*disable_module)(struct omap_hwmod *oh); |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 219 | int (*wait_target_ready)(struct omap_hwmod *oh); |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 220 | int (*assert_hardreset)(struct omap_hwmod *oh, |
| 221 | struct omap_hwmod_rst_info *ohri); |
| 222 | int (*deassert_hardreset)(struct omap_hwmod *oh, |
| 223 | struct omap_hwmod_rst_info *ohri); |
| 224 | int (*is_hardreset_asserted)(struct omap_hwmod *oh, |
| 225 | struct omap_hwmod_rst_info *ohri); |
Kevin Hilman | 0a179ea | 2012-06-18 12:12:25 -0600 | [diff] [blame] | 226 | int (*init_clkdm)(struct omap_hwmod *oh); |
Rajendra Nayak | e6d3a8b | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 227 | void (*update_context_lost)(struct omap_hwmod *oh); |
| 228 | int (*get_context_lost)(struct omap_hwmod *oh); |
Tero Kristo | 9fabc1a | 2016-07-04 14:11:48 +0300 | [diff] [blame] | 229 | int (*disable_direct_prcm)(struct omap_hwmod *oh); |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 230 | u32 (*xlate_clkctrl)(struct omap_hwmod *oh); |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 231 | }; |
| 232 | |
| 233 | /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */ |
| 234 | static struct omap_hwmod_soc_ops soc_ops; |
| 235 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 236 | /* omap_hwmod_list contains all registered struct omap_hwmods */ |
| 237 | static LIST_HEAD(omap_hwmod_list); |
| 238 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 239 | /* mpu_oh: used to add/remove MPU initiator from sleepdep list */ |
| 240 | static struct omap_hwmod *mpu_oh; |
| 241 | |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 242 | /* inited: set to true once the hwmod code is initialized */ |
| 243 | static bool inited; |
| 244 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 245 | /* Private functions */ |
| 246 | |
| 247 | /** |
| 248 | * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy |
| 249 | * @oh: struct omap_hwmod * |
| 250 | * |
| 251 | * Load the current value of the hwmod OCP_SYSCONFIG register into the |
| 252 | * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no |
| 253 | * OCP_SYSCONFIG register or 0 upon success. |
| 254 | */ |
| 255 | static int _update_sysc_cache(struct omap_hwmod *oh) |
| 256 | { |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 257 | if (!oh->class->sysc) { |
| 258 | WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 259 | return -EINVAL; |
| 260 | } |
| 261 | |
| 262 | /* XXX ensure module interface clock is up */ |
| 263 | |
Rajendra Nayak | cc7a1d2 | 2010-10-08 10:23:22 -0700 | [diff] [blame] | 264 | oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 265 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 266 | if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE)) |
Thara Gopinath | 883edfd | 2010-01-19 17:30:51 -0700 | [diff] [blame] | 267 | oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 268 | |
| 269 | return 0; |
| 270 | } |
| 271 | |
| 272 | /** |
| 273 | * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register |
| 274 | * @v: OCP_SYSCONFIG value to write |
| 275 | * @oh: struct omap_hwmod * |
| 276 | * |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 277 | * Write @v into the module class' OCP_SYSCONFIG register, if it has |
| 278 | * one. No return value. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 279 | */ |
| 280 | static void _write_sysconfig(u32 v, struct omap_hwmod *oh) |
| 281 | { |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 282 | if (!oh->class->sysc) { |
| 283 | WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 284 | return; |
| 285 | } |
| 286 | |
| 287 | /* XXX ensure module interface clock is up */ |
| 288 | |
Rajendra Nayak | 233cbe5 | 2010-12-14 12:42:36 -0700 | [diff] [blame] | 289 | /* Module might have lost context, always update cache and register */ |
| 290 | oh->_sysc_cache = v; |
Lokesh Vutla | aaf2c0f | 2015-06-10 14:56:24 +0530 | [diff] [blame] | 291 | |
| 292 | /* |
| 293 | * Some IP blocks (such as RTC) require unlocking of IP before |
| 294 | * accessing its registers. If a function pointer is present |
| 295 | * to unlock, then call it before accessing sysconfig and |
| 296 | * call lock after writing sysconfig. |
| 297 | */ |
| 298 | if (oh->class->unlock) |
| 299 | oh->class->unlock(oh); |
| 300 | |
Rajendra Nayak | 233cbe5 | 2010-12-14 12:42:36 -0700 | [diff] [blame] | 301 | omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs); |
Lokesh Vutla | aaf2c0f | 2015-06-10 14:56:24 +0530 | [diff] [blame] | 302 | |
| 303 | if (oh->class->lock) |
| 304 | oh->class->lock(oh); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 305 | } |
| 306 | |
| 307 | /** |
| 308 | * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v |
| 309 | * @oh: struct omap_hwmod * |
| 310 | * @standbymode: MIDLEMODE field bits |
| 311 | * @v: pointer to register contents to modify |
| 312 | * |
| 313 | * Update the master standby mode bits in @v to be @standbymode for |
| 314 | * the @oh hwmod. Does not write to the hardware. Returns -EINVAL |
| 315 | * upon error or 0 upon success. |
| 316 | */ |
| 317 | static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode, |
| 318 | u32 *v) |
| 319 | { |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 320 | u32 mstandby_mask; |
| 321 | u8 mstandby_shift; |
| 322 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 323 | if (!oh->class->sysc || |
| 324 | !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE)) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 325 | return -EINVAL; |
| 326 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 327 | if (!oh->class->sysc->sysc_fields) { |
| 328 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 329 | return -EINVAL; |
| 330 | } |
| 331 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 332 | mstandby_shift = oh->class->sysc->sysc_fields->midle_shift; |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 333 | mstandby_mask = (0x3 << mstandby_shift); |
| 334 | |
| 335 | *v &= ~mstandby_mask; |
| 336 | *v |= __ffs(standbymode) << mstandby_shift; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 337 | |
| 338 | return 0; |
| 339 | } |
| 340 | |
| 341 | /** |
| 342 | * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v |
| 343 | * @oh: struct omap_hwmod * |
| 344 | * @idlemode: SIDLEMODE field bits |
| 345 | * @v: pointer to register contents to modify |
| 346 | * |
| 347 | * Update the slave idle mode bits in @v to be @idlemode for the @oh |
| 348 | * hwmod. Does not write to the hardware. Returns -EINVAL upon error |
| 349 | * or 0 upon success. |
| 350 | */ |
| 351 | static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v) |
| 352 | { |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 353 | u32 sidle_mask; |
| 354 | u8 sidle_shift; |
| 355 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 356 | if (!oh->class->sysc || |
| 357 | !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE)) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 358 | return -EINVAL; |
| 359 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 360 | if (!oh->class->sysc->sysc_fields) { |
| 361 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 362 | return -EINVAL; |
| 363 | } |
| 364 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 365 | sidle_shift = oh->class->sysc->sysc_fields->sidle_shift; |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 366 | sidle_mask = (0x3 << sidle_shift); |
| 367 | |
| 368 | *v &= ~sidle_mask; |
| 369 | *v |= __ffs(idlemode) << sidle_shift; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 370 | |
| 371 | return 0; |
| 372 | } |
| 373 | |
| 374 | /** |
| 375 | * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v |
| 376 | * @oh: struct omap_hwmod * |
| 377 | * @clockact: CLOCKACTIVITY field bits |
| 378 | * @v: pointer to register contents to modify |
| 379 | * |
| 380 | * Update the clockactivity mode bits in @v to be @clockact for the |
| 381 | * @oh hwmod. Used for additional powersaving on some modules. Does |
| 382 | * not write to the hardware. Returns -EINVAL upon error or 0 upon |
| 383 | * success. |
| 384 | */ |
| 385 | static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v) |
| 386 | { |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 387 | u32 clkact_mask; |
| 388 | u8 clkact_shift; |
| 389 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 390 | if (!oh->class->sysc || |
| 391 | !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY)) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 392 | return -EINVAL; |
| 393 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 394 | if (!oh->class->sysc->sysc_fields) { |
| 395 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 396 | return -EINVAL; |
| 397 | } |
| 398 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 399 | clkact_shift = oh->class->sysc->sysc_fields->clkact_shift; |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 400 | clkact_mask = (0x3 << clkact_shift); |
| 401 | |
| 402 | *v &= ~clkact_mask; |
| 403 | *v |= clockact << clkact_shift; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 404 | |
| 405 | return 0; |
| 406 | } |
| 407 | |
| 408 | /** |
Roger Quadros | 313a76e | 2013-12-08 18:39:02 -0700 | [diff] [blame] | 409 | * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 410 | * @oh: struct omap_hwmod * |
| 411 | * @v: pointer to register contents to modify |
| 412 | * |
| 413 | * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon |
| 414 | * error or 0 upon success. |
| 415 | */ |
| 416 | static int _set_softreset(struct omap_hwmod *oh, u32 *v) |
| 417 | { |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 418 | u32 softrst_mask; |
| 419 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 420 | if (!oh->class->sysc || |
| 421 | !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 422 | return -EINVAL; |
| 423 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 424 | if (!oh->class->sysc->sysc_fields) { |
| 425 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 426 | return -EINVAL; |
| 427 | } |
| 428 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 429 | softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 430 | |
| 431 | *v |= softrst_mask; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 432 | |
| 433 | return 0; |
| 434 | } |
| 435 | |
| 436 | /** |
Roger Quadros | 313a76e | 2013-12-08 18:39:02 -0700 | [diff] [blame] | 437 | * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v |
| 438 | * @oh: struct omap_hwmod * |
| 439 | * @v: pointer to register contents to modify |
| 440 | * |
| 441 | * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon |
| 442 | * error or 0 upon success. |
| 443 | */ |
| 444 | static int _clear_softreset(struct omap_hwmod *oh, u32 *v) |
| 445 | { |
| 446 | u32 softrst_mask; |
| 447 | |
| 448 | if (!oh->class->sysc || |
| 449 | !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) |
| 450 | return -EINVAL; |
| 451 | |
| 452 | if (!oh->class->sysc->sysc_fields) { |
| 453 | WARN(1, |
| 454 | "omap_hwmod: %s: sysc_fields absent for sysconfig class\n", |
| 455 | oh->name); |
| 456 | return -EINVAL; |
| 457 | } |
| 458 | |
| 459 | softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift); |
| 460 | |
| 461 | *v &= ~softrst_mask; |
| 462 | |
| 463 | return 0; |
| 464 | } |
| 465 | |
| 466 | /** |
Tero Kristo | 613ad0e | 2012-10-29 22:02:13 -0600 | [diff] [blame] | 467 | * _wait_softreset_complete - wait for an OCP softreset to complete |
| 468 | * @oh: struct omap_hwmod * to wait on |
| 469 | * |
| 470 | * Wait until the IP block represented by @oh reports that its OCP |
| 471 | * softreset is complete. This can be triggered by software (see |
| 472 | * _ocp_softreset()) or by hardware upon returning from off-mode (one |
| 473 | * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT |
| 474 | * microseconds. Returns the number of microseconds waited. |
| 475 | */ |
| 476 | static int _wait_softreset_complete(struct omap_hwmod *oh) |
| 477 | { |
| 478 | struct omap_hwmod_class_sysconfig *sysc; |
| 479 | u32 softrst_mask; |
| 480 | int c = 0; |
| 481 | |
| 482 | sysc = oh->class->sysc; |
| 483 | |
Tony Lindgren | 103fd8e | 2018-04-16 10:21:15 -0700 | [diff] [blame] | 484 | if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS && sysc->syss_offs > 0) |
Tero Kristo | 613ad0e | 2012-10-29 22:02:13 -0600 | [diff] [blame] | 485 | omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs) |
| 486 | & SYSS_RESETDONE_MASK), |
| 487 | MAX_MODULE_SOFTRESET_WAIT, c); |
| 488 | else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) { |
| 489 | softrst_mask = (0x1 << sysc->sysc_fields->srst_shift); |
| 490 | omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs) |
| 491 | & softrst_mask), |
| 492 | MAX_MODULE_SOFTRESET_WAIT, c); |
| 493 | } |
| 494 | |
| 495 | return c; |
| 496 | } |
| 497 | |
| 498 | /** |
Kishon Vijay Abraham I | 6668546 | 2012-07-04 05:09:21 -0600 | [diff] [blame] | 499 | * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v |
| 500 | * @oh: struct omap_hwmod * |
| 501 | * |
| 502 | * The DMADISABLE bit is a semi-automatic bit present in sysconfig register |
| 503 | * of some modules. When the DMA must perform read/write accesses, the |
| 504 | * DMADISABLE bit is cleared by the hardware. But when the DMA must stop |
| 505 | * for power management, software must set the DMADISABLE bit back to 1. |
| 506 | * |
| 507 | * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon |
| 508 | * error or 0 upon success. |
| 509 | */ |
| 510 | static int _set_dmadisable(struct omap_hwmod *oh) |
| 511 | { |
| 512 | u32 v; |
| 513 | u32 dmadisable_mask; |
| 514 | |
| 515 | if (!oh->class->sysc || |
| 516 | !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE)) |
| 517 | return -EINVAL; |
| 518 | |
| 519 | if (!oh->class->sysc->sysc_fields) { |
| 520 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
| 521 | return -EINVAL; |
| 522 | } |
| 523 | |
| 524 | /* clocks must be on for this operation */ |
| 525 | if (oh->_state != _HWMOD_STATE_ENABLED) { |
| 526 | pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name); |
| 527 | return -EINVAL; |
| 528 | } |
| 529 | |
| 530 | pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name); |
| 531 | |
| 532 | v = oh->_sysc_cache; |
| 533 | dmadisable_mask = |
| 534 | (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift); |
| 535 | v |= dmadisable_mask; |
| 536 | _write_sysconfig(v, oh); |
| 537 | |
| 538 | return 0; |
| 539 | } |
| 540 | |
| 541 | /** |
Paul Walmsley | 726072e | 2009-12-08 16:34:15 -0700 | [diff] [blame] | 542 | * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v |
| 543 | * @oh: struct omap_hwmod * |
| 544 | * @autoidle: desired AUTOIDLE bitfield value (0 or 1) |
| 545 | * @v: pointer to register contents to modify |
| 546 | * |
| 547 | * Update the module autoidle bit in @v to be @autoidle for the @oh |
| 548 | * hwmod. The autoidle bit controls whether the module can gate |
| 549 | * internal clocks automatically when it isn't doing anything; the |
| 550 | * exact function of this bit varies on a per-module basis. This |
| 551 | * function does not write to the hardware. Returns -EINVAL upon |
| 552 | * error or 0 upon success. |
| 553 | */ |
| 554 | static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle, |
| 555 | u32 *v) |
| 556 | { |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 557 | u32 autoidle_mask; |
| 558 | u8 autoidle_shift; |
| 559 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 560 | if (!oh->class->sysc || |
| 561 | !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE)) |
Paul Walmsley | 726072e | 2009-12-08 16:34:15 -0700 | [diff] [blame] | 562 | return -EINVAL; |
| 563 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 564 | if (!oh->class->sysc->sysc_fields) { |
| 565 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 566 | return -EINVAL; |
| 567 | } |
| 568 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 569 | autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift; |
Tarun Kanti DebBarma | 8985b63 | 2011-03-03 14:22:46 -0700 | [diff] [blame] | 570 | autoidle_mask = (0x1 << autoidle_shift); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 571 | |
| 572 | *v &= ~autoidle_mask; |
| 573 | *v |= autoidle << autoidle_shift; |
Paul Walmsley | 726072e | 2009-12-08 16:34:15 -0700 | [diff] [blame] | 574 | |
| 575 | return 0; |
| 576 | } |
| 577 | |
| 578 | /** |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 579 | * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware |
| 580 | * @oh: struct omap_hwmod * |
| 581 | * |
| 582 | * Allow the hardware module @oh to send wakeups. Returns -EINVAL |
| 583 | * upon error or 0 upon success. |
| 584 | */ |
Kevin Hilman | 5a7ddcb | 2010-12-21 21:08:34 -0700 | [diff] [blame] | 585 | static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 586 | { |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 587 | if (!oh->class->sysc || |
Benoit Cousson | 86009eb | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 588 | !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || |
Benoit Cousson | 724019b | 2011-07-01 22:54:00 +0200 | [diff] [blame] | 589 | (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || |
| 590 | (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 591 | return -EINVAL; |
| 592 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 593 | if (!oh->class->sysc->sysc_fields) { |
| 594 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 595 | return -EINVAL; |
| 596 | } |
| 597 | |
Benoit Cousson | 1fe7411 | 2011-07-01 22:54:03 +0200 | [diff] [blame] | 598 | if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) |
| 599 | *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 600 | |
Benoit Cousson | 86009eb | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 601 | if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) |
| 602 | _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); |
Benoit Cousson | 724019b | 2011-07-01 22:54:00 +0200 | [diff] [blame] | 603 | if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) |
| 604 | _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); |
Benoit Cousson | 86009eb | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 605 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 606 | /* XXX test pwrdm_get_wken for this hwmod's subsystem */ |
| 607 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 608 | return 0; |
| 609 | } |
| 610 | |
| 611 | /** |
| 612 | * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware |
| 613 | * @oh: struct omap_hwmod * |
| 614 | * |
| 615 | * Prevent the hardware module @oh to send wakeups. Returns -EINVAL |
| 616 | * upon error or 0 upon success. |
| 617 | */ |
Kevin Hilman | 5a7ddcb | 2010-12-21 21:08:34 -0700 | [diff] [blame] | 618 | static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 619 | { |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 620 | if (!oh->class->sysc || |
Benoit Cousson | 86009eb | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 621 | !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || |
Benoit Cousson | 724019b | 2011-07-01 22:54:00 +0200 | [diff] [blame] | 622 | (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || |
| 623 | (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 624 | return -EINVAL; |
| 625 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 626 | if (!oh->class->sysc->sysc_fields) { |
| 627 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 628 | return -EINVAL; |
| 629 | } |
| 630 | |
Benoit Cousson | 1fe7411 | 2011-07-01 22:54:03 +0200 | [diff] [blame] | 631 | if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) |
| 632 | *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 633 | |
Benoit Cousson | 86009eb | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 634 | if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) |
| 635 | _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); |
Benoit Cousson | 724019b | 2011-07-01 22:54:00 +0200 | [diff] [blame] | 636 | if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) |
Djamil Elaidi | 561038f | 2012-06-17 11:57:51 -0600 | [diff] [blame] | 637 | _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v); |
Benoit Cousson | 86009eb | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 638 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 639 | /* XXX test pwrdm_get_wken for this hwmod's subsystem */ |
| 640 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 641 | return 0; |
| 642 | } |
| 643 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 644 | static struct clockdomain *_get_clkdm(struct omap_hwmod *oh) |
| 645 | { |
Rajendra Nayak | c4a1ea2 | 2012-04-27 16:32:53 +0530 | [diff] [blame] | 646 | struct clk_hw_omap *clk; |
| 647 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 648 | if (oh->clkdm) { |
| 649 | return oh->clkdm; |
| 650 | } else if (oh->_clk) { |
Tero Kristo | 924f949 | 2013-07-12 12:26:41 +0300 | [diff] [blame] | 651 | if (__clk_get_flags(oh->_clk) & CLK_IS_BASIC) |
| 652 | return NULL; |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 653 | clk = to_clk_hw_omap(__clk_get_hw(oh->_clk)); |
| 654 | return clk->clkdm; |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 655 | } |
| 656 | return NULL; |
| 657 | } |
| 658 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 659 | /** |
| 660 | * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active |
| 661 | * @oh: struct omap_hwmod * |
| 662 | * |
| 663 | * Prevent the hardware module @oh from entering idle while the |
| 664 | * hardare module initiator @init_oh is active. Useful when a module |
| 665 | * will be accessed by a particular initiator (e.g., if a module will |
| 666 | * be accessed by the IVA, there should be a sleepdep between the IVA |
| 667 | * initiator and the module). Only applies to modules in smart-idle |
Paul Walmsley | 570b54c | 2011-03-10 03:50:09 -0700 | [diff] [blame] | 668 | * mode. If the clockdomain is marked as not needing autodeps, return |
| 669 | * 0 without doing anything. Otherwise, returns -EINVAL upon error or |
| 670 | * passes along clkdm_add_sleepdep() value upon success. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 671 | */ |
| 672 | static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) |
| 673 | { |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 674 | struct clockdomain *clkdm, *init_clkdm; |
| 675 | |
| 676 | clkdm = _get_clkdm(oh); |
| 677 | init_clkdm = _get_clkdm(init_oh); |
| 678 | |
| 679 | if (!clkdm || !init_clkdm) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 680 | return -EINVAL; |
| 681 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 682 | if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS) |
Paul Walmsley | 570b54c | 2011-03-10 03:50:09 -0700 | [diff] [blame] | 683 | return 0; |
| 684 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 685 | return clkdm_add_sleepdep(clkdm, init_clkdm); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 686 | } |
| 687 | |
| 688 | /** |
| 689 | * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active |
| 690 | * @oh: struct omap_hwmod * |
| 691 | * |
| 692 | * Allow the hardware module @oh to enter idle while the hardare |
| 693 | * module initiator @init_oh is active. Useful when a module will not |
| 694 | * be accessed by a particular initiator (e.g., if a module will not |
| 695 | * be accessed by the IVA, there should be no sleepdep between the IVA |
| 696 | * initiator and the module). Only applies to modules in smart-idle |
Paul Walmsley | 570b54c | 2011-03-10 03:50:09 -0700 | [diff] [blame] | 697 | * mode. If the clockdomain is marked as not needing autodeps, return |
| 698 | * 0 without doing anything. Returns -EINVAL upon error or passes |
| 699 | * along clkdm_del_sleepdep() value upon success. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 700 | */ |
| 701 | static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) |
| 702 | { |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 703 | struct clockdomain *clkdm, *init_clkdm; |
| 704 | |
| 705 | clkdm = _get_clkdm(oh); |
| 706 | init_clkdm = _get_clkdm(init_oh); |
| 707 | |
| 708 | if (!clkdm || !init_clkdm) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 709 | return -EINVAL; |
| 710 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 711 | if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS) |
Paul Walmsley | 570b54c | 2011-03-10 03:50:09 -0700 | [diff] [blame] | 712 | return 0; |
| 713 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 714 | return clkdm_del_sleepdep(clkdm, init_clkdm); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 715 | } |
| 716 | |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 717 | static const struct of_device_id ti_clkctrl_match_table[] __initconst = { |
| 718 | { .compatible = "ti,clkctrl" }, |
| 719 | { } |
| 720 | }; |
| 721 | |
Arnd Bergmann | 0ca14cd | 2017-09-14 14:50:58 +0200 | [diff] [blame] | 722 | static int __init _setup_clkctrl_provider(struct device_node *np) |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 723 | { |
| 724 | const __be32 *addrp; |
| 725 | struct clkctrl_provider *provider; |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 726 | u64 size; |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 727 | |
| 728 | provider = memblock_virt_alloc(sizeof(*provider), 0); |
| 729 | if (!provider) |
| 730 | return -ENOMEM; |
| 731 | |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 732 | addrp = of_get_address(np, 0, &size, NULL); |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 733 | provider->addr = (u32)of_translate_address(np, addrp); |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 734 | addrp = of_get_address(np->parent, 0, NULL, NULL); |
| 735 | provider->offset = provider->addr - |
| 736 | (u32)of_translate_address(np->parent, addrp); |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 737 | provider->addr &= ~0xff; |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 738 | provider->size = size | 0xff; |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 739 | provider->node = np; |
| 740 | |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 741 | pr_debug("%s: %s: %x...%x [+%x]\n", __func__, np->parent->name, |
| 742 | provider->addr, provider->addr + provider->size, |
| 743 | provider->offset); |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 744 | |
| 745 | list_add(&provider->link, &clkctrl_providers); |
| 746 | |
| 747 | return 0; |
| 748 | } |
| 749 | |
Arnd Bergmann | 0ca14cd | 2017-09-14 14:50:58 +0200 | [diff] [blame] | 750 | static int __init _init_clkctrl_providers(void) |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 751 | { |
| 752 | struct device_node *np; |
| 753 | int ret = 0; |
| 754 | |
| 755 | for_each_matching_node(np, ti_clkctrl_match_table) { |
| 756 | ret = _setup_clkctrl_provider(np); |
| 757 | if (ret) |
| 758 | break; |
| 759 | } |
| 760 | |
| 761 | return ret; |
| 762 | } |
| 763 | |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 764 | static u32 _omap4_xlate_clkctrl(struct omap_hwmod *oh) |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 765 | { |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 766 | if (!oh->prcm.omap4.modulemode) |
| 767 | return 0; |
| 768 | |
| 769 | return omap_cm_xlate_clkctrl(oh->clkdm->prcm_partition, |
| 770 | oh->clkdm->cm_inst, |
| 771 | oh->prcm.omap4.clkctrl_offs); |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 772 | } |
| 773 | |
| 774 | static struct clk *_lookup_clkctrl_clk(struct omap_hwmod *oh) |
| 775 | { |
| 776 | struct clkctrl_provider *provider; |
| 777 | struct clk *clk; |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 778 | u32 addr; |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 779 | |
| 780 | if (!soc_ops.xlate_clkctrl) |
| 781 | return NULL; |
| 782 | |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 783 | addr = soc_ops.xlate_clkctrl(oh); |
| 784 | if (!addr) |
| 785 | return NULL; |
| 786 | |
| 787 | pr_debug("%s: %s: addr=%x\n", __func__, oh->name, addr); |
| 788 | |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 789 | list_for_each_entry(provider, &clkctrl_providers, link) { |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 790 | if (provider->addr <= addr && |
| 791 | provider->addr + provider->size >= addr) { |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 792 | struct of_phandle_args clkspec; |
| 793 | |
| 794 | clkspec.np = provider->node; |
| 795 | clkspec.args_count = 2; |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 796 | clkspec.args[0] = addr - provider->addr - |
| 797 | provider->offset; |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 798 | clkspec.args[1] = 0; |
| 799 | |
| 800 | clk = of_clk_get_from_provider(&clkspec); |
| 801 | |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 802 | pr_debug("%s: %s got %p (offset=%x, provider=%s)\n", |
| 803 | __func__, oh->name, clk, clkspec.args[0], |
| 804 | provider->node->parent->name); |
| 805 | |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 806 | return clk; |
| 807 | } |
| 808 | } |
| 809 | |
| 810 | return NULL; |
| 811 | } |
| 812 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 813 | /** |
| 814 | * _init_main_clk - get a struct clk * for the the hwmod's main functional clk |
| 815 | * @oh: struct omap_hwmod * |
| 816 | * |
| 817 | * Called from _init_clocks(). Populates the @oh _clk (main |
Tero Kristo | 9fabc1a | 2016-07-04 14:11:48 +0300 | [diff] [blame] | 818 | * functional clock pointer) if a clock matching the hwmod name is found, |
| 819 | * or a main_clk is present. Returns 0 on success or -EINVAL on error. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 820 | */ |
| 821 | static int _init_main_clk(struct omap_hwmod *oh) |
| 822 | { |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 823 | int ret = 0; |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 824 | struct clk *clk = NULL; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 825 | |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 826 | clk = _lookup_clkctrl_clk(oh); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 827 | |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 828 | if (!IS_ERR_OR_NULL(clk)) { |
| 829 | pr_debug("%s: mapped main_clk %s for %s\n", __func__, |
| 830 | __clk_get_name(clk), oh->name); |
| 831 | oh->main_clk = __clk_get_name(clk); |
Tero Kristo | 9fabc1a | 2016-07-04 14:11:48 +0300 | [diff] [blame] | 832 | oh->_clk = clk; |
| 833 | soc_ops.disable_direct_prcm(oh); |
Tero Kristo | 9fabc1a | 2016-07-04 14:11:48 +0300 | [diff] [blame] | 834 | } else { |
| 835 | if (!oh->main_clk) |
| 836 | return 0; |
| 837 | |
| 838 | oh->_clk = clk_get(NULL, oh->main_clk); |
| 839 | } |
| 840 | |
Rajendra Nayak | 6ea74cb | 2012-09-22 02:24:16 -0600 | [diff] [blame] | 841 | if (IS_ERR(oh->_clk)) { |
Joe Perches | 3d0cb73 | 2014-09-13 11:31:16 -0700 | [diff] [blame] | 842 | pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n", |
| 843 | oh->name, oh->main_clk); |
Benoit Cousson | 6340338 | 2010-05-20 12:31:10 -0600 | [diff] [blame] | 844 | return -EINVAL; |
Benoit Cousson | dc75925 | 2010-06-23 18:15:12 -0600 | [diff] [blame] | 845 | } |
Rajendra Nayak | 4d7cb45 | 2012-09-22 02:24:16 -0600 | [diff] [blame] | 846 | /* |
| 847 | * HACK: This needs a re-visit once clk_prepare() is implemented |
| 848 | * to do something meaningful. Today its just a no-op. |
| 849 | * If clk_prepare() is used at some point to do things like |
| 850 | * voltage scaling etc, then this would have to be moved to |
| 851 | * some point where subsystems like i2c and pmic become |
| 852 | * available. |
| 853 | */ |
| 854 | clk_prepare(oh->_clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 855 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 856 | if (!_get_clkdm(oh)) |
Paul Walmsley | 3bb05db | 2012-09-23 17:28:18 -0600 | [diff] [blame] | 857 | pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n", |
Rajendra Nayak | 5dcc3b9 | 2012-09-22 02:24:17 -0600 | [diff] [blame] | 858 | oh->name, oh->main_clk); |
Kevin Hilman | 81d7c6f | 2009-12-08 16:34:24 -0700 | [diff] [blame] | 859 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 860 | return ret; |
| 861 | } |
| 862 | |
| 863 | /** |
Paul Walmsley | 887adea | 2010-07-26 16:34:33 -0600 | [diff] [blame] | 864 | * _init_interface_clks - get a struct clk * for the the hwmod's interface clks |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 865 | * @oh: struct omap_hwmod * |
| 866 | * |
| 867 | * Called from _init_clocks(). Populates the @oh OCP slave interface |
| 868 | * clock pointers. Returns 0 on success or -EINVAL on error. |
| 869 | */ |
| 870 | static int _init_interface_clks(struct omap_hwmod *oh) |
| 871 | { |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 872 | struct omap_hwmod_ocp_if *os; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 873 | struct clk *c; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 874 | int ret = 0; |
| 875 | |
Tony Lindgren | b8e1bdd | 2017-03-14 13:13:19 -0700 | [diff] [blame] | 876 | list_for_each_entry(os, &oh->slave_ports, node) { |
Paul Walmsley | 50ebdac | 2010-02-22 22:09:31 -0700 | [diff] [blame] | 877 | if (!os->clk) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 878 | continue; |
| 879 | |
Rajendra Nayak | 6ea74cb | 2012-09-22 02:24:16 -0600 | [diff] [blame] | 880 | c = clk_get(NULL, os->clk); |
| 881 | if (IS_ERR(c)) { |
Joe Perches | 3d0cb73 | 2014-09-13 11:31:16 -0700 | [diff] [blame] | 882 | pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n", |
| 883 | oh->name, os->clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 884 | ret = -EINVAL; |
Nishanth Menon | 0e7dc86 | 2013-12-08 18:39:03 -0700 | [diff] [blame] | 885 | continue; |
Benoit Cousson | dc75925 | 2010-06-23 18:15:12 -0600 | [diff] [blame] | 886 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 887 | os->_clk = c; |
Rajendra Nayak | 4d7cb45 | 2012-09-22 02:24:16 -0600 | [diff] [blame] | 888 | /* |
| 889 | * HACK: This needs a re-visit once clk_prepare() is implemented |
| 890 | * to do something meaningful. Today its just a no-op. |
| 891 | * If clk_prepare() is used at some point to do things like |
| 892 | * voltage scaling etc, then this would have to be moved to |
| 893 | * some point where subsystems like i2c and pmic become |
| 894 | * available. |
| 895 | */ |
| 896 | clk_prepare(os->_clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 897 | } |
| 898 | |
| 899 | return ret; |
| 900 | } |
| 901 | |
| 902 | /** |
| 903 | * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks |
| 904 | * @oh: struct omap_hwmod * |
| 905 | * |
| 906 | * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk |
| 907 | * clock pointers. Returns 0 on success or -EINVAL on error. |
| 908 | */ |
| 909 | static int _init_opt_clks(struct omap_hwmod *oh) |
| 910 | { |
| 911 | struct omap_hwmod_opt_clk *oc; |
| 912 | struct clk *c; |
| 913 | int i; |
| 914 | int ret = 0; |
| 915 | |
| 916 | for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) { |
Rajendra Nayak | 6ea74cb | 2012-09-22 02:24:16 -0600 | [diff] [blame] | 917 | c = clk_get(NULL, oc->clk); |
| 918 | if (IS_ERR(c)) { |
Joe Perches | 3d0cb73 | 2014-09-13 11:31:16 -0700 | [diff] [blame] | 919 | pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n", |
| 920 | oh->name, oc->clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 921 | ret = -EINVAL; |
Nishanth Menon | 0e7dc86 | 2013-12-08 18:39:03 -0700 | [diff] [blame] | 922 | continue; |
Benoit Cousson | dc75925 | 2010-06-23 18:15:12 -0600 | [diff] [blame] | 923 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 924 | oc->_clk = c; |
Rajendra Nayak | 4d7cb45 | 2012-09-22 02:24:16 -0600 | [diff] [blame] | 925 | /* |
| 926 | * HACK: This needs a re-visit once clk_prepare() is implemented |
| 927 | * to do something meaningful. Today its just a no-op. |
| 928 | * If clk_prepare() is used at some point to do things like |
| 929 | * voltage scaling etc, then this would have to be moved to |
| 930 | * some point where subsystems like i2c and pmic become |
| 931 | * available. |
| 932 | */ |
| 933 | clk_prepare(oc->_clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 934 | } |
| 935 | |
| 936 | return ret; |
| 937 | } |
| 938 | |
Peter Ujfalusi | c12ba8c | 2015-11-12 09:32:58 +0200 | [diff] [blame] | 939 | static void _enable_optional_clocks(struct omap_hwmod *oh) |
| 940 | { |
| 941 | struct omap_hwmod_opt_clk *oc; |
| 942 | int i; |
| 943 | |
| 944 | pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name); |
| 945 | |
| 946 | for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) |
| 947 | if (oc->_clk) { |
| 948 | pr_debug("omap_hwmod: enable %s:%s\n", oc->role, |
| 949 | __clk_get_name(oc->_clk)); |
| 950 | clk_enable(oc->_clk); |
| 951 | } |
| 952 | } |
| 953 | |
| 954 | static void _disable_optional_clocks(struct omap_hwmod *oh) |
| 955 | { |
| 956 | struct omap_hwmod_opt_clk *oc; |
| 957 | int i; |
| 958 | |
| 959 | pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name); |
| 960 | |
| 961 | for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) |
| 962 | if (oc->_clk) { |
| 963 | pr_debug("omap_hwmod: disable %s:%s\n", oc->role, |
| 964 | __clk_get_name(oc->_clk)); |
| 965 | clk_disable(oc->_clk); |
| 966 | } |
| 967 | } |
| 968 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 969 | /** |
| 970 | * _enable_clocks - enable hwmod main clock and interface clocks |
| 971 | * @oh: struct omap_hwmod * |
| 972 | * |
| 973 | * Enables all clocks necessary for register reads and writes to succeed |
| 974 | * on the hwmod @oh. Returns 0. |
| 975 | */ |
| 976 | static int _enable_clocks(struct omap_hwmod *oh) |
| 977 | { |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 978 | struct omap_hwmod_ocp_if *os; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 979 | |
| 980 | pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name); |
| 981 | |
Tero Kristo | 392ea5d | 2017-12-22 11:26:03 +0200 | [diff] [blame] | 982 | if (oh->flags & HWMOD_OPT_CLKS_NEEDED) |
| 983 | _enable_optional_clocks(oh); |
| 984 | |
Benoit Cousson | 4d3ae5a | 2010-05-20 12:31:09 -0600 | [diff] [blame] | 985 | if (oh->_clk) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 986 | clk_enable(oh->_clk); |
| 987 | |
Tony Lindgren | b8e1bdd | 2017-03-14 13:13:19 -0700 | [diff] [blame] | 988 | list_for_each_entry(os, &oh->slave_ports, node) { |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 989 | if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) |
| 990 | clk_enable(os->_clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 991 | } |
| 992 | |
| 993 | /* The opt clocks are controlled by the device driver. */ |
| 994 | |
| 995 | return 0; |
| 996 | } |
| 997 | |
| 998 | /** |
Tony Lindgren | 8823ddf | 2017-08-29 10:03:33 -0700 | [diff] [blame] | 999 | * _omap4_clkctrl_managed_by_clkfwk - true if clkctrl managed by clock framework |
| 1000 | * @oh: struct omap_hwmod * |
| 1001 | */ |
| 1002 | static bool _omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod *oh) |
| 1003 | { |
| 1004 | if (oh->prcm.omap4.flags & HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK) |
| 1005 | return true; |
| 1006 | |
| 1007 | return false; |
| 1008 | } |
| 1009 | |
| 1010 | /** |
| 1011 | * _omap4_has_clkctrl_clock - returns true if a module has clkctrl clock |
| 1012 | * @oh: struct omap_hwmod * |
| 1013 | */ |
| 1014 | static bool _omap4_has_clkctrl_clock(struct omap_hwmod *oh) |
| 1015 | { |
| 1016 | if (oh->prcm.omap4.clkctrl_offs) |
| 1017 | return true; |
| 1018 | |
| 1019 | if (!oh->prcm.omap4.clkctrl_offs && |
| 1020 | oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET) |
| 1021 | return true; |
| 1022 | |
| 1023 | return false; |
| 1024 | } |
| 1025 | |
| 1026 | /** |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1027 | * _disable_clocks - disable hwmod main clock and interface clocks |
| 1028 | * @oh: struct omap_hwmod * |
| 1029 | * |
| 1030 | * Disables the hwmod @oh main functional and interface clocks. Returns 0. |
| 1031 | */ |
| 1032 | static int _disable_clocks(struct omap_hwmod *oh) |
| 1033 | { |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 1034 | struct omap_hwmod_ocp_if *os; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1035 | |
| 1036 | pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name); |
| 1037 | |
Benoit Cousson | 4d3ae5a | 2010-05-20 12:31:09 -0600 | [diff] [blame] | 1038 | if (oh->_clk) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1039 | clk_disable(oh->_clk); |
| 1040 | |
Tony Lindgren | b8e1bdd | 2017-03-14 13:13:19 -0700 | [diff] [blame] | 1041 | list_for_each_entry(os, &oh->slave_ports, node) { |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 1042 | if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) |
| 1043 | clk_disable(os->_clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1044 | } |
| 1045 | |
Peter Ujfalusi | c12ba8c | 2015-11-12 09:32:58 +0200 | [diff] [blame] | 1046 | if (oh->flags & HWMOD_OPT_CLKS_NEEDED) |
| 1047 | _disable_optional_clocks(oh); |
| 1048 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1049 | /* The opt clocks are controlled by the device driver. */ |
| 1050 | |
| 1051 | return 0; |
| 1052 | } |
| 1053 | |
| 1054 | /** |
Kevin Hilman | 3d9f032 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 1055 | * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4 |
Benoit Cousson | 45c3825 | 2011-07-10 05:56:33 -0600 | [diff] [blame] | 1056 | * @oh: struct omap_hwmod * |
| 1057 | * |
| 1058 | * Enables the PRCM module mode related to the hwmod @oh. |
| 1059 | * No return value. |
| 1060 | */ |
Kevin Hilman | 3d9f032 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 1061 | static void _omap4_enable_module(struct omap_hwmod *oh) |
Benoit Cousson | 45c3825 | 2011-07-10 05:56:33 -0600 | [diff] [blame] | 1062 | { |
Tony Lindgren | 8823ddf | 2017-08-29 10:03:33 -0700 | [diff] [blame] | 1063 | if (!oh->clkdm || !oh->prcm.omap4.modulemode || |
| 1064 | _omap4_clkctrl_managed_by_clkfwk(oh)) |
Benoit Cousson | 45c3825 | 2011-07-10 05:56:33 -0600 | [diff] [blame] | 1065 | return; |
| 1066 | |
Kevin Hilman | 3d9f032 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 1067 | pr_debug("omap_hwmod: %s: %s: %d\n", |
| 1068 | oh->name, __func__, oh->prcm.omap4.modulemode); |
Benoit Cousson | 45c3825 | 2011-07-10 05:56:33 -0600 | [diff] [blame] | 1069 | |
Tero Kristo | 128603f | 2014-10-27 08:39:24 -0700 | [diff] [blame] | 1070 | omap_cm_module_enable(oh->prcm.omap4.modulemode, |
| 1071 | oh->clkdm->prcm_partition, |
| 1072 | oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs); |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 1073 | } |
| 1074 | |
| 1075 | /** |
Benoit Cousson | bfc141e | 2011-12-16 16:09:11 -0800 | [diff] [blame] | 1076 | * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4 |
| 1077 | * @oh: struct omap_hwmod * |
| 1078 | * |
| 1079 | * Wait for a module @oh to enter slave idle. Returns 0 if the module |
| 1080 | * does not have an IDLEST bit or if the module successfully enters |
| 1081 | * slave idle; otherwise, pass along the return value of the |
| 1082 | * appropriate *_cm*_wait_module_idle() function. |
| 1083 | */ |
| 1084 | static int _omap4_wait_target_disable(struct omap_hwmod *oh) |
| 1085 | { |
Paul Walmsley | 2b026d1 | 2012-09-23 17:28:18 -0600 | [diff] [blame] | 1086 | if (!oh) |
Benoit Cousson | bfc141e | 2011-12-16 16:09:11 -0800 | [diff] [blame] | 1087 | return -EINVAL; |
| 1088 | |
Paul Walmsley | 2b026d1 | 2012-09-23 17:28:18 -0600 | [diff] [blame] | 1089 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm) |
Benoit Cousson | bfc141e | 2011-12-16 16:09:11 -0800 | [diff] [blame] | 1090 | return 0; |
| 1091 | |
| 1092 | if (oh->flags & HWMOD_NO_IDLEST) |
| 1093 | return 0; |
| 1094 | |
Tony Lindgren | 8823ddf | 2017-08-29 10:03:33 -0700 | [diff] [blame] | 1095 | if (_omap4_clkctrl_managed_by_clkfwk(oh)) |
| 1096 | return 0; |
| 1097 | |
| 1098 | if (!_omap4_has_clkctrl_clock(oh)) |
Dave Gerlach | 428929c | 2016-07-12 12:50:33 -0500 | [diff] [blame] | 1099 | return 0; |
| 1100 | |
Tero Kristo | a8ae5af | 2014-10-27 08:39:23 -0700 | [diff] [blame] | 1101 | return omap_cm_wait_module_idle(oh->clkdm->prcm_partition, |
| 1102 | oh->clkdm->cm_inst, |
| 1103 | oh->prcm.omap4.clkctrl_offs, 0); |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 1104 | } |
| 1105 | |
| 1106 | /** |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1107 | * _save_mpu_port_index - find and save the index to @oh's MPU port |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1108 | * @oh: struct omap_hwmod * |
| 1109 | * |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1110 | * Determines the array index of the OCP slave port that the MPU uses |
| 1111 | * to address the device, and saves it into the struct omap_hwmod. |
| 1112 | * Intended to be called during hwmod registration only. No return |
| 1113 | * value. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1114 | */ |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1115 | static void __init _save_mpu_port_index(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1116 | { |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1117 | struct omap_hwmod_ocp_if *os = NULL; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1118 | |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 1119 | if (!oh) |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1120 | return; |
| 1121 | |
| 1122 | oh->_int_flags |= _HWMOD_NO_MPU_PORT; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1123 | |
Tony Lindgren | b8e1bdd | 2017-03-14 13:13:19 -0700 | [diff] [blame] | 1124 | list_for_each_entry(os, &oh->slave_ports, node) { |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1125 | if (os->user & OCP_USER_MPU) { |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 1126 | oh->_mpu_port = os; |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1127 | oh->_int_flags &= ~_HWMOD_NO_MPU_PORT; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1128 | break; |
| 1129 | } |
| 1130 | } |
| 1131 | |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1132 | return; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1133 | } |
| 1134 | |
| 1135 | /** |
Paul Walmsley | 2d6141b | 2012-04-19 04:04:27 -0600 | [diff] [blame] | 1136 | * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU |
| 1137 | * @oh: struct omap_hwmod * |
| 1138 | * |
| 1139 | * Given a pointer to a struct omap_hwmod record @oh, return a pointer |
| 1140 | * to the struct omap_hwmod_ocp_if record that is used by the MPU to |
| 1141 | * communicate with the IP block. This interface need not be directly |
| 1142 | * connected to the MPU (and almost certainly is not), but is directly |
| 1143 | * connected to the IP block represented by @oh. Returns a pointer |
| 1144 | * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon |
| 1145 | * error or if there does not appear to be a path from the MPU to this |
| 1146 | * IP block. |
| 1147 | */ |
| 1148 | static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh) |
| 1149 | { |
| 1150 | if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0) |
| 1151 | return NULL; |
| 1152 | |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 1153 | return oh->_mpu_port; |
Paul Walmsley | 2d6141b | 2012-04-19 04:04:27 -0600 | [diff] [blame] | 1154 | }; |
| 1155 | |
| 1156 | /** |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 1157 | * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1158 | * @oh: struct omap_hwmod * |
| 1159 | * |
Paul Walmsley | 006c7f1 | 2012-07-04 05:22:53 -0600 | [diff] [blame] | 1160 | * Ensure that the OCP_SYSCONFIG register for the IP block represented |
| 1161 | * by @oh is set to indicate to the PRCM that the IP block is active. |
| 1162 | * Usually this means placing the module into smart-idle mode and |
| 1163 | * smart-standby, but if there is a bug in the automatic idle handling |
| 1164 | * for the IP block, it may need to be placed into the force-idle or |
| 1165 | * no-idle variants of these modes. No return value. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1166 | */ |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 1167 | static void _enable_sysc(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1168 | { |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1169 | u8 idlemode, sf; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1170 | u32 v; |
Paul Walmsley | 006c7f1 | 2012-07-04 05:22:53 -0600 | [diff] [blame] | 1171 | bool clkdm_act; |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 1172 | struct clockdomain *clkdm; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1173 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1174 | if (!oh->class->sysc) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1175 | return; |
| 1176 | |
Tero Kristo | 613ad0e | 2012-10-29 22:02:13 -0600 | [diff] [blame] | 1177 | /* |
| 1178 | * Wait until reset has completed, this is needed as the IP |
| 1179 | * block is reset automatically by hardware in some cases |
| 1180 | * (off-mode for example), and the drivers require the |
| 1181 | * IP to be ready when they access it |
| 1182 | */ |
| 1183 | if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) |
| 1184 | _enable_optional_clocks(oh); |
| 1185 | _wait_softreset_complete(oh); |
| 1186 | if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) |
| 1187 | _disable_optional_clocks(oh); |
| 1188 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1189 | v = oh->_sysc_cache; |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1190 | sf = oh->class->sysc->sysc_flags; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1191 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 1192 | clkdm = _get_clkdm(oh); |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1193 | if (sf & SYSC_HAS_SIDLEMODE) { |
Rajendra Nayak | ca43ea3 | 2013-05-15 20:18:38 +0530 | [diff] [blame] | 1194 | if (oh->flags & HWMOD_SWSUP_SIDLE || |
| 1195 | oh->flags & HWMOD_SWSUP_SIDLE_ACT) { |
Rajendra Nayak | 3551317 | 2013-05-15 20:18:37 +0530 | [diff] [blame] | 1196 | idlemode = HWMOD_IDLEMODE_NO; |
| 1197 | } else { |
| 1198 | if (sf & SYSC_HAS_ENAWAKEUP) |
| 1199 | _enable_wakeup(oh, &v); |
| 1200 | if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) |
| 1201 | idlemode = HWMOD_IDLEMODE_SMART_WKUP; |
| 1202 | else |
| 1203 | idlemode = HWMOD_IDLEMODE_SMART; |
| 1204 | } |
| 1205 | |
| 1206 | /* |
| 1207 | * This is special handling for some IPs like |
| 1208 | * 32k sync timer. Force them to idle! |
| 1209 | */ |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 1210 | clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU); |
Paul Walmsley | 006c7f1 | 2012-07-04 05:22:53 -0600 | [diff] [blame] | 1211 | if (clkdm_act && !(oh->class->sysc->idlemodes & |
| 1212 | (SIDLE_SMART | SIDLE_SMART_WKUP))) |
| 1213 | idlemode = HWMOD_IDLEMODE_FORCE; |
Rajendra Nayak | 3551317 | 2013-05-15 20:18:37 +0530 | [diff] [blame] | 1214 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1215 | _set_slave_idlemode(oh, idlemode, &v); |
| 1216 | } |
| 1217 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1218 | if (sf & SYSC_HAS_MIDLEMODE) { |
Grazvydas Ignotas | 092bc08 | 2013-03-11 21:49:00 +0200 | [diff] [blame] | 1219 | if (oh->flags & HWMOD_FORCE_MSTANDBY) { |
| 1220 | idlemode = HWMOD_IDLEMODE_FORCE; |
| 1221 | } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) { |
Benoit Cousson | 724019b | 2011-07-01 22:54:00 +0200 | [diff] [blame] | 1222 | idlemode = HWMOD_IDLEMODE_NO; |
| 1223 | } else { |
| 1224 | if (sf & SYSC_HAS_ENAWAKEUP) |
| 1225 | _enable_wakeup(oh, &v); |
| 1226 | if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) |
| 1227 | idlemode = HWMOD_IDLEMODE_SMART_WKUP; |
| 1228 | else |
| 1229 | idlemode = HWMOD_IDLEMODE_SMART; |
| 1230 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1231 | _set_master_standbymode(oh, idlemode, &v); |
| 1232 | } |
| 1233 | |
Paul Walmsley | a16b1f7 | 2009-12-08 16:34:17 -0700 | [diff] [blame] | 1234 | /* |
| 1235 | * XXX The clock framework should handle this, by |
| 1236 | * calling into this code. But this must wait until the |
| 1237 | * clock structures are tagged with omap_hwmod entries |
| 1238 | */ |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1239 | if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) && |
| 1240 | (sf & SYSC_HAS_CLOCKACTIVITY)) |
Tony Lindgren | ca5339b | 2017-03-14 13:13:19 -0700 | [diff] [blame] | 1241 | _set_clockactivity(oh, CLOCKACT_TEST_ICLK, &v); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1242 | |
Lokesh Vutla | 3ca4a23 | 2016-03-26 23:08:55 -0600 | [diff] [blame] | 1243 | _write_sysconfig(v, oh); |
Hema HK | 78f26e8 | 2010-09-24 10:23:19 -0600 | [diff] [blame] | 1244 | |
| 1245 | /* |
| 1246 | * Set the autoidle bit only after setting the smartidle bit |
| 1247 | * Setting this will not have any impact on the other modules. |
| 1248 | */ |
| 1249 | if (sf & SYSC_HAS_AUTOIDLE) { |
| 1250 | idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ? |
| 1251 | 0 : 1; |
| 1252 | _set_module_autoidle(oh, idlemode, &v); |
| 1253 | _write_sysconfig(v, oh); |
| 1254 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1255 | } |
| 1256 | |
| 1257 | /** |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 1258 | * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1259 | * @oh: struct omap_hwmod * |
| 1260 | * |
| 1261 | * If module is marked as SWSUP_SIDLE, force the module into slave |
| 1262 | * idle; otherwise, configure it for smart-idle. If module is marked |
| 1263 | * as SWSUP_MSUSPEND, force the module into master standby; otherwise, |
| 1264 | * configure it for smart-standby. No return value. |
| 1265 | */ |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 1266 | static void _idle_sysc(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1267 | { |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1268 | u8 idlemode, sf; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1269 | u32 v; |
| 1270 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1271 | if (!oh->class->sysc) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1272 | return; |
| 1273 | |
| 1274 | v = oh->_sysc_cache; |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1275 | sf = oh->class->sysc->sysc_flags; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1276 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1277 | if (sf & SYSC_HAS_SIDLEMODE) { |
Rajendra Nayak | 3551317 | 2013-05-15 20:18:37 +0530 | [diff] [blame] | 1278 | if (oh->flags & HWMOD_SWSUP_SIDLE) { |
Paul Walmsley | 006c7f1 | 2012-07-04 05:22:53 -0600 | [diff] [blame] | 1279 | idlemode = HWMOD_IDLEMODE_FORCE; |
Rajendra Nayak | 3551317 | 2013-05-15 20:18:37 +0530 | [diff] [blame] | 1280 | } else { |
| 1281 | if (sf & SYSC_HAS_ENAWAKEUP) |
| 1282 | _enable_wakeup(oh, &v); |
| 1283 | if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) |
| 1284 | idlemode = HWMOD_IDLEMODE_SMART_WKUP; |
| 1285 | else |
| 1286 | idlemode = HWMOD_IDLEMODE_SMART; |
| 1287 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1288 | _set_slave_idlemode(oh, idlemode, &v); |
| 1289 | } |
| 1290 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1291 | if (sf & SYSC_HAS_MIDLEMODE) { |
Grazvydas Ignotas | 092bc08 | 2013-03-11 21:49:00 +0200 | [diff] [blame] | 1292 | if ((oh->flags & HWMOD_SWSUP_MSTANDBY) || |
| 1293 | (oh->flags & HWMOD_FORCE_MSTANDBY)) { |
Benoit Cousson | 724019b | 2011-07-01 22:54:00 +0200 | [diff] [blame] | 1294 | idlemode = HWMOD_IDLEMODE_FORCE; |
| 1295 | } else { |
| 1296 | if (sf & SYSC_HAS_ENAWAKEUP) |
| 1297 | _enable_wakeup(oh, &v); |
| 1298 | if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) |
| 1299 | idlemode = HWMOD_IDLEMODE_SMART_WKUP; |
| 1300 | else |
| 1301 | idlemode = HWMOD_IDLEMODE_SMART; |
| 1302 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1303 | _set_master_standbymode(oh, idlemode, &v); |
| 1304 | } |
| 1305 | |
Lokesh Vutla | 3ca4a23 | 2016-03-26 23:08:55 -0600 | [diff] [blame] | 1306 | /* If the cached value is the same as the new value, skip the write */ |
| 1307 | if (oh->_sysc_cache != v) |
| 1308 | _write_sysconfig(v, oh); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1309 | } |
| 1310 | |
| 1311 | /** |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 1312 | * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1313 | * @oh: struct omap_hwmod * |
| 1314 | * |
| 1315 | * Force the module into slave idle and master suspend. No return |
| 1316 | * value. |
| 1317 | */ |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 1318 | static void _shutdown_sysc(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1319 | { |
| 1320 | u32 v; |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1321 | u8 sf; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1322 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1323 | if (!oh->class->sysc) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1324 | return; |
| 1325 | |
| 1326 | v = oh->_sysc_cache; |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1327 | sf = oh->class->sysc->sysc_flags; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1328 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1329 | if (sf & SYSC_HAS_SIDLEMODE) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1330 | _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v); |
| 1331 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1332 | if (sf & SYSC_HAS_MIDLEMODE) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1333 | _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v); |
| 1334 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1335 | if (sf & SYSC_HAS_AUTOIDLE) |
Paul Walmsley | 726072e | 2009-12-08 16:34:15 -0700 | [diff] [blame] | 1336 | _set_module_autoidle(oh, 1, &v); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1337 | |
| 1338 | _write_sysconfig(v, oh); |
| 1339 | } |
| 1340 | |
| 1341 | /** |
| 1342 | * _lookup - find an omap_hwmod by name |
| 1343 | * @name: find an omap_hwmod by name |
| 1344 | * |
| 1345 | * Return a pointer to an omap_hwmod by name, or NULL if not found. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1346 | */ |
| 1347 | static struct omap_hwmod *_lookup(const char *name) |
| 1348 | { |
| 1349 | struct omap_hwmod *oh, *temp_oh; |
| 1350 | |
| 1351 | oh = NULL; |
| 1352 | |
| 1353 | list_for_each_entry(temp_oh, &omap_hwmod_list, node) { |
| 1354 | if (!strcmp(name, temp_oh->name)) { |
| 1355 | oh = temp_oh; |
| 1356 | break; |
| 1357 | } |
| 1358 | } |
| 1359 | |
| 1360 | return oh; |
| 1361 | } |
Paul Walmsley | 868c157 | 2012-06-19 15:01:02 -0600 | [diff] [blame] | 1362 | |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1363 | /** |
| 1364 | * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod |
| 1365 | * @oh: struct omap_hwmod * |
| 1366 | * |
| 1367 | * Convert a clockdomain name stored in a struct omap_hwmod into a |
| 1368 | * clockdomain pointer, and save it into the struct omap_hwmod. |
Paul Walmsley | 868c157 | 2012-06-19 15:01:02 -0600 | [diff] [blame] | 1369 | * Return -EINVAL if the clkdm_name lookup failed. |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1370 | */ |
| 1371 | static int _init_clkdm(struct omap_hwmod *oh) |
| 1372 | { |
Paul Walmsley | 3bb05db | 2012-09-23 17:28:18 -0600 | [diff] [blame] | 1373 | if (!oh->clkdm_name) { |
| 1374 | pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name); |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1375 | return 0; |
Paul Walmsley | 3bb05db | 2012-09-23 17:28:18 -0600 | [diff] [blame] | 1376 | } |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1377 | |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1378 | oh->clkdm = clkdm_lookup(oh->clkdm_name); |
| 1379 | if (!oh->clkdm) { |
Joe Perches | 3d0cb73 | 2014-09-13 11:31:16 -0700 | [diff] [blame] | 1380 | pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n", |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1381 | oh->name, oh->clkdm_name); |
Tero Kristo | 0385c58 | 2013-07-17 18:03:25 +0300 | [diff] [blame] | 1382 | return 0; |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1383 | } |
| 1384 | |
| 1385 | pr_debug("omap_hwmod: %s: associated to clkdm %s\n", |
| 1386 | oh->name, oh->clkdm_name); |
| 1387 | |
| 1388 | return 0; |
| 1389 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1390 | |
| 1391 | /** |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1392 | * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as |
| 1393 | * well the clockdomain. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1394 | * @oh: struct omap_hwmod * |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 1395 | * @np: device_node mapped to this hwmod |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1396 | * |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 1397 | * Called by omap_hwmod_setup_*() (after omap2_clk_init()). |
Paul Walmsley | 48d54f3 | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 1398 | * Resolves all clock names embedded in the hwmod. Returns 0 on |
| 1399 | * success, or a negative error code on failure. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1400 | */ |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 1401 | static int _init_clocks(struct omap_hwmod *oh, struct device_node *np) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1402 | { |
| 1403 | int ret = 0; |
| 1404 | |
Paul Walmsley | 48d54f3 | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 1405 | if (oh->_state != _HWMOD_STATE_REGISTERED) |
| 1406 | return 0; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1407 | |
| 1408 | pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name); |
| 1409 | |
Vaibhav Hiremath | b797be1 | 2012-07-09 18:24:30 +0530 | [diff] [blame] | 1410 | if (soc_ops.init_clkdm) |
| 1411 | ret |= soc_ops.init_clkdm(oh); |
| 1412 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1413 | ret |= _init_main_clk(oh); |
| 1414 | ret |= _init_interface_clks(oh); |
| 1415 | ret |= _init_opt_clks(oh); |
| 1416 | |
Benoit Cousson | f5c1f84 | 2010-05-20 12:31:10 -0600 | [diff] [blame] | 1417 | if (!ret) |
| 1418 | oh->_state = _HWMOD_STATE_CLKS_INITED; |
Benoit Cousson | 6652271 | 2011-07-01 22:54:06 +0200 | [diff] [blame] | 1419 | else |
Joe Perches | 3d0cb73 | 2014-09-13 11:31:16 -0700 | [diff] [blame] | 1420 | pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1421 | |
Rajendra Nayak | 09c35f2 | 2011-02-16 12:11:24 +0000 | [diff] [blame] | 1422 | return ret; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1423 | } |
| 1424 | |
| 1425 | /** |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1426 | * _lookup_hardreset - fill register bit info for this hwmod/reset line |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1427 | * @oh: struct omap_hwmod * |
| 1428 | * @name: name of the reset line in the context of this hwmod |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1429 | * @ohri: struct omap_hwmod_rst_info * that this function will fill in |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1430 | * |
| 1431 | * Return the bit position of the reset line that match the |
| 1432 | * input name. Return -ENOENT if not found. |
| 1433 | */ |
Paul Walmsley | a032d33 | 2012-08-03 09:21:10 -0600 | [diff] [blame] | 1434 | static int _lookup_hardreset(struct omap_hwmod *oh, const char *name, |
| 1435 | struct omap_hwmod_rst_info *ohri) |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1436 | { |
| 1437 | int i; |
| 1438 | |
| 1439 | for (i = 0; i < oh->rst_lines_cnt; i++) { |
| 1440 | const char *rst_line = oh->rst_lines[i].name; |
| 1441 | if (!strcmp(rst_line, name)) { |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1442 | ohri->rst_shift = oh->rst_lines[i].rst_shift; |
| 1443 | ohri->st_shift = oh->rst_lines[i].st_shift; |
| 1444 | pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n", |
| 1445 | oh->name, __func__, rst_line, ohri->rst_shift, |
| 1446 | ohri->st_shift); |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1447 | |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1448 | return 0; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1449 | } |
| 1450 | } |
| 1451 | |
| 1452 | return -ENOENT; |
| 1453 | } |
| 1454 | |
| 1455 | /** |
| 1456 | * _assert_hardreset - assert the HW reset line of submodules |
| 1457 | * contained in the hwmod module. |
| 1458 | * @oh: struct omap_hwmod * |
| 1459 | * @name: name of the reset line to lookup and assert |
| 1460 | * |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1461 | * Some IP like dsp, ipu or iva contain processor that require an HW |
| 1462 | * reset line to be assert / deassert in order to enable fully the IP. |
| 1463 | * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of |
| 1464 | * asserting the hardreset line on the currently-booted SoC, or passes |
| 1465 | * along the return value from _lookup_hardreset() or the SoC's |
| 1466 | * assert_hardreset code. |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1467 | */ |
| 1468 | static int _assert_hardreset(struct omap_hwmod *oh, const char *name) |
| 1469 | { |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1470 | struct omap_hwmod_rst_info ohri; |
Paul Walmsley | a032d33 | 2012-08-03 09:21:10 -0600 | [diff] [blame] | 1471 | int ret = -EINVAL; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1472 | |
| 1473 | if (!oh) |
| 1474 | return -EINVAL; |
| 1475 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1476 | if (!soc_ops.assert_hardreset) |
| 1477 | return -ENOSYS; |
| 1478 | |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1479 | ret = _lookup_hardreset(oh, name, &ohri); |
Paul Walmsley | a032d33 | 2012-08-03 09:21:10 -0600 | [diff] [blame] | 1480 | if (ret < 0) |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1481 | return ret; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1482 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1483 | ret = soc_ops.assert_hardreset(oh, &ohri); |
| 1484 | |
| 1485 | return ret; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1486 | } |
| 1487 | |
| 1488 | /** |
| 1489 | * _deassert_hardreset - deassert the HW reset line of submodules contained |
| 1490 | * in the hwmod module. |
| 1491 | * @oh: struct omap_hwmod * |
| 1492 | * @name: name of the reset line to look up and deassert |
| 1493 | * |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1494 | * Some IP like dsp, ipu or iva contain processor that require an HW |
| 1495 | * reset line to be assert / deassert in order to enable fully the IP. |
| 1496 | * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of |
| 1497 | * deasserting the hardreset line on the currently-booted SoC, or passes |
| 1498 | * along the return value from _lookup_hardreset() or the SoC's |
| 1499 | * deassert_hardreset code. |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1500 | */ |
| 1501 | static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) |
| 1502 | { |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1503 | struct omap_hwmod_rst_info ohri; |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1504 | int ret = -EINVAL; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1505 | |
| 1506 | if (!oh) |
| 1507 | return -EINVAL; |
| 1508 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1509 | if (!soc_ops.deassert_hardreset) |
| 1510 | return -ENOSYS; |
| 1511 | |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1512 | ret = _lookup_hardreset(oh, name, &ohri); |
Russell King | c48cd65 | 2013-03-13 20:44:21 +0000 | [diff] [blame] | 1513 | if (ret < 0) |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1514 | return ret; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1515 | |
Omar Ramirez Luna | e8e96df | 2012-09-23 17:28:21 -0600 | [diff] [blame] | 1516 | if (oh->clkdm) { |
| 1517 | /* |
| 1518 | * A clockdomain must be in SW_SUP otherwise reset |
| 1519 | * might not be completed. The clockdomain can be set |
| 1520 | * in HW_AUTO only when the module become ready. |
| 1521 | */ |
Tero Kristo | 1d9a542 | 2016-06-30 16:15:02 +0300 | [diff] [blame] | 1522 | clkdm_deny_idle(oh->clkdm); |
Omar Ramirez Luna | e8e96df | 2012-09-23 17:28:21 -0600 | [diff] [blame] | 1523 | ret = clkdm_hwmod_enable(oh->clkdm, oh); |
| 1524 | if (ret) { |
| 1525 | WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", |
| 1526 | oh->name, oh->clkdm->name, ret); |
| 1527 | return ret; |
| 1528 | } |
| 1529 | } |
| 1530 | |
| 1531 | _enable_clocks(oh); |
| 1532 | if (soc_ops.enable_module) |
| 1533 | soc_ops.enable_module(oh); |
| 1534 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1535 | ret = soc_ops.deassert_hardreset(oh, &ohri); |
Omar Ramirez Luna | e8e96df | 2012-09-23 17:28:21 -0600 | [diff] [blame] | 1536 | |
| 1537 | if (soc_ops.disable_module) |
| 1538 | soc_ops.disable_module(oh); |
| 1539 | _disable_clocks(oh); |
| 1540 | |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1541 | if (ret == -EBUSY) |
Joe Perches | 3d0cb73 | 2014-09-13 11:31:16 -0700 | [diff] [blame] | 1542 | pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name); |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1543 | |
Tero Kristo | 80d2518 | 2015-02-26 18:06:00 +0200 | [diff] [blame] | 1544 | if (oh->clkdm) { |
Omar Ramirez Luna | e8e96df | 2012-09-23 17:28:21 -0600 | [diff] [blame] | 1545 | /* |
| 1546 | * Set the clockdomain to HW_AUTO, assuming that the |
| 1547 | * previous state was HW_AUTO. |
| 1548 | */ |
Tero Kristo | 1d9a542 | 2016-06-30 16:15:02 +0300 | [diff] [blame] | 1549 | clkdm_allow_idle(oh->clkdm); |
Tero Kristo | 80d2518 | 2015-02-26 18:06:00 +0200 | [diff] [blame] | 1550 | |
| 1551 | clkdm_hwmod_disable(oh->clkdm, oh); |
Omar Ramirez Luna | e8e96df | 2012-09-23 17:28:21 -0600 | [diff] [blame] | 1552 | } |
| 1553 | |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1554 | return ret; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1555 | } |
| 1556 | |
| 1557 | /** |
| 1558 | * _read_hardreset - read the HW reset line state of submodules |
| 1559 | * contained in the hwmod module |
| 1560 | * @oh: struct omap_hwmod * |
| 1561 | * @name: name of the reset line to look up and read |
| 1562 | * |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1563 | * Return the state of the reset line. Returns -EINVAL if @oh is |
| 1564 | * null, -ENOSYS if we have no way of reading the hardreset line |
| 1565 | * status on the currently-booted SoC, or passes along the return |
| 1566 | * value from _lookup_hardreset() or the SoC's is_hardreset_asserted |
| 1567 | * code. |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1568 | */ |
| 1569 | static int _read_hardreset(struct omap_hwmod *oh, const char *name) |
| 1570 | { |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1571 | struct omap_hwmod_rst_info ohri; |
Paul Walmsley | a032d33 | 2012-08-03 09:21:10 -0600 | [diff] [blame] | 1572 | int ret = -EINVAL; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1573 | |
| 1574 | if (!oh) |
| 1575 | return -EINVAL; |
| 1576 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1577 | if (!soc_ops.is_hardreset_asserted) |
| 1578 | return -ENOSYS; |
| 1579 | |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1580 | ret = _lookup_hardreset(oh, name, &ohri); |
Paul Walmsley | a032d33 | 2012-08-03 09:21:10 -0600 | [diff] [blame] | 1581 | if (ret < 0) |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1582 | return ret; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1583 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1584 | return soc_ops.is_hardreset_asserted(oh, &ohri); |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1585 | } |
| 1586 | |
| 1587 | /** |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1588 | * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1589 | * @oh: struct omap_hwmod * |
| 1590 | * |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1591 | * If all hardreset lines associated with @oh are asserted, then return true. |
| 1592 | * Otherwise, if part of @oh is out hardreset or if no hardreset lines |
| 1593 | * associated with @oh are asserted, then return false. |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1594 | * This function is used to avoid executing some parts of the IP block |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1595 | * enable/disable sequence if its hardreset line is set. |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1596 | */ |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1597 | static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh) |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1598 | { |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1599 | int i, rst_cnt = 0; |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1600 | |
| 1601 | if (oh->rst_lines_cnt == 0) |
| 1602 | return false; |
| 1603 | |
| 1604 | for (i = 0; i < oh->rst_lines_cnt; i++) |
| 1605 | if (_read_hardreset(oh, oh->rst_lines[i].name) > 0) |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1606 | rst_cnt++; |
| 1607 | |
| 1608 | if (oh->rst_lines_cnt == rst_cnt) |
| 1609 | return true; |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1610 | |
| 1611 | return false; |
| 1612 | } |
| 1613 | |
| 1614 | /** |
Paul Walmsley | e9332b6 | 2012-10-08 23:08:15 -0600 | [diff] [blame] | 1615 | * _are_any_hardreset_lines_asserted - return true if any part of @oh is |
| 1616 | * hard-reset |
| 1617 | * @oh: struct omap_hwmod * |
| 1618 | * |
| 1619 | * If any hardreset lines associated with @oh are asserted, then |
| 1620 | * return true. Otherwise, if no hardreset lines associated with @oh |
| 1621 | * are asserted, or if @oh has no hardreset lines, then return false. |
| 1622 | * This function is used to avoid executing some parts of the IP block |
| 1623 | * enable/disable sequence if any hardreset line is set. |
| 1624 | */ |
| 1625 | static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh) |
| 1626 | { |
| 1627 | int rst_cnt = 0; |
| 1628 | int i; |
| 1629 | |
| 1630 | for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++) |
| 1631 | if (_read_hardreset(oh, oh->rst_lines[i].name) > 0) |
| 1632 | rst_cnt++; |
| 1633 | |
| 1634 | return (rst_cnt) ? true : false; |
| 1635 | } |
| 1636 | |
| 1637 | /** |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1638 | * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4 |
| 1639 | * @oh: struct omap_hwmod * |
| 1640 | * |
| 1641 | * Disable the PRCM module mode related to the hwmod @oh. |
| 1642 | * Return EINVAL if the modulemode is not supported and 0 in case of success. |
| 1643 | */ |
| 1644 | static int _omap4_disable_module(struct omap_hwmod *oh) |
| 1645 | { |
| 1646 | int v; |
| 1647 | |
Tony Lindgren | 8823ddf | 2017-08-29 10:03:33 -0700 | [diff] [blame] | 1648 | if (!oh->clkdm || !oh->prcm.omap4.modulemode || |
| 1649 | _omap4_clkctrl_managed_by_clkfwk(oh)) |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1650 | return -EINVAL; |
| 1651 | |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1652 | /* |
| 1653 | * Since integration code might still be doing something, only |
| 1654 | * disable if all lines are under hardreset. |
| 1655 | */ |
Paul Walmsley | e9332b6 | 2012-10-08 23:08:15 -0600 | [diff] [blame] | 1656 | if (_are_any_hardreset_lines_asserted(oh)) |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1657 | return 0; |
| 1658 | |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1659 | pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__); |
| 1660 | |
Tero Kristo | 128603f | 2014-10-27 08:39:24 -0700 | [diff] [blame] | 1661 | omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst, |
| 1662 | oh->prcm.omap4.clkctrl_offs); |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1663 | |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1664 | v = _omap4_wait_target_disable(oh); |
| 1665 | if (v) |
| 1666 | pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", |
| 1667 | oh->name); |
| 1668 | |
| 1669 | return 0; |
| 1670 | } |
| 1671 | |
| 1672 | /** |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1673 | * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1674 | * @oh: struct omap_hwmod * |
| 1675 | * |
| 1676 | * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 1677 | * enabled for this to work. Returns -ENOENT if the hwmod cannot be |
| 1678 | * reset this way, -EINVAL if the hwmod is in the wrong state, |
| 1679 | * -ETIMEDOUT if the module did not reset in time, or 0 upon success. |
Benoit Cousson | 2cb0681 | 2010-09-21 18:57:59 +0200 | [diff] [blame] | 1680 | * |
| 1681 | * In OMAP3 a specific SYSSTATUS register is used to get the reset status. |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1682 | * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead |
Benoit Cousson | 2cb0681 | 2010-09-21 18:57:59 +0200 | [diff] [blame] | 1683 | * use the SYSCONFIG softreset bit to provide the status. |
| 1684 | * |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1685 | * Note that some IP like McBSP do have reset control but don't have |
| 1686 | * reset status. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1687 | */ |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1688 | static int _ocp_softreset(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1689 | { |
Tero Kristo | 613ad0e | 2012-10-29 22:02:13 -0600 | [diff] [blame] | 1690 | u32 v; |
Paul Walmsley | 6f8b7ff | 2009-12-08 16:33:16 -0700 | [diff] [blame] | 1691 | int c = 0; |
Benoit Cousson | 96835af | 2010-09-21 18:57:58 +0200 | [diff] [blame] | 1692 | int ret = 0; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1693 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1694 | if (!oh->class->sysc || |
Benoit Cousson | 2cb0681 | 2010-09-21 18:57:59 +0200 | [diff] [blame] | 1695 | !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 1696 | return -ENOENT; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1697 | |
| 1698 | /* clocks must be on for this operation */ |
| 1699 | if (oh->_state != _HWMOD_STATE_ENABLED) { |
Paul Walmsley | 7852ec0 | 2012-07-26 00:54:26 -0600 | [diff] [blame] | 1700 | pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n", |
| 1701 | oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1702 | return -EINVAL; |
| 1703 | } |
| 1704 | |
Benoit Cousson | 96835af | 2010-09-21 18:57:58 +0200 | [diff] [blame] | 1705 | /* For some modules, all optionnal clocks need to be enabled as well */ |
| 1706 | if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) |
| 1707 | _enable_optional_clocks(oh); |
| 1708 | |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1709 | pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1710 | |
| 1711 | v = oh->_sysc_cache; |
Benoit Cousson | 96835af | 2010-09-21 18:57:58 +0200 | [diff] [blame] | 1712 | ret = _set_softreset(oh, &v); |
| 1713 | if (ret) |
| 1714 | goto dis_opt_clks; |
Roger Quadros | 313a76e | 2013-12-08 18:39:02 -0700 | [diff] [blame] | 1715 | |
| 1716 | _write_sysconfig(v, oh); |
Illia Smyrnov | 0114251 | 2014-02-05 17:06:09 +0200 | [diff] [blame] | 1717 | |
| 1718 | if (oh->class->sysc->srst_udelay) |
| 1719 | udelay(oh->class->sysc->srst_udelay); |
| 1720 | |
| 1721 | c = _wait_softreset_complete(oh); |
| 1722 | if (c == MAX_MODULE_SOFTRESET_WAIT) { |
Joe Perches | 3d0cb73 | 2014-09-13 11:31:16 -0700 | [diff] [blame] | 1723 | pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n", |
| 1724 | oh->name, MAX_MODULE_SOFTRESET_WAIT); |
Illia Smyrnov | 0114251 | 2014-02-05 17:06:09 +0200 | [diff] [blame] | 1725 | ret = -ETIMEDOUT; |
| 1726 | goto dis_opt_clks; |
| 1727 | } else { |
| 1728 | pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c); |
| 1729 | } |
| 1730 | |
Roger Quadros | 313a76e | 2013-12-08 18:39:02 -0700 | [diff] [blame] | 1731 | ret = _clear_softreset(oh, &v); |
| 1732 | if (ret) |
| 1733 | goto dis_opt_clks; |
| 1734 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1735 | _write_sysconfig(v, oh); |
| 1736 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1737 | /* |
| 1738 | * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from |
| 1739 | * _wait_target_ready() or _reset() |
| 1740 | */ |
| 1741 | |
Benoit Cousson | 96835af | 2010-09-21 18:57:58 +0200 | [diff] [blame] | 1742 | dis_opt_clks: |
| 1743 | if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) |
| 1744 | _disable_optional_clocks(oh); |
| 1745 | |
| 1746 | return ret; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1747 | } |
| 1748 | |
| 1749 | /** |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1750 | * _reset - reset an omap_hwmod |
| 1751 | * @oh: struct omap_hwmod * |
| 1752 | * |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 1753 | * Resets an omap_hwmod @oh. If the module has a custom reset |
| 1754 | * function pointer defined, then call it to reset the IP block, and |
| 1755 | * pass along its return value to the caller. Otherwise, if the IP |
| 1756 | * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield |
| 1757 | * associated with it, call a function to reset the IP block via that |
| 1758 | * method, and pass along the return value to the caller. Finally, if |
| 1759 | * the IP block has some hardreset lines associated with it, assert |
| 1760 | * all of those, but do _not_ deassert them. (This is because driver |
| 1761 | * authors have expressed an apparent requirement to control the |
| 1762 | * deassertion of the hardreset lines themselves.) |
| 1763 | * |
| 1764 | * The default software reset mechanism for most OMAP IP blocks is |
| 1765 | * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some |
| 1766 | * hwmods cannot be reset via this method. Some are not targets and |
| 1767 | * therefore have no OCP header registers to access. Others (like the |
| 1768 | * IVA) have idiosyncratic reset sequences. So for these relatively |
| 1769 | * rare cases, custom reset code can be supplied in the struct |
Kishon Vijay Abraham I | 6668546 | 2012-07-04 05:09:21 -0600 | [diff] [blame] | 1770 | * omap_hwmod_class .reset function pointer. |
| 1771 | * |
| 1772 | * _set_dmadisable() is called to set the DMADISABLE bit so that it |
| 1773 | * does not prevent idling of the system. This is necessary for cases |
| 1774 | * where ROMCODE/BOOTLOADER uses dma and transfers control to the |
| 1775 | * kernel without disabling dma. |
| 1776 | * |
| 1777 | * Passes along the return value from either _ocp_softreset() or the |
| 1778 | * custom reset function - these must return -EINVAL if the hwmod |
| 1779 | * cannot be reset this way or if the hwmod is in the wrong state, |
| 1780 | * -ETIMEDOUT if the module did not reset in time, or 0 upon success. |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1781 | */ |
| 1782 | static int _reset(struct omap_hwmod *oh) |
| 1783 | { |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 1784 | int i, r; |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1785 | |
| 1786 | pr_debug("omap_hwmod: %s: resetting\n", oh->name); |
| 1787 | |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 1788 | if (oh->class->reset) { |
| 1789 | r = oh->class->reset(oh); |
| 1790 | } else { |
| 1791 | if (oh->rst_lines_cnt > 0) { |
| 1792 | for (i = 0; i < oh->rst_lines_cnt; i++) |
| 1793 | _assert_hardreset(oh, oh->rst_lines[i].name); |
| 1794 | return 0; |
| 1795 | } else { |
| 1796 | r = _ocp_softreset(oh); |
| 1797 | if (r == -ENOENT) |
| 1798 | r = 0; |
| 1799 | } |
| 1800 | } |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1801 | |
Kishon Vijay Abraham I | 6668546 | 2012-07-04 05:09:21 -0600 | [diff] [blame] | 1802 | _set_dmadisable(oh); |
| 1803 | |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 1804 | /* |
| 1805 | * OCP_SYSCONFIG bits need to be reprogrammed after a |
| 1806 | * softreset. The _enable() function should be split to avoid |
| 1807 | * the rewrite of the OCP_SYSCONFIG register. |
| 1808 | */ |
Rajendra Nayak | 2800852 | 2012-03-13 22:55:23 +0530 | [diff] [blame] | 1809 | if (oh->class->sysc) { |
| 1810 | _update_sysc_cache(oh); |
| 1811 | _enable_sysc(oh); |
| 1812 | } |
| 1813 | |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 1814 | return r; |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1815 | } |
| 1816 | |
| 1817 | /** |
Rajendra Nayak | e6d3a8b | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 1818 | * _omap4_update_context_lost - increment hwmod context loss counter if |
| 1819 | * hwmod context was lost, and clear hardware context loss reg |
| 1820 | * @oh: hwmod to check for context loss |
| 1821 | * |
| 1822 | * If the PRCM indicates that the hwmod @oh lost context, increment |
| 1823 | * our in-memory context loss counter, and clear the RM_*_CONTEXT |
| 1824 | * bits. No return value. |
| 1825 | */ |
| 1826 | static void _omap4_update_context_lost(struct omap_hwmod *oh) |
| 1827 | { |
| 1828 | if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT) |
| 1829 | return; |
| 1830 | |
| 1831 | if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition, |
| 1832 | oh->clkdm->pwrdm.ptr->prcm_offs, |
| 1833 | oh->prcm.omap4.context_offs)) |
| 1834 | return; |
| 1835 | |
| 1836 | oh->prcm.omap4.context_lost_counter++; |
| 1837 | prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition, |
| 1838 | oh->clkdm->pwrdm.ptr->prcm_offs, |
| 1839 | oh->prcm.omap4.context_offs); |
| 1840 | } |
| 1841 | |
| 1842 | /** |
| 1843 | * _omap4_get_context_lost - get context loss counter for a hwmod |
| 1844 | * @oh: hwmod to get context loss counter for |
| 1845 | * |
| 1846 | * Returns the in-memory context loss counter for a hwmod. |
| 1847 | */ |
| 1848 | static int _omap4_get_context_lost(struct omap_hwmod *oh) |
| 1849 | { |
| 1850 | return oh->prcm.omap4.context_lost_counter; |
| 1851 | } |
| 1852 | |
| 1853 | /** |
Paul Walmsley | 6d266f6 | 2013-02-10 11:22:22 -0700 | [diff] [blame] | 1854 | * _enable_preprogram - Pre-program an IP block during the _enable() process |
| 1855 | * @oh: struct omap_hwmod * |
| 1856 | * |
| 1857 | * Some IP blocks (such as AESS) require some additional programming |
| 1858 | * after enable before they can enter idle. If a function pointer to |
| 1859 | * do so is present in the hwmod data, then call it and pass along the |
| 1860 | * return value; otherwise, return 0. |
| 1861 | */ |
jean-philippe francois | 0f49703 | 2013-05-16 11:25:07 -0700 | [diff] [blame] | 1862 | static int _enable_preprogram(struct omap_hwmod *oh) |
Paul Walmsley | 6d266f6 | 2013-02-10 11:22:22 -0700 | [diff] [blame] | 1863 | { |
| 1864 | if (!oh->class->enable_preprogram) |
| 1865 | return 0; |
| 1866 | |
| 1867 | return oh->class->enable_preprogram(oh); |
| 1868 | } |
| 1869 | |
| 1870 | /** |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1871 | * _enable - enable an omap_hwmod |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1872 | * @oh: struct omap_hwmod * |
| 1873 | * |
| 1874 | * Enables an omap_hwmod @oh such that the MPU can access the hwmod's |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1875 | * register target. Returns -EINVAL if the hwmod is in the wrong |
| 1876 | * state or passes along the return value of _wait_target_ready(). |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1877 | */ |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1878 | static int _enable(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1879 | { |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1880 | int r; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1881 | |
Benoit Cousson | 34617e2 | 2011-07-01 22:54:07 +0200 | [diff] [blame] | 1882 | pr_debug("omap_hwmod: %s: enabling\n", oh->name); |
| 1883 | |
Rajendra Nayak | aacf094 | 2011-12-16 05:50:12 -0700 | [diff] [blame] | 1884 | /* |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 1885 | * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled |
Tony Lindgren | b428145 | 2016-10-20 06:35:21 -0700 | [diff] [blame] | 1886 | * state at init. |
Rajendra Nayak | aacf094 | 2011-12-16 05:50:12 -0700 | [diff] [blame] | 1887 | */ |
| 1888 | if (oh->_int_flags & _HWMOD_SKIP_ENABLE) { |
Rajendra Nayak | aacf094 | 2011-12-16 05:50:12 -0700 | [diff] [blame] | 1889 | oh->_int_flags &= ~_HWMOD_SKIP_ENABLE; |
| 1890 | return 0; |
| 1891 | } |
| 1892 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1893 | if (oh->_state != _HWMOD_STATE_INITIALIZED && |
| 1894 | oh->_state != _HWMOD_STATE_IDLE && |
| 1895 | oh->_state != _HWMOD_STATE_DISABLED) { |
Russell King | 4f8a428 | 2012-02-07 10:59:37 +0000 | [diff] [blame] | 1896 | WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n", |
| 1897 | oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1898 | return -EINVAL; |
| 1899 | } |
| 1900 | |
Benoit Cousson | 31f6286 | 2011-07-01 22:54:05 +0200 | [diff] [blame] | 1901 | /* |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1902 | * If an IP block contains HW reset lines and all of them are |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1903 | * asserted, we let integration code associated with that |
| 1904 | * block handle the enable. We've received very little |
| 1905 | * information on what those driver authors need, and until |
| 1906 | * detailed information is provided and the driver code is |
| 1907 | * posted to the public lists, this is probably the best we |
| 1908 | * can do. |
Benoit Cousson | 31f6286 | 2011-07-01 22:54:05 +0200 | [diff] [blame] | 1909 | */ |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1910 | if (_are_all_hardreset_lines_asserted(oh)) |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1911 | return 0; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1912 | |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 1913 | _add_initiator_dep(oh, mpu_oh); |
| 1914 | |
| 1915 | if (oh->clkdm) { |
| 1916 | /* |
| 1917 | * A clockdomain must be in SW_SUP before enabling |
| 1918 | * completely the module. The clockdomain can be set |
| 1919 | * in HW_AUTO only when the module become ready. |
| 1920 | */ |
Tero Kristo | 1d9a542 | 2016-06-30 16:15:02 +0300 | [diff] [blame] | 1921 | clkdm_deny_idle(oh->clkdm); |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 1922 | r = clkdm_hwmod_enable(oh->clkdm, oh); |
| 1923 | if (r) { |
| 1924 | WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", |
| 1925 | oh->name, oh->clkdm->name, r); |
| 1926 | return r; |
| 1927 | } |
Benoit Cousson | 34617e2 | 2011-07-01 22:54:07 +0200 | [diff] [blame] | 1928 | } |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 1929 | |
| 1930 | _enable_clocks(oh); |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 1931 | if (soc_ops.enable_module) |
| 1932 | soc_ops.enable_module(oh); |
Paul Walmsley | fa20022 | 2013-01-26 00:48:56 -0700 | [diff] [blame] | 1933 | if (oh->flags & HWMOD_BLOCK_WFI) |
Thomas Gleixner | f7b861b | 2013-03-21 22:49:38 +0100 | [diff] [blame] | 1934 | cpu_idle_poll_ctrl(true); |
Benoit Cousson | 34617e2 | 2011-07-01 22:54:07 +0200 | [diff] [blame] | 1935 | |
Rajendra Nayak | e6d3a8b | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 1936 | if (soc_ops.update_context_lost) |
| 1937 | soc_ops.update_context_lost(oh); |
| 1938 | |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1939 | r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) : |
| 1940 | -EINVAL; |
Roger Quadros | 8ff42da | 2017-03-17 10:58:18 +0200 | [diff] [blame] | 1941 | if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO)) |
Tero Kristo | 1d9a542 | 2016-06-30 16:15:02 +0300 | [diff] [blame] | 1942 | clkdm_allow_idle(oh->clkdm); |
Benoit Cousson | 34617e2 | 2011-07-01 22:54:07 +0200 | [diff] [blame] | 1943 | |
Tero Kristo | 1d9a542 | 2016-06-30 16:15:02 +0300 | [diff] [blame] | 1944 | if (!r) { |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 1945 | oh->_state = _HWMOD_STATE_ENABLED; |
| 1946 | |
| 1947 | /* Access the sysconfig only if the target is ready */ |
| 1948 | if (oh->class->sysc) { |
| 1949 | if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) |
| 1950 | _update_sysc_cache(oh); |
| 1951 | _enable_sysc(oh); |
| 1952 | } |
Paul Walmsley | 6d266f6 | 2013-02-10 11:22:22 -0700 | [diff] [blame] | 1953 | r = _enable_preprogram(oh); |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 1954 | } else { |
Paul Walmsley | 2577a4a | 2012-10-29 20:57:55 -0600 | [diff] [blame] | 1955 | if (soc_ops.disable_module) |
| 1956 | soc_ops.disable_module(oh); |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 1957 | _disable_clocks(oh); |
Lokesh Vutla | 812ce9d | 2014-12-19 18:04:50 +0530 | [diff] [blame] | 1958 | pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n", |
| 1959 | oh->name, r); |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 1960 | |
| 1961 | if (oh->clkdm) |
| 1962 | clkdm_hwmod_disable(oh->clkdm, oh); |
Benoit Cousson | 9a23dfe | 2010-05-20 12:31:08 -0600 | [diff] [blame] | 1963 | } |
| 1964 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1965 | return r; |
| 1966 | } |
| 1967 | |
| 1968 | /** |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1969 | * _idle - idle an omap_hwmod |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1970 | * @oh: struct omap_hwmod * |
| 1971 | * |
| 1972 | * Idles an omap_hwmod @oh. This should be called once the hwmod has |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1973 | * no further work. Returns -EINVAL if the hwmod is in the wrong |
| 1974 | * state or returns 0. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1975 | */ |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1976 | static int _idle(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1977 | { |
Lokesh Vutla | 2e18f5a | 2016-03-07 01:41:21 -0700 | [diff] [blame] | 1978 | if (oh->flags & HWMOD_NO_IDLE) { |
| 1979 | oh->_int_flags |= _HWMOD_SKIP_ENABLE; |
| 1980 | return 0; |
| 1981 | } |
| 1982 | |
Benoit Cousson | 34617e2 | 2011-07-01 22:54:07 +0200 | [diff] [blame] | 1983 | pr_debug("omap_hwmod: %s: idling\n", oh->name); |
| 1984 | |
Suman Anna | c20c8f7 | 2016-04-10 13:20:11 -0600 | [diff] [blame] | 1985 | if (_are_all_hardreset_lines_asserted(oh)) |
| 1986 | return 0; |
| 1987 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1988 | if (oh->_state != _HWMOD_STATE_ENABLED) { |
Russell King | 4f8a428 | 2012-02-07 10:59:37 +0000 | [diff] [blame] | 1989 | WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n", |
| 1990 | oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1991 | return -EINVAL; |
| 1992 | } |
| 1993 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1994 | if (oh->class->sysc) |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 1995 | _idle_sysc(oh); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1996 | _del_initiator_dep(oh, mpu_oh); |
Benoit Cousson | bfc141e | 2011-12-16 16:09:11 -0800 | [diff] [blame] | 1997 | |
Roger Quadros | 8ff42da | 2017-03-17 10:58:18 +0200 | [diff] [blame] | 1998 | /* |
| 1999 | * If HWMOD_CLKDM_NOAUTO is set then we don't |
| 2000 | * deny idle the clkdm again since idle was already denied |
| 2001 | * in _enable() |
| 2002 | */ |
| 2003 | if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO)) |
Tero Kristo | 1d9a542 | 2016-06-30 16:15:02 +0300 | [diff] [blame] | 2004 | clkdm_deny_idle(oh->clkdm); |
| 2005 | |
Paul Walmsley | fa20022 | 2013-01-26 00:48:56 -0700 | [diff] [blame] | 2006 | if (oh->flags & HWMOD_BLOCK_WFI) |
Thomas Gleixner | f7b861b | 2013-03-21 22:49:38 +0100 | [diff] [blame] | 2007 | cpu_idle_poll_ctrl(false); |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 2008 | if (soc_ops.disable_module) |
| 2009 | soc_ops.disable_module(oh); |
Benoit Cousson | bfc141e | 2011-12-16 16:09:11 -0800 | [diff] [blame] | 2010 | |
Benoit Cousson | 45c3825 | 2011-07-10 05:56:33 -0600 | [diff] [blame] | 2011 | /* |
| 2012 | * The module must be in idle mode before disabling any parents |
| 2013 | * clocks. Otherwise, the parent clock might be disabled before |
| 2014 | * the module transition is done, and thus will prevent the |
| 2015 | * transition to complete properly. |
| 2016 | */ |
| 2017 | _disable_clocks(oh); |
Tero Kristo | 1d9a542 | 2016-06-30 16:15:02 +0300 | [diff] [blame] | 2018 | if (oh->clkdm) { |
| 2019 | clkdm_allow_idle(oh->clkdm); |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 2020 | clkdm_hwmod_disable(oh->clkdm, oh); |
Tero Kristo | 1d9a542 | 2016-06-30 16:15:02 +0300 | [diff] [blame] | 2021 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2022 | |
| 2023 | oh->_state = _HWMOD_STATE_IDLE; |
| 2024 | |
| 2025 | return 0; |
| 2026 | } |
| 2027 | |
| 2028 | /** |
| 2029 | * _shutdown - shutdown an omap_hwmod |
| 2030 | * @oh: struct omap_hwmod * |
| 2031 | * |
| 2032 | * Shut down an omap_hwmod @oh. This should be called when the driver |
| 2033 | * used for the hwmod is removed or unloaded or if the driver is not |
| 2034 | * used by the system. Returns -EINVAL if the hwmod is in the wrong |
| 2035 | * state or returns 0. |
| 2036 | */ |
| 2037 | static int _shutdown(struct omap_hwmod *oh) |
| 2038 | { |
Paul Walmsley | 9c8b0ec | 2012-04-18 19:10:02 -0600 | [diff] [blame] | 2039 | int ret, i; |
Paul Walmsley | e4dc8f5 | 2010-12-14 12:42:34 -0700 | [diff] [blame] | 2040 | u8 prev_state; |
| 2041 | |
Suman Anna | c20c8f7 | 2016-04-10 13:20:11 -0600 | [diff] [blame] | 2042 | if (_are_all_hardreset_lines_asserted(oh)) |
| 2043 | return 0; |
| 2044 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2045 | if (oh->_state != _HWMOD_STATE_IDLE && |
| 2046 | oh->_state != _HWMOD_STATE_ENABLED) { |
Russell King | 4f8a428 | 2012-02-07 10:59:37 +0000 | [diff] [blame] | 2047 | WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n", |
| 2048 | oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2049 | return -EINVAL; |
| 2050 | } |
| 2051 | |
| 2052 | pr_debug("omap_hwmod: %s: disabling\n", oh->name); |
| 2053 | |
Paul Walmsley | e4dc8f5 | 2010-12-14 12:42:34 -0700 | [diff] [blame] | 2054 | if (oh->class->pre_shutdown) { |
| 2055 | prev_state = oh->_state; |
| 2056 | if (oh->_state == _HWMOD_STATE_IDLE) |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2057 | _enable(oh); |
Paul Walmsley | e4dc8f5 | 2010-12-14 12:42:34 -0700 | [diff] [blame] | 2058 | ret = oh->class->pre_shutdown(oh); |
| 2059 | if (ret) { |
| 2060 | if (prev_state == _HWMOD_STATE_IDLE) |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2061 | _idle(oh); |
Paul Walmsley | e4dc8f5 | 2010-12-14 12:42:34 -0700 | [diff] [blame] | 2062 | return ret; |
| 2063 | } |
| 2064 | } |
| 2065 | |
Miguel Vadillo | 6481c73 | 2011-07-01 22:54:02 +0200 | [diff] [blame] | 2066 | if (oh->class->sysc) { |
| 2067 | if (oh->_state == _HWMOD_STATE_IDLE) |
| 2068 | _enable(oh); |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 2069 | _shutdown_sysc(oh); |
Miguel Vadillo | 6481c73 | 2011-07-01 22:54:02 +0200 | [diff] [blame] | 2070 | } |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 2071 | |
Benoit Cousson | 3827f94 | 2010-09-21 10:34:08 -0600 | [diff] [blame] | 2072 | /* clocks and deps are already disabled in idle */ |
| 2073 | if (oh->_state == _HWMOD_STATE_ENABLED) { |
| 2074 | _del_initiator_dep(oh, mpu_oh); |
| 2075 | /* XXX what about the other system initiators here? dma, dsp */ |
Paul Walmsley | fa20022 | 2013-01-26 00:48:56 -0700 | [diff] [blame] | 2076 | if (oh->flags & HWMOD_BLOCK_WFI) |
Thomas Gleixner | f7b861b | 2013-03-21 22:49:38 +0100 | [diff] [blame] | 2077 | cpu_idle_poll_ctrl(false); |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 2078 | if (soc_ops.disable_module) |
| 2079 | soc_ops.disable_module(oh); |
Benoit Cousson | 45c3825 | 2011-07-10 05:56:33 -0600 | [diff] [blame] | 2080 | _disable_clocks(oh); |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 2081 | if (oh->clkdm) |
| 2082 | clkdm_hwmod_disable(oh->clkdm, oh); |
Benoit Cousson | 3827f94 | 2010-09-21 10:34:08 -0600 | [diff] [blame] | 2083 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2084 | /* XXX Should this code also force-disable the optional clocks? */ |
| 2085 | |
Paul Walmsley | 9c8b0ec | 2012-04-18 19:10:02 -0600 | [diff] [blame] | 2086 | for (i = 0; i < oh->rst_lines_cnt; i++) |
| 2087 | _assert_hardreset(oh, oh->rst_lines[i].name); |
Benoit Cousson | 31f6286 | 2011-07-01 22:54:05 +0200 | [diff] [blame] | 2088 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2089 | oh->_state = _HWMOD_STATE_DISABLED; |
| 2090 | |
| 2091 | return 0; |
| 2092 | } |
| 2093 | |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2094 | static int of_dev_find_hwmod(struct device_node *np, |
| 2095 | struct omap_hwmod *oh) |
| 2096 | { |
| 2097 | int count, i, res; |
| 2098 | const char *p; |
| 2099 | |
| 2100 | count = of_property_count_strings(np, "ti,hwmods"); |
| 2101 | if (count < 1) |
| 2102 | return -ENODEV; |
| 2103 | |
| 2104 | for (i = 0; i < count; i++) { |
| 2105 | res = of_property_read_string_index(np, "ti,hwmods", |
| 2106 | i, &p); |
| 2107 | if (res) |
| 2108 | continue; |
| 2109 | if (!strcmp(p, oh->name)) { |
| 2110 | pr_debug("omap_hwmod: dt %s[%i] uses hwmod %s\n", |
| 2111 | np->name, i, oh->name); |
| 2112 | return i; |
| 2113 | } |
| 2114 | } |
| 2115 | |
| 2116 | return -ENODEV; |
| 2117 | } |
| 2118 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2119 | /** |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 2120 | * of_dev_hwmod_lookup - look up needed hwmod from dt blob |
| 2121 | * @np: struct device_node * |
| 2122 | * @oh: struct omap_hwmod * |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2123 | * @index: index of the entry found |
| 2124 | * @found: struct device_node * found or NULL |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 2125 | * |
| 2126 | * Parse the dt blob and find out needed hwmod. Recursive function is |
| 2127 | * implemented to take care hierarchical dt blob parsing. |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2128 | * Return: Returns 0 on success, -ENODEV when not found. |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 2129 | */ |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2130 | static int of_dev_hwmod_lookup(struct device_node *np, |
| 2131 | struct omap_hwmod *oh, |
| 2132 | int *index, |
| 2133 | struct device_node **found) |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 2134 | { |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2135 | struct device_node *np0 = NULL; |
| 2136 | int res; |
| 2137 | |
| 2138 | res = of_dev_find_hwmod(np, oh); |
| 2139 | if (res >= 0) { |
| 2140 | *found = np; |
| 2141 | *index = res; |
| 2142 | return 0; |
| 2143 | } |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 2144 | |
| 2145 | for_each_child_of_node(np, np0) { |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2146 | struct device_node *fc; |
| 2147 | int i; |
| 2148 | |
| 2149 | res = of_dev_hwmod_lookup(np0, oh, &i, &fc); |
| 2150 | if (res == 0) { |
| 2151 | *found = fc; |
| 2152 | *index = i; |
| 2153 | return 0; |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 2154 | } |
| 2155 | } |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2156 | |
| 2157 | *found = NULL; |
| 2158 | *index = 0; |
| 2159 | |
| 2160 | return -ENODEV; |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 2161 | } |
| 2162 | |
| 2163 | /** |
Tony Lindgren | 1dbcb97 | 2018-08-08 01:07:04 -0700 | [diff] [blame] | 2164 | * omap_hwmod_fix_mpu_rt_idx - fix up mpu_rt_idx register offsets |
| 2165 | * |
| 2166 | * @oh: struct omap_hwmod * |
| 2167 | * @np: struct device_node * |
| 2168 | * |
| 2169 | * Fix up module register offsets for modules with mpu_rt_idx. |
| 2170 | * Only needed for cpsw with interconnect target module defined |
| 2171 | * in device tree while still using legacy hwmod platform data |
| 2172 | * for rev, sysc and syss registers. |
| 2173 | * |
| 2174 | * Can be removed when all cpsw hwmod platform data has been |
| 2175 | * dropped. |
| 2176 | */ |
| 2177 | static void omap_hwmod_fix_mpu_rt_idx(struct omap_hwmod *oh, |
| 2178 | struct device_node *np, |
| 2179 | struct resource *res) |
| 2180 | { |
| 2181 | struct device_node *child = NULL; |
| 2182 | int error; |
| 2183 | |
| 2184 | child = of_get_next_child(np, child); |
| 2185 | if (!child) |
| 2186 | return; |
| 2187 | |
| 2188 | error = of_address_to_resource(child, oh->mpu_rt_idx, res); |
| 2189 | if (error) |
| 2190 | pr_err("%s: error mapping mpu_rt_idx: %i\n", |
| 2191 | __func__, error); |
| 2192 | } |
| 2193 | |
| 2194 | /** |
Tony Lindgren | 6c72b35 | 2017-10-10 14:23:27 -0700 | [diff] [blame] | 2195 | * omap_hwmod_parse_module_range - map module IO range from device tree |
| 2196 | * @oh: struct omap_hwmod * |
| 2197 | * @np: struct device_node * |
| 2198 | * |
| 2199 | * Parse the device tree range an interconnect target module provides |
| 2200 | * for it's child device IP blocks. This way we can support the old |
| 2201 | * "ti,hwmods" property with just dts data without a need for platform |
| 2202 | * data for IO resources. And we don't need all the child IP device |
| 2203 | * nodes available in the dts. |
| 2204 | */ |
| 2205 | int omap_hwmod_parse_module_range(struct omap_hwmod *oh, |
| 2206 | struct device_node *np, |
| 2207 | struct resource *res) |
| 2208 | { |
| 2209 | struct property *prop; |
| 2210 | const __be32 *ranges; |
| 2211 | const char *name; |
| 2212 | u32 nr_addr, nr_size; |
| 2213 | u64 base, size; |
| 2214 | int len, error; |
| 2215 | |
| 2216 | if (!res) |
| 2217 | return -EINVAL; |
| 2218 | |
| 2219 | ranges = of_get_property(np, "ranges", &len); |
| 2220 | if (!ranges) |
| 2221 | return -ENOENT; |
| 2222 | |
| 2223 | len /= sizeof(*ranges); |
| 2224 | |
| 2225 | if (len < 3) |
| 2226 | return -EINVAL; |
| 2227 | |
| 2228 | of_property_for_each_string(np, "compatible", prop, name) |
| 2229 | if (!strncmp("ti,sysc-", name, 8)) |
| 2230 | break; |
| 2231 | |
| 2232 | if (!name) |
| 2233 | return -ENOENT; |
| 2234 | |
| 2235 | error = of_property_read_u32(np, "#address-cells", &nr_addr); |
| 2236 | if (error) |
| 2237 | return -ENOENT; |
| 2238 | |
| 2239 | error = of_property_read_u32(np, "#size-cells", &nr_size); |
| 2240 | if (error) |
| 2241 | return -ENOENT; |
| 2242 | |
| 2243 | if (nr_addr != 1 || nr_size != 1) { |
| 2244 | pr_err("%s: invalid range for %s->%s\n", __func__, |
| 2245 | oh->name, np->name); |
| 2246 | return -EINVAL; |
| 2247 | } |
| 2248 | |
| 2249 | ranges++; |
| 2250 | base = of_translate_address(np, ranges++); |
| 2251 | size = be32_to_cpup(ranges); |
| 2252 | |
| 2253 | pr_debug("omap_hwmod: %s %s at 0x%llx size 0x%llx\n", |
Tony Lindgren | 4769c00 | 2018-08-08 01:07:03 -0700 | [diff] [blame] | 2254 | oh ? oh->name : "", np->name, base, size); |
Tony Lindgren | 6c72b35 | 2017-10-10 14:23:27 -0700 | [diff] [blame] | 2255 | |
Tony Lindgren | 1dbcb97 | 2018-08-08 01:07:04 -0700 | [diff] [blame] | 2256 | if (oh && oh->mpu_rt_idx) { |
| 2257 | omap_hwmod_fix_mpu_rt_idx(oh, np, res); |
| 2258 | |
| 2259 | return 0; |
| 2260 | } |
| 2261 | |
Tony Lindgren | 6c72b35 | 2017-10-10 14:23:27 -0700 | [diff] [blame] | 2262 | res->start = base; |
| 2263 | res->end = base + size - 1; |
| 2264 | res->flags = IORESOURCE_MEM; |
| 2265 | |
| 2266 | return 0; |
| 2267 | } |
| 2268 | |
| 2269 | /** |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2270 | * _init_mpu_rt_base - populate the virtual address for a hwmod |
| 2271 | * @oh: struct omap_hwmod * to locate the virtual address |
Rajendra Nayak | f92d959 | 2013-10-09 01:26:55 -0600 | [diff] [blame] | 2272 | * @data: (unused, caller should pass NULL) |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2273 | * @index: index of the reg entry iospace in device tree |
Rajendra Nayak | f92d959 | 2013-10-09 01:26:55 -0600 | [diff] [blame] | 2274 | * @np: struct device_node * of the IP block's device node in the DT data |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2275 | * |
| 2276 | * Cache the virtual address used by the MPU to access this IP block's |
| 2277 | * registers. This address is needed early so the OCP registers that |
| 2278 | * are part of the device's address space can be ioremapped properly. |
Suman Anna | 6423d6d | 2013-10-08 23:46:49 -0600 | [diff] [blame] | 2279 | * |
Roger Quadros | 9a258af | 2015-07-16 16:16:44 +0300 | [diff] [blame] | 2280 | * If SYSC access is not needed, the registers will not be remapped |
| 2281 | * and non-availability of MPU access is not treated as an error. |
| 2282 | * |
Suman Anna | 6423d6d | 2013-10-08 23:46:49 -0600 | [diff] [blame] | 2283 | * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and |
| 2284 | * -ENXIO on absent or invalid register target address space. |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2285 | */ |
Rajendra Nayak | f92d959 | 2013-10-09 01:26:55 -0600 | [diff] [blame] | 2286 | static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data, |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2287 | int index, struct device_node *np) |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2288 | { |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 2289 | void __iomem *va_start = NULL; |
Tony Lindgren | 6c72b35 | 2017-10-10 14:23:27 -0700 | [diff] [blame] | 2290 | struct resource res; |
| 2291 | int error; |
Paul Walmsley | c9aafd2 | 2012-04-18 19:10:05 -0600 | [diff] [blame] | 2292 | |
| 2293 | if (!oh) |
Suman Anna | 6423d6d | 2013-10-08 23:46:49 -0600 | [diff] [blame] | 2294 | return -EINVAL; |
Paul Walmsley | c9aafd2 | 2012-04-18 19:10:05 -0600 | [diff] [blame] | 2295 | |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 2296 | _save_mpu_port_index(oh); |
| 2297 | |
Roger Quadros | 9a258af | 2015-07-16 16:16:44 +0300 | [diff] [blame] | 2298 | /* if we don't need sysc access we don't need to ioremap */ |
| 2299 | if (!oh->class->sysc) |
| 2300 | return 0; |
| 2301 | |
| 2302 | /* we can't continue without MPU PORT if we need sysc access */ |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2303 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT) |
Suman Anna | 6423d6d | 2013-10-08 23:46:49 -0600 | [diff] [blame] | 2304 | return -ENXIO; |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2305 | |
Tony Lindgren | 9cffb1a | 2017-10-10 14:27:33 -0700 | [diff] [blame] | 2306 | if (!np) { |
| 2307 | pr_err("omap_hwmod: %s: no dt node\n", oh->name); |
| 2308 | return -ENXIO; |
Paul Walmsley | c9aafd2 | 2012-04-18 19:10:05 -0600 | [diff] [blame] | 2309 | } |
| 2310 | |
Tony Lindgren | 9cffb1a | 2017-10-10 14:27:33 -0700 | [diff] [blame] | 2311 | /* Do we have a dts range for the interconnect target module? */ |
| 2312 | error = omap_hwmod_parse_module_range(oh, np, &res); |
| 2313 | if (!error) |
| 2314 | va_start = ioremap(res.start, resource_size(&res)); |
| 2315 | |
| 2316 | /* No ranges, rely on device reg entry */ |
| 2317 | if (!va_start) |
| 2318 | va_start = of_iomap(np, index + oh->mpu_rt_idx); |
Paul Walmsley | c9aafd2 | 2012-04-18 19:10:05 -0600 | [diff] [blame] | 2319 | if (!va_start) { |
Tony Lindgren | 9cffb1a | 2017-10-10 14:27:33 -0700 | [diff] [blame] | 2320 | pr_err("omap_hwmod: %s: Missing dt reg%i for %pOF\n", |
| 2321 | oh->name, index, np); |
Suman Anna | 6423d6d | 2013-10-08 23:46:49 -0600 | [diff] [blame] | 2322 | return -ENXIO; |
Paul Walmsley | c9aafd2 | 2012-04-18 19:10:05 -0600 | [diff] [blame] | 2323 | } |
| 2324 | |
| 2325 | pr_debug("omap_hwmod: %s: MPU register target at va %p\n", |
| 2326 | oh->name, va_start); |
| 2327 | |
| 2328 | oh->_mpu_rt_va = va_start; |
Suman Anna | 6423d6d | 2013-10-08 23:46:49 -0600 | [diff] [blame] | 2329 | return 0; |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2330 | } |
| 2331 | |
| 2332 | /** |
| 2333 | * _init - initialize internal data for the hwmod @oh |
| 2334 | * @oh: struct omap_hwmod * |
| 2335 | * @n: (unused) |
| 2336 | * |
| 2337 | * Look up the clocks and the address space used by the MPU to access |
| 2338 | * registers belonging to the hwmod @oh. @oh must already be |
| 2339 | * registered at this point. This is the first of two phases for |
| 2340 | * hwmod initialization. Code called here does not touch any hardware |
| 2341 | * registers, it simply prepares internal data structures. Returns 0 |
Suman Anna | 6423d6d | 2013-10-08 23:46:49 -0600 | [diff] [blame] | 2342 | * upon success or if the hwmod isn't registered or if the hwmod's |
| 2343 | * address space is not defined, or -EINVAL upon failure. |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2344 | */ |
| 2345 | static int __init _init(struct omap_hwmod *oh, void *data) |
| 2346 | { |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2347 | int r, index; |
Rajendra Nayak | f92d959 | 2013-10-09 01:26:55 -0600 | [diff] [blame] | 2348 | struct device_node *np = NULL; |
Tony Lindgren | 1aa8f0c | 2017-05-31 15:51:37 -0700 | [diff] [blame] | 2349 | struct device_node *bus; |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2350 | |
| 2351 | if (oh->_state != _HWMOD_STATE_REGISTERED) |
| 2352 | return 0; |
| 2353 | |
Tony Lindgren | 1aa8f0c | 2017-05-31 15:51:37 -0700 | [diff] [blame] | 2354 | bus = of_find_node_by_name(NULL, "ocp"); |
| 2355 | if (!bus) |
| 2356 | return -ENODEV; |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2357 | |
Tony Lindgren | 1aa8f0c | 2017-05-31 15:51:37 -0700 | [diff] [blame] | 2358 | r = of_dev_hwmod_lookup(bus, oh, &index, &np); |
| 2359 | if (r) |
| 2360 | pr_debug("omap_hwmod: %s missing dt data\n", oh->name); |
| 2361 | else if (np && index) |
| 2362 | pr_warn("omap_hwmod: %s using broken dt data from %s\n", |
| 2363 | oh->name, np->name); |
Rajendra Nayak | f92d959 | 2013-10-09 01:26:55 -0600 | [diff] [blame] | 2364 | |
Roger Quadros | 9a258af | 2015-07-16 16:16:44 +0300 | [diff] [blame] | 2365 | r = _init_mpu_rt_base(oh, NULL, index, np); |
| 2366 | if (r < 0) { |
| 2367 | WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n", |
| 2368 | oh->name); |
| 2369 | return 0; |
Suman Anna | 6423d6d | 2013-10-08 23:46:49 -0600 | [diff] [blame] | 2370 | } |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2371 | |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 2372 | r = _init_clocks(oh, np); |
Russell King | c48cd65 | 2013-03-13 20:44:21 +0000 | [diff] [blame] | 2373 | if (r < 0) { |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2374 | WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name); |
| 2375 | return -EINVAL; |
| 2376 | } |
| 2377 | |
Suman Anna | 3d36ad7 | 2014-03-14 14:45:17 +0530 | [diff] [blame] | 2378 | if (np) { |
Rajendra Nayak | f92d959 | 2013-10-09 01:26:55 -0600 | [diff] [blame] | 2379 | if (of_find_property(np, "ti,no-reset-on-init", NULL)) |
| 2380 | oh->flags |= HWMOD_INIT_NO_RESET; |
| 2381 | if (of_find_property(np, "ti,no-idle-on-init", NULL)) |
| 2382 | oh->flags |= HWMOD_INIT_NO_IDLE; |
Lokesh Vutla | 2e18f5a | 2016-03-07 01:41:21 -0700 | [diff] [blame] | 2383 | if (of_find_property(np, "ti,no-idle", NULL)) |
| 2384 | oh->flags |= HWMOD_NO_IDLE; |
Suman Anna | 3d36ad7 | 2014-03-14 14:45:17 +0530 | [diff] [blame] | 2385 | } |
Rajendra Nayak | f92d959 | 2013-10-09 01:26:55 -0600 | [diff] [blame] | 2386 | |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2387 | oh->_state = _HWMOD_STATE_INITIALIZED; |
| 2388 | |
| 2389 | return 0; |
| 2390 | } |
| 2391 | |
| 2392 | /** |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2393 | * _setup_iclk_autoidle - configure an IP block's interface clocks |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2394 | * @oh: struct omap_hwmod * |
| 2395 | * |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2396 | * Set up the module's interface clocks. XXX This function is still mostly |
| 2397 | * a stub; implementing this properly requires iclk autoidle usecounting in |
| 2398 | * the clock code. No return value. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2399 | */ |
Nathan Chancellor | 8218fcf | 2018-10-17 17:52:07 -0700 | [diff] [blame] | 2400 | static void _setup_iclk_autoidle(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2401 | { |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 2402 | struct omap_hwmod_ocp_if *os; |
Tony Lindgren | b8e1bdd | 2017-03-14 13:13:19 -0700 | [diff] [blame] | 2403 | |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2404 | if (oh->_state != _HWMOD_STATE_INITIALIZED) |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2405 | return; |
Paul Walmsley | 48d54f3 | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 2406 | |
Tony Lindgren | b8e1bdd | 2017-03-14 13:13:19 -0700 | [diff] [blame] | 2407 | list_for_each_entry(os, &oh->slave_ports, node) { |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 2408 | if (!os->_clk) |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2409 | continue; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2410 | |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2411 | if (os->flags & OCPIF_SWSUP_IDLE) { |
| 2412 | /* XXX omap_iclk_deny_idle(c); */ |
| 2413 | } else { |
| 2414 | /* XXX omap_iclk_allow_idle(c); */ |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 2415 | clk_enable(os->_clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2416 | } |
| 2417 | } |
| 2418 | |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2419 | return; |
| 2420 | } |
| 2421 | |
| 2422 | /** |
| 2423 | * _setup_reset - reset an IP block during the setup process |
| 2424 | * @oh: struct omap_hwmod * |
| 2425 | * |
| 2426 | * Reset the IP block corresponding to the hwmod @oh during the setup |
| 2427 | * process. The IP block is first enabled so it can be successfully |
| 2428 | * reset. Returns 0 upon success or a negative error code upon |
| 2429 | * failure. |
| 2430 | */ |
Nathan Chancellor | 8218fcf | 2018-10-17 17:52:07 -0700 | [diff] [blame] | 2431 | static int _setup_reset(struct omap_hwmod *oh) |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2432 | { |
| 2433 | int r; |
| 2434 | |
| 2435 | if (oh->_state != _HWMOD_STATE_INITIALIZED) |
| 2436 | return -EINVAL; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2437 | |
Paul Walmsley | 5fb3d52 | 2012-10-29 22:11:50 -0600 | [diff] [blame] | 2438 | if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK) |
| 2439 | return -EPERM; |
| 2440 | |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 2441 | if (oh->rst_lines_cnt == 0) { |
| 2442 | r = _enable(oh); |
| 2443 | if (r) { |
Joe Perches | 3d0cb73 | 2014-09-13 11:31:16 -0700 | [diff] [blame] | 2444 | pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n", |
| 2445 | oh->name, oh->_state); |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 2446 | return -EINVAL; |
| 2447 | } |
Benoit Cousson | 9a23dfe | 2010-05-20 12:31:08 -0600 | [diff] [blame] | 2448 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2449 | |
Rajendra Nayak | 2800852 | 2012-03-13 22:55:23 +0530 | [diff] [blame] | 2450 | if (!(oh->flags & HWMOD_INIT_NO_RESET)) |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2451 | r = _reset(oh); |
| 2452 | |
| 2453 | return r; |
| 2454 | } |
| 2455 | |
| 2456 | /** |
| 2457 | * _setup_postsetup - transition to the appropriate state after _setup |
| 2458 | * @oh: struct omap_hwmod * |
| 2459 | * |
| 2460 | * Place an IP block represented by @oh into a "post-setup" state -- |
| 2461 | * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that |
| 2462 | * this function is called at the end of _setup().) The postsetup |
| 2463 | * state for an IP block can be changed by calling |
| 2464 | * omap_hwmod_enter_postsetup_state() early in the boot process, |
| 2465 | * before one of the omap_hwmod_setup*() functions are called for the |
| 2466 | * IP block. |
| 2467 | * |
| 2468 | * The IP block stays in this state until a PM runtime-based driver is |
| 2469 | * loaded for that IP block. A post-setup state of IDLE is |
| 2470 | * appropriate for almost all IP blocks with runtime PM-enabled |
| 2471 | * drivers, since those drivers are able to enable the IP block. A |
| 2472 | * post-setup state of ENABLED is appropriate for kernels with PM |
| 2473 | * runtime disabled. The DISABLED state is appropriate for unusual IP |
| 2474 | * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers |
| 2475 | * included, since the WDTIMER starts running on reset and will reset |
| 2476 | * the MPU if left active. |
| 2477 | * |
| 2478 | * This post-setup mechanism is deprecated. Once all of the OMAP |
| 2479 | * drivers have been converted to use PM runtime, and all of the IP |
| 2480 | * block data and interconnect data is available to the hwmod code, it |
| 2481 | * should be possible to replace this mechanism with a "lazy reset" |
| 2482 | * arrangement. In a "lazy reset" setup, each IP block is enabled |
| 2483 | * when the driver first probes, then all remaining IP blocks without |
| 2484 | * drivers are either shut down or enabled after the drivers have |
| 2485 | * loaded. However, this cannot take place until the above |
| 2486 | * preconditions have been met, since otherwise the late reset code |
| 2487 | * has no way of knowing which IP blocks are in use by drivers, and |
| 2488 | * which ones are unused. |
| 2489 | * |
| 2490 | * No return value. |
| 2491 | */ |
Nathan Chancellor | 8218fcf | 2018-10-17 17:52:07 -0700 | [diff] [blame] | 2492 | static void _setup_postsetup(struct omap_hwmod *oh) |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2493 | { |
| 2494 | u8 postsetup_state; |
| 2495 | |
| 2496 | if (oh->rst_lines_cnt > 0) |
| 2497 | return; |
Benoit Cousson | 76e5589 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 2498 | |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2499 | postsetup_state = oh->_postsetup_state; |
| 2500 | if (postsetup_state == _HWMOD_STATE_UNKNOWN) |
| 2501 | postsetup_state = _HWMOD_STATE_ENABLED; |
| 2502 | |
| 2503 | /* |
| 2504 | * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data - |
| 2505 | * it should be set by the core code as a runtime flag during startup |
| 2506 | */ |
Lokesh Vutla | 2e18f5a | 2016-03-07 01:41:21 -0700 | [diff] [blame] | 2507 | if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) && |
Rajendra Nayak | aacf094 | 2011-12-16 05:50:12 -0700 | [diff] [blame] | 2508 | (postsetup_state == _HWMOD_STATE_IDLE)) { |
| 2509 | oh->_int_flags |= _HWMOD_SKIP_ENABLE; |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2510 | postsetup_state = _HWMOD_STATE_ENABLED; |
Rajendra Nayak | aacf094 | 2011-12-16 05:50:12 -0700 | [diff] [blame] | 2511 | } |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2512 | |
| 2513 | if (postsetup_state == _HWMOD_STATE_IDLE) |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2514 | _idle(oh); |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2515 | else if (postsetup_state == _HWMOD_STATE_DISABLED) |
| 2516 | _shutdown(oh); |
| 2517 | else if (postsetup_state != _HWMOD_STATE_ENABLED) |
| 2518 | WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n", |
| 2519 | oh->name, postsetup_state); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2520 | |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2521 | return; |
| 2522 | } |
| 2523 | |
| 2524 | /** |
| 2525 | * _setup - prepare IP block hardware for use |
| 2526 | * @oh: struct omap_hwmod * |
| 2527 | * @n: (unused, pass NULL) |
| 2528 | * |
| 2529 | * Configure the IP block represented by @oh. This may include |
| 2530 | * enabling the IP block, resetting it, and placing it into a |
| 2531 | * post-setup state, depending on the type of IP block and applicable |
| 2532 | * flags. IP blocks are reset to prevent any previous configuration |
| 2533 | * by the bootloader or previous operating system from interfering |
| 2534 | * with power management or other parts of the system. The reset can |
| 2535 | * be avoided; see omap_hwmod_no_setup_reset(). This is the second of |
| 2536 | * two phases for hwmod initialization. Code called here generally |
| 2537 | * affects the IP block hardware, or system integration hardware |
| 2538 | * associated with the IP block. Returns 0. |
| 2539 | */ |
Tony Lindgren | 8c87970 | 2018-02-22 14:04:56 -0800 | [diff] [blame] | 2540 | static int _setup(struct omap_hwmod *oh, void *data) |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2541 | { |
| 2542 | if (oh->_state != _HWMOD_STATE_INITIALIZED) |
| 2543 | return 0; |
| 2544 | |
Tomi Valkeinen | f22d254 | 2014-10-09 17:03:14 +0300 | [diff] [blame] | 2545 | if (oh->parent_hwmod) { |
| 2546 | int r; |
| 2547 | |
| 2548 | r = _enable(oh->parent_hwmod); |
| 2549 | WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n", |
| 2550 | oh->name, oh->parent_hwmod->name); |
| 2551 | } |
| 2552 | |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2553 | _setup_iclk_autoidle(oh); |
| 2554 | |
| 2555 | if (!_setup_reset(oh)) |
| 2556 | _setup_postsetup(oh); |
| 2557 | |
Tomi Valkeinen | f22d254 | 2014-10-09 17:03:14 +0300 | [diff] [blame] | 2558 | if (oh->parent_hwmod) { |
| 2559 | u8 postsetup_state; |
| 2560 | |
| 2561 | postsetup_state = oh->parent_hwmod->_postsetup_state; |
| 2562 | |
| 2563 | if (postsetup_state == _HWMOD_STATE_IDLE) |
| 2564 | _idle(oh->parent_hwmod); |
| 2565 | else if (postsetup_state == _HWMOD_STATE_DISABLED) |
| 2566 | _shutdown(oh->parent_hwmod); |
| 2567 | else if (postsetup_state != _HWMOD_STATE_ENABLED) |
| 2568 | WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n", |
| 2569 | oh->parent_hwmod->name, postsetup_state); |
| 2570 | } |
| 2571 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2572 | return 0; |
| 2573 | } |
| 2574 | |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2575 | /** |
| 2576 | * _register - register a struct omap_hwmod |
| 2577 | * @oh: struct omap_hwmod * |
| 2578 | * |
| 2579 | * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod |
| 2580 | * already has been registered by the same name; -EINVAL if the |
| 2581 | * omap_hwmod is in the wrong state, if @oh is NULL, if the |
| 2582 | * omap_hwmod's class field is NULL; if the omap_hwmod is missing a |
| 2583 | * name, or if the omap_hwmod's class is missing a name; or 0 upon |
| 2584 | * success. |
| 2585 | * |
| 2586 | * XXX The data should be copied into bootmem, so the original data |
| 2587 | * should be marked __initdata and freed after init. This would allow |
| 2588 | * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note |
| 2589 | * that the copy process would be relatively complex due to the large number |
| 2590 | * of substructures. |
| 2591 | */ |
Benoit Cousson | 01592df | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 2592 | static int __init _register(struct omap_hwmod *oh) |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2593 | { |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2594 | if (!oh || !oh->name || !oh->class || !oh->class->name || |
| 2595 | (oh->_state != _HWMOD_STATE_UNKNOWN)) |
| 2596 | return -EINVAL; |
| 2597 | |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2598 | pr_debug("omap_hwmod: %s: registering\n", oh->name); |
| 2599 | |
Benoit Cousson | ce35b24 | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 2600 | if (_lookup(oh->name)) |
| 2601 | return -EEXIST; |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2602 | |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2603 | list_add_tail(&oh->node, &omap_hwmod_list); |
| 2604 | |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 2605 | INIT_LIST_HEAD(&oh->slave_ports); |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2606 | spin_lock_init(&oh->_lock); |
Peter Ujfalusi | 6931795 | 2015-02-26 00:00:51 -0700 | [diff] [blame] | 2607 | lockdep_set_class(&oh->_lock, &oh->hwmod_key); |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2608 | |
| 2609 | oh->_state = _HWMOD_STATE_REGISTERED; |
| 2610 | |
Paul Walmsley | 569edd70 | 2011-02-23 00:14:06 -0700 | [diff] [blame] | 2611 | /* |
| 2612 | * XXX Rather than doing a strcmp(), this should test a flag |
| 2613 | * set in the hwmod data, inserted by the autogenerator code. |
| 2614 | */ |
| 2615 | if (!strcmp(oh->name, MPU_INITIATOR_NAME)) |
| 2616 | mpu_oh = oh; |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2617 | |
Paul Walmsley | 569edd70 | 2011-02-23 00:14:06 -0700 | [diff] [blame] | 2618 | return 0; |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2619 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2620 | |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 2621 | /** |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 2622 | * _add_link - add an interconnect between two IP blocks |
| 2623 | * @oi: pointer to a struct omap_hwmod_ocp_if record |
| 2624 | * |
Tony Lindgren | a1e3123 | 2017-03-14 13:13:19 -0700 | [diff] [blame] | 2625 | * Add struct omap_hwmod_link records connecting the slave IP block |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 2626 | * specified in @oi->slave to @oi. This code is assumed to run before |
| 2627 | * preemption or SMP has been enabled, thus avoiding the need for |
| 2628 | * locking in this code. Changes to this assumption will require |
| 2629 | * additional locking. Returns 0. |
| 2630 | */ |
| 2631 | static int __init _add_link(struct omap_hwmod_ocp_if *oi) |
| 2632 | { |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 2633 | pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name, |
| 2634 | oi->slave->name); |
| 2635 | |
Tony Lindgren | a1e3123 | 2017-03-14 13:13:19 -0700 | [diff] [blame] | 2636 | list_add(&oi->node, &oi->slave->slave_ports); |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 2637 | oi->slave->slaves_cnt++; |
| 2638 | |
| 2639 | return 0; |
| 2640 | } |
| 2641 | |
| 2642 | /** |
| 2643 | * _register_link - register a struct omap_hwmod_ocp_if |
| 2644 | * @oi: struct omap_hwmod_ocp_if * |
| 2645 | * |
| 2646 | * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it |
| 2647 | * has already been registered; -EINVAL if @oi is NULL or if the |
| 2648 | * record pointed to by @oi is missing required fields; or 0 upon |
| 2649 | * success. |
| 2650 | * |
| 2651 | * XXX The data should be copied into bootmem, so the original data |
| 2652 | * should be marked __initdata and freed after init. This would allow |
| 2653 | * unneeded omap_hwmods to be freed on multi-OMAP configurations. |
| 2654 | */ |
| 2655 | static int __init _register_link(struct omap_hwmod_ocp_if *oi) |
| 2656 | { |
| 2657 | if (!oi || !oi->master || !oi->slave || !oi->user) |
| 2658 | return -EINVAL; |
| 2659 | |
| 2660 | if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED) |
| 2661 | return -EEXIST; |
| 2662 | |
| 2663 | pr_debug("omap_hwmod: registering link from %s to %s\n", |
| 2664 | oi->master->name, oi->slave->name); |
| 2665 | |
| 2666 | /* |
| 2667 | * Register the connected hwmods, if they haven't been |
| 2668 | * registered already |
| 2669 | */ |
| 2670 | if (oi->master->_state != _HWMOD_STATE_REGISTERED) |
| 2671 | _register(oi->master); |
| 2672 | |
| 2673 | if (oi->slave->_state != _HWMOD_STATE_REGISTERED) |
| 2674 | _register(oi->slave); |
| 2675 | |
| 2676 | _add_link(oi); |
| 2677 | |
| 2678 | oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED; |
| 2679 | |
| 2680 | return 0; |
| 2681 | } |
| 2682 | |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2683 | /* Static functions intended only for use in soc_ops field function pointers */ |
| 2684 | |
| 2685 | /** |
Tero Kristo | 9002e921 | 2014-10-27 08:39:23 -0700 | [diff] [blame] | 2686 | * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2687 | * @oh: struct omap_hwmod * |
| 2688 | * |
| 2689 | * Wait for a module @oh to leave slave idle. Returns 0 if the module |
| 2690 | * does not have an IDLEST bit or if the module successfully leaves |
| 2691 | * slave idle; otherwise, pass along the return value of the |
| 2692 | * appropriate *_cm*_wait_module_ready() function. |
| 2693 | */ |
Tero Kristo | 9002e921 | 2014-10-27 08:39:23 -0700 | [diff] [blame] | 2694 | static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh) |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2695 | { |
| 2696 | if (!oh) |
| 2697 | return -EINVAL; |
| 2698 | |
| 2699 | if (oh->flags & HWMOD_NO_IDLEST) |
| 2700 | return 0; |
| 2701 | |
| 2702 | if (!_find_mpu_rt_port(oh)) |
| 2703 | return 0; |
| 2704 | |
| 2705 | /* XXX check module SIDLEMODE, hardreset status, enabled clocks */ |
| 2706 | |
Tero Kristo | 021b6ff | 2014-10-27 08:39:23 -0700 | [diff] [blame] | 2707 | return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs, |
| 2708 | oh->prcm.omap2.idlest_reg_id, |
| 2709 | oh->prcm.omap2.idlest_idle_bit); |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2710 | } |
| 2711 | |
| 2712 | /** |
| 2713 | * _omap4_wait_target_ready - wait for a module to leave slave idle |
| 2714 | * @oh: struct omap_hwmod * |
| 2715 | * |
| 2716 | * Wait for a module @oh to leave slave idle. Returns 0 if the module |
| 2717 | * does not have an IDLEST bit or if the module successfully leaves |
| 2718 | * slave idle; otherwise, pass along the return value of the |
| 2719 | * appropriate *_cm*_wait_module_ready() function. |
| 2720 | */ |
| 2721 | static int _omap4_wait_target_ready(struct omap_hwmod *oh) |
| 2722 | { |
Paul Walmsley | 2b026d1 | 2012-09-23 17:28:18 -0600 | [diff] [blame] | 2723 | if (!oh) |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2724 | return -EINVAL; |
| 2725 | |
Paul Walmsley | 2b026d1 | 2012-09-23 17:28:18 -0600 | [diff] [blame] | 2726 | if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm) |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2727 | return 0; |
| 2728 | |
| 2729 | if (!_find_mpu_rt_port(oh)) |
| 2730 | return 0; |
| 2731 | |
Tony Lindgren | 8823ddf | 2017-08-29 10:03:33 -0700 | [diff] [blame] | 2732 | if (_omap4_clkctrl_managed_by_clkfwk(oh)) |
| 2733 | return 0; |
| 2734 | |
| 2735 | if (!_omap4_has_clkctrl_clock(oh)) |
Dave Gerlach | 428929c | 2016-07-12 12:50:33 -0500 | [diff] [blame] | 2736 | return 0; |
| 2737 | |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2738 | /* XXX check module SIDLEMODE, hardreset status */ |
| 2739 | |
Tero Kristo | 021b6ff | 2014-10-27 08:39:23 -0700 | [diff] [blame] | 2740 | return omap_cm_wait_module_ready(oh->clkdm->prcm_partition, |
| 2741 | oh->clkdm->cm_inst, |
| 2742 | oh->prcm.omap4.clkctrl_offs, 0); |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 2743 | } |
| 2744 | |
| 2745 | /** |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2746 | * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args |
| 2747 | * @oh: struct omap_hwmod * to assert hardreset |
| 2748 | * @ohri: hardreset line data |
| 2749 | * |
| 2750 | * Call omap2_prm_assert_hardreset() with parameters extracted from |
| 2751 | * the hwmod @oh and the hardreset line data @ohri. Only intended for |
| 2752 | * use as an soc_ops function pointer. Passes along the return value |
| 2753 | * from omap2_prm_assert_hardreset(). XXX This function is scheduled |
| 2754 | * for removal when the PRM code is moved into drivers/. |
| 2755 | */ |
| 2756 | static int _omap2_assert_hardreset(struct omap_hwmod *oh, |
| 2757 | struct omap_hwmod_rst_info *ohri) |
| 2758 | { |
Tero Kristo | efd44dc | 2014-10-27 08:39:24 -0700 | [diff] [blame] | 2759 | return omap_prm_assert_hardreset(ohri->rst_shift, 0, |
| 2760 | oh->prcm.omap2.module_offs, 0); |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2761 | } |
| 2762 | |
| 2763 | /** |
| 2764 | * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args |
| 2765 | * @oh: struct omap_hwmod * to deassert hardreset |
| 2766 | * @ohri: hardreset line data |
| 2767 | * |
| 2768 | * Call omap2_prm_deassert_hardreset() with parameters extracted from |
| 2769 | * the hwmod @oh and the hardreset line data @ohri. Only intended for |
| 2770 | * use as an soc_ops function pointer. Passes along the return value |
| 2771 | * from omap2_prm_deassert_hardreset(). XXX This function is |
| 2772 | * scheduled for removal when the PRM code is moved into drivers/. |
| 2773 | */ |
| 2774 | static int _omap2_deassert_hardreset(struct omap_hwmod *oh, |
| 2775 | struct omap_hwmod_rst_info *ohri) |
| 2776 | { |
Tero Kristo | 37fb59d | 2014-10-27 08:39:25 -0700 | [diff] [blame] | 2777 | return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0, |
| 2778 | oh->prcm.omap2.module_offs, 0, 0); |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2779 | } |
| 2780 | |
| 2781 | /** |
| 2782 | * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args |
| 2783 | * @oh: struct omap_hwmod * to test hardreset |
| 2784 | * @ohri: hardreset line data |
| 2785 | * |
| 2786 | * Call omap2_prm_is_hardreset_asserted() with parameters extracted |
| 2787 | * from the hwmod @oh and the hardreset line data @ohri. Only |
| 2788 | * intended for use as an soc_ops function pointer. Passes along the |
| 2789 | * return value from omap2_prm_is_hardreset_asserted(). XXX This |
| 2790 | * function is scheduled for removal when the PRM code is moved into |
| 2791 | * drivers/. |
| 2792 | */ |
| 2793 | static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh, |
| 2794 | struct omap_hwmod_rst_info *ohri) |
| 2795 | { |
Tero Kristo | 1bc28b3 | 2014-10-27 08:39:25 -0700 | [diff] [blame] | 2796 | return omap_prm_is_hardreset_asserted(ohri->st_shift, 0, |
| 2797 | oh->prcm.omap2.module_offs, 0); |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2798 | } |
| 2799 | |
| 2800 | /** |
| 2801 | * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args |
| 2802 | * @oh: struct omap_hwmod * to assert hardreset |
| 2803 | * @ohri: hardreset line data |
| 2804 | * |
| 2805 | * Call omap4_prminst_assert_hardreset() with parameters extracted |
| 2806 | * from the hwmod @oh and the hardreset line data @ohri. Only |
| 2807 | * intended for use as an soc_ops function pointer. Passes along the |
| 2808 | * return value from omap4_prminst_assert_hardreset(). XXX This |
| 2809 | * function is scheduled for removal when the PRM code is moved into |
| 2810 | * drivers/. |
| 2811 | */ |
| 2812 | static int _omap4_assert_hardreset(struct omap_hwmod *oh, |
| 2813 | struct omap_hwmod_rst_info *ohri) |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2814 | { |
Paul Walmsley | 07b3a13 | 2012-06-20 20:11:36 -0600 | [diff] [blame] | 2815 | if (!oh->clkdm) |
| 2816 | return -EINVAL; |
| 2817 | |
Tero Kristo | efd44dc | 2014-10-27 08:39:24 -0700 | [diff] [blame] | 2818 | return omap_prm_assert_hardreset(ohri->rst_shift, |
| 2819 | oh->clkdm->pwrdm.ptr->prcm_partition, |
| 2820 | oh->clkdm->pwrdm.ptr->prcm_offs, |
| 2821 | oh->prcm.omap4.rstctrl_offs); |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2822 | } |
| 2823 | |
| 2824 | /** |
| 2825 | * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args |
| 2826 | * @oh: struct omap_hwmod * to deassert hardreset |
| 2827 | * @ohri: hardreset line data |
| 2828 | * |
| 2829 | * Call omap4_prminst_deassert_hardreset() with parameters extracted |
| 2830 | * from the hwmod @oh and the hardreset line data @ohri. Only |
| 2831 | * intended for use as an soc_ops function pointer. Passes along the |
| 2832 | * return value from omap4_prminst_deassert_hardreset(). XXX This |
| 2833 | * function is scheduled for removal when the PRM code is moved into |
| 2834 | * drivers/. |
| 2835 | */ |
| 2836 | static int _omap4_deassert_hardreset(struct omap_hwmod *oh, |
| 2837 | struct omap_hwmod_rst_info *ohri) |
| 2838 | { |
Paul Walmsley | 07b3a13 | 2012-06-20 20:11:36 -0600 | [diff] [blame] | 2839 | if (!oh->clkdm) |
| 2840 | return -EINVAL; |
| 2841 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2842 | if (ohri->st_shift) |
| 2843 | pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n", |
| 2844 | oh->name, ohri->name); |
Tero Kristo | 4ebf5b2 | 2015-05-05 16:33:04 +0300 | [diff] [blame] | 2845 | return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift, |
Tero Kristo | 37fb59d | 2014-10-27 08:39:25 -0700 | [diff] [blame] | 2846 | oh->clkdm->pwrdm.ptr->prcm_partition, |
| 2847 | oh->clkdm->pwrdm.ptr->prcm_offs, |
Tero Kristo | 4ebf5b2 | 2015-05-05 16:33:04 +0300 | [diff] [blame] | 2848 | oh->prcm.omap4.rstctrl_offs, |
| 2849 | oh->prcm.omap4.rstctrl_offs + |
| 2850 | OMAP4_RST_CTRL_ST_OFFSET); |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2851 | } |
| 2852 | |
| 2853 | /** |
| 2854 | * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args |
| 2855 | * @oh: struct omap_hwmod * to test hardreset |
| 2856 | * @ohri: hardreset line data |
| 2857 | * |
| 2858 | * Call omap4_prminst_is_hardreset_asserted() with parameters |
| 2859 | * extracted from the hwmod @oh and the hardreset line data @ohri. |
| 2860 | * Only intended for use as an soc_ops function pointer. Passes along |
| 2861 | * the return value from omap4_prminst_is_hardreset_asserted(). XXX |
| 2862 | * This function is scheduled for removal when the PRM code is moved |
| 2863 | * into drivers/. |
| 2864 | */ |
| 2865 | static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh, |
| 2866 | struct omap_hwmod_rst_info *ohri) |
| 2867 | { |
Paul Walmsley | 07b3a13 | 2012-06-20 20:11:36 -0600 | [diff] [blame] | 2868 | if (!oh->clkdm) |
| 2869 | return -EINVAL; |
| 2870 | |
Tero Kristo | 1bc28b3 | 2014-10-27 08:39:25 -0700 | [diff] [blame] | 2871 | return omap_prm_is_hardreset_asserted(ohri->rst_shift, |
| 2872 | oh->clkdm->pwrdm.ptr-> |
| 2873 | prcm_partition, |
| 2874 | oh->clkdm->pwrdm.ptr->prcm_offs, |
| 2875 | oh->prcm.omap4.rstctrl_offs); |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2876 | } |
| 2877 | |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 2878 | /** |
Tero Kristo | 9fabc1a | 2016-07-04 14:11:48 +0300 | [diff] [blame] | 2879 | * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod |
| 2880 | * @oh: struct omap_hwmod * to disable control for |
| 2881 | * |
| 2882 | * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod |
| 2883 | * will be using its main_clk to enable/disable the module. Returns |
| 2884 | * 0 if successful. |
| 2885 | */ |
| 2886 | static int _omap4_disable_direct_prcm(struct omap_hwmod *oh) |
| 2887 | { |
| 2888 | if (!oh) |
| 2889 | return -EINVAL; |
| 2890 | |
Tony Lindgren | 8823ddf | 2017-08-29 10:03:33 -0700 | [diff] [blame] | 2891 | oh->prcm.omap4.flags |= HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK; |
Tero Kristo | 9fabc1a | 2016-07-04 14:11:48 +0300 | [diff] [blame] | 2892 | |
| 2893 | return 0; |
| 2894 | } |
| 2895 | |
| 2896 | /** |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 2897 | * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args |
| 2898 | * @oh: struct omap_hwmod * to deassert hardreset |
| 2899 | * @ohri: hardreset line data |
| 2900 | * |
| 2901 | * Call am33xx_prminst_deassert_hardreset() with parameters extracted |
| 2902 | * from the hwmod @oh and the hardreset line data @ohri. Only |
| 2903 | * intended for use as an soc_ops function pointer. Passes along the |
| 2904 | * return value from am33xx_prminst_deassert_hardreset(). XXX This |
| 2905 | * function is scheduled for removal when the PRM code is moved into |
| 2906 | * drivers/. |
| 2907 | */ |
| 2908 | static int _am33xx_deassert_hardreset(struct omap_hwmod *oh, |
| 2909 | struct omap_hwmod_rst_info *ohri) |
| 2910 | { |
Tero Kristo | a5bf00c | 2015-05-05 16:33:05 +0300 | [diff] [blame] | 2911 | return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, |
| 2912 | oh->clkdm->pwrdm.ptr->prcm_partition, |
Tero Kristo | 37fb59d | 2014-10-27 08:39:25 -0700 | [diff] [blame] | 2913 | oh->clkdm->pwrdm.ptr->prcm_offs, |
| 2914 | oh->prcm.omap4.rstctrl_offs, |
| 2915 | oh->prcm.omap4.rstst_offs); |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 2916 | } |
| 2917 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2918 | /* Public functions */ |
| 2919 | |
Rajendra Nayak | cc7a1d2 | 2010-10-08 10:23:22 -0700 | [diff] [blame] | 2920 | u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2921 | { |
Rajendra Nayak | cc7a1d2 | 2010-10-08 10:23:22 -0700 | [diff] [blame] | 2922 | if (oh->flags & HWMOD_16BIT_REG) |
Victor Kamensky | edfaf05 | 2014-04-15 20:37:46 +0300 | [diff] [blame] | 2923 | return readw_relaxed(oh->_mpu_rt_va + reg_offs); |
Rajendra Nayak | cc7a1d2 | 2010-10-08 10:23:22 -0700 | [diff] [blame] | 2924 | else |
Victor Kamensky | edfaf05 | 2014-04-15 20:37:46 +0300 | [diff] [blame] | 2925 | return readl_relaxed(oh->_mpu_rt_va + reg_offs); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2926 | } |
| 2927 | |
Rajendra Nayak | cc7a1d2 | 2010-10-08 10:23:22 -0700 | [diff] [blame] | 2928 | void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2929 | { |
Rajendra Nayak | cc7a1d2 | 2010-10-08 10:23:22 -0700 | [diff] [blame] | 2930 | if (oh->flags & HWMOD_16BIT_REG) |
Victor Kamensky | edfaf05 | 2014-04-15 20:37:46 +0300 | [diff] [blame] | 2931 | writew_relaxed(v, oh->_mpu_rt_va + reg_offs); |
Rajendra Nayak | cc7a1d2 | 2010-10-08 10:23:22 -0700 | [diff] [blame] | 2932 | else |
Victor Kamensky | edfaf05 | 2014-04-15 20:37:46 +0300 | [diff] [blame] | 2933 | writel_relaxed(v, oh->_mpu_rt_va + reg_offs); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2934 | } |
| 2935 | |
Paul Walmsley | 887adea | 2010-07-26 16:34:33 -0600 | [diff] [blame] | 2936 | /** |
Avinash.H.M | 6d3c55f | 2011-07-10 05:27:16 -0600 | [diff] [blame] | 2937 | * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit |
| 2938 | * @oh: struct omap_hwmod * |
| 2939 | * |
| 2940 | * This is a public function exposed to drivers. Some drivers may need to do |
| 2941 | * some settings before and after resetting the device. Those drivers after |
| 2942 | * doing the necessary settings could use this function to start a reset by |
| 2943 | * setting the SYSCONFIG.SOFTRESET bit. |
| 2944 | */ |
| 2945 | int omap_hwmod_softreset(struct omap_hwmod *oh) |
| 2946 | { |
Paul Walmsley | 3c55c1b | 2012-04-13 05:08:43 -0600 | [diff] [blame] | 2947 | u32 v; |
| 2948 | int ret; |
| 2949 | |
| 2950 | if (!oh || !(oh->_sysc_cache)) |
Avinash.H.M | 6d3c55f | 2011-07-10 05:27:16 -0600 | [diff] [blame] | 2951 | return -EINVAL; |
| 2952 | |
Paul Walmsley | 3c55c1b | 2012-04-13 05:08:43 -0600 | [diff] [blame] | 2953 | v = oh->_sysc_cache; |
| 2954 | ret = _set_softreset(oh, &v); |
| 2955 | if (ret) |
| 2956 | goto error; |
| 2957 | _write_sysconfig(v, oh); |
| 2958 | |
Roger Quadros | 313a76e | 2013-12-08 18:39:02 -0700 | [diff] [blame] | 2959 | ret = _clear_softreset(oh, &v); |
| 2960 | if (ret) |
| 2961 | goto error; |
| 2962 | _write_sysconfig(v, oh); |
| 2963 | |
Paul Walmsley | 3c55c1b | 2012-04-13 05:08:43 -0600 | [diff] [blame] | 2964 | error: |
| 2965 | return ret; |
Avinash.H.M | 6d3c55f | 2011-07-10 05:27:16 -0600 | [diff] [blame] | 2966 | } |
| 2967 | |
| 2968 | /** |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2969 | * omap_hwmod_lookup - look up a registered omap_hwmod by name |
| 2970 | * @name: name of the omap_hwmod to look up |
| 2971 | * |
| 2972 | * Given a @name of an omap_hwmod, return a pointer to the registered |
| 2973 | * struct omap_hwmod *, or NULL upon error. |
| 2974 | */ |
| 2975 | struct omap_hwmod *omap_hwmod_lookup(const char *name) |
| 2976 | { |
| 2977 | struct omap_hwmod *oh; |
| 2978 | |
| 2979 | if (!name) |
| 2980 | return NULL; |
| 2981 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2982 | oh = _lookup(name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2983 | |
| 2984 | return oh; |
| 2985 | } |
| 2986 | |
| 2987 | /** |
| 2988 | * omap_hwmod_for_each - call function for each registered omap_hwmod |
| 2989 | * @fn: pointer to a callback function |
Paul Walmsley | 97d6016 | 2010-07-26 16:34:30 -0600 | [diff] [blame] | 2990 | * @data: void * data to pass to callback function |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2991 | * |
| 2992 | * Call @fn for each registered omap_hwmod, passing @data to each |
| 2993 | * function. @fn must return 0 for success or any other value for |
| 2994 | * failure. If @fn returns non-zero, the iteration across omap_hwmods |
| 2995 | * will stop and the non-zero return value will be passed to the |
| 2996 | * caller of omap_hwmod_for_each(). @fn is called with |
| 2997 | * omap_hwmod_for_each() held. |
| 2998 | */ |
Paul Walmsley | 97d6016 | 2010-07-26 16:34:30 -0600 | [diff] [blame] | 2999 | int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data), |
| 3000 | void *data) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3001 | { |
| 3002 | struct omap_hwmod *temp_oh; |
Govindraj.R | 30ebad9 | 2011-06-01 11:28:56 +0530 | [diff] [blame] | 3003 | int ret = 0; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3004 | |
| 3005 | if (!fn) |
| 3006 | return -EINVAL; |
| 3007 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3008 | list_for_each_entry(temp_oh, &omap_hwmod_list, node) { |
Paul Walmsley | 97d6016 | 2010-07-26 16:34:30 -0600 | [diff] [blame] | 3009 | ret = (*fn)(temp_oh, data); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3010 | if (ret) |
| 3011 | break; |
| 3012 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3013 | |
| 3014 | return ret; |
| 3015 | } |
| 3016 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3017 | /** |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 3018 | * omap_hwmod_register_links - register an array of hwmod links |
| 3019 | * @ois: pointer to an array of omap_hwmod_ocp_if to register |
| 3020 | * |
| 3021 | * Intended to be called early in boot before the clock framework is |
| 3022 | * initialized. If @ois is not null, will register all omap_hwmods |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 3023 | * listed in @ois that are valid for this chip. Returns -EINVAL if |
| 3024 | * omap_hwmod_init() hasn't been called before calling this function, |
| 3025 | * -ENOMEM if the link memory area can't be allocated, or 0 upon |
| 3026 | * success. |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 3027 | */ |
| 3028 | int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois) |
| 3029 | { |
| 3030 | int r, i; |
| 3031 | |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 3032 | if (!inited) |
| 3033 | return -EINVAL; |
| 3034 | |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 3035 | if (!ois) |
| 3036 | return 0; |
| 3037 | |
Rajendra Nayak | f7f7a29 | 2014-08-27 19:38:23 -0600 | [diff] [blame] | 3038 | if (ois[0] == NULL) /* Empty list */ |
| 3039 | return 0; |
| 3040 | |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 3041 | i = 0; |
| 3042 | do { |
| 3043 | r = _register_link(ois[i]); |
| 3044 | WARN(r && r != -EEXIST, |
| 3045 | "omap_hwmod: _register_link(%s -> %s) returned %d\n", |
| 3046 | ois[i]->master->name, ois[i]->slave->name, r); |
| 3047 | } while (ois[++i]); |
| 3048 | |
| 3049 | return 0; |
| 3050 | } |
| 3051 | |
| 3052 | /** |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3053 | * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up |
| 3054 | * @oh: pointer to the hwmod currently being set up (usually not the MPU) |
Tony Lindgren | e7c7d76 | 2011-02-14 15:40:21 -0800 | [diff] [blame] | 3055 | * |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3056 | * If the hwmod data corresponding to the MPU subsystem IP block |
| 3057 | * hasn't been initialized and set up yet, do so now. This must be |
| 3058 | * done first since sleep dependencies may be added from other hwmods |
| 3059 | * to the MPU. Intended to be called only by omap_hwmod_setup*(). No |
| 3060 | * return value. |
Tony Lindgren | e7c7d76 | 2011-02-14 15:40:21 -0800 | [diff] [blame] | 3061 | */ |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3062 | static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh) |
Tony Lindgren | e7c7d76 | 2011-02-14 15:40:21 -0800 | [diff] [blame] | 3063 | { |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3064 | if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN) |
| 3065 | pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n", |
| 3066 | __func__, MPU_INITIATOR_NAME); |
| 3067 | else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh) |
| 3068 | omap_hwmod_setup_one(MPU_INITIATOR_NAME); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3069 | } |
| 3070 | |
| 3071 | /** |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 3072 | * omap_hwmod_setup_one - set up a single hwmod |
| 3073 | * @oh_name: const char * name of the already-registered hwmod to set up |
| 3074 | * |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3075 | * Initialize and set up a single hwmod. Intended to be used for a |
| 3076 | * small number of early devices, such as the timer IP blocks used for |
| 3077 | * the scheduler clock. Must be called after omap2_clk_init(). |
| 3078 | * Resolves the struct clk names to struct clk pointers for each |
| 3079 | * registered omap_hwmod. Also calls _setup() on each hwmod. Returns |
| 3080 | * -EINVAL upon error or 0 upon success. |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 3081 | */ |
| 3082 | int __init omap_hwmod_setup_one(const char *oh_name) |
| 3083 | { |
| 3084 | struct omap_hwmod *oh; |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 3085 | |
| 3086 | pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__); |
| 3087 | |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 3088 | oh = _lookup(oh_name); |
| 3089 | if (!oh) { |
| 3090 | WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name); |
| 3091 | return -EINVAL; |
| 3092 | } |
| 3093 | |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3094 | _ensure_mpu_hwmod_is_setup(oh); |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 3095 | |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3096 | _init(oh, NULL); |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 3097 | _setup(oh, NULL); |
| 3098 | |
| 3099 | return 0; |
| 3100 | } |
| 3101 | |
Tony Lindgren | a884430 | 2018-02-23 08:59:23 -0800 | [diff] [blame] | 3102 | static void omap_hwmod_check_one(struct device *dev, |
| 3103 | const char *name, s8 v1, u8 v2) |
| 3104 | { |
| 3105 | if (v1 < 0) |
| 3106 | return; |
| 3107 | |
| 3108 | if (v1 != v2) |
| 3109 | dev_warn(dev, "%s %d != %d\n", name, v1, v2); |
| 3110 | } |
| 3111 | |
| 3112 | /** |
| 3113 | * omap_hwmod_check_sysc - check sysc against platform sysc |
| 3114 | * @dev: struct device |
| 3115 | * @data: module data |
| 3116 | * @sysc_fields: new sysc configuration |
| 3117 | */ |
| 3118 | static int omap_hwmod_check_sysc(struct device *dev, |
| 3119 | const struct ti_sysc_module_data *data, |
| 3120 | struct sysc_regbits *sysc_fields) |
| 3121 | { |
| 3122 | const struct sysc_regbits *regbits = data->cap->regbits; |
| 3123 | |
| 3124 | omap_hwmod_check_one(dev, "dmadisable_shift", |
| 3125 | regbits->dmadisable_shift, |
| 3126 | sysc_fields->dmadisable_shift); |
| 3127 | omap_hwmod_check_one(dev, "midle_shift", |
| 3128 | regbits->midle_shift, |
| 3129 | sysc_fields->midle_shift); |
| 3130 | omap_hwmod_check_one(dev, "sidle_shift", |
| 3131 | regbits->sidle_shift, |
| 3132 | sysc_fields->sidle_shift); |
| 3133 | omap_hwmod_check_one(dev, "clkact_shift", |
| 3134 | regbits->clkact_shift, |
| 3135 | sysc_fields->clkact_shift); |
| 3136 | omap_hwmod_check_one(dev, "enwkup_shift", |
| 3137 | regbits->enwkup_shift, |
| 3138 | sysc_fields->enwkup_shift); |
| 3139 | omap_hwmod_check_one(dev, "srst_shift", |
| 3140 | regbits->srst_shift, |
| 3141 | sysc_fields->srst_shift); |
| 3142 | omap_hwmod_check_one(dev, "autoidle_shift", |
| 3143 | regbits->autoidle_shift, |
| 3144 | sysc_fields->autoidle_shift); |
| 3145 | |
| 3146 | return 0; |
| 3147 | } |
| 3148 | |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 3149 | /** |
Tony Lindgren | 8c87970 | 2018-02-22 14:04:56 -0800 | [diff] [blame] | 3150 | * omap_hwmod_init_regbits - init sysconfig specific register bits |
| 3151 | * @dev: struct device |
| 3152 | * @data: module data |
| 3153 | * @sysc_fields: new sysc configuration |
| 3154 | */ |
| 3155 | static int omap_hwmod_init_regbits(struct device *dev, |
| 3156 | const struct ti_sysc_module_data *data, |
| 3157 | struct sysc_regbits **sysc_fields) |
| 3158 | { |
| 3159 | *sysc_fields = NULL; |
| 3160 | |
| 3161 | switch (data->cap->type) { |
| 3162 | case TI_SYSC_OMAP2: |
| 3163 | case TI_SYSC_OMAP2_TIMER: |
| 3164 | *sysc_fields = &omap_hwmod_sysc_type1; |
| 3165 | break; |
| 3166 | case TI_SYSC_OMAP3_SHAM: |
| 3167 | *sysc_fields = &omap3_sham_sysc_fields; |
| 3168 | break; |
| 3169 | case TI_SYSC_OMAP3_AES: |
| 3170 | *sysc_fields = &omap3xxx_aes_sysc_fields; |
| 3171 | break; |
| 3172 | case TI_SYSC_OMAP4: |
| 3173 | case TI_SYSC_OMAP4_TIMER: |
| 3174 | *sysc_fields = &omap_hwmod_sysc_type2; |
| 3175 | break; |
| 3176 | case TI_SYSC_OMAP4_SIMPLE: |
| 3177 | *sysc_fields = &omap_hwmod_sysc_type3; |
| 3178 | break; |
| 3179 | case TI_SYSC_OMAP34XX_SR: |
| 3180 | *sysc_fields = &omap34xx_sr_sysc_fields; |
| 3181 | break; |
| 3182 | case TI_SYSC_OMAP36XX_SR: |
| 3183 | *sysc_fields = &omap36xx_sr_sysc_fields; |
| 3184 | break; |
| 3185 | case TI_SYSC_OMAP4_SR: |
| 3186 | *sysc_fields = &omap36xx_sr_sysc_fields; |
| 3187 | break; |
| 3188 | case TI_SYSC_OMAP4_MCASP: |
| 3189 | *sysc_fields = &omap_hwmod_sysc_type_mcasp; |
| 3190 | break; |
| 3191 | case TI_SYSC_OMAP4_USB_HOST_FS: |
| 3192 | *sysc_fields = &omap_hwmod_sysc_type_usb_host_fs; |
| 3193 | break; |
| 3194 | default: |
| 3195 | return -EINVAL; |
| 3196 | } |
| 3197 | |
Tony Lindgren | a884430 | 2018-02-23 08:59:23 -0800 | [diff] [blame] | 3198 | return omap_hwmod_check_sysc(dev, data, *sysc_fields); |
Tony Lindgren | 8c87970 | 2018-02-22 14:04:56 -0800 | [diff] [blame] | 3199 | } |
| 3200 | |
| 3201 | /** |
| 3202 | * omap_hwmod_init_reg_offs - initialize sysconfig register offsets |
| 3203 | * @dev: struct device |
| 3204 | * @data: module data |
| 3205 | * @rev_offs: revision register offset |
| 3206 | * @sysc_offs: sysc register offset |
| 3207 | * @syss_offs: syss register offset |
| 3208 | */ |
| 3209 | int omap_hwmod_init_reg_offs(struct device *dev, |
| 3210 | const struct ti_sysc_module_data *data, |
Tony Lindgren | 103fd8e | 2018-04-16 10:21:15 -0700 | [diff] [blame] | 3211 | s32 *rev_offs, s32 *sysc_offs, s32 *syss_offs) |
Tony Lindgren | 8c87970 | 2018-02-22 14:04:56 -0800 | [diff] [blame] | 3212 | { |
Tony Lindgren | 103fd8e | 2018-04-16 10:21:15 -0700 | [diff] [blame] | 3213 | *rev_offs = -ENODEV; |
Tony Lindgren | 8c87970 | 2018-02-22 14:04:56 -0800 | [diff] [blame] | 3214 | *sysc_offs = 0; |
| 3215 | *syss_offs = 0; |
| 3216 | |
Tony Lindgren | 103fd8e | 2018-04-16 10:21:15 -0700 | [diff] [blame] | 3217 | if (data->offsets[SYSC_REVISION] >= 0) |
Tony Lindgren | 8c87970 | 2018-02-22 14:04:56 -0800 | [diff] [blame] | 3218 | *rev_offs = data->offsets[SYSC_REVISION]; |
| 3219 | |
Tony Lindgren | 103fd8e | 2018-04-16 10:21:15 -0700 | [diff] [blame] | 3220 | if (data->offsets[SYSC_SYSCONFIG] >= 0) |
Tony Lindgren | 8c87970 | 2018-02-22 14:04:56 -0800 | [diff] [blame] | 3221 | *sysc_offs = data->offsets[SYSC_SYSCONFIG]; |
| 3222 | |
Tony Lindgren | 103fd8e | 2018-04-16 10:21:15 -0700 | [diff] [blame] | 3223 | if (data->offsets[SYSC_SYSSTATUS] >= 0) |
Tony Lindgren | 8c87970 | 2018-02-22 14:04:56 -0800 | [diff] [blame] | 3224 | *syss_offs = data->offsets[SYSC_SYSSTATUS]; |
| 3225 | |
| 3226 | return 0; |
| 3227 | } |
| 3228 | |
| 3229 | /** |
| 3230 | * omap_hwmod_init_sysc_flags - initialize sysconfig features |
| 3231 | * @dev: struct device |
| 3232 | * @data: module data |
| 3233 | * @sysc_flags: module configuration |
| 3234 | */ |
| 3235 | int omap_hwmod_init_sysc_flags(struct device *dev, |
| 3236 | const struct ti_sysc_module_data *data, |
| 3237 | u32 *sysc_flags) |
| 3238 | { |
| 3239 | *sysc_flags = 0; |
| 3240 | |
| 3241 | switch (data->cap->type) { |
| 3242 | case TI_SYSC_OMAP2: |
| 3243 | case TI_SYSC_OMAP2_TIMER: |
| 3244 | /* See SYSC_OMAP2_* in include/dt-bindings/bus/ti-sysc.h */ |
| 3245 | if (data->cfg->sysc_val & SYSC_OMAP2_CLOCKACTIVITY) |
| 3246 | *sysc_flags |= SYSC_HAS_CLOCKACTIVITY; |
| 3247 | if (data->cfg->sysc_val & SYSC_OMAP2_EMUFREE) |
| 3248 | *sysc_flags |= SYSC_HAS_EMUFREE; |
| 3249 | if (data->cfg->sysc_val & SYSC_OMAP2_ENAWAKEUP) |
| 3250 | *sysc_flags |= SYSC_HAS_ENAWAKEUP; |
| 3251 | if (data->cfg->sysc_val & SYSC_OMAP2_SOFTRESET) |
| 3252 | *sysc_flags |= SYSC_HAS_SOFTRESET; |
| 3253 | if (data->cfg->sysc_val & SYSC_OMAP2_AUTOIDLE) |
| 3254 | *sysc_flags |= SYSC_HAS_AUTOIDLE; |
| 3255 | break; |
| 3256 | case TI_SYSC_OMAP4: |
| 3257 | case TI_SYSC_OMAP4_TIMER: |
| 3258 | /* See SYSC_OMAP4_* in include/dt-bindings/bus/ti-sysc.h */ |
| 3259 | if (data->cfg->sysc_val & SYSC_OMAP4_DMADISABLE) |
| 3260 | *sysc_flags |= SYSC_HAS_DMADISABLE; |
| 3261 | if (data->cfg->sysc_val & SYSC_OMAP4_FREEEMU) |
| 3262 | *sysc_flags |= SYSC_HAS_EMUFREE; |
| 3263 | if (data->cfg->sysc_val & SYSC_OMAP4_SOFTRESET) |
| 3264 | *sysc_flags |= SYSC_HAS_SOFTRESET; |
| 3265 | break; |
| 3266 | case TI_SYSC_OMAP34XX_SR: |
| 3267 | case TI_SYSC_OMAP36XX_SR: |
| 3268 | /* See SYSC_OMAP3_SR_* in include/dt-bindings/bus/ti-sysc.h */ |
| 3269 | if (data->cfg->sysc_val & SYSC_OMAP3_SR_ENAWAKEUP) |
| 3270 | *sysc_flags |= SYSC_HAS_ENAWAKEUP; |
| 3271 | break; |
| 3272 | default: |
| 3273 | if (data->cap->regbits->emufree_shift >= 0) |
| 3274 | *sysc_flags |= SYSC_HAS_EMUFREE; |
| 3275 | if (data->cap->regbits->enwkup_shift >= 0) |
| 3276 | *sysc_flags |= SYSC_HAS_ENAWAKEUP; |
| 3277 | if (data->cap->regbits->srst_shift >= 0) |
| 3278 | *sysc_flags |= SYSC_HAS_SOFTRESET; |
| 3279 | if (data->cap->regbits->autoidle_shift >= 0) |
| 3280 | *sysc_flags |= SYSC_HAS_AUTOIDLE; |
| 3281 | break; |
| 3282 | } |
| 3283 | |
| 3284 | if (data->cap->regbits->midle_shift >= 0 && |
| 3285 | data->cfg->midlemodes) |
| 3286 | *sysc_flags |= SYSC_HAS_MIDLEMODE; |
| 3287 | |
| 3288 | if (data->cap->regbits->sidle_shift >= 0 && |
| 3289 | data->cfg->sidlemodes) |
| 3290 | *sysc_flags |= SYSC_HAS_SIDLEMODE; |
| 3291 | |
| 3292 | if (data->cfg->quirks & SYSC_QUIRK_UNCACHED) |
| 3293 | *sysc_flags |= SYSC_NO_CACHE; |
| 3294 | if (data->cfg->quirks & SYSC_QUIRK_RESET_STATUS) |
| 3295 | *sysc_flags |= SYSC_HAS_RESET_STATUS; |
| 3296 | |
| 3297 | if (data->cfg->syss_mask & 1) |
| 3298 | *sysc_flags |= SYSS_HAS_RESET_STATUS; |
| 3299 | |
| 3300 | return 0; |
| 3301 | } |
| 3302 | |
| 3303 | /** |
| 3304 | * omap_hwmod_init_idlemodes - initialize module idle modes |
| 3305 | * @dev: struct device |
| 3306 | * @data: module data |
| 3307 | * @idlemodes: module supported idle modes |
| 3308 | */ |
| 3309 | int omap_hwmod_init_idlemodes(struct device *dev, |
| 3310 | const struct ti_sysc_module_data *data, |
| 3311 | u32 *idlemodes) |
| 3312 | { |
| 3313 | *idlemodes = 0; |
| 3314 | |
| 3315 | if (data->cfg->midlemodes & BIT(SYSC_IDLE_FORCE)) |
| 3316 | *idlemodes |= MSTANDBY_FORCE; |
| 3317 | if (data->cfg->midlemodes & BIT(SYSC_IDLE_NO)) |
| 3318 | *idlemodes |= MSTANDBY_NO; |
| 3319 | if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART)) |
| 3320 | *idlemodes |= MSTANDBY_SMART; |
| 3321 | if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART_WKUP)) |
| 3322 | *idlemodes |= MSTANDBY_SMART_WKUP; |
| 3323 | |
| 3324 | if (data->cfg->sidlemodes & BIT(SYSC_IDLE_FORCE)) |
| 3325 | *idlemodes |= SIDLE_FORCE; |
| 3326 | if (data->cfg->sidlemodes & BIT(SYSC_IDLE_NO)) |
| 3327 | *idlemodes |= SIDLE_NO; |
| 3328 | if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART)) |
| 3329 | *idlemodes |= SIDLE_SMART; |
| 3330 | if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART_WKUP)) |
| 3331 | *idlemodes |= SIDLE_SMART_WKUP; |
| 3332 | |
| 3333 | return 0; |
| 3334 | } |
| 3335 | |
| 3336 | /** |
Tony Lindgren | a884430 | 2018-02-23 08:59:23 -0800 | [diff] [blame] | 3337 | * omap_hwmod_check_module - check new module against platform data |
| 3338 | * @dev: struct device |
| 3339 | * @oh: module |
| 3340 | * @data: new module data |
| 3341 | * @sysc_fields: sysc register bits |
| 3342 | * @rev_offs: revision register offset |
| 3343 | * @sysc_offs: sysconfig register offset |
| 3344 | * @syss_offs: sysstatus register offset |
| 3345 | * @sysc_flags: sysc specific flags |
| 3346 | * @idlemodes: sysc supported idlemodes |
| 3347 | */ |
| 3348 | static int omap_hwmod_check_module(struct device *dev, |
| 3349 | struct omap_hwmod *oh, |
| 3350 | const struct ti_sysc_module_data *data, |
| 3351 | struct sysc_regbits *sysc_fields, |
Tony Lindgren | 103fd8e | 2018-04-16 10:21:15 -0700 | [diff] [blame] | 3352 | s32 rev_offs, s32 sysc_offs, |
| 3353 | s32 syss_offs, u32 sysc_flags, |
Tony Lindgren | a884430 | 2018-02-23 08:59:23 -0800 | [diff] [blame] | 3354 | u32 idlemodes) |
| 3355 | { |
| 3356 | if (!oh->class->sysc) |
| 3357 | return -ENODEV; |
| 3358 | |
| 3359 | if (sysc_fields != oh->class->sysc->sysc_fields) |
| 3360 | dev_warn(dev, "sysc_fields %p != %p\n", sysc_fields, |
| 3361 | oh->class->sysc->sysc_fields); |
| 3362 | |
| 3363 | if (rev_offs != oh->class->sysc->rev_offs) |
| 3364 | dev_warn(dev, "rev_offs %08x != %08x\n", rev_offs, |
| 3365 | oh->class->sysc->rev_offs); |
| 3366 | if (sysc_offs != oh->class->sysc->sysc_offs) |
| 3367 | dev_warn(dev, "sysc_offs %08x != %08x\n", sysc_offs, |
| 3368 | oh->class->sysc->sysc_offs); |
| 3369 | if (syss_offs != oh->class->sysc->syss_offs) |
| 3370 | dev_warn(dev, "syss_offs %08x != %08x\n", syss_offs, |
| 3371 | oh->class->sysc->syss_offs); |
| 3372 | |
| 3373 | if (sysc_flags != oh->class->sysc->sysc_flags) |
| 3374 | dev_warn(dev, "sysc_flags %08x != %08x\n", sysc_flags, |
| 3375 | oh->class->sysc->sysc_flags); |
| 3376 | |
| 3377 | if (idlemodes != oh->class->sysc->idlemodes) |
| 3378 | dev_warn(dev, "idlemodes %08x != %08x\n", idlemodes, |
| 3379 | oh->class->sysc->idlemodes); |
| 3380 | |
| 3381 | if (data->cfg->srst_udelay != oh->class->sysc->srst_udelay) |
| 3382 | dev_warn(dev, "srst_udelay %i != %i\n", |
| 3383 | data->cfg->srst_udelay, |
| 3384 | oh->class->sysc->srst_udelay); |
| 3385 | |
| 3386 | return 0; |
| 3387 | } |
| 3388 | |
| 3389 | /** |
Tony Lindgren | 8c87970 | 2018-02-22 14:04:56 -0800 | [diff] [blame] | 3390 | * omap_hwmod_allocate_module - allocate new module |
| 3391 | * @dev: struct device |
| 3392 | * @oh: module |
| 3393 | * @sysc_fields: sysc register bits |
| 3394 | * @rev_offs: revision register offset |
| 3395 | * @sysc_offs: sysconfig register offset |
| 3396 | * @syss_offs: sysstatus register offset |
| 3397 | * @sysc_flags: sysc specific flags |
| 3398 | * @idlemodes: sysc supported idlemodes |
| 3399 | * |
| 3400 | * Note that the allocations here cannot use devm as ti-sysc can rebind. |
| 3401 | */ |
| 3402 | int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh, |
| 3403 | const struct ti_sysc_module_data *data, |
| 3404 | struct sysc_regbits *sysc_fields, |
Tony Lindgren | 103fd8e | 2018-04-16 10:21:15 -0700 | [diff] [blame] | 3405 | s32 rev_offs, s32 sysc_offs, s32 syss_offs, |
Tony Lindgren | 8c87970 | 2018-02-22 14:04:56 -0800 | [diff] [blame] | 3406 | u32 sysc_flags, u32 idlemodes) |
| 3407 | { |
| 3408 | struct omap_hwmod_class_sysconfig *sysc; |
| 3409 | struct omap_hwmod_class *class; |
| 3410 | void __iomem *regs = NULL; |
| 3411 | unsigned long flags; |
| 3412 | |
| 3413 | sysc = kzalloc(sizeof(*sysc), GFP_KERNEL); |
| 3414 | if (!sysc) |
| 3415 | return -ENOMEM; |
| 3416 | |
| 3417 | sysc->sysc_fields = sysc_fields; |
| 3418 | sysc->rev_offs = rev_offs; |
| 3419 | sysc->sysc_offs = sysc_offs; |
| 3420 | sysc->syss_offs = syss_offs; |
| 3421 | sysc->sysc_flags = sysc_flags; |
| 3422 | sysc->idlemodes = idlemodes; |
| 3423 | sysc->srst_udelay = data->cfg->srst_udelay; |
| 3424 | |
| 3425 | if (!oh->_mpu_rt_va) { |
| 3426 | regs = ioremap(data->module_pa, |
| 3427 | data->module_size); |
| 3428 | if (!regs) |
| 3429 | return -ENOMEM; |
| 3430 | } |
| 3431 | |
| 3432 | /* |
| 3433 | * We need new oh->class as the other devices in the same class |
| 3434 | * may not yet have ioremapped their registers. |
| 3435 | */ |
| 3436 | class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL); |
| 3437 | if (!class) |
| 3438 | return -ENOMEM; |
| 3439 | |
| 3440 | class->sysc = sysc; |
| 3441 | |
| 3442 | spin_lock_irqsave(&oh->_lock, flags); |
| 3443 | if (regs) |
| 3444 | oh->_mpu_rt_va = regs; |
| 3445 | oh->class = class; |
| 3446 | oh->_state = _HWMOD_STATE_INITIALIZED; |
| 3447 | _setup(oh, NULL); |
| 3448 | spin_unlock_irqrestore(&oh->_lock, flags); |
| 3449 | |
| 3450 | return 0; |
| 3451 | } |
| 3452 | |
| 3453 | /** |
| 3454 | * omap_hwmod_init_module - initialize new module |
| 3455 | * @dev: struct device |
| 3456 | * @data: module data |
| 3457 | * @cookie: cookie for the caller to use for later calls |
| 3458 | */ |
| 3459 | int omap_hwmod_init_module(struct device *dev, |
| 3460 | const struct ti_sysc_module_data *data, |
| 3461 | struct ti_sysc_cookie *cookie) |
| 3462 | { |
| 3463 | struct omap_hwmod *oh; |
| 3464 | struct sysc_regbits *sysc_fields; |
Tony Lindgren | 103fd8e | 2018-04-16 10:21:15 -0700 | [diff] [blame] | 3465 | s32 rev_offs, sysc_offs, syss_offs; |
| 3466 | u32 sysc_flags, idlemodes; |
Tony Lindgren | 8c87970 | 2018-02-22 14:04:56 -0800 | [diff] [blame] | 3467 | int error; |
| 3468 | |
| 3469 | if (!dev || !data) |
| 3470 | return -EINVAL; |
| 3471 | |
| 3472 | oh = _lookup(data->name); |
| 3473 | if (!oh) |
| 3474 | return -ENODEV; |
| 3475 | |
| 3476 | cookie->data = oh; |
| 3477 | |
| 3478 | error = omap_hwmod_init_regbits(dev, data, &sysc_fields); |
| 3479 | if (error) |
| 3480 | return error; |
| 3481 | |
| 3482 | error = omap_hwmod_init_reg_offs(dev, data, &rev_offs, |
| 3483 | &sysc_offs, &syss_offs); |
| 3484 | if (error) |
| 3485 | return error; |
| 3486 | |
| 3487 | error = omap_hwmod_init_sysc_flags(dev, data, &sysc_flags); |
| 3488 | if (error) |
| 3489 | return error; |
| 3490 | |
| 3491 | error = omap_hwmod_init_idlemodes(dev, data, &idlemodes); |
| 3492 | if (error) |
| 3493 | return error; |
| 3494 | |
| 3495 | if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE_ON_INIT) |
| 3496 | oh->flags |= HWMOD_INIT_NO_IDLE; |
| 3497 | if (data->cfg->quirks & SYSC_QUIRK_NO_RESET_ON_INIT) |
| 3498 | oh->flags |= HWMOD_INIT_NO_RESET; |
| 3499 | |
Tony Lindgren | a884430 | 2018-02-23 08:59:23 -0800 | [diff] [blame] | 3500 | error = omap_hwmod_check_module(dev, oh, data, sysc_fields, |
| 3501 | rev_offs, sysc_offs, syss_offs, |
| 3502 | sysc_flags, idlemodes); |
| 3503 | if (!error) |
| 3504 | return error; |
Tony Lindgren | 8c87970 | 2018-02-22 14:04:56 -0800 | [diff] [blame] | 3505 | |
| 3506 | return omap_hwmod_allocate_module(dev, oh, data, sysc_fields, |
| 3507 | rev_offs, sysc_offs, syss_offs, |
| 3508 | sysc_flags, idlemodes); |
| 3509 | } |
| 3510 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3511 | /** |
Lokesh Vutla | 8dd6666 | 2017-01-20 10:39:10 -0800 | [diff] [blame] | 3512 | * omap_hwmod_setup_earlycon_flags - set up flags for early console |
| 3513 | * |
| 3514 | * Enable DEBUG_OMAPUART_FLAGS for uart hwmod that is being used as |
| 3515 | * early concole so that hwmod core doesn't reset and keep it in idle |
| 3516 | * that specific uart. |
| 3517 | */ |
| 3518 | #ifdef CONFIG_SERIAL_EARLYCON |
| 3519 | static void __init omap_hwmod_setup_earlycon_flags(void) |
| 3520 | { |
| 3521 | struct device_node *np; |
| 3522 | struct omap_hwmod *oh; |
| 3523 | const char *uart; |
| 3524 | |
| 3525 | np = of_find_node_by_path("/chosen"); |
| 3526 | if (np) { |
| 3527 | uart = of_get_property(np, "stdout-path", NULL); |
| 3528 | if (uart) { |
| 3529 | np = of_find_node_by_path(uart); |
| 3530 | if (np) { |
| 3531 | uart = of_get_property(np, "ti,hwmods", NULL); |
| 3532 | oh = omap_hwmod_lookup(uart); |
Tony Lindgren | 1561825 | 2018-02-22 14:04:25 -0800 | [diff] [blame] | 3533 | if (!oh) { |
| 3534 | uart = of_get_property(np->parent, |
| 3535 | "ti,hwmods", |
| 3536 | NULL); |
| 3537 | oh = omap_hwmod_lookup(uart); |
| 3538 | } |
Lokesh Vutla | 8dd6666 | 2017-01-20 10:39:10 -0800 | [diff] [blame] | 3539 | if (oh) |
| 3540 | oh->flags |= DEBUG_OMAPUART_FLAGS; |
| 3541 | } |
| 3542 | } |
| 3543 | } |
| 3544 | } |
| 3545 | #endif |
| 3546 | |
| 3547 | /** |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3548 | * omap_hwmod_setup_all - set up all registered IP blocks |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3549 | * |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3550 | * Initialize and set up all IP blocks registered with the hwmod code. |
| 3551 | * Must be called after omap2_clk_init(). Resolves the struct clk |
| 3552 | * names to struct clk pointers for each registered omap_hwmod. Also |
| 3553 | * calls _setup() on each hwmod. Returns 0 upon success. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3554 | */ |
Paul Walmsley | 550c809 | 2011-02-28 11:58:14 -0700 | [diff] [blame] | 3555 | static int __init omap_hwmod_setup_all(void) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3556 | { |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3557 | _ensure_mpu_hwmod_is_setup(NULL); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3558 | |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3559 | omap_hwmod_for_each(_init, NULL); |
Lokesh Vutla | 8dd6666 | 2017-01-20 10:39:10 -0800 | [diff] [blame] | 3560 | #ifdef CONFIG_SERIAL_EARLYCON |
| 3561 | omap_hwmod_setup_earlycon_flags(); |
| 3562 | #endif |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3563 | omap_hwmod_for_each(_setup, NULL); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3564 | |
| 3565 | return 0; |
| 3566 | } |
Tony Lindgren | 8dd5ea7 | 2015-12-03 11:38:09 -0800 | [diff] [blame] | 3567 | omap_postcore_initcall(omap_hwmod_setup_all); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3568 | |
| 3569 | /** |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3570 | * omap_hwmod_enable - enable an omap_hwmod |
| 3571 | * @oh: struct omap_hwmod * |
| 3572 | * |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 3573 | * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable(). |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3574 | * Returns -EINVAL on error or passes along the return value from _enable(). |
| 3575 | */ |
| 3576 | int omap_hwmod_enable(struct omap_hwmod *oh) |
| 3577 | { |
| 3578 | int r; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3579 | unsigned long flags; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3580 | |
| 3581 | if (!oh) |
| 3582 | return -EINVAL; |
| 3583 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3584 | spin_lock_irqsave(&oh->_lock, flags); |
| 3585 | r = _enable(oh); |
| 3586 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3587 | |
| 3588 | return r; |
| 3589 | } |
| 3590 | |
| 3591 | /** |
| 3592 | * omap_hwmod_idle - idle an omap_hwmod |
| 3593 | * @oh: struct omap_hwmod * |
| 3594 | * |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 3595 | * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle(). |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3596 | * Returns -EINVAL on error or passes along the return value from _idle(). |
| 3597 | */ |
| 3598 | int omap_hwmod_idle(struct omap_hwmod *oh) |
| 3599 | { |
Pali RohƔr | 6da2335 | 2015-02-26 14:49:51 +0100 | [diff] [blame] | 3600 | int r; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3601 | unsigned long flags; |
| 3602 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3603 | if (!oh) |
| 3604 | return -EINVAL; |
| 3605 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3606 | spin_lock_irqsave(&oh->_lock, flags); |
Pali RohƔr | 6da2335 | 2015-02-26 14:49:51 +0100 | [diff] [blame] | 3607 | r = _idle(oh); |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3608 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3609 | |
Pali RohƔr | 6da2335 | 2015-02-26 14:49:51 +0100 | [diff] [blame] | 3610 | return r; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3611 | } |
| 3612 | |
| 3613 | /** |
| 3614 | * omap_hwmod_shutdown - shutdown an omap_hwmod |
| 3615 | * @oh: struct omap_hwmod * |
| 3616 | * |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 3617 | * Shutdown an omap_hwmod @oh. Intended to be called by |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3618 | * omap_device_shutdown(). Returns -EINVAL on error or passes along |
| 3619 | * the return value from _shutdown(). |
| 3620 | */ |
| 3621 | int omap_hwmod_shutdown(struct omap_hwmod *oh) |
| 3622 | { |
Pali RohƔr | 6da2335 | 2015-02-26 14:49:51 +0100 | [diff] [blame] | 3623 | int r; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3624 | unsigned long flags; |
| 3625 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3626 | if (!oh) |
| 3627 | return -EINVAL; |
| 3628 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3629 | spin_lock_irqsave(&oh->_lock, flags); |
Pali RohƔr | 6da2335 | 2015-02-26 14:49:51 +0100 | [diff] [blame] | 3630 | r = _shutdown(oh); |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3631 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3632 | |
Pali RohƔr | 6da2335 | 2015-02-26 14:49:51 +0100 | [diff] [blame] | 3633 | return r; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3634 | } |
| 3635 | |
Paul Walmsley | 5e8370f | 2012-04-18 19:10:06 -0600 | [diff] [blame] | 3636 | /* |
| 3637 | * IP block data retrieval functions |
| 3638 | */ |
| 3639 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3640 | /** |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3641 | * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain |
| 3642 | * @oh: struct omap_hwmod * |
| 3643 | * |
| 3644 | * Return the powerdomain pointer associated with the OMAP module |
| 3645 | * @oh's main clock. If @oh does not have a main clk, return the |
| 3646 | * powerdomain associated with the interface clock associated with the |
| 3647 | * module's MPU port. (XXX Perhaps this should use the SDMA port |
| 3648 | * instead?) Returns NULL on error, or a struct powerdomain * on |
| 3649 | * success. |
| 3650 | */ |
| 3651 | struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh) |
| 3652 | { |
| 3653 | struct clk *c; |
Paul Walmsley | 2d6141b | 2012-04-19 04:04:27 -0600 | [diff] [blame] | 3654 | struct omap_hwmod_ocp_if *oi; |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 3655 | struct clockdomain *clkdm; |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 3656 | struct clk_hw_omap *clk; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3657 | |
| 3658 | if (!oh) |
| 3659 | return NULL; |
| 3660 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 3661 | if (oh->clkdm) |
| 3662 | return oh->clkdm->pwrdm.ptr; |
| 3663 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3664 | if (oh->_clk) { |
| 3665 | c = oh->_clk; |
| 3666 | } else { |
Paul Walmsley | 2d6141b | 2012-04-19 04:04:27 -0600 | [diff] [blame] | 3667 | oi = _find_mpu_rt_port(oh); |
| 3668 | if (!oi) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3669 | return NULL; |
Paul Walmsley | 2d6141b | 2012-04-19 04:04:27 -0600 | [diff] [blame] | 3670 | c = oi->_clk; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3671 | } |
| 3672 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 3673 | clk = to_clk_hw_omap(__clk_get_hw(c)); |
| 3674 | clkdm = clk->clkdm; |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 3675 | if (!clkdm) |
Thara Gopinath | d5647c1 | 2010-03-31 04:16:29 -0600 | [diff] [blame] | 3676 | return NULL; |
| 3677 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 3678 | return clkdm->pwrdm.ptr; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3679 | } |
| 3680 | |
| 3681 | /** |
Paul Walmsley | db2a60b | 2010-07-26 16:34:33 -0600 | [diff] [blame] | 3682 | * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU) |
| 3683 | * @oh: struct omap_hwmod * |
| 3684 | * |
| 3685 | * Returns the virtual address corresponding to the beginning of the |
| 3686 | * module's register target, in the address range that is intended to |
| 3687 | * be used by the MPU. Returns the virtual address upon success or NULL |
| 3688 | * upon error. |
| 3689 | */ |
| 3690 | void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh) |
| 3691 | { |
| 3692 | if (!oh) |
| 3693 | return NULL; |
| 3694 | |
| 3695 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT) |
| 3696 | return NULL; |
| 3697 | |
| 3698 | if (oh->_state == _HWMOD_STATE_UNKNOWN) |
| 3699 | return NULL; |
| 3700 | |
| 3701 | return oh->_mpu_rt_va; |
| 3702 | } |
| 3703 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3704 | /* |
| 3705 | * XXX what about functions for drivers to save/restore ocp_sysconfig |
| 3706 | * for context save/restore operations? |
| 3707 | */ |
| 3708 | |
| 3709 | /** |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3710 | * omap_hwmod_enable_wakeup - allow device to wake up the system |
| 3711 | * @oh: struct omap_hwmod * |
| 3712 | * |
| 3713 | * Sets the module OCP socket ENAWAKEUP bit to allow the module to |
Govindraj.R | 2a1cc14 | 2012-04-05 02:59:32 -0600 | [diff] [blame] | 3714 | * send wakeups to the PRCM, and enable I/O ring wakeup events for |
| 3715 | * this IP block if it has dynamic mux entries. Eventually this |
| 3716 | * should set PRCM wakeup registers to cause the PRCM to receive |
| 3717 | * wakeup events from the module. Does not set any wakeup routing |
| 3718 | * registers beyond this point - if the module is to wake up any other |
| 3719 | * module or subsystem, that must be set separately. Called by |
| 3720 | * omap_device code. Returns -EINVAL on error or 0 upon success. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3721 | */ |
| 3722 | int omap_hwmod_enable_wakeup(struct omap_hwmod *oh) |
| 3723 | { |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3724 | unsigned long flags; |
Kevin Hilman | 5a7ddcb | 2010-12-21 21:08:34 -0700 | [diff] [blame] | 3725 | u32 v; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3726 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3727 | spin_lock_irqsave(&oh->_lock, flags); |
Govindraj.R | 2a1cc14 | 2012-04-05 02:59:32 -0600 | [diff] [blame] | 3728 | |
| 3729 | if (oh->class->sysc && |
| 3730 | (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) { |
| 3731 | v = oh->_sysc_cache; |
| 3732 | _enable_wakeup(oh, &v); |
| 3733 | _write_sysconfig(v, oh); |
| 3734 | } |
| 3735 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3736 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3737 | |
| 3738 | return 0; |
| 3739 | } |
| 3740 | |
| 3741 | /** |
| 3742 | * omap_hwmod_disable_wakeup - prevent device from waking the system |
| 3743 | * @oh: struct omap_hwmod * |
| 3744 | * |
| 3745 | * Clears the module OCP socket ENAWAKEUP bit to prevent the module |
Govindraj.R | 2a1cc14 | 2012-04-05 02:59:32 -0600 | [diff] [blame] | 3746 | * from sending wakeups to the PRCM, and disable I/O ring wakeup |
| 3747 | * events for this IP block if it has dynamic mux entries. Eventually |
| 3748 | * this should clear PRCM wakeup registers to cause the PRCM to ignore |
| 3749 | * wakeup events from the module. Does not set any wakeup routing |
| 3750 | * registers beyond this point - if the module is to wake up any other |
| 3751 | * module or subsystem, that must be set separately. Called by |
| 3752 | * omap_device code. Returns -EINVAL on error or 0 upon success. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3753 | */ |
| 3754 | int omap_hwmod_disable_wakeup(struct omap_hwmod *oh) |
| 3755 | { |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3756 | unsigned long flags; |
Kevin Hilman | 5a7ddcb | 2010-12-21 21:08:34 -0700 | [diff] [blame] | 3757 | u32 v; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3758 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3759 | spin_lock_irqsave(&oh->_lock, flags); |
Govindraj.R | 2a1cc14 | 2012-04-05 02:59:32 -0600 | [diff] [blame] | 3760 | |
| 3761 | if (oh->class->sysc && |
| 3762 | (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) { |
| 3763 | v = oh->_sysc_cache; |
| 3764 | _disable_wakeup(oh, &v); |
| 3765 | _write_sysconfig(v, oh); |
| 3766 | } |
| 3767 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3768 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3769 | |
| 3770 | return 0; |
| 3771 | } |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 3772 | |
| 3773 | /** |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3774 | * omap_hwmod_assert_hardreset - assert the HW reset line of submodules |
| 3775 | * contained in the hwmod module. |
| 3776 | * @oh: struct omap_hwmod * |
| 3777 | * @name: name of the reset line to lookup and assert |
| 3778 | * |
| 3779 | * Some IP like dsp, ipu or iva contain processor that require |
| 3780 | * an HW reset line to be assert / deassert in order to enable fully |
| 3781 | * the IP. Returns -EINVAL if @oh is null or if the operation is not |
| 3782 | * yet supported on this OMAP; otherwise, passes along the return value |
| 3783 | * from _assert_hardreset(). |
| 3784 | */ |
| 3785 | int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name) |
| 3786 | { |
| 3787 | int ret; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3788 | unsigned long flags; |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3789 | |
| 3790 | if (!oh) |
| 3791 | return -EINVAL; |
| 3792 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3793 | spin_lock_irqsave(&oh->_lock, flags); |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3794 | ret = _assert_hardreset(oh, name); |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3795 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3796 | |
| 3797 | return ret; |
| 3798 | } |
| 3799 | |
| 3800 | /** |
| 3801 | * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules |
| 3802 | * contained in the hwmod module. |
| 3803 | * @oh: struct omap_hwmod * |
| 3804 | * @name: name of the reset line to look up and deassert |
| 3805 | * |
| 3806 | * Some IP like dsp, ipu or iva contain processor that require |
| 3807 | * an HW reset line to be assert / deassert in order to enable fully |
| 3808 | * the IP. Returns -EINVAL if @oh is null or if the operation is not |
| 3809 | * yet supported on this OMAP; otherwise, passes along the return value |
| 3810 | * from _deassert_hardreset(). |
| 3811 | */ |
| 3812 | int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name) |
| 3813 | { |
| 3814 | int ret; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3815 | unsigned long flags; |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3816 | |
| 3817 | if (!oh) |
| 3818 | return -EINVAL; |
| 3819 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3820 | spin_lock_irqsave(&oh->_lock, flags); |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3821 | ret = _deassert_hardreset(oh, name); |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3822 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3823 | |
| 3824 | return ret; |
| 3825 | } |
| 3826 | |
| 3827 | /** |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 3828 | * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname |
| 3829 | * @classname: struct omap_hwmod_class name to search for |
| 3830 | * @fn: callback function pointer to call for each hwmod in class @classname |
| 3831 | * @user: arbitrary context data to pass to the callback function |
| 3832 | * |
Benoit Cousson | ce35b24 | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 3833 | * For each omap_hwmod of class @classname, call @fn. |
| 3834 | * If the callback function returns something other than |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 3835 | * zero, the iterator is terminated, and the callback function's return |
| 3836 | * value is passed back to the caller. Returns 0 upon success, -EINVAL |
| 3837 | * if @classname or @fn are NULL, or passes back the error code from @fn. |
| 3838 | */ |
| 3839 | int omap_hwmod_for_each_by_class(const char *classname, |
| 3840 | int (*fn)(struct omap_hwmod *oh, |
| 3841 | void *user), |
| 3842 | void *user) |
| 3843 | { |
| 3844 | struct omap_hwmod *temp_oh; |
| 3845 | int ret = 0; |
| 3846 | |
| 3847 | if (!classname || !fn) |
| 3848 | return -EINVAL; |
| 3849 | |
| 3850 | pr_debug("omap_hwmod: %s: looking for modules of class %s\n", |
| 3851 | __func__, classname); |
| 3852 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 3853 | list_for_each_entry(temp_oh, &omap_hwmod_list, node) { |
| 3854 | if (!strcmp(temp_oh->class->name, classname)) { |
| 3855 | pr_debug("omap_hwmod: %s: %s: calling callback fn\n", |
| 3856 | __func__, temp_oh->name); |
| 3857 | ret = (*fn)(temp_oh, user); |
| 3858 | if (ret) |
| 3859 | break; |
| 3860 | } |
| 3861 | } |
| 3862 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 3863 | if (ret) |
| 3864 | pr_debug("omap_hwmod: %s: iterator terminated early: %d\n", |
| 3865 | __func__, ret); |
| 3866 | |
| 3867 | return ret; |
| 3868 | } |
| 3869 | |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3870 | /** |
| 3871 | * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod |
| 3872 | * @oh: struct omap_hwmod * |
| 3873 | * @state: state that _setup() should leave the hwmod in |
| 3874 | * |
Paul Walmsley | 550c809 | 2011-02-28 11:58:14 -0700 | [diff] [blame] | 3875 | * Sets the hwmod state that @oh will enter at the end of _setup() |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 3876 | * (called by omap_hwmod_setup_*()). See also the documentation |
| 3877 | * for _setup_postsetup(), above. Returns 0 upon success or |
| 3878 | * -EINVAL if there is a problem with the arguments or if the hwmod is |
| 3879 | * in the wrong state. |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3880 | */ |
| 3881 | int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state) |
| 3882 | { |
| 3883 | int ret; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3884 | unsigned long flags; |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3885 | |
| 3886 | if (!oh) |
| 3887 | return -EINVAL; |
| 3888 | |
| 3889 | if (state != _HWMOD_STATE_DISABLED && |
| 3890 | state != _HWMOD_STATE_ENABLED && |
| 3891 | state != _HWMOD_STATE_IDLE) |
| 3892 | return -EINVAL; |
| 3893 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3894 | spin_lock_irqsave(&oh->_lock, flags); |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3895 | |
| 3896 | if (oh->_state != _HWMOD_STATE_REGISTERED) { |
| 3897 | ret = -EINVAL; |
| 3898 | goto ohsps_unlock; |
| 3899 | } |
| 3900 | |
| 3901 | oh->_postsetup_state = state; |
| 3902 | ret = 0; |
| 3903 | |
| 3904 | ohsps_unlock: |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3905 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3906 | |
| 3907 | return ret; |
| 3908 | } |
Kevin Hilman | c80705a | 2010-12-21 21:31:55 -0700 | [diff] [blame] | 3909 | |
| 3910 | /** |
| 3911 | * omap_hwmod_get_context_loss_count - get lost context count |
| 3912 | * @oh: struct omap_hwmod * |
| 3913 | * |
Rajendra Nayak | e6d3a8b | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 3914 | * Returns the context loss count of associated @oh |
| 3915 | * upon success, or zero if no context loss data is available. |
Kevin Hilman | c80705a | 2010-12-21 21:31:55 -0700 | [diff] [blame] | 3916 | * |
Rajendra Nayak | e6d3a8b | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 3917 | * On OMAP4, this queries the per-hwmod context loss register, |
| 3918 | * assuming one exists. If not, or on OMAP2/3, this queries the |
| 3919 | * enclosing powerdomain context loss count. |
Kevin Hilman | c80705a | 2010-12-21 21:31:55 -0700 | [diff] [blame] | 3920 | */ |
Tomi Valkeinen | fc01387 | 2011-06-09 16:56:23 +0300 | [diff] [blame] | 3921 | int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh) |
Kevin Hilman | c80705a | 2010-12-21 21:31:55 -0700 | [diff] [blame] | 3922 | { |
| 3923 | struct powerdomain *pwrdm; |
| 3924 | int ret = 0; |
| 3925 | |
Rajendra Nayak | e6d3a8b | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 3926 | if (soc_ops.get_context_lost) |
| 3927 | return soc_ops.get_context_lost(oh); |
| 3928 | |
Kevin Hilman | c80705a | 2010-12-21 21:31:55 -0700 | [diff] [blame] | 3929 | pwrdm = omap_hwmod_get_pwrdm(oh); |
| 3930 | if (pwrdm) |
| 3931 | ret = pwrdm_get_context_loss_count(pwrdm); |
| 3932 | |
| 3933 | return ret; |
| 3934 | } |
Paul Walmsley | 43b0164 | 2011-03-10 03:50:07 -0700 | [diff] [blame] | 3935 | |
| 3936 | /** |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 3937 | * omap_hwmod_init - initialize the hwmod code |
| 3938 | * |
| 3939 | * Sets up some function pointers needed by the hwmod code to operate on the |
| 3940 | * currently-booted SoC. Intended to be called once during kernel init |
| 3941 | * before any hwmods are registered. No return value. |
| 3942 | */ |
| 3943 | void __init omap_hwmod_init(void) |
| 3944 | { |
Paul Walmsley | ff4ae5d | 2012-10-21 01:01:11 -0600 | [diff] [blame] | 3945 | if (cpu_is_omap24xx()) { |
Tero Kristo | 9002e921 | 2014-10-27 08:39:23 -0700 | [diff] [blame] | 3946 | soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready; |
Paul Walmsley | ff4ae5d | 2012-10-21 01:01:11 -0600 | [diff] [blame] | 3947 | soc_ops.assert_hardreset = _omap2_assert_hardreset; |
| 3948 | soc_ops.deassert_hardreset = _omap2_deassert_hardreset; |
| 3949 | soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted; |
| 3950 | } else if (cpu_is_omap34xx()) { |
Tero Kristo | 9002e921 | 2014-10-27 08:39:23 -0700 | [diff] [blame] | 3951 | soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready; |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 3952 | soc_ops.assert_hardreset = _omap2_assert_hardreset; |
| 3953 | soc_ops.deassert_hardreset = _omap2_deassert_hardreset; |
| 3954 | soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted; |
Tero Kristo | 0385c58 | 2013-07-17 18:03:25 +0300 | [diff] [blame] | 3955 | soc_ops.init_clkdm = _init_clkdm; |
Rajendra Nayak | debcd1f | 2013-07-02 18:20:08 +0530 | [diff] [blame] | 3956 | } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) { |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 3957 | soc_ops.enable_module = _omap4_enable_module; |
| 3958 | soc_ops.disable_module = _omap4_disable_module; |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 3959 | soc_ops.wait_target_ready = _omap4_wait_target_ready; |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 3960 | soc_ops.assert_hardreset = _omap4_assert_hardreset; |
| 3961 | soc_ops.deassert_hardreset = _omap4_deassert_hardreset; |
| 3962 | soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; |
Kevin Hilman | 0a179ea | 2012-06-18 12:12:25 -0600 | [diff] [blame] | 3963 | soc_ops.init_clkdm = _init_clkdm; |
Rajendra Nayak | e6d3a8b | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 3964 | soc_ops.update_context_lost = _omap4_update_context_lost; |
| 3965 | soc_ops.get_context_lost = _omap4_get_context_lost; |
Tero Kristo | 9fabc1a | 2016-07-04 14:11:48 +0300 | [diff] [blame] | 3966 | soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm; |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 3967 | soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl; |
Tony Lindgren | 0f3ccb2 | 2015-07-16 01:55:58 -0700 | [diff] [blame] | 3968 | } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() || |
| 3969 | soc_is_am43xx()) { |
Afzal Mohammed | c8b428a | 2013-10-12 15:46:20 +0530 | [diff] [blame] | 3970 | soc_ops.enable_module = _omap4_enable_module; |
| 3971 | soc_ops.disable_module = _omap4_disable_module; |
| 3972 | soc_ops.wait_target_ready = _omap4_wait_target_ready; |
Tero Kristo | 409d706 | 2014-10-27 08:39:24 -0700 | [diff] [blame] | 3973 | soc_ops.assert_hardreset = _omap4_assert_hardreset; |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 3974 | soc_ops.deassert_hardreset = _am33xx_deassert_hardreset; |
Tero Kristo | a5bf00c | 2015-05-05 16:33:05 +0300 | [diff] [blame] | 3975 | soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 3976 | soc_ops.init_clkdm = _init_clkdm; |
Tero Kristo | 9fabc1a | 2016-07-04 14:11:48 +0300 | [diff] [blame] | 3977 | soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm; |
Tero Kristo | 2b96be3 | 2017-08-09 11:57:12 +0300 | [diff] [blame] | 3978 | soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl; |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 3979 | } else { |
| 3980 | WARN(1, "omap_hwmod: unknown SoC type\n"); |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 3981 | } |
| 3982 | |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 3983 | _init_clkctrl_providers(); |
| 3984 | |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 3985 | inited = true; |
| 3986 | } |
Tony Lindgren | 68c9a95 | 2012-07-06 00:58:43 -0700 | [diff] [blame] | 3987 | |
| 3988 | /** |
| 3989 | * omap_hwmod_get_main_clk - get pointer to main clock name |
| 3990 | * @oh: struct omap_hwmod * |
| 3991 | * |
| 3992 | * Returns the main clock name assocated with @oh upon success, |
| 3993 | * or NULL if @oh is NULL. |
| 3994 | */ |
| 3995 | const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh) |
| 3996 | { |
| 3997 | if (!oh) |
| 3998 | return NULL; |
| 3999 | |
| 4000 | return oh->main_clk; |
| 4001 | } |