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Arnaud Ebalard389c74a2014-11-22 00:46:57 +01001/*
2 * Device Tree file for Synology DS414
3 *
4 * Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
5 *
Gregory CLEMENT3c21b5f2015-01-26 15:16:11 +01006 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This file is distributed in the hope that it will be useful
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
Arnaud Ebalard389c74a2014-11-22 00:46:57 +010043 *
44 * Note: this Device Tree assumes that the bootloader has remapped the
45 * internal registers to 0xf1000000 (instead of the old 0xd0000000).
46 * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
47 * bootloaders provided by Marvell. It is used in recent versions of
48 * DSM software provided by Synology. Nonetheless, some earlier boards
49 * were delivered with an older version of u-boot that left internal
50 * registers mapped at 0xd0000000. If you have such a device you will
51 * not be able to directly boot a kernel based on this Device Tree. In
52 * that case, the preferred solution is to update your bootloader (e.g.
53 * by upgrading to latest version of DSM, or building a new one and
54 * installing it from u-boot prompt) or adjust the Devive Tree
55 * (s/0xf1000000/0xd0000000/ in 'ranges' below).
56 */
57
58/dts-v1/;
59
60#include <dt-bindings/input/input.h>
61#include <dt-bindings/gpio/gpio.h>
62#include "armada-xp-mv78230.dtsi"
63
64/ {
65 model = "Synology DS414";
66 compatible = "synology,ds414", "marvell,armadaxp-mv78230",
67 "marvell,armadaxp", "marvell,armada-370-xp";
68
69 chosen {
Thomas Petazzoni95522032015-03-03 15:41:02 +010070 stdout-path = "serial0:115200n8";
Arnaud Ebalard389c74a2014-11-22 00:46:57 +010071 };
72
73 memory {
74 device_type = "memory";
75 reg = <0 0x00000000 0 0x40000000>; /* 1GB */
76 };
77
78 soc {
79 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
80 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
81
82 pcie-controller {
83 status = "okay";
84
85 /*
86 * Connected to Marvell 88SX7042 SATA-II controller
87 * handling the four disks.
88 */
89 pcie@1,0 {
90 /* Port 0, Lane 0 */
91 status = "okay";
92 };
93
94 /*
95 * Connected to EtronTech EJ168A XHCI controller
96 * providing the two rear USB 3.0 ports.
97 */
98 pcie@5,0 {
99 /* Port 1, Lane 0 */
100 status = "okay";
101 };
102 };
103
104 internal-regs {
105
106 /* RTC is provided by Seiko S-35390A below */
107 rtc@10300 {
108 status = "disabled";
109 };
110
111 spi0: spi@10600 {
112 status = "okay";
113
114 spi-flash@0 {
115 #address-cells = <1>;
116 #size-cells = <1>;
117 compatible = "micron,n25q064";
118 reg = <0>; /* Chip select 0 */
119 spi-max-frequency = <20000000>;
120
121 /*
122 * Warning!
123 *
124 * Synology u-boot uses its compiled-in environment
125 * and it seems Synology did not care to change u-boot
126 * default configuration in order to allow saving a
127 * modified environment at a sensible location. So,
128 * if you do a 'saveenv' under u-boot, your modified
129 * environment will be saved at 1MB after the start
130 * of the flash, i.e. in the middle of the uImage.
131 * For that reason, it is strongly advised not to
132 * change the default environment, unless you know
133 * what you are doing.
134 */
135 partition@00000000 { /* u-boot */
136 label = "RedBoot";
137 reg = <0x00000000 0x000d0000>; /* 832KB */
138 };
139
140 partition@000c0000 { /* uImage */
141 label = "zImage";
142 reg = <0x000d0000 0x002d0000>; /* 2880KB */
143 };
144
145 partition@003a0000 { /* uInitramfs */
146 label = "rd.gz";
147 reg = <0x003a0000 0x00430000>; /* 4250KB */
148 };
149
150 partition@007d0000 { /* MAC address and serial number */
151 label = "vendor";
152 reg = <0x007d0000 0x00010000>; /* 64KB */
153 };
154
155 partition@007e0000 {
156 label = "RedBoot config";
157 reg = <0x007e0000 0x00010000>; /* 64KB */
158 };
159
160 partition@007f0000 {
161 label = "FIS directory";
162 reg = <0x007f0000 0x00010000>; /* 64KB */
163 };
164 };
165 };
166
167 i2c@11000 {
168 clock-frequency = <400000>;
169 status = "okay";
170
171 s35390a: s35390a@30 {
172 compatible = "sii,s35390a";
173 reg = <0x30>;
174 };
175 };
176
177 /* Connected to a header on device's PCB. This
178 * provides the main console for the device.
179 *
180 * Warning: the device may not boot with a 3.3V
181 * USB-serial converter connected when the power
182 * button is pressed. The converter needs to be
183 * connected a few seconds after pressing the
184 * power button. This is possibly due to UART0_TXD
185 * pin being sampled at reset (bit 0 of SAR).
186 */
187 serial@12000 {
188 status = "okay";
189 };
190
191 /* Connected to a Microchip PIC16F883 for power control */
192 serial@12100 {
193 status = "okay";
194 };
195
196 poweroff@12100 {
197 compatible = "synology,power-off";
198 reg = <0x12100 0x100>;
199 clocks = <&coreclk 0>;
200 };
201
202 /* Front USB 2.0 port */
203 usb@50000 {
204 status = "okay";
205 };
206
207 mdio {
208 phy0: ethernet-phy@0 { /* Marvell 88E1512 */
209 reg = <0>;
210 };
211
212 phy1: ethernet-phy@1 { /* Marvell 88E1512 */
213 reg = <1>;
214 };
215 };
216
217 ethernet@70000 {
218 status = "okay";
Arnaud Ebalard70ee4e92014-11-22 17:23:30 +0100219 pinctrl-0 = <&ge0_rgmii_pins>;
Arnaud Ebalard389c74a2014-11-22 00:46:57 +0100220 pinctrl-names = "default";
221 phy = <&phy1>;
222 phy-mode = "rgmii-id";
223 };
224
225 ethernet@74000 {
Arnaud Ebalard70ee4e92014-11-22 17:23:30 +0100226 pinctrl-0 = <&ge1_rgmii_pins>;
Arnaud Ebalard389c74a2014-11-22 00:46:57 +0100227 pinctrl-names = "default";
228 status = "okay";
229 phy = <&phy0>;
230 phy-mode = "rgmii-id";
231 };
232 };
233 };
234
235 regulators {
236 compatible = "simple-bus";
237 #address-cells = <1>;
238 #size-cells = <0>;
239 pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin
240 &sata3_pwr_pin &sata4_pwr_pin>;
241 pinctrl-names = "default";
242
243 sata1_regulator: sata1-regulator {
244 compatible = "regulator-fixed";
245 reg = <1>;
246 regulator-name = "SATA1 Power";
247 regulator-min-microvolt = <5000000>;
248 regulator-max-microvolt = <5000000>;
249 startup-delay-us = <2000000>;
250 enable-active-high;
251 regulator-always-on;
252 regulator-boot-on;
253 gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
254 };
255
256 sata2_regulator: sata2-regulator {
257 compatible = "regulator-fixed";
258 reg = <2>;
259 regulator-name = "SATA2 Power";
260 regulator-min-microvolt = <5000000>;
261 regulator-max-microvolt = <5000000>;
262 startup-delay-us = <4000000>;
263 enable-active-high;
264 regulator-always-on;
265 regulator-boot-on;
266 gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
267 };
268
269 sata3_regulator: sata3-regulator {
270 compatible = "regulator-fixed";
271 reg = <3>;
272 regulator-name = "SATA3 Power";
273 regulator-min-microvolt = <5000000>;
274 regulator-max-microvolt = <5000000>;
275 startup-delay-us = <6000000>;
276 enable-active-high;
277 regulator-always-on;
278 regulator-boot-on;
279 gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
280 };
281
282 sata4_regulator: sata4-regulator {
283 compatible = "regulator-fixed";
284 reg = <4>;
285 regulator-name = "SATA4 Power";
286 regulator-min-microvolt = <5000000>;
287 regulator-max-microvolt = <5000000>;
288 startup-delay-us = <8000000>;
289 enable-active-high;
290 regulator-always-on;
291 regulator-boot-on;
292 gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
293 };
294 };
295};
296
297&pinctrl {
298 sata1_pwr_pin: sata1-pwr-pin {
299 marvell,pins = "mpp42";
300 marvell,function = "gpio";
301 };
302
303 sata2_pwr_pin: sata2-pwr-pin {
304 marvell,pins = "mpp44";
305 marvell,function = "gpio";
306 };
307
308 sata3_pwr_pin: sata3-pwr-pin {
309 marvell,pins = "mpp45";
310 marvell,function = "gpio";
311 };
312
313 sata4_pwr_pin: sata4-pwr-pin {
314 marvell,pins = "mpp46";
315 marvell,function = "gpio";
316 };
317
318 sata1_pres_pin: sata1-pres-pin {
319 marvell,pins = "mpp34";
320 marvell,function = "gpio";
321 };
322
323 sata2_pres_pin: sata2-pres-pin {
324 marvell,pins = "mpp35";
325 marvell,function = "gpio";
326 };
327
328 sata3_pres_pin: sata3-pres-pin {
329 marvell,pins = "mpp40";
330 marvell,function = "gpio";
331 };
332
333 sata4_pres_pin: sata4-pres-pin {
334 marvell,pins = "mpp41";
335 marvell,function = "gpio";
336 };
337
338 syno_id_bit0_pin: syno-id-bit0-pin {
339 marvell,pins = "mpp26";
340 marvell,function = "gpio";
341 };
342
Arnaud Ebalarda02fe642014-11-22 17:19:50 +0100343 syno_id_bit1_pin: syno-id-bit1-pin {
Arnaud Ebalard389c74a2014-11-22 00:46:57 +0100344 marvell,pins = "mpp28";
345 marvell,function = "gpio";
346 };
347
Arnaud Ebalarda02fe642014-11-22 17:19:50 +0100348 syno_id_bit2_pin: syno-id-bit2-pin {
Arnaud Ebalard389c74a2014-11-22 00:46:57 +0100349 marvell,pins = "mpp29";
350 marvell,function = "gpio";
351 };
352
Arnaud Ebalarda02fe642014-11-22 17:19:50 +0100353 fan1_alarm_pin: fan1-alarm-pin {
Arnaud Ebalard389c74a2014-11-22 00:46:57 +0100354 marvell,pins = "mpp33";
355 marvell,function = "gpio";
356 };
357
358 fan2_alarm_pin: fan2-alarm-pin {
359 marvell,pins = "mpp32";
360 marvell,function = "gpio";
361 };
362};