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Benoit Cousson492beed2011-08-16 15:59:52 +02001/*
2 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
Florian Vaussard98ef79572013-05-31 14:32:55 +020010#include "omap443x.dtsi"
11#include "elpida_ecb240abacn.dtsi"
Benoit Cousson492beed2011-08-16 15:59:52 +020012
13/ {
14 model = "TI OMAP4 SDP board";
15 compatible = "ti,omap4-sdp", "ti,omap4430", "ti,omap4";
16
Benoit Cousson492beed2011-08-16 15:59:52 +020017 memory {
18 device_type = "memory";
19 reg = <0x80000000 0x40000000>; /* 1 GB */
20 };
Benoit Coussone7c64db2012-01-20 14:17:00 +010021
Tomi Valkeinen7c572d52012-08-20 17:07:31 +030022 aliases {
23 display0 = &lcd0;
24 display1 = &lcd1;
25 display2 = &hdmi0;
26 };
27
Rajendra Nayak624411c2012-07-30 18:42:20 +053028 vdd_eth: fixedregulator-vdd-eth {
Benoit Coussone7c64db2012-01-20 14:17:00 +010029 compatible = "regulator-fixed";
30 regulator-name = "VDD_ETH";
31 regulator-min-microvolt = <3300000>;
32 regulator-max-microvolt = <3300000>;
33 gpio = <&gpio2 16 0>; /* gpio line 48 */
34 enable-active-high;
35 regulator-boot-on;
36 };
Benoit Cousson83909c72012-05-08 18:37:26 +020037
Rajendra Nayak624411c2012-07-30 18:42:20 +053038 vbat: fixedregulator-vbat {
Peter Ujfalusi4814f2f2012-06-08 17:02:01 +030039 compatible = "regulator-fixed";
40 regulator-name = "VBAT";
41 regulator-min-microvolt = <3750000>;
42 regulator-max-microvolt = <3750000>;
43 regulator-boot-on;
44 };
45
Benoit Cousson83909c72012-05-08 18:37:26 +020046 leds {
47 compatible = "gpio-leds";
48 debug0 {
49 label = "omap4:green:debug0";
Florian Vaussard6d624ea2013-05-31 14:32:56 +020050 gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>; /* 61 */
Benoit Cousson83909c72012-05-08 18:37:26 +020051 };
52
53 debug1 {
54 label = "omap4:green:debug1";
Florian Vaussard6d624ea2013-05-31 14:32:56 +020055 gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; /* 30 */
Benoit Cousson83909c72012-05-08 18:37:26 +020056 };
57
58 debug2 {
59 label = "omap4:green:debug2";
Florian Vaussard6d624ea2013-05-31 14:32:56 +020060 gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; /* 7 */
Benoit Cousson83909c72012-05-08 18:37:26 +020061 };
62
63 debug3 {
64 label = "omap4:green:debug3";
Florian Vaussard6d624ea2013-05-31 14:32:56 +020065 gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; /* 8 */
Benoit Cousson83909c72012-05-08 18:37:26 +020066 };
67
68 debug4 {
69 label = "omap4:green:debug4";
Florian Vaussard6d624ea2013-05-31 14:32:56 +020070 gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>; /* 50 */
Benoit Cousson83909c72012-05-08 18:37:26 +020071 };
72
73 user1 {
74 label = "omap4:blue:user";
Florian Vaussard6d624ea2013-05-31 14:32:56 +020075 gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* 169 */
Benoit Cousson83909c72012-05-08 18:37:26 +020076 };
77
78 user2 {
79 label = "omap4:red:user";
Florian Vaussard6d624ea2013-05-31 14:32:56 +020080 gpios = <&gpio6 10 GPIO_ACTIVE_HIGH>; /* 170 */
Benoit Cousson83909c72012-05-08 18:37:26 +020081 };
82
83 user3 {
84 label = "omap4:green:user";
Florian Vaussard6d624ea2013-05-31 14:32:56 +020085 gpios = <&gpio5 11 GPIO_ACTIVE_HIGH>; /* 139 */
Benoit Cousson83909c72012-05-08 18:37:26 +020086 };
87 };
Peter Ujfalusib15bb2c2012-06-08 17:02:03 +030088
Peter Ujfalusi28f166cb2012-11-12 15:06:56 +010089 pwmleds {
90 compatible = "pwm-leds";
91 kpad {
92 label = "omap4::keypad";
93 pwms = <&twl_pwm 0 7812500>;
94 max-brightness = <127>;
95 };
96
97 charging {
98 label = "omap4:green:chrg";
99 pwms = <&twl_pwmled 0 7812500>;
100 max-brightness = <255>;
101 };
102 };
103
Peter Ujfalusif95c01d2013-01-18 15:00:47 +0100104 backlight {
105 compatible = "pwm-backlight";
106 pwms = <&twl_pwm 1 7812500>;
107 brightness-levels = <
108 0 10 20 30 40
109 50 60 70 80 90
110 100 110 120 127
111 >;
112 default-brightness-level = <13>;
113 };
114
Peter Ujfalusib15bb2c2012-06-08 17:02:03 +0300115 sound {
116 compatible = "ti,abe-twl6040";
117 ti,model = "SDP4430";
118
119 ti,jack-detection = <1>;
120 ti,mclk-freq = <38400000>;
121
122 ti,mcpdm = <&mcpdm>;
123 ti,dmic = <&dmic>;
124
125 ti,twl6040 = <&twl6040>;
126
127 /* Audio routing */
128 ti,audio-routing =
129 "Headset Stereophone", "HSOL",
130 "Headset Stereophone", "HSOR",
131 "Earphone Spk", "EP",
132 "Ext Spk", "HFL",
133 "Ext Spk", "HFR",
134 "Line Out", "AUXL",
135 "Line Out", "AUXR",
136 "Vibrator", "VIBRAL",
137 "Vibrator", "VIBRAR",
138 "HSMIC", "Headset Mic",
139 "Headset Mic", "Headset Mic Bias",
140 "MAINMIC", "Main Handset Mic",
141 "Main Handset Mic", "Main Mic Bias",
142 "SUBMIC", "Sub Handset Mic",
143 "Sub Handset Mic", "Main Mic Bias",
144 "AFML", "Line In",
145 "AFMR", "Line In",
146 "DMic", "Digital Mic",
147 "Digital Mic", "Digital Mic1 Bias";
148 };
Tony Lindgren775d2412013-09-13 12:09:57 -0700149
150 /* regulator for wl12xx on sdio5 */
151 wl12xx_vmmc: wl12xx_vmmc {
152 pinctrl-names = "default";
153 pinctrl-0 = <&wl12xx_gpio>;
154 compatible = "regulator-fixed";
155 regulator-name = "vwl1271";
156 regulator-min-microvolt = <1800000>;
157 regulator-max-microvolt = <1800000>;
158 gpio = <&gpio2 22 0>;
159 startup-delay-us = <70000>;
160 enable-active-high;
161 };
Tomi Valkeinen7c572d52012-08-20 17:07:31 +0300162
163 tpd12s015: encoder@0 {
164 compatible = "ti,tpd12s015";
165
166 gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>, /* 60, CT CP HPD */
167 <&gpio2 9 GPIO_ACTIVE_HIGH>, /* 41, LS OE */
168 <&gpio2 31 GPIO_ACTIVE_HIGH>; /* 63, HPD */
169
170 ports {
171 #address-cells = <1>;
172 #size-cells = <0>;
173
174 port@0 {
175 reg = <0>;
176
177 tpd12s015_in: endpoint@0 {
178 remote-endpoint = <&hdmi_out>;
179 };
180 };
181
182 port@1 {
183 reg = <1>;
184
185 tpd12s015_out: endpoint@0 {
186 remote-endpoint = <&hdmi_connector_in>;
187 };
188 };
189 };
190 };
191
192 hdmi0: connector@0 {
193 compatible = "hdmi-connector";
194 label = "hdmi";
195
196 type = "c";
197
198 port {
199 hdmi_connector_in: endpoint {
200 remote-endpoint = <&tpd12s015_out>;
201 };
202 };
203 };
Benoit Cousson492beed2011-08-16 15:59:52 +0200204};
Benoit Cousson33632ae2011-08-23 17:17:46 +0200205
Tony Lindgren26638c62012-09-10 10:34:52 -0700206&omap4_pmx_core {
Peter Ujfalusi08386fe2012-10-04 14:57:25 +0300207 pinctrl-names = "default";
208 pinctrl-0 = <
Ricardo Neri347bf482012-11-05 15:14:15 +0200209 &dss_hdmi_pins
210 &tpd12s015_pins
Peter Ujfalusi08386fe2012-10-04 14:57:25 +0300211 >;
212
Tony Lindgren26638c62012-09-10 10:34:52 -0700213 uart2_pins: pinmux_uart2_pins {
214 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200215 0xd8 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
216 0xda (PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
217 0xdc (PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_rx.uart2_rx */
218 0xde (PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
Tony Lindgren26638c62012-09-10 10:34:52 -0700219 >;
220 };
221
222 uart3_pins: pinmux_uart3_pins {
223 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200224 0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
225 0x102 (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
226 0x104 (PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
227 0x106 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
Tony Lindgren26638c62012-09-10 10:34:52 -0700228 >;
229 };
230
231 uart4_pins: pinmux_uart4_pins {
232 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200233 0x11c (PIN_INPUT | MUX_MODE0) /* uart4_rx.uart4_rx */
234 0x11e (PIN_OUTPUT | MUX_MODE0) /* uart4_tx.uart4_tx */
Tony Lindgren26638c62012-09-10 10:34:52 -0700235 >;
236 };
Peter Ujfalusi08386fe2012-10-04 14:57:25 +0300237
238 twl6040_pins: pinmux_twl6040_pins {
239 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200240 0xe0 (PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */
241 0x160 (PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */
Peter Ujfalusi08386fe2012-10-04 14:57:25 +0300242 >;
243 };
244
245 mcpdm_pins: pinmux_mcpdm_pins {
246 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200247 0xc6 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_ul_data.abe_pdm_ul_data */
248 0xc8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_dl_data.abe_pdm_dl_data */
249 0xca (PIN_INPUT_PULLUP | MUX_MODE0) /* abe_pdm_frame.abe_pdm_frame */
250 0xcc (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_lb_clk.abe_pdm_lb_clk */
251 0xce (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */
Peter Ujfalusi08386fe2012-10-04 14:57:25 +0300252 >;
253 };
254
255 dmic_pins: pinmux_dmic_pins {
256 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200257 0xd0 (PIN_OUTPUT | MUX_MODE0) /* abe_dmic_clk1.abe_dmic_clk1 */
258 0xd2 (PIN_INPUT | MUX_MODE0) /* abe_dmic_din1.abe_dmic_din1 */
259 0xd4 (PIN_INPUT | MUX_MODE0) /* abe_dmic_din2.abe_dmic_din2 */
260 0xd6 (PIN_INPUT | MUX_MODE0) /* abe_dmic_din3.abe_dmic_din3 */
Peter Ujfalusi08386fe2012-10-04 14:57:25 +0300261 >;
262 };
263
264 mcbsp1_pins: pinmux_mcbsp1_pins {
265 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200266 0xbe (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
267 0xc0 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */
268 0xc2 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dx.abe_mcbsp1_dx */
269 0xc4 (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */
Peter Ujfalusi08386fe2012-10-04 14:57:25 +0300270 >;
271 };
272
273 mcbsp2_pins: pinmux_mcbsp2_pins {
274 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200275 0xb6 (PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_clkx.abe_mcbsp2_clkx */
276 0xb8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp2_dr.abe_mcbsp2_dr */
277 0xba (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp2_dx.abe_mcbsp2_dx */
278 0xbc (PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_fsx.abe_mcbsp2_fsx */
Peter Ujfalusi08386fe2012-10-04 14:57:25 +0300279 >;
280 };
Ricardo Neri347bf482012-11-05 15:14:15 +0200281
Tony Lindgrend5a2b342013-05-08 16:13:14 -0700282 mcspi1_pins: pinmux_mcspi1_pins {
283 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200284 0xf2 (PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
285 0xf4 (PIN_INPUT | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
286 0xf6 (PIN_INPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
287 0xf8 (PIN_INPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
Tony Lindgrend5a2b342013-05-08 16:13:14 -0700288 >;
289 };
290
Ricardo Neri347bf482012-11-05 15:14:15 +0200291 dss_hdmi_pins: pinmux_dss_hdmi_pins {
292 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200293 0x5a (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */
294 0x5c (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_scl.hdmi_scl */
295 0x5e (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_sda.hdmi_sda */
Ricardo Neri347bf482012-11-05 15:14:15 +0200296 >;
297 };
298
299 tpd12s015_pins: pinmux_tpd12s015_pins {
300 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200301 0x22 (PIN_OUTPUT | MUX_MODE3) /* gpmc_a17.gpio_41 */
302 0x48 (PIN_OUTPUT | MUX_MODE3) /* gpmc_nbe1.gpio_60 */
303 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* hdmi_hpd.gpio_63 */
Ricardo Neri347bf482012-11-05 15:14:15 +0200304 >;
305 };
Sourav Poddarbe26cd62013-02-13 14:58:12 +0530306
307 i2c1_pins: pinmux_i2c1_pins {
308 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200309 0xe2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
310 0xe4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
Sourav Poddarbe26cd62013-02-13 14:58:12 +0530311 >;
312 };
313
314 i2c2_pins: pinmux_i2c2_pins {
315 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200316 0xe6 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
317 0xe8 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
Sourav Poddarbe26cd62013-02-13 14:58:12 +0530318 >;
319 };
320
321 i2c3_pins: pinmux_i2c3_pins {
322 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200323 0xea (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
324 0xec (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
Sourav Poddarbe26cd62013-02-13 14:58:12 +0530325 >;
326 };
327
328 i2c4_pins: pinmux_i2c4_pins {
329 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200330 0xee (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
331 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
Sourav Poddarbe26cd62013-02-13 14:58:12 +0530332 >;
333 };
Tony Lindgren775d2412013-09-13 12:09:57 -0700334
335 /* wl12xx GPIO output for WLAN_EN */
336 wl12xx_gpio: pinmux_wl12xx_gpio {
337 pinctrl-single,pins = <
338 0x3c (PIN_OUTPUT | MUX_MODE3) /* gpmc_nwp.gpio_54 */
339 >;
340 };
341
342 /* wl12xx GPIO inputs and SDIO pins */
343 wl12xx_pins: pinmux_wl12xx_pins {
344 pinctrl-single,pins = <
345 0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
Balaji T K2562f522013-12-02 11:38:14 -0800346 0x108 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */
347 0x10a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */
348 0x10c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */
349 0x10e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */
350 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat2.sdmmc5_dat2 */
351 0x112 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */
Tony Lindgren775d2412013-09-13 12:09:57 -0700352 >;
353 };
Tony Lindgren26638c62012-09-10 10:34:52 -0700354};
355
Benoit Cousson33632ae2011-08-23 17:17:46 +0200356&i2c1 {
Sourav Poddarbe26cd62013-02-13 14:58:12 +0530357 pinctrl-names = "default";
358 pinctrl-0 = <&i2c1_pins>;
359
Benoit Cousson33632ae2011-08-23 17:17:46 +0200360 clock-frequency = <400000>;
361
362 twl: twl@48 {
363 reg = <0x48>;
364 /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */
Florian Vaussard8fea7d52013-05-31 14:32:57 +0200365 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */
Benoit Cousson33632ae2011-08-23 17:17:46 +0200366 };
Peter Ujfalusiefd2af52012-06-08 17:02:02 +0300367
368 twl6040: twl@4b {
369 compatible = "ti,twl6040";
370 reg = <0x4b>;
Peter Ujfalusic5d75d52014-01-24 10:19:00 +0200371
372 pinctrl-names = "default";
373 pinctrl-0 = <&twl6040_pins>;
374
Peter Ujfalusiefd2af52012-06-08 17:02:02 +0300375 /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */
Florian Vaussard8fea7d52013-05-31 14:32:57 +0200376 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
Peter Ujfalusiefd2af52012-06-08 17:02:02 +0300377 ti,audpwron-gpio = <&gpio4 31 0>; /* gpio line 127 */
378
379 vio-supply = <&v1v8>;
380 v2v1-supply = <&v2v1>;
381 enable-active-high;
382
383 /* regulators for vibra motor */
384 vddvibl-supply = <&vbat>;
385 vddvibr-supply = <&vbat>;
386
387 vibra {
388 /* Vibra driver, motor resistance parameters */
389 ti,vibldrv-res = <8>;
390 ti,vibrdrv-res = <3>;
391 ti,viblmotor-res = <10>;
392 ti,vibrmotor-res = <10>;
393 };
394 };
Benoit Cousson33632ae2011-08-23 17:17:46 +0200395};
396
Florian Vaussard98ef79572013-05-31 14:32:55 +0200397#include "twl6030.dtsi"
Ruslan Bilovol06a9ea52013-08-14 11:35:47 +0300398#include "twl6030_omap4.dtsi"
Benoit Cousson33632ae2011-08-23 17:17:46 +0200399
400&i2c2 {
Sourav Poddarbe26cd62013-02-13 14:58:12 +0530401 pinctrl-names = "default";
402 pinctrl-0 = <&i2c2_pins>;
403
Benoit Cousson33632ae2011-08-23 17:17:46 +0200404 clock-frequency = <400000>;
405};
406
407&i2c3 {
Sourav Poddarbe26cd62013-02-13 14:58:12 +0530408 pinctrl-names = "default";
409 pinctrl-0 = <&i2c3_pins>;
410
Benoit Cousson33632ae2011-08-23 17:17:46 +0200411 clock-frequency = <400000>;
412
413 /*
414 * Temperature Sensor
415 * http://www.ti.com/lit/ds/symlink/tmp105.pdf
416 */
417 tmp105@48 {
418 compatible = "ti,tmp105";
419 reg = <0x48>;
420 };
421
422 /*
423 * Ambient Light Sensor
424 * http://www.rohm.com/products/databook/sensor/pdf/bh1780gli-e.pdf
425 */
426 bh1780@29 {
427 compatible = "rohm,bh1780";
428 reg = <0x29>;
429 };
430};
431
432&i2c4 {
Sourav Poddarbe26cd62013-02-13 14:58:12 +0530433 pinctrl-names = "default";
434 pinctrl-0 = <&i2c4_pins>;
435
Benoit Cousson33632ae2011-08-23 17:17:46 +0200436 clock-frequency = <400000>;
437
438 /*
439 * 3-Axis Digital Compass
440 * http://www.sparkfun.com/datasheets/Sensors/Magneto/HMC5843.pdf
441 */
442 hmc5843@1e {
443 compatible = "honeywell,hmc5843";
444 reg = <0x1e>;
445 };
446};
Benoit Coussone7c64db2012-01-20 14:17:00 +0100447
448&mcspi1 {
Tony Lindgrend5a2b342013-05-08 16:13:14 -0700449 pinctrl-names = "default";
450 pinctrl-0 = <&mcspi1_pins>;
451
Benoit Coussone7c64db2012-01-20 14:17:00 +0100452 eth@0 {
453 compatible = "ks8851";
454 spi-max-frequency = <24000000>;
455 reg = <0>;
456 interrupt-parent = <&gpio2>;
Florian Vaussard8fea7d52013-05-31 14:32:57 +0200457 interrupts = <2 IRQ_TYPE_LEVEL_LOW>; /* gpio line 34 */
Benoit Coussone7c64db2012-01-20 14:17:00 +0100458 vdd-supply = <&vdd_eth>;
459 };
460};
Rajendra Nayak74981762011-10-04 17:10:27 +0530461
462&mmc1 {
463 vmmc-supply = <&vmmc>;
Arnd Bergmann7f217792012-05-13 00:14:24 -0400464 bus-width = <8>;
Rajendra Nayak74981762011-10-04 17:10:27 +0530465};
466
467&mmc2 {
468 vmmc-supply = <&vaux1>;
Arnd Bergmann7f217792012-05-13 00:14:24 -0400469 bus-width = <8>;
Rajendra Nayak74981762011-10-04 17:10:27 +0530470 ti,non-removable;
471};
472
473&mmc3 {
Roland Stiggefd5c3fd2012-06-21 01:36:03 -0700474 status = "disabled";
Rajendra Nayak74981762011-10-04 17:10:27 +0530475};
476
477&mmc4 {
Roland Stiggefd5c3fd2012-06-21 01:36:03 -0700478 status = "disabled";
Rajendra Nayak74981762011-10-04 17:10:27 +0530479};
480
481&mmc5 {
Tony Lindgren775d2412013-09-13 12:09:57 -0700482 pinctrl-names = "default";
483 pinctrl-0 = <&wl12xx_pins>;
484 vmmc-supply = <&wl12xx_vmmc>;
485 non-removable;
Arnd Bergmann7f217792012-05-13 00:14:24 -0400486 bus-width = <4>;
Tony Lindgren775d2412013-09-13 12:09:57 -0700487 cap-power-off-card;
Eliad Peller99f84ca2015-03-18 18:38:29 +0200488
489 #address-cells = <1>;
490 #size-cells = <0>;
491 wlcore: wlcore@2 {
492 compatible = "ti,wl1281";
493 reg = <2>;
494 interrupt-parent = <&gpio1>;
495 interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; /* gpio 53 */
496 ref-clock-frequency = <26000000>;
497 tcxo-clock-frequency = <26000000>;
498 };
Rajendra Nayak74981762011-10-04 17:10:27 +0530499};
Sourav Poddar61bc3542012-08-14 16:45:37 +0530500
Aneesh V11c27062012-01-20 20:35:26 +0530501&emif1 {
502 cs1-used;
503 device-handle = <&elpida_ECB240ABACN>;
504};
505
506&emif2 {
507 cs1-used;
508 device-handle = <&elpida_ECB240ABACN>;
509};
510
Sourav Poddar61bc3542012-08-14 16:45:37 +0530511&keypad {
512 keypad,num-rows = <8>;
513 keypad,num-columns = <8>;
514 linux,keymap = <0x00000012 /* KEY_E */
515 0x00010013 /* KEY_R */
516 0x00020014 /* KEY_T */
517 0x00030066 /* KEY_HOME */
518 0x0004003f /* KEY_F5 */
519 0x000500f0 /* KEY_UNKNOWN */
520 0x00060017 /* KEY_I */
521 0x0007002a /* KEY_LEFTSHIFT */
522 0x01000020 /* KEY_D*/
523 0x01010021 /* KEY_F */
524 0x01020022 /* KEY_G */
525 0x010300e7 /* KEY_SEND */
526 0x01040040 /* KEY_F6 */
527 0x010500f0 /* KEY_UNKNOWN */
528 0x01060025 /* KEY_K */
529 0x0107001c /* KEY_ENTER */
530 0x0200002d /* KEY_X */
531 0x0201002e /* KEY_C */
532 0x0202002f /* KEY_V */
533 0x0203006b /* KEY_END */
534 0x02040041 /* KEY_F7 */
535 0x020500f0 /* KEY_UNKNOWN */
536 0x02060034 /* KEY_DOT */
537 0x0207003a /* KEY_CAPSLOCK */
538 0x0300002c /* KEY_Z */
539 0x0301004e /* KEY_KPLUS */
540 0x03020030 /* KEY_B */
541 0x0303003b /* KEY_F1 */
542 0x03040042 /* KEY_F8 */
543 0x030500f0 /* KEY_UNKNOWN */
544 0x03060018 /* KEY_O */
545 0x03070039 /* KEY_SPACE */
546 0x04000011 /* KEY_W */
547 0x04010015 /* KEY_Y */
548 0x04020016 /* KEY_U */
549 0x0403003c /* KEY_F2 */
550 0x04040073 /* KEY_VOLUMEUP */
551 0x040500f0 /* KEY_UNKNOWN */
552 0x04060026 /* KEY_L */
553 0x04070069 /* KEY_LEFT */
554 0x0500001f /* KEY_S */
555 0x05010023 /* KEY_H */
556 0x05020024 /* KEY_J */
557 0x0503003d /* KEY_F3 */
558 0x05040043 /* KEY_F9 */
559 0x05050072 /* KEY_VOLUMEDOWN */
560 0x05060032 /* KEY_M */
561 0x0507006a /* KEY_RIGHT */
562 0x06000010 /* KEY_Q */
563 0x0601001e /* KEY_A */
564 0x06020031 /* KEY_N */
565 0x0603009e /* KEY_BACK */
566 0x0604000e /* KEY_BACKSPACE */
567 0x060500f0 /* KEY_UNKNOWN */
568 0x06060019 /* KEY_P */
569 0x06070067 /* KEY_UP */
570 0x07000094 /* KEY_PROG1 */
571 0x07010095 /* KEY_PROG2 */
572 0x070200ca /* KEY_PROG3 */
573 0x070300cb /* KEY_PROG4 */
574 0x0704003e /* KEY_F4 */
575 0x070500f0 /* KEY_UNKNOWN */
576 0x07060160 /* KEY_OK */
577 0x0707006c>; /* KEY_DOWN */
578 linux,input-no-autorepeat;
579};
Tony Lindgren26638c62012-09-10 10:34:52 -0700580
581&uart2 {
Marc Zyngier7136d452015-03-11 15:43:49 +0000582 interrupts-extended = <&wakeupgen GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH
Tony Lindgren31f08202014-05-05 17:27:39 -0700583 &omap4_pmx_core OMAP4_UART2_RX>;
Tony Lindgren26638c62012-09-10 10:34:52 -0700584 pinctrl-names = "default";
585 pinctrl-0 = <&uart2_pins>;
586};
587
588&uart3 {
Marc Zyngier7136d452015-03-11 15:43:49 +0000589 interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
Tony Lindgren31f08202014-05-05 17:27:39 -0700590 &omap4_pmx_core OMAP4_UART3_RX>;
Tony Lindgren26638c62012-09-10 10:34:52 -0700591 pinctrl-names = "default";
592 pinctrl-0 = <&uart3_pins>;
593};
594
595&uart4 {
Marc Zyngier7136d452015-03-11 15:43:49 +0000596 interrupts-extended = <&wakeupgen GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH
Tony Lindgren31f08202014-05-05 17:27:39 -0700597 &omap4_pmx_core OMAP4_UART4_RX>;
Tony Lindgren26638c62012-09-10 10:34:52 -0700598 pinctrl-names = "default";
599 pinctrl-0 = <&uart4_pins>;
600};
Peter Ujfalusi6e659282012-10-04 14:57:23 +0300601
Peter Ujfalusic5d75d52014-01-24 10:19:00 +0200602&mcbsp1 {
603 pinctrl-names = "default";
604 pinctrl-0 = <&mcbsp1_pins>;
605 status = "okay";
606};
607
608&mcbsp2 {
609 pinctrl-names = "default";
610 pinctrl-0 = <&mcbsp2_pins>;
611 status = "okay";
612};
613
Peter Ujfalusic5d75d52014-01-24 10:19:00 +0200614&dmic {
615 pinctrl-names = "default";
616 pinctrl-0 = <&dmic_pins>;
617 status = "okay";
618};
619
620&mcpdm {
621 pinctrl-names = "default";
622 pinctrl-0 = <&mcpdm_pins>;
623 status = "okay";
624};
625
Kishon Vijay Abraham I6ff862f2012-09-19 15:02:06 +0530626&twl_usb_comparator {
627 usb-supply = <&vusb>;
628};
Kishon Vijay Abraham Iad871c12013-03-07 19:05:16 +0530629
630&usb_otg_hs {
631 interface-type = <1>;
632 mode = <3>;
633 power = <50>;
634};
Tomi Valkeinen7c572d52012-08-20 17:07:31 +0300635
636&dss {
637 status = "ok";
638};
639
640&dsi1 {
641 status = "ok";
642 vdd-supply = <&vcxio>;
643
644 port {
645 dsi1_out_ep: endpoint {
646 remote-endpoint = <&lcd0_in>;
647 lanes = <0 1 2 3 4 5>;
648 };
649 };
650
651 lcd0: display {
652 compatible = "tpo,taal", "panel-dsi-cm";
653 label = "lcd0";
654
655 reset-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */
656
657 port {
658 lcd0_in: endpoint {
659 remote-endpoint = <&dsi1_out_ep>;
660 };
661 };
662 };
663};
664
665&dsi2 {
666 status = "ok";
667 vdd-supply = <&vcxio>;
668
669 port {
670 dsi2_out_ep: endpoint {
671 remote-endpoint = <&lcd1_in>;
672 lanes = <0 1 2 3 4 5>;
673 };
674 };
675
676 lcd1: display {
677 compatible = "tpo,taal", "panel-dsi-cm";
678 label = "lcd1";
679
680 reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */
681
682 port {
683 lcd1_in: endpoint {
684 remote-endpoint = <&dsi2_out_ep>;
685 };
686 };
687 };
688};
689
690&hdmi {
691 status = "ok";
692 vdda-supply = <&vdac>;
693
694 port {
695 hdmi_out: endpoint {
696 remote-endpoint = <&tpd12s015_in>;
697 };
698 };
699};