Dong Aisheng | bc3a59c | 2012-03-31 21:26:57 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2012 Freescale Semiconductor, Inc. |
| 3 | * Copyright 2012 Linaro Ltd. |
| 4 | * |
| 5 | * The code contained herein is licensed under the GNU General Public |
| 6 | * License. You may obtain a copy of the GNU General Public License |
| 7 | * Version 2 or later at the following locations: |
| 8 | * |
| 9 | * http://www.opensource.org/licenses/gpl-license.html |
| 10 | * http://www.gnu.org/copyleft/gpl.html |
| 11 | */ |
| 12 | |
| 13 | #include <linux/clk.h> |
| 14 | #include <linux/clkdev.h> |
Shawn Guo | 44ffb78 | 2012-08-06 22:00:45 +0800 | [diff] [blame] | 15 | #include <linux/can/platform/flexcan.h> |
Shawn Guo | 2c7c2c1 | 2012-07-13 14:15:34 +0800 | [diff] [blame] | 16 | #include <linux/delay.h> |
Dong Aisheng | bc3a59c | 2012-03-31 21:26:57 +0800 | [diff] [blame] | 17 | #include <linux/err.h> |
Shawn Guo | 2c7c2c1 | 2012-07-13 14:15:34 +0800 | [diff] [blame] | 18 | #include <linux/gpio.h> |
Dong Aisheng | bc3a59c | 2012-03-31 21:26:57 +0800 | [diff] [blame] | 19 | #include <linux/init.h> |
Shawn Guo | 3143bbb | 2012-07-07 23:12:03 +0800 | [diff] [blame] | 20 | #include <linux/micrel_phy.h> |
Shawn Guo | ab2815c | 2012-06-25 21:21:46 +0800 | [diff] [blame] | 21 | #include <linux/mxsfb.h> |
Dong Aisheng | bc3a59c | 2012-03-31 21:26:57 +0800 | [diff] [blame] | 22 | #include <linux/of_platform.h> |
Shawn Guo | 3143bbb | 2012-07-07 23:12:03 +0800 | [diff] [blame] | 23 | #include <linux/phy.h> |
Shawn Guo | 2c7c2c1 | 2012-07-13 14:15:34 +0800 | [diff] [blame] | 24 | #include <linux/pinctrl/consumer.h> |
Dong Aisheng | bc3a59c | 2012-03-31 21:26:57 +0800 | [diff] [blame] | 25 | #include <asm/mach/arch.h> |
| 26 | #include <asm/mach/time.h> |
| 27 | #include <mach/common.h> |
Dong Aisheng | e317317 | 2012-08-01 11:20:16 +0800 | [diff] [blame] | 28 | #include <mach/digctl.h> |
Shawn Guo | 2c7c2c1 | 2012-07-13 14:15:34 +0800 | [diff] [blame] | 29 | #include <mach/mxs.h> |
Dong Aisheng | bc3a59c | 2012-03-31 21:26:57 +0800 | [diff] [blame] | 30 | |
Shawn Guo | ab2815c | 2012-06-25 21:21:46 +0800 | [diff] [blame] | 31 | static struct fb_videomode mx23evk_video_modes[] = { |
| 32 | { |
| 33 | .name = "Samsung-LMS430HF02", |
| 34 | .refresh = 60, |
| 35 | .xres = 480, |
| 36 | .yres = 272, |
| 37 | .pixclock = 108096, /* picosecond (9.2 MHz) */ |
| 38 | .left_margin = 15, |
| 39 | .right_margin = 8, |
| 40 | .upper_margin = 12, |
| 41 | .lower_margin = 4, |
| 42 | .hsync_len = 1, |
| 43 | .vsync_len = 1, |
| 44 | .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT | |
| 45 | FB_SYNC_DOTCLK_FAILING_ACT, |
| 46 | }, |
| 47 | }; |
| 48 | |
| 49 | static struct fb_videomode mx28evk_video_modes[] = { |
| 50 | { |
| 51 | .name = "Seiko-43WVF1G", |
| 52 | .refresh = 60, |
| 53 | .xres = 800, |
| 54 | .yres = 480, |
| 55 | .pixclock = 29851, /* picosecond (33.5 MHz) */ |
| 56 | .left_margin = 89, |
| 57 | .right_margin = 164, |
| 58 | .upper_margin = 23, |
| 59 | .lower_margin = 10, |
| 60 | .hsync_len = 10, |
| 61 | .vsync_len = 10, |
| 62 | .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT | |
| 63 | FB_SYNC_DOTCLK_FAILING_ACT, |
| 64 | }, |
| 65 | }; |
| 66 | |
Marek Vasut | 8fa62e1 | 2012-07-07 21:21:38 +0800 | [diff] [blame] | 67 | static struct fb_videomode m28evk_video_modes[] = { |
| 68 | { |
| 69 | .name = "Ampire AM-800480R2TMQW-T01H", |
| 70 | .refresh = 60, |
| 71 | .xres = 800, |
| 72 | .yres = 480, |
| 73 | .pixclock = 30066, /* picosecond (33.26 MHz) */ |
| 74 | .left_margin = 0, |
| 75 | .right_margin = 256, |
| 76 | .upper_margin = 0, |
| 77 | .lower_margin = 45, |
| 78 | .hsync_len = 1, |
| 79 | .vsync_len = 1, |
| 80 | .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT, |
| 81 | }, |
| 82 | }; |
| 83 | |
Lauri Hintsala | d8bb823 | 2012-07-10 10:08:08 +0300 | [diff] [blame] | 84 | static struct fb_videomode apx4devkit_video_modes[] = { |
| 85 | { |
| 86 | .name = "HannStar PJ70112A", |
| 87 | .refresh = 60, |
| 88 | .xres = 800, |
| 89 | .yres = 480, |
| 90 | .pixclock = 33333, /* picosecond (30.00 MHz) */ |
| 91 | .left_margin = 88, |
| 92 | .right_margin = 40, |
| 93 | .upper_margin = 32, |
| 94 | .lower_margin = 13, |
| 95 | .hsync_len = 48, |
| 96 | .vsync_len = 3, |
| 97 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT | |
| 98 | FB_SYNC_DATA_ENABLE_HIGH_ACT | |
| 99 | FB_SYNC_DOTCLK_FAILING_ACT, |
| 100 | }, |
| 101 | }; |
| 102 | |
Shawn Guo | ab2815c | 2012-06-25 21:21:46 +0800 | [diff] [blame] | 103 | static struct mxsfb_platform_data mxsfb_pdata __initdata; |
| 104 | |
Shawn Guo | 44ffb78 | 2012-08-06 22:00:45 +0800 | [diff] [blame] | 105 | /* |
| 106 | * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers |
| 107 | */ |
| 108 | #define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13) |
| 109 | |
| 110 | static int flexcan0_en, flexcan1_en; |
| 111 | |
| 112 | static void mx28evk_flexcan_switch(void) |
| 113 | { |
| 114 | if (flexcan0_en || flexcan1_en) |
| 115 | gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1); |
| 116 | else |
| 117 | gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0); |
| 118 | } |
| 119 | |
| 120 | static void mx28evk_flexcan0_switch(int enable) |
| 121 | { |
| 122 | flexcan0_en = enable; |
| 123 | mx28evk_flexcan_switch(); |
| 124 | } |
| 125 | |
| 126 | static void mx28evk_flexcan1_switch(int enable) |
| 127 | { |
| 128 | flexcan1_en = enable; |
| 129 | mx28evk_flexcan_switch(); |
| 130 | } |
| 131 | |
| 132 | static struct flexcan_platform_data flexcan_pdata[2]; |
| 133 | |
Shawn Guo | ab2815c | 2012-06-25 21:21:46 +0800 | [diff] [blame] | 134 | static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = { |
| 135 | OF_DEV_AUXDATA("fsl,imx23-lcdif", 0x80030000, NULL, &mxsfb_pdata), |
| 136 | OF_DEV_AUXDATA("fsl,imx28-lcdif", 0x80030000, NULL, &mxsfb_pdata), |
Shawn Guo | 44ffb78 | 2012-08-06 22:00:45 +0800 | [diff] [blame] | 137 | OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80032000, NULL, &flexcan_pdata[0]), |
| 138 | OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80034000, NULL, &flexcan_pdata[1]), |
Shawn Guo | ab2815c | 2012-06-25 21:21:46 +0800 | [diff] [blame] | 139 | { /* sentinel */ } |
| 140 | }; |
| 141 | |
Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 142 | static void __init imx23_timer_init(void) |
| 143 | { |
| 144 | mx23_clocks_init(); |
| 145 | } |
| 146 | |
| 147 | static struct sys_timer imx23_timer = { |
| 148 | .init = imx23_timer_init, |
| 149 | }; |
| 150 | |
Dong Aisheng | bc3a59c | 2012-03-31 21:26:57 +0800 | [diff] [blame] | 151 | static void __init imx28_timer_init(void) |
| 152 | { |
| 153 | mx28_clocks_init(); |
| 154 | } |
| 155 | |
| 156 | static struct sys_timer imx28_timer = { |
| 157 | .init = imx28_timer_init, |
| 158 | }; |
| 159 | |
Shawn Guo | 5653acc | 2012-06-19 22:38:14 +0800 | [diff] [blame] | 160 | enum mac_oui { |
| 161 | OUI_FSL, |
| 162 | OUI_DENX, |
Maxime Ripard | 8eec4b3 | 2012-10-07 10:36:28 +0800 | [diff] [blame^] | 163 | OUI_CRYSTALFONTZ, |
Shawn Guo | 5653acc | 2012-06-19 22:38:14 +0800 | [diff] [blame] | 164 | }; |
| 165 | |
| 166 | static void __init update_fec_mac_prop(enum mac_oui oui) |
| 167 | { |
| 168 | struct device_node *np, *from = NULL; |
Shawn Guo | fa7c865 | 2012-07-13 14:13:55 +0800 | [diff] [blame] | 169 | struct property *newmac; |
Shawn Guo | 5653acc | 2012-06-19 22:38:14 +0800 | [diff] [blame] | 170 | const u32 *ocotp = mxs_get_ocotp(); |
| 171 | u8 *macaddr; |
| 172 | u32 val; |
| 173 | int i; |
| 174 | |
| 175 | for (i = 0; i < 2; i++) { |
| 176 | np = of_find_compatible_node(from, NULL, "fsl,imx28-fec"); |
| 177 | if (!np) |
| 178 | return; |
| 179 | from = np; |
| 180 | |
| 181 | newmac = kzalloc(sizeof(*newmac) + 6, GFP_KERNEL); |
| 182 | if (!newmac) |
| 183 | return; |
| 184 | newmac->value = newmac + 1; |
| 185 | newmac->length = 6; |
| 186 | |
| 187 | newmac->name = kstrdup("local-mac-address", GFP_KERNEL); |
| 188 | if (!newmac->name) { |
| 189 | kfree(newmac); |
| 190 | return; |
| 191 | } |
| 192 | |
| 193 | /* |
| 194 | * OCOTP only stores the last 4 octets for each mac address, |
| 195 | * so hard-code OUI here. |
| 196 | */ |
| 197 | macaddr = newmac->value; |
| 198 | switch (oui) { |
| 199 | case OUI_FSL: |
| 200 | macaddr[0] = 0x00; |
| 201 | macaddr[1] = 0x04; |
| 202 | macaddr[2] = 0x9f; |
| 203 | break; |
| 204 | case OUI_DENX: |
| 205 | macaddr[0] = 0xc0; |
| 206 | macaddr[1] = 0xe5; |
| 207 | macaddr[2] = 0x4e; |
| 208 | break; |
Maxime Ripard | 8eec4b3 | 2012-10-07 10:36:28 +0800 | [diff] [blame^] | 209 | case OUI_CRYSTALFONTZ: |
| 210 | macaddr[0] = 0x58; |
| 211 | macaddr[1] = 0xb9; |
| 212 | macaddr[2] = 0xe1; |
| 213 | break; |
Shawn Guo | 5653acc | 2012-06-19 22:38:14 +0800 | [diff] [blame] | 214 | } |
| 215 | val = ocotp[i]; |
| 216 | macaddr[3] = (val >> 16) & 0xff; |
| 217 | macaddr[4] = (val >> 8) & 0xff; |
| 218 | macaddr[5] = (val >> 0) & 0xff; |
| 219 | |
Shawn Guo | fa7c865 | 2012-07-13 14:13:55 +0800 | [diff] [blame] | 220 | prom_update_property(np, newmac); |
Shawn Guo | 5653acc | 2012-06-19 22:38:14 +0800 | [diff] [blame] | 221 | } |
| 222 | } |
| 223 | |
Shawn Guo | ab2815c | 2012-06-25 21:21:46 +0800 | [diff] [blame] | 224 | static void __init imx23_evk_init(void) |
| 225 | { |
| 226 | mxsfb_pdata.mode_list = mx23evk_video_modes; |
| 227 | mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes); |
| 228 | mxsfb_pdata.default_bpp = 32; |
| 229 | mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; |
| 230 | } |
| 231 | |
Marek Vasut | 8fa62e1 | 2012-07-07 21:21:38 +0800 | [diff] [blame] | 232 | static inline void enable_clk_enet_out(void) |
Dong Aisheng | bc3a59c | 2012-03-31 21:26:57 +0800 | [diff] [blame] | 233 | { |
Marek Vasut | 8fa62e1 | 2012-07-07 21:21:38 +0800 | [diff] [blame] | 234 | struct clk *clk = clk_get_sys("enet_out", NULL); |
Dong Aisheng | bc3a59c | 2012-03-31 21:26:57 +0800 | [diff] [blame] | 235 | |
Dong Aisheng | bc3a59c | 2012-03-31 21:26:57 +0800 | [diff] [blame] | 236 | if (!IS_ERR(clk)) |
| 237 | clk_prepare_enable(clk); |
Marek Vasut | 8fa62e1 | 2012-07-07 21:21:38 +0800 | [diff] [blame] | 238 | } |
Shawn Guo | 5653acc | 2012-06-19 22:38:14 +0800 | [diff] [blame] | 239 | |
Marek Vasut | 8fa62e1 | 2012-07-07 21:21:38 +0800 | [diff] [blame] | 240 | static void __init imx28_evk_init(void) |
| 241 | { |
| 242 | enable_clk_enet_out(); |
Shawn Guo | 5653acc | 2012-06-19 22:38:14 +0800 | [diff] [blame] | 243 | update_fec_mac_prop(OUI_FSL); |
Shawn Guo | ab2815c | 2012-06-25 21:21:46 +0800 | [diff] [blame] | 244 | |
| 245 | mxsfb_pdata.mode_list = mx28evk_video_modes; |
| 246 | mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes); |
| 247 | mxsfb_pdata.default_bpp = 32; |
| 248 | mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; |
Dong Aisheng | e317317 | 2012-08-01 11:20:16 +0800 | [diff] [blame] | 249 | |
| 250 | mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0); |
Dong Aisheng | bc3a59c | 2012-03-31 21:26:57 +0800 | [diff] [blame] | 251 | } |
| 252 | |
Shawn Guo | 44ffb78 | 2012-08-06 22:00:45 +0800 | [diff] [blame] | 253 | static void __init imx28_evk_post_init(void) |
| 254 | { |
| 255 | if (!gpio_request_one(MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT, |
| 256 | "flexcan-switch")) { |
| 257 | flexcan_pdata[0].transceiver_switch = mx28evk_flexcan0_switch; |
| 258 | flexcan_pdata[1].transceiver_switch = mx28evk_flexcan1_switch; |
| 259 | } |
Dong Aisheng | bc3a59c | 2012-03-31 21:26:57 +0800 | [diff] [blame] | 260 | } |
| 261 | |
Marek Vasut | 8fa62e1 | 2012-07-07 21:21:38 +0800 | [diff] [blame] | 262 | static void __init m28evk_init(void) |
| 263 | { |
Marek Vasut | 8fa62e1 | 2012-07-07 21:21:38 +0800 | [diff] [blame] | 264 | mxsfb_pdata.mode_list = m28evk_video_modes; |
| 265 | mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes); |
| 266 | mxsfb_pdata.default_bpp = 16; |
| 267 | mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT; |
| 268 | } |
| 269 | |
Shawn Guo | 3143bbb | 2012-07-07 23:12:03 +0800 | [diff] [blame] | 270 | static int apx4devkit_phy_fixup(struct phy_device *phy) |
| 271 | { |
| 272 | phy->dev_flags |= MICREL_PHY_50MHZ_CLK; |
| 273 | return 0; |
| 274 | } |
| 275 | |
| 276 | static void __init apx4devkit_init(void) |
| 277 | { |
| 278 | enable_clk_enet_out(); |
| 279 | |
| 280 | if (IS_BUILTIN(CONFIG_PHYLIB)) |
Marek Vasut | 510d573 | 2012-09-23 16:58:50 +0000 | [diff] [blame] | 281 | phy_register_fixup_for_uid(PHY_ID_KSZ8051, MICREL_PHY_ID_MASK, |
Shawn Guo | 3143bbb | 2012-07-07 23:12:03 +0800 | [diff] [blame] | 282 | apx4devkit_phy_fixup); |
Lauri Hintsala | d8bb823 | 2012-07-10 10:08:08 +0300 | [diff] [blame] | 283 | |
| 284 | mxsfb_pdata.mode_list = apx4devkit_video_modes; |
| 285 | mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes); |
| 286 | mxsfb_pdata.default_bpp = 32; |
| 287 | mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; |
Shawn Guo | 3143bbb | 2012-07-07 23:12:03 +0800 | [diff] [blame] | 288 | } |
| 289 | |
Shawn Guo | 2c7c2c1 | 2012-07-13 14:15:34 +0800 | [diff] [blame] | 290 | #define ENET0_MDC__GPIO_4_0 MXS_GPIO_NR(4, 0) |
| 291 | #define ENET0_MDIO__GPIO_4_1 MXS_GPIO_NR(4, 1) |
| 292 | #define ENET0_RX_EN__GPIO_4_2 MXS_GPIO_NR(4, 2) |
| 293 | #define ENET0_RXD0__GPIO_4_3 MXS_GPIO_NR(4, 3) |
| 294 | #define ENET0_RXD1__GPIO_4_4 MXS_GPIO_NR(4, 4) |
| 295 | #define ENET0_TX_EN__GPIO_4_6 MXS_GPIO_NR(4, 6) |
| 296 | #define ENET0_TXD0__GPIO_4_7 MXS_GPIO_NR(4, 7) |
| 297 | #define ENET0_TXD1__GPIO_4_8 MXS_GPIO_NR(4, 8) |
| 298 | #define ENET_CLK__GPIO_4_16 MXS_GPIO_NR(4, 16) |
| 299 | |
| 300 | #define TX28_FEC_PHY_POWER MXS_GPIO_NR(3, 29) |
| 301 | #define TX28_FEC_PHY_RESET MXS_GPIO_NR(4, 13) |
| 302 | #define TX28_FEC_nINT MXS_GPIO_NR(4, 5) |
| 303 | |
| 304 | static const struct gpio tx28_gpios[] __initconst = { |
| 305 | { ENET0_MDC__GPIO_4_0, GPIOF_OUT_INIT_LOW, "GPIO_4_0" }, |
| 306 | { ENET0_MDIO__GPIO_4_1, GPIOF_OUT_INIT_LOW, "GPIO_4_1" }, |
| 307 | { ENET0_RX_EN__GPIO_4_2, GPIOF_OUT_INIT_LOW, "GPIO_4_2" }, |
| 308 | { ENET0_RXD0__GPIO_4_3, GPIOF_OUT_INIT_LOW, "GPIO_4_3" }, |
| 309 | { ENET0_RXD1__GPIO_4_4, GPIOF_OUT_INIT_LOW, "GPIO_4_4" }, |
| 310 | { ENET0_TX_EN__GPIO_4_6, GPIOF_OUT_INIT_LOW, "GPIO_4_6" }, |
| 311 | { ENET0_TXD0__GPIO_4_7, GPIOF_OUT_INIT_LOW, "GPIO_4_7" }, |
| 312 | { ENET0_TXD1__GPIO_4_8, GPIOF_OUT_INIT_LOW, "GPIO_4_8" }, |
| 313 | { ENET_CLK__GPIO_4_16, GPIOF_OUT_INIT_LOW, "GPIO_4_16" }, |
| 314 | { TX28_FEC_PHY_POWER, GPIOF_OUT_INIT_LOW, "fec-phy-power" }, |
| 315 | { TX28_FEC_PHY_RESET, GPIOF_OUT_INIT_LOW, "fec-phy-reset" }, |
| 316 | { TX28_FEC_nINT, GPIOF_DIR_IN, "fec-int" }, |
| 317 | }; |
| 318 | |
| 319 | static void __init tx28_post_init(void) |
| 320 | { |
| 321 | struct device_node *np; |
| 322 | struct platform_device *pdev; |
| 323 | struct pinctrl *pctl; |
| 324 | int ret; |
| 325 | |
| 326 | enable_clk_enet_out(); |
| 327 | |
| 328 | np = of_find_compatible_node(NULL, NULL, "fsl,imx28-fec"); |
| 329 | pdev = of_find_device_by_node(np); |
| 330 | if (!pdev) { |
| 331 | pr_err("%s: failed to find fec device\n", __func__); |
| 332 | return; |
| 333 | } |
| 334 | |
| 335 | pctl = pinctrl_get_select(&pdev->dev, "gpio_mode"); |
| 336 | if (IS_ERR(pctl)) { |
| 337 | pr_err("%s: failed to get pinctrl state\n", __func__); |
| 338 | return; |
| 339 | } |
| 340 | |
| 341 | ret = gpio_request_array(tx28_gpios, ARRAY_SIZE(tx28_gpios)); |
| 342 | if (ret) { |
| 343 | pr_err("%s: failed to request gpios: %d\n", __func__, ret); |
| 344 | return; |
| 345 | } |
| 346 | |
| 347 | /* Power up fec phy */ |
| 348 | gpio_set_value(TX28_FEC_PHY_POWER, 1); |
| 349 | msleep(26); /* 25ms according to data sheet */ |
| 350 | |
| 351 | /* Mode strap pins */ |
| 352 | gpio_set_value(ENET0_RX_EN__GPIO_4_2, 1); |
| 353 | gpio_set_value(ENET0_RXD0__GPIO_4_3, 1); |
| 354 | gpio_set_value(ENET0_RXD1__GPIO_4_4, 1); |
| 355 | |
| 356 | udelay(100); /* minimum assertion time for nRST */ |
| 357 | |
| 358 | /* Deasserting FEC PHY RESET */ |
| 359 | gpio_set_value(TX28_FEC_PHY_RESET, 1); |
| 360 | |
| 361 | pinctrl_put(pctl); |
| 362 | } |
| 363 | |
Maxime Ripard | 8eec4b3 | 2012-10-07 10:36:28 +0800 | [diff] [blame^] | 364 | static void __init cfa10049_init(void) |
| 365 | { |
| 366 | enable_clk_enet_out(); |
| 367 | update_fec_mac_prop(OUI_CRYSTALFONTZ); |
| 368 | } |
| 369 | |
Dong Aisheng | bc3a59c | 2012-03-31 21:26:57 +0800 | [diff] [blame] | 370 | static void __init mxs_machine_init(void) |
| 371 | { |
| 372 | if (of_machine_is_compatible("fsl,imx28-evk")) |
| 373 | imx28_evk_init(); |
Shawn Guo | ab2815c | 2012-06-25 21:21:46 +0800 | [diff] [blame] | 374 | else if (of_machine_is_compatible("fsl,imx23-evk")) |
| 375 | imx23_evk_init(); |
Marek Vasut | 8fa62e1 | 2012-07-07 21:21:38 +0800 | [diff] [blame] | 376 | else if (of_machine_is_compatible("denx,m28evk")) |
| 377 | m28evk_init(); |
Shawn Guo | 3143bbb | 2012-07-07 23:12:03 +0800 | [diff] [blame] | 378 | else if (of_machine_is_compatible("bluegiga,apx4devkit")) |
| 379 | apx4devkit_init(); |
Maxime Ripard | 8eec4b3 | 2012-10-07 10:36:28 +0800 | [diff] [blame^] | 380 | else if (of_machine_is_compatible("crystalfontz,cfa10049")) |
| 381 | cfa10049_init(); |
Dong Aisheng | bc3a59c | 2012-03-31 21:26:57 +0800 | [diff] [blame] | 382 | |
| 383 | of_platform_populate(NULL, of_default_bus_match_table, |
Shawn Guo | ab2815c | 2012-06-25 21:21:46 +0800 | [diff] [blame] | 384 | mxs_auxdata_lookup, NULL); |
Shawn Guo | 2c7c2c1 | 2012-07-13 14:15:34 +0800 | [diff] [blame] | 385 | |
| 386 | if (of_machine_is_compatible("karo,tx28")) |
| 387 | tx28_post_init(); |
Shawn Guo | 44ffb78 | 2012-08-06 22:00:45 +0800 | [diff] [blame] | 388 | |
| 389 | if (of_machine_is_compatible("fsl,imx28-evk")) |
| 390 | imx28_evk_post_init(); |
Dong Aisheng | bc3a59c | 2012-03-31 21:26:57 +0800 | [diff] [blame] | 391 | } |
| 392 | |
Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 393 | static const char *imx23_dt_compat[] __initdata = { |
Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 394 | "fsl,imx23", |
| 395 | NULL, |
| 396 | }; |
| 397 | |
Dong Aisheng | bc3a59c | 2012-03-31 21:26:57 +0800 | [diff] [blame] | 398 | static const char *imx28_dt_compat[] __initdata = { |
Dong Aisheng | bc3a59c | 2012-03-31 21:26:57 +0800 | [diff] [blame] | 399 | "fsl,imx28", |
| 400 | NULL, |
| 401 | }; |
| 402 | |
Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 403 | DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)") |
| 404 | .map_io = mx23_map_io, |
Shawn Guo | 83a84ef | 2012-08-20 21:34:56 +0800 | [diff] [blame] | 405 | .init_irq = icoll_init_irq, |
Shawn Guo | 4e0a1b8 | 2012-08-20 10:14:56 +0800 | [diff] [blame] | 406 | .handle_irq = icoll_handle_irq, |
Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 407 | .timer = &imx23_timer, |
| 408 | .init_machine = mxs_machine_init, |
| 409 | .dt_compat = imx23_dt_compat, |
| 410 | .restart = mxs_restart, |
| 411 | MACHINE_END |
| 412 | |
Dong Aisheng | bc3a59c | 2012-03-31 21:26:57 +0800 | [diff] [blame] | 413 | DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)") |
| 414 | .map_io = mx28_map_io, |
Shawn Guo | 83a84ef | 2012-08-20 21:34:56 +0800 | [diff] [blame] | 415 | .init_irq = icoll_init_irq, |
Shawn Guo | 4e0a1b8 | 2012-08-20 10:14:56 +0800 | [diff] [blame] | 416 | .handle_irq = icoll_handle_irq, |
Dong Aisheng | bc3a59c | 2012-03-31 21:26:57 +0800 | [diff] [blame] | 417 | .timer = &imx28_timer, |
| 418 | .init_machine = mxs_machine_init, |
| 419 | .dt_compat = imx28_dt_compat, |
| 420 | .restart = mxs_restart, |
| 421 | MACHINE_END |