Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com> |
| 3 | * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License version 2 as |
| 7 | * published by the Free Software Foundation. |
| 8 | * |
| 9 | * Fixed rate clock implementation |
| 10 | */ |
| 11 | |
| 12 | #include <linux/clk-provider.h> |
| 13 | #include <linux/module.h> |
| 14 | #include <linux/slab.h> |
| 15 | #include <linux/io.h> |
| 16 | #include <linux/err.h> |
Grant Likely | 015ba40 | 2012-04-07 21:39:39 -0500 | [diff] [blame] | 17 | #include <linux/of.h> |
Ricardo Ribalda Delgado | 435779f | 2016-07-05 18:23:34 +0200 | [diff] [blame] | 18 | #include <linux/platform_device.h> |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 19 | |
| 20 | /* |
| 21 | * DOC: basic fixed-rate clock that cannot gate |
| 22 | * |
| 23 | * Traits of this clock: |
| 24 | * prepare - clk_(un)prepare only ensures parents are prepared |
| 25 | * enable - clk_enable only ensures parents are enabled |
| 26 | * rate - rate is always a fixed value. No clk_set_rate support |
| 27 | * parent - fixed parent. No clk_set_parent support |
| 28 | */ |
| 29 | |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 30 | static unsigned long clk_fixed_rate_recalc_rate(struct clk_hw *hw, |
| 31 | unsigned long parent_rate) |
| 32 | { |
| 33 | return to_clk_fixed_rate(hw)->fixed_rate; |
| 34 | } |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 35 | |
Boris BREZILLON | 0903ea6 | 2013-12-21 10:34:48 +0100 | [diff] [blame] | 36 | static unsigned long clk_fixed_rate_recalc_accuracy(struct clk_hw *hw, |
| 37 | unsigned long parent_accuracy) |
| 38 | { |
| 39 | return to_clk_fixed_rate(hw)->fixed_accuracy; |
| 40 | } |
| 41 | |
Shawn Guo | 822c250 | 2012-03-27 15:23:22 +0800 | [diff] [blame] | 42 | const struct clk_ops clk_fixed_rate_ops = { |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 43 | .recalc_rate = clk_fixed_rate_recalc_rate, |
Boris BREZILLON | 0903ea6 | 2013-12-21 10:34:48 +0100 | [diff] [blame] | 44 | .recalc_accuracy = clk_fixed_rate_recalc_accuracy, |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 45 | }; |
| 46 | EXPORT_SYMBOL_GPL(clk_fixed_rate_ops); |
| 47 | |
Mike Turquette | 27d5459 | 2012-03-26 17:51:03 -0700 | [diff] [blame] | 48 | /** |
Stephen Boyd | 26ef56b | 2016-02-07 00:34:13 -0800 | [diff] [blame] | 49 | * clk_hw_register_fixed_rate_with_accuracy - register fixed-rate clock with |
| 50 | * the clock framework |
Mike Turquette | 27d5459 | 2012-03-26 17:51:03 -0700 | [diff] [blame] | 51 | * @dev: device that is registering this clock |
| 52 | * @name: name of this clock |
| 53 | * @parent_name: name of clock's parent |
| 54 | * @flags: framework-specific flags |
| 55 | * @fixed_rate: non-adjustable clock rate |
Boris BREZILLON | 0903ea6 | 2013-12-21 10:34:48 +0100 | [diff] [blame] | 56 | * @fixed_accuracy: non-adjustable clock rate |
Mike Turquette | 27d5459 | 2012-03-26 17:51:03 -0700 | [diff] [blame] | 57 | */ |
Stephen Boyd | 26ef56b | 2016-02-07 00:34:13 -0800 | [diff] [blame] | 58 | struct clk_hw *clk_hw_register_fixed_rate_with_accuracy(struct device *dev, |
Boris BREZILLON | 0903ea6 | 2013-12-21 10:34:48 +0100 | [diff] [blame] | 59 | const char *name, const char *parent_name, unsigned long flags, |
| 60 | unsigned long fixed_rate, unsigned long fixed_accuracy) |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 61 | { |
| 62 | struct clk_fixed_rate *fixed; |
Stephen Boyd | 26ef56b | 2016-02-07 00:34:13 -0800 | [diff] [blame] | 63 | struct clk_hw *hw; |
Saravana Kannan | 0197b3e | 2012-04-25 22:58:56 -0700 | [diff] [blame] | 64 | struct clk_init_data init; |
Stephen Boyd | 26ef56b | 2016-02-07 00:34:13 -0800 | [diff] [blame] | 65 | int ret; |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 66 | |
Mike Turquette | 27d5459 | 2012-03-26 17:51:03 -0700 | [diff] [blame] | 67 | /* allocate fixed-rate clock */ |
Stephen Boyd | d122db7 | 2015-05-14 16:47:10 -0700 | [diff] [blame] | 68 | fixed = kzalloc(sizeof(*fixed), GFP_KERNEL); |
| 69 | if (!fixed) |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 70 | return ERR_PTR(-ENOMEM); |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 71 | |
Saravana Kannan | 0197b3e | 2012-04-25 22:58:56 -0700 | [diff] [blame] | 72 | init.name = name; |
| 73 | init.ops = &clk_fixed_rate_ops; |
Rajendra Nayak | f7d8caa | 2012-06-01 14:02:47 +0530 | [diff] [blame] | 74 | init.flags = flags | CLK_IS_BASIC; |
Saravana Kannan | 0197b3e | 2012-04-25 22:58:56 -0700 | [diff] [blame] | 75 | init.parent_names = (parent_name ? &parent_name: NULL); |
| 76 | init.num_parents = (parent_name ? 1 : 0); |
| 77 | |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 78 | /* struct clk_fixed_rate assignments */ |
| 79 | fixed->fixed_rate = fixed_rate; |
Boris BREZILLON | 0903ea6 | 2013-12-21 10:34:48 +0100 | [diff] [blame] | 80 | fixed->fixed_accuracy = fixed_accuracy; |
Saravana Kannan | 0197b3e | 2012-04-25 22:58:56 -0700 | [diff] [blame] | 81 | fixed->hw.init = &init; |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 82 | |
Mike Turquette | 27d5459 | 2012-03-26 17:51:03 -0700 | [diff] [blame] | 83 | /* register the clock */ |
Stephen Boyd | 26ef56b | 2016-02-07 00:34:13 -0800 | [diff] [blame] | 84 | hw = &fixed->hw; |
| 85 | ret = clk_hw_register(dev, hw); |
| 86 | if (ret) { |
Mike Turquette | 27d5459 | 2012-03-26 17:51:03 -0700 | [diff] [blame] | 87 | kfree(fixed); |
Stephen Boyd | 26ef56b | 2016-02-07 00:34:13 -0800 | [diff] [blame] | 88 | hw = ERR_PTR(ret); |
| 89 | } |
Mike Turquette | 27d5459 | 2012-03-26 17:51:03 -0700 | [diff] [blame] | 90 | |
Stephen Boyd | 26ef56b | 2016-02-07 00:34:13 -0800 | [diff] [blame] | 91 | return hw; |
| 92 | } |
| 93 | EXPORT_SYMBOL_GPL(clk_hw_register_fixed_rate_with_accuracy); |
| 94 | |
| 95 | struct clk *clk_register_fixed_rate_with_accuracy(struct device *dev, |
| 96 | const char *name, const char *parent_name, unsigned long flags, |
| 97 | unsigned long fixed_rate, unsigned long fixed_accuracy) |
| 98 | { |
| 99 | struct clk_hw *hw; |
| 100 | |
| 101 | hw = clk_hw_register_fixed_rate_with_accuracy(dev, name, parent_name, |
| 102 | flags, fixed_rate, fixed_accuracy); |
| 103 | if (IS_ERR(hw)) |
| 104 | return ERR_CAST(hw); |
| 105 | return hw->clk; |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 106 | } |
Boris BREZILLON | 0903ea6 | 2013-12-21 10:34:48 +0100 | [diff] [blame] | 107 | EXPORT_SYMBOL_GPL(clk_register_fixed_rate_with_accuracy); |
| 108 | |
| 109 | /** |
Stephen Boyd | 26ef56b | 2016-02-07 00:34:13 -0800 | [diff] [blame] | 110 | * clk_hw_register_fixed_rate - register fixed-rate clock with the clock |
| 111 | * framework |
Boris BREZILLON | 0903ea6 | 2013-12-21 10:34:48 +0100 | [diff] [blame] | 112 | * @dev: device that is registering this clock |
| 113 | * @name: name of this clock |
| 114 | * @parent_name: name of clock's parent |
| 115 | * @flags: framework-specific flags |
| 116 | * @fixed_rate: non-adjustable clock rate |
| 117 | */ |
Stephen Boyd | 26ef56b | 2016-02-07 00:34:13 -0800 | [diff] [blame] | 118 | struct clk_hw *clk_hw_register_fixed_rate(struct device *dev, const char *name, |
| 119 | const char *parent_name, unsigned long flags, |
| 120 | unsigned long fixed_rate) |
| 121 | { |
| 122 | return clk_hw_register_fixed_rate_with_accuracy(dev, name, parent_name, |
| 123 | flags, fixed_rate, 0); |
| 124 | } |
| 125 | EXPORT_SYMBOL_GPL(clk_hw_register_fixed_rate); |
| 126 | |
Boris BREZILLON | 0903ea6 | 2013-12-21 10:34:48 +0100 | [diff] [blame] | 127 | struct clk *clk_register_fixed_rate(struct device *dev, const char *name, |
| 128 | const char *parent_name, unsigned long flags, |
| 129 | unsigned long fixed_rate) |
| 130 | { |
| 131 | return clk_register_fixed_rate_with_accuracy(dev, name, parent_name, |
| 132 | flags, fixed_rate, 0); |
| 133 | } |
Stephen Boyd | 389ae05 | 2013-07-24 17:43:29 -0700 | [diff] [blame] | 134 | EXPORT_SYMBOL_GPL(clk_register_fixed_rate); |
Grant Likely | 015ba40 | 2012-04-07 21:39:39 -0500 | [diff] [blame] | 135 | |
Masahiro Yamada | 0b225e4 | 2016-01-06 13:25:10 +0900 | [diff] [blame] | 136 | void clk_unregister_fixed_rate(struct clk *clk) |
| 137 | { |
| 138 | struct clk_hw *hw; |
| 139 | |
| 140 | hw = __clk_get_hw(clk); |
| 141 | if (!hw) |
| 142 | return; |
| 143 | |
| 144 | clk_unregister(clk); |
| 145 | kfree(to_clk_fixed_rate(hw)); |
| 146 | } |
| 147 | EXPORT_SYMBOL_GPL(clk_unregister_fixed_rate); |
| 148 | |
Masahiro Yamada | 5244563 | 2016-05-22 14:33:35 +0900 | [diff] [blame] | 149 | void clk_hw_unregister_fixed_rate(struct clk_hw *hw) |
| 150 | { |
| 151 | struct clk_fixed_rate *fixed; |
| 152 | |
| 153 | fixed = to_clk_fixed_rate(hw); |
| 154 | |
| 155 | clk_hw_unregister(hw); |
| 156 | kfree(fixed); |
| 157 | } |
| 158 | EXPORT_SYMBOL_GPL(clk_hw_unregister_fixed_rate); |
| 159 | |
Grant Likely | 015ba40 | 2012-04-07 21:39:39 -0500 | [diff] [blame] | 160 | #ifdef CONFIG_OF |
Ricardo Ribalda Delgado | 435779f | 2016-07-05 18:23:34 +0200 | [diff] [blame] | 161 | static struct clk *_of_fixed_clk_setup(struct device_node *node) |
Grant Likely | 015ba40 | 2012-04-07 21:39:39 -0500 | [diff] [blame] | 162 | { |
| 163 | struct clk *clk; |
| 164 | const char *clk_name = node->name; |
| 165 | u32 rate; |
Boris BREZILLON | 0903ea6 | 2013-12-21 10:34:48 +0100 | [diff] [blame] | 166 | u32 accuracy = 0; |
Ricardo Ribalda Delgado | 435779f | 2016-07-05 18:23:34 +0200 | [diff] [blame] | 167 | int ret; |
Grant Likely | 015ba40 | 2012-04-07 21:39:39 -0500 | [diff] [blame] | 168 | |
| 169 | if (of_property_read_u32(node, "clock-frequency", &rate)) |
Ricardo Ribalda Delgado | 435779f | 2016-07-05 18:23:34 +0200 | [diff] [blame] | 170 | return ERR_PTR(-EIO); |
Grant Likely | 015ba40 | 2012-04-07 21:39:39 -0500 | [diff] [blame] | 171 | |
Boris BREZILLON | 0903ea6 | 2013-12-21 10:34:48 +0100 | [diff] [blame] | 172 | of_property_read_u32(node, "clock-accuracy", &accuracy); |
| 173 | |
Grant Likely | 015ba40 | 2012-04-07 21:39:39 -0500 | [diff] [blame] | 174 | of_property_read_string(node, "clock-output-names", &clk_name); |
| 175 | |
Boris BREZILLON | 0903ea6 | 2013-12-21 10:34:48 +0100 | [diff] [blame] | 176 | clk = clk_register_fixed_rate_with_accuracy(NULL, clk_name, NULL, |
Stephen Boyd | d3781a7 | 2016-03-01 11:00:12 -0800 | [diff] [blame] | 177 | 0, rate, accuracy); |
Ricardo Ribalda Delgado | 435779f | 2016-07-05 18:23:34 +0200 | [diff] [blame] | 178 | if (IS_ERR(clk)) |
| 179 | return clk; |
| 180 | |
| 181 | ret = of_clk_add_provider(node, of_clk_src_simple_get, clk); |
| 182 | if (ret) { |
| 183 | clk_unregister(clk); |
| 184 | return ERR_PTR(ret); |
| 185 | } |
| 186 | |
| 187 | return clk; |
| 188 | } |
| 189 | |
| 190 | /** |
| 191 | * of_fixed_clk_setup() - Setup function for simple fixed rate clock |
| 192 | */ |
Stephen Boyd | d336e9a | 2016-08-12 18:50:23 -0700 | [diff] [blame] | 193 | void __init of_fixed_clk_setup(struct device_node *node) |
Ricardo Ribalda Delgado | 435779f | 2016-07-05 18:23:34 +0200 | [diff] [blame] | 194 | { |
| 195 | _of_fixed_clk_setup(node); |
Grant Likely | 015ba40 | 2012-04-07 21:39:39 -0500 | [diff] [blame] | 196 | } |
Prashant Gaikwad | f2f6c25 | 2013-01-04 12:30:52 +0530 | [diff] [blame] | 197 | CLK_OF_DECLARE(fixed_clk, "fixed-clock", of_fixed_clk_setup); |
Ricardo Ribalda Delgado | 435779f | 2016-07-05 18:23:34 +0200 | [diff] [blame] | 198 | |
| 199 | static int of_fixed_clk_remove(struct platform_device *pdev) |
| 200 | { |
| 201 | struct clk *clk = platform_get_drvdata(pdev); |
| 202 | |
| 203 | clk_unregister_fixed_rate(clk); |
| 204 | |
| 205 | return 0; |
| 206 | } |
| 207 | |
| 208 | static int of_fixed_clk_probe(struct platform_device *pdev) |
| 209 | { |
| 210 | struct clk *clk; |
| 211 | |
| 212 | /* |
| 213 | * This function is not executed when of_fixed_clk_setup |
| 214 | * succeeded. |
| 215 | */ |
| 216 | clk = _of_fixed_clk_setup(pdev->dev.of_node); |
| 217 | if (IS_ERR(clk)) |
| 218 | return PTR_ERR(clk); |
| 219 | |
| 220 | platform_set_drvdata(pdev, clk); |
| 221 | |
| 222 | return 0; |
| 223 | } |
| 224 | |
| 225 | static const struct of_device_id of_fixed_clk_ids[] = { |
| 226 | { .compatible = "fixed-clock" }, |
| 227 | { } |
| 228 | }; |
| 229 | MODULE_DEVICE_TABLE(of, of_fixed_clk_ids); |
| 230 | |
| 231 | static struct platform_driver of_fixed_clk_driver = { |
| 232 | .driver = { |
| 233 | .name = "of_fixed_clk", |
| 234 | .of_match_table = of_fixed_clk_ids, |
| 235 | }, |
| 236 | .probe = of_fixed_clk_probe, |
| 237 | .remove = of_fixed_clk_remove, |
| 238 | }; |
| 239 | builtin_platform_driver(of_fixed_clk_driver); |
Grant Likely | 015ba40 | 2012-04-07 21:39:39 -0500 | [diff] [blame] | 240 | #endif |