Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-4.19 / 8f0ea9ef3a00e4320762c2415c8121e0c36dbe7d / . / drivers / net / wireless / cnss2 / pci.h
blob: c824b0b39189920bea62cbb86c1a75b78b791b73 [file] [log] [blame]
Yuanyuan Liud5ec14c2019-01-03 11:25:40 -0800[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0-only */
2/* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved. */
3
4#ifndef _CNSS_PCI_H
5#define _CNSS_PCI_H
6
7#include <asm/dma-iommu.h>
8#include <linux/iommu.h>
9#include <linux/mhi.h>
10#include <linux/msm_pcie.h>
11#include <linux/pci.h>
12
13#include "main.h"
14
15enum cnss_mhi_state {
16 CNSS_MHI_INIT,
17 CNSS_MHI_DEINIT,
18 CNSS_MHI_POWER_ON,
19 CNSS_MHI_POWER_OFF,
20 CNSS_MHI_FORCE_POWER_OFF,
21 CNSS_MHI_SUSPEND,
22 CNSS_MHI_RESUME,
23 CNSS_MHI_TRIGGER_RDDM,
24 CNSS_MHI_RDDM,
25 CNSS_MHI_RDDM_DONE,
26};
27
28struct cnss_msi_user {
29 char *name;
30 int num_vectors;
31 u32 base_vector;
32};
33
34struct cnss_msi_config {
35 int total_vectors;
36 int total_users;
37 struct cnss_msi_user *users;
38};
39
Yue Mac9b8dca2019-02-05 18:06:49 -0800[diff] [blame]40struct cnss_pci_reg {
41 char *name;
42 u32 offset;
43};
44
Yue Ma5d219732019-04-04 16:00:40 -0700[diff] [blame]45struct cnss_pci_debug_reg {
46 u32 offset;
47 u32 val;
48};
49
Yuanyuan Liud5ec14c2019-01-03 11:25:40 -0800[diff] [blame]50struct cnss_pci_data {
51 struct pci_dev *pci_dev;
52 struct cnss_plat_data *plat_priv;
53 const struct pci_device_id *pci_device_id;
54 u32 device_id;
55 u16 revision_id;
56 struct cnss_wlan_driver *driver_ops;
57 u8 pci_link_state;
58 u8 pci_link_down_ind;
59 struct pci_saved_state *saved_state;
60 struct pci_saved_state *default_state;
61 struct msm_pcie_register_event msm_pci_event;
62 atomic_t auto_suspended;
Yue Maa16423c2019-04-19 13:42:35 -0700[diff] [blame]63 u8 drv_connected_last;
Yuanyuan Liud5ec14c2019-01-03 11:25:40 -0800[diff] [blame]64 u8 monitor_wake_intr;
Yuanyuan Liu3edf9fb2019-02-20 14:14:15 -0800[diff] [blame]65 struct dma_iommu_mapping smmu_mapping;
66 struct iommu_domain *iommu_domain;
Yuanyuan Liud5ec14c2019-01-03 11:25:40 -0800[diff] [blame]67 u8 smmu_s1_enable;
68 dma_addr_t smmu_iova_start;
69 size_t smmu_iova_len;
70 dma_addr_t smmu_iova_ipa_start;
71 size_t smmu_iova_ipa_len;
72 void __iomem *bar;
73 struct cnss_msi_config *msi_config;
74 u32 msi_ep_base_data;
75 struct mhi_controller *mhi_ctrl;
76 unsigned long mhi_state;
Yue Mac9b8dca2019-02-05 18:06:49 -0800[diff] [blame]77 u32 remap_window;
Yue Ma4738d5a2018-10-30 15:54:40 -0700[diff] [blame]78 struct timer_list dev_rddm_timer;
Yue Mab02821f2019-05-09 17:29:19 -0700[diff] [blame]79 struct delayed_work time_sync_work;
Yuanyuan Liud5ec14c2019-01-03 11:25:40 -0800[diff] [blame]80 u8 disable_pc;
Yue Ma5d219732019-04-04 16:00:40 -0700[diff] [blame]81 struct cnss_pci_debug_reg *debug_reg;
Yuanyuan Liud5ec14c2019-01-03 11:25:40 -0800[diff] [blame]82};
83
84static inline void cnss_set_pci_priv(struct pci_dev *pci_dev, void *data)
85{
86 pci_set_drvdata(pci_dev, data);
87}
88
89static inline struct cnss_pci_data *cnss_get_pci_priv(struct pci_dev *pci_dev)
90{
91 return pci_get_drvdata(pci_dev);
92}
93
94static inline struct cnss_plat_data *cnss_pci_priv_to_plat_priv(void *bus_priv)
95{
96 struct cnss_pci_data *pci_priv = bus_priv;
97
98 return pci_priv->plat_priv;
99}
100
101static inline void cnss_pci_set_monitor_wake_intr(void *bus_priv, bool val)
102{
103 struct cnss_pci_data *pci_priv = bus_priv;
104
105 pci_priv->monitor_wake_intr = val;
106}
107
108static inline bool cnss_pci_get_monitor_wake_intr(void *bus_priv)
109{
110 struct cnss_pci_data *pci_priv = bus_priv;
111
112 return pci_priv->monitor_wake_intr;
113}
114
115static inline void cnss_pci_set_auto_suspended(void *bus_priv, int val)
116{
117 struct cnss_pci_data *pci_priv = bus_priv;
118
119 atomic_set(&pci_priv->auto_suspended, val);
120}
121
122static inline int cnss_pci_get_auto_suspended(void *bus_priv)
123{
124 struct cnss_pci_data *pci_priv = bus_priv;
125
126 return atomic_read(&pci_priv->auto_suspended);
127}
128
129int cnss_suspend_pci_link(struct cnss_pci_data *pci_priv);
130int cnss_resume_pci_link(struct cnss_pci_data *pci_priv);
131int cnss_pci_init(struct cnss_plat_data *plat_priv);
132void cnss_pci_deinit(struct cnss_plat_data *plat_priv);
133int cnss_pci_alloc_fw_mem(struct cnss_pci_data *pci_priv);
Yuanyuan Liu36d1fba2019-01-02 14:13:15 -0800[diff] [blame]134int cnss_pci_alloc_qdss_mem(struct cnss_pci_data *pci_priv);
135void cnss_pci_free_qdss_mem(struct cnss_pci_data *pci_priv);
Yuanyuan Liud5ec14c2019-01-03 11:25:40 -0800[diff] [blame]136int cnss_pci_load_m3(struct cnss_pci_data *pci_priv);
137int cnss_pci_set_mhi_state(struct cnss_pci_data *pci_priv,
138 enum cnss_mhi_state state);
139int cnss_pci_start_mhi(struct cnss_pci_data *pci_priv);
140void cnss_pci_stop_mhi(struct cnss_pci_data *pci_priv);
141void cnss_pci_collect_dump_info(struct cnss_pci_data *pci_priv, bool in_panic);
142void cnss_pci_clear_dump_info(struct cnss_pci_data *pci_priv);
Yuanyuan Liud5ec14c2019-01-03 11:25:40 -0800[diff] [blame]143u32 cnss_pci_get_wake_msi(struct cnss_pci_data *pci_priv);
144int cnss_pci_force_fw_assert_hdlr(struct cnss_pci_data *pci_priv);
145void cnss_pci_fw_boot_timeout_hdlr(struct cnss_pci_data *pci_priv);
146int cnss_pci_call_driver_probe(struct cnss_pci_data *pci_priv);
147int cnss_pci_call_driver_remove(struct cnss_pci_data *pci_priv);
148int cnss_pci_dev_powerup(struct cnss_pci_data *pci_priv);
149int cnss_pci_dev_shutdown(struct cnss_pci_data *pci_priv);
150int cnss_pci_dev_crash_shutdown(struct cnss_pci_data *pci_priv);
151int cnss_pci_dev_ramdump(struct cnss_pci_data *pci_priv);
152int cnss_pci_register_driver_hdlr(struct cnss_pci_data *pci_priv, void *data);
153int cnss_pci_unregister_driver_hdlr(struct cnss_pci_data *pci_priv);
154int cnss_pci_call_driver_modem_status(struct cnss_pci_data *pci_priv,
155 int modem_current_status);
156void cnss_pci_pm_runtime_show_usage_count(struct cnss_pci_data *pci_priv);
Yue Ma6476dc92019-05-03 11:21:37 -0700[diff] [blame]157int cnss_pci_pm_request_resume(struct cnss_pci_data *pci_priv);
158int cnss_pci_pm_runtime_resume(struct cnss_pci_data *pci_priv);
Yuanyuan Liud5ec14c2019-01-03 11:25:40 -0800[diff] [blame]159int cnss_pci_pm_runtime_get(struct cnss_pci_data *pci_priv);
Yue Ma8f0ea9e2019-05-28 12:35:13 -0700[diff] [blame^]160int cnss_pci_pm_runtime_get_sync(struct cnss_pci_data *pci_priv);
Yuanyuan Liud5ec14c2019-01-03 11:25:40 -0800[diff] [blame]161void cnss_pci_pm_runtime_get_noresume(struct cnss_pci_data *pci_priv);
162int cnss_pci_pm_runtime_put_autosuspend(struct cnss_pci_data *pci_priv);
163void cnss_pci_pm_runtime_put_noidle(struct cnss_pci_data *pci_priv);
164void cnss_pci_pm_runtime_mark_last_busy(struct cnss_pci_data *pci_priv);
165int cnss_pci_update_status(struct cnss_pci_data *pci_priv,
166 enum cnss_driver_status status);
167
168#endif /* _CNSS_PCI_H */