| Mike Frysinger | 920e526 | 2008-02-09 02:07:08 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * File: include/asm-blackfin/mach-bf548/cdefBF547.h |
| 3 | * Based on: |
| 4 | * Author: |
| 5 | * |
| 6 | * Created: |
| 7 | * Description: |
| 8 | * |
| 9 | * Rev: |
| 10 | * |
| 11 | * Modified: |
| 12 | * |
| 13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
| 14 | * |
| 15 | * This program is free software; you can redistribute it and/or modify |
| 16 | * it under the terms of the GNU General Public License as published by |
| 17 | * the Free Software Foundation; either version 2, or (at your option) |
| 18 | * any later version. |
| 19 | * |
| 20 | * This program is distributed in the hope that it will be useful, |
| 21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 23 | * GNU General Public License for more details. |
| 24 | * |
| 25 | * You should have received a copy of the GNU General Public License |
| 26 | * along with this program; see the file COPYING. |
| 27 | * If not, write to the Free Software Foundation, |
| 28 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 29 | */ |
| 30 | |
| 31 | #ifndef _CDEF_BF548_H |
| 32 | #define _CDEF_BF548_H |
| 33 | |
| 34 | /* include all Core registers and bit definitions */ |
| 35 | #include "defBF548.h" |
| 36 | |
| 37 | /* include core sbfin_read_()ecific register pointer definitions */ |
| 38 | #include <asm/mach-common/cdef_LPBlackfin.h> |
| 39 | |
| 40 | /* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF548 */ |
| 41 | |
| 42 | /* include cdefBF54x_base.h for the set of #defines that are common to all ADSP-BF54x bfin_read_()rocessors */ |
| 43 | #include "cdefBF54x_base.h" |
| 44 | |
| 45 | /* The following are the #defines needed by ADSP-BF548 that are not in the common header */ |
| 46 | |
| 47 | /* Timer Registers */ |
| 48 | |
| 49 | #define bfin_read_TIMER8_CONFIG() bfin_read16(TIMER8_CONFIG) |
| 50 | #define bfin_write_TIMER8_CONFIG(val) bfin_write16(TIMER8_CONFIG, val) |
| 51 | #define bfin_read_TIMER8_COUNTER() bfin_read32(TIMER8_COUNTER) |
| 52 | #define bfin_write_TIMER8_COUNTER(val) bfin_write32(TIMER8_COUNTER, val) |
| 53 | #define bfin_read_TIMER8_PERIOD() bfin_read32(TIMER8_PERIOD) |
| 54 | #define bfin_write_TIMER8_PERIOD(val) bfin_write32(TIMER8_PERIOD, val) |
| 55 | #define bfin_read_TIMER8_WIDTH() bfin_read32(TIMER8_WIDTH) |
| 56 | #define bfin_write_TIMER8_WIDTH(val) bfin_write32(TIMER8_WIDTH, val) |
| 57 | #define bfin_read_TIMER9_CONFIG() bfin_read16(TIMER9_CONFIG) |
| 58 | #define bfin_write_TIMER9_CONFIG(val) bfin_write16(TIMER9_CONFIG, val) |
| 59 | #define bfin_read_TIMER9_COUNTER() bfin_read32(TIMER9_COUNTER) |
| 60 | #define bfin_write_TIMER9_COUNTER(val) bfin_write32(TIMER9_COUNTER, val) |
| 61 | #define bfin_read_TIMER9_PERIOD() bfin_read32(TIMER9_PERIOD) |
| 62 | #define bfin_write_TIMER9_PERIOD(val) bfin_write32(TIMER9_PERIOD, val) |
| 63 | #define bfin_read_TIMER9_WIDTH() bfin_read32(TIMER9_WIDTH) |
| 64 | #define bfin_write_TIMER9_WIDTH(val) bfin_write32(TIMER9_WIDTH, val) |
| 65 | #define bfin_read_TIMER10_CONFIG() bfin_read16(TIMER10_CONFIG) |
| 66 | #define bfin_write_TIMER10_CONFIG(val) bfin_write16(TIMER10_CONFIG, val) |
| 67 | #define bfin_read_TIMER10_COUNTER() bfin_read32(TIMER10_COUNTER) |
| 68 | #define bfin_write_TIMER10_COUNTER(val) bfin_write32(TIMER10_COUNTER, val) |
| 69 | #define bfin_read_TIMER10_PERIOD() bfin_read32(TIMER10_PERIOD) |
| 70 | #define bfin_write_TIMER10_PERIOD(val) bfin_write32(TIMER10_PERIOD, val) |
| 71 | #define bfin_read_TIMER10_WIDTH() bfin_read32(TIMER10_WIDTH) |
| 72 | #define bfin_write_TIMER10_WIDTH(val) bfin_write32(TIMER10_WIDTH, val) |
| 73 | |
| 74 | /* Timer Groubfin_read_() of 3 */ |
| 75 | |
| 76 | #define bfin_read_TIMER_ENABLE1() bfin_read16(TIMER_ENABLE1) |
| 77 | #define bfin_write_TIMER_ENABLE1(val) bfin_write16(TIMER_ENABLE1, val) |
| 78 | #define bfin_read_TIMER_DISABLE1() bfin_read16(TIMER_DISABLE1) |
| 79 | #define bfin_write_TIMER_DISABLE1(val) bfin_write16(TIMER_DISABLE1, val) |
| 80 | #define bfin_read_TIMER_STATUS1() bfin_read32(TIMER_STATUS1) |
| 81 | #define bfin_write_TIMER_STATUS1(val) bfin_write32(TIMER_STATUS1, val) |
| 82 | |
| 83 | /* SPORT0 Registers */ |
| 84 | |
| 85 | #define bfin_read_SPORT0_TCR1() bfin_read16(SPORT0_TCR1) |
| 86 | #define bfin_write_SPORT0_TCR1(val) bfin_write16(SPORT0_TCR1, val) |
| 87 | #define bfin_read_SPORT0_TCR2() bfin_read16(SPORT0_TCR2) |
| 88 | #define bfin_write_SPORT0_TCR2(val) bfin_write16(SPORT0_TCR2, val) |
| 89 | #define bfin_read_SPORT0_TCLKDIV() bfin_read16(SPORT0_TCLKDIV) |
| 90 | #define bfin_write_SPORT0_TCLKDIV(val) bfin_write16(SPORT0_TCLKDIV, val) |
| 91 | #define bfin_read_SPORT0_TFSDIV() bfin_read16(SPORT0_TFSDIV) |
| 92 | #define bfin_write_SPORT0_TFSDIV(val) bfin_write16(SPORT0_TFSDIV, val) |
| 93 | #define bfin_read_SPORT0_TX() bfin_read32(SPORT0_TX) |
| 94 | #define bfin_write_SPORT0_TX(val) bfin_write32(SPORT0_TX, val) |
| 95 | #define bfin_read_SPORT0_RX() bfin_read32(SPORT0_RX) |
| 96 | #define bfin_write_SPORT0_RX(val) bfin_write32(SPORT0_RX, val) |
| 97 | #define bfin_read_SPORT0_RCR1() bfin_read16(SPORT0_RCR1) |
| 98 | #define bfin_write_SPORT0_RCR1(val) bfin_write16(SPORT0_RCR1, val) |
| 99 | #define bfin_read_SPORT0_RCR2() bfin_read16(SPORT0_RCR2) |
| 100 | #define bfin_write_SPORT0_RCR2(val) bfin_write16(SPORT0_RCR2, val) |
| 101 | #define bfin_read_SPORT0_RCLKDIV() bfin_read16(SPORT0_RCLKDIV) |
| 102 | #define bfin_write_SPORT0_RCLKDIV(val) bfin_write16(SPORT0_RCLKDIV, val) |
| 103 | #define bfin_read_SPORT0_RFSDIV() bfin_read16(SPORT0_RFSDIV) |
| 104 | #define bfin_write_SPORT0_RFSDIV(val) bfin_write16(SPORT0_RFSDIV, val) |
| 105 | #define bfin_read_SPORT0_STAT() bfin_read16(SPORT0_STAT) |
| 106 | #define bfin_write_SPORT0_STAT(val) bfin_write16(SPORT0_STAT, val) |
| 107 | #define bfin_read_SPORT0_CHNL() bfin_read16(SPORT0_CHNL) |
| 108 | #define bfin_write_SPORT0_CHNL(val) bfin_write16(SPORT0_CHNL, val) |
| 109 | #define bfin_read_SPORT0_MCMC1() bfin_read16(SPORT0_MCMC1) |
| 110 | #define bfin_write_SPORT0_MCMC1(val) bfin_write16(SPORT0_MCMC1, val) |
| 111 | #define bfin_read_SPORT0_MCMC2() bfin_read16(SPORT0_MCMC2) |
| 112 | #define bfin_write_SPORT0_MCMC2(val) bfin_write16(SPORT0_MCMC2, val) |
| 113 | #define bfin_read_SPORT0_MTCS0() bfin_read32(SPORT0_MTCS0) |
| 114 | #define bfin_write_SPORT0_MTCS0(val) bfin_write32(SPORT0_MTCS0, val) |
| 115 | #define bfin_read_SPORT0_MTCS1() bfin_read32(SPORT0_MTCS1) |
| 116 | #define bfin_write_SPORT0_MTCS1(val) bfin_write32(SPORT0_MTCS1, val) |
| 117 | #define bfin_read_SPORT0_MTCS2() bfin_read32(SPORT0_MTCS2) |
| 118 | #define bfin_write_SPORT0_MTCS2(val) bfin_write32(SPORT0_MTCS2, val) |
| 119 | #define bfin_read_SPORT0_MTCS3() bfin_read32(SPORT0_MTCS3) |
| 120 | #define bfin_write_SPORT0_MTCS3(val) bfin_write32(SPORT0_MTCS3, val) |
| 121 | #define bfin_read_SPORT0_MRCS0() bfin_read32(SPORT0_MRCS0) |
| 122 | #define bfin_write_SPORT0_MRCS0(val) bfin_write32(SPORT0_MRCS0, val) |
| 123 | #define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1) |
| 124 | #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val) |
| 125 | #define bfin_read_SPORT0_MRCS2() bfin_read32(SPORT0_MRCS2) |
| 126 | #define bfin_write_SPORT0_MRCS2(val) bfin_write32(SPORT0_MRCS2, val) |
| 127 | #define bfin_read_SPORT0_MRCS3() bfin_read32(SPORT0_MRCS3) |
| 128 | #define bfin_write_SPORT0_MRCS3(val) bfin_write32(SPORT0_MRCS3, val) |
| 129 | |
| 130 | /* EPPI0 Registers */ |
| 131 | |
| 132 | #define bfin_read_EPPI0_STATUS() bfin_read16(EPPI0_STATUS) |
| 133 | #define bfin_write_EPPI0_STATUS(val) bfin_write16(EPPI0_STATUS, val) |
| 134 | #define bfin_read_EPPI0_HCOUNT() bfin_read16(EPPI0_HCOUNT) |
| 135 | #define bfin_write_EPPI0_HCOUNT(val) bfin_write16(EPPI0_HCOUNT, val) |
| 136 | #define bfin_read_EPPI0_HDELAY() bfin_read16(EPPI0_HDELAY) |
| 137 | #define bfin_write_EPPI0_HDELAY(val) bfin_write16(EPPI0_HDELAY, val) |
| 138 | #define bfin_read_EPPI0_VCOUNT() bfin_read16(EPPI0_VCOUNT) |
| 139 | #define bfin_write_EPPI0_VCOUNT(val) bfin_write16(EPPI0_VCOUNT, val) |
| 140 | #define bfin_read_EPPI0_VDELAY() bfin_read16(EPPI0_VDELAY) |
| 141 | #define bfin_write_EPPI0_VDELAY(val) bfin_write16(EPPI0_VDELAY, val) |
| 142 | #define bfin_read_EPPI0_FRAME() bfin_read16(EPPI0_FRAME) |
| 143 | #define bfin_write_EPPI0_FRAME(val) bfin_write16(EPPI0_FRAME, val) |
| 144 | #define bfin_read_EPPI0_LINE() bfin_read16(EPPI0_LINE) |
| 145 | #define bfin_write_EPPI0_LINE(val) bfin_write16(EPPI0_LINE, val) |
| 146 | #define bfin_read_EPPI0_CLKDIV() bfin_read16(EPPI0_CLKDIV) |
| 147 | #define bfin_write_EPPI0_CLKDIV(val) bfin_write16(EPPI0_CLKDIV, val) |
| 148 | #define bfin_read_EPPI0_CONTROL() bfin_read32(EPPI0_CONTROL) |
| 149 | #define bfin_write_EPPI0_CONTROL(val) bfin_write32(EPPI0_CONTROL, val) |
| 150 | #define bfin_read_EPPI0_FS1W_HBL() bfin_read32(EPPI0_FS1W_HBL) |
| 151 | #define bfin_write_EPPI0_FS1W_HBL(val) bfin_write32(EPPI0_FS1W_HBL, val) |
| 152 | #define bfin_read_EPPI0_FS1P_AVPL() bfin_read32(EPPI0_FS1P_AVPL) |
| 153 | #define bfin_write_EPPI0_FS1P_AVPL(val) bfin_write32(EPPI0_FS1P_AVPL, val) |
| 154 | #define bfin_read_EPPI0_FS2W_LVB() bfin_read32(EPPI0_FS2W_LVB) |
| 155 | #define bfin_write_EPPI0_FS2W_LVB(val) bfin_write32(EPPI0_FS2W_LVB, val) |
| 156 | #define bfin_read_EPPI0_FS2P_LAVF() bfin_read32(EPPI0_FS2P_LAVF) |
| 157 | #define bfin_write_EPPI0_FS2P_LAVF(val) bfin_write32(EPPI0_FS2P_LAVF, val) |
| 158 | #define bfin_read_EPPI0_CLIP() bfin_read32(EPPI0_CLIP) |
| 159 | #define bfin_write_EPPI0_CLIP(val) bfin_write32(EPPI0_CLIP, val) |
| 160 | |
| 161 | /* UART2 Registers */ |
| 162 | |
| 163 | #define bfin_read_UART2_DLL() bfin_read16(UART2_DLL) |
| 164 | #define bfin_write_UART2_DLL(val) bfin_write16(UART2_DLL, val) |
| 165 | #define bfin_read_UART2_DLH() bfin_read16(UART2_DLH) |
| 166 | #define bfin_write_UART2_DLH(val) bfin_write16(UART2_DLH, val) |
| 167 | #define bfin_read_UART2_GCTL() bfin_read16(UART2_GCTL) |
| 168 | #define bfin_write_UART2_GCTL(val) bfin_write16(UART2_GCTL, val) |
| 169 | #define bfin_read_UART2_LCR() bfin_read16(UART2_LCR) |
| 170 | #define bfin_write_UART2_LCR(val) bfin_write16(UART2_LCR, val) |
| 171 | #define bfin_read_UART2_MCR() bfin_read16(UART2_MCR) |
| 172 | #define bfin_write_UART2_MCR(val) bfin_write16(UART2_MCR, val) |
| 173 | #define bfin_read_UART2_LSR() bfin_read16(UART2_LSR) |
| 174 | #define bfin_write_UART2_LSR(val) bfin_write16(UART2_LSR, val) |
| 175 | #define bfin_read_UART2_MSR() bfin_read16(UART2_MSR) |
| 176 | #define bfin_write_UART2_MSR(val) bfin_write16(UART2_MSR, val) |
| 177 | #define bfin_read_UART2_SCR() bfin_read16(UART2_SCR) |
| 178 | #define bfin_write_UART2_SCR(val) bfin_write16(UART2_SCR, val) |
| 179 | #define bfin_read_UART2_IER_SET() bfin_read16(UART2_IER_SET) |
| 180 | #define bfin_write_UART2_IER_SET(val) bfin_write16(UART2_IER_SET, val) |
| 181 | #define bfin_read_UART2_IER_CLEAR() bfin_read16(UART2_IER_CLEAR) |
| 182 | #define bfin_write_UART2_IER_CLEAR(val) bfin_write16(UART2_IER_CLEAR, val) |
| 183 | #define bfin_read_UART2_RBR() bfin_read16(UART2_RBR) |
| 184 | #define bfin_write_UART2_RBR(val) bfin_write16(UART2_RBR, val) |
| 185 | |
| 186 | /* Two Wire Interface Registers (TWI1) */ |
| 187 | |
| 188 | #define bfin_read_TWI1_CLKDIV() bfin_read16(TWI1_CLKDIV) |
| 189 | #define bfin_write_TWI1_CLKDIV(val) bfin_write16(TWI1_CLKDIV, val) |
| 190 | #define bfin_read_TWI1_CONTROL() bfin_read16(TWI1_CONTROL) |
| 191 | #define bfin_write_TWI1_CONTROL(val) bfin_write16(TWI1_CONTROL, val) |
| 192 | #define bfin_read_TWI1_SLAVE_CTRL() bfin_read16(TWI1_SLAVE_CTRL) |
| 193 | #define bfin_write_TWI1_SLAVE_CTRL(val) bfin_write16(TWI1_SLAVE_CTRL, val) |
| 194 | #define bfin_read_TWI1_SLAVE_STAT() bfin_read16(TWI1_SLAVE_STAT) |
| 195 | #define bfin_write_TWI1_SLAVE_STAT(val) bfin_write16(TWI1_SLAVE_STAT, val) |
| 196 | #define bfin_read_TWI1_SLAVE_ADDR() bfin_read16(TWI1_SLAVE_ADDR) |
| 197 | #define bfin_write_TWI1_SLAVE_ADDR(val) bfin_write16(TWI1_SLAVE_ADDR, val) |
| 198 | #define bfin_read_TWI1_MASTER_CTRL() bfin_read16(TWI1_MASTER_CTRL) |
| 199 | #define bfin_write_TWI1_MASTER_CTRL(val) bfin_write16(TWI1_MASTER_CTRL, val) |
| 200 | #define bfin_read_TWI1_MASTER_STAT() bfin_read16(TWI1_MASTER_STAT) |
| 201 | #define bfin_write_TWI1_MASTER_STAT(val) bfin_write16(TWI1_MASTER_STAT, val) |
| 202 | #define bfin_read_TWI1_MASTER_ADDR() bfin_read16(TWI1_MASTER_ADDR) |
| 203 | #define bfin_write_TWI1_MASTER_ADDR(val) bfin_write16(TWI1_MASTER_ADDR, val) |
| 204 | #define bfin_read_TWI1_INT_STAT() bfin_read16(TWI1_INT_STAT) |
| 205 | #define bfin_write_TWI1_INT_STAT(val) bfin_write16(TWI1_INT_STAT, val) |
| 206 | #define bfin_read_TWI1_INT_MASK() bfin_read16(TWI1_INT_MASK) |
| 207 | #define bfin_write_TWI1_INT_MASK(val) bfin_write16(TWI1_INT_MASK, val) |
| 208 | #define bfin_read_TWI1_FIFO_CTRL() bfin_read16(TWI1_FIFO_CTRL) |
| 209 | #define bfin_write_TWI1_FIFO_CTRL(val) bfin_write16(TWI1_FIFO_CTRL, val) |
| 210 | #define bfin_read_TWI1_FIFO_STAT() bfin_read16(TWI1_FIFO_STAT) |
| 211 | #define bfin_write_TWI1_FIFO_STAT(val) bfin_write16(TWI1_FIFO_STAT, val) |
| 212 | #define bfin_read_TWI1_XMT_DATA8() bfin_read16(TWI1_XMT_DATA8) |
| 213 | #define bfin_write_TWI1_XMT_DATA8(val) bfin_write16(TWI1_XMT_DATA8, val) |
| 214 | #define bfin_read_TWI1_XMT_DATA16() bfin_read16(TWI1_XMT_DATA16) |
| 215 | #define bfin_write_TWI1_XMT_DATA16(val) bfin_write16(TWI1_XMT_DATA16, val) |
| 216 | #define bfin_read_TWI1_RCV_DATA8() bfin_read16(TWI1_RCV_DATA8) |
| 217 | #define bfin_write_TWI1_RCV_DATA8(val) bfin_write16(TWI1_RCV_DATA8, val) |
| 218 | #define bfin_read_TWI1_RCV_DATA16() bfin_read16(TWI1_RCV_DATA16) |
| 219 | #define bfin_write_TWI1_RCV_DATA16(val) bfin_write16(TWI1_RCV_DATA16, val) |
| 220 | |
| 221 | /* SPI2 Registers */ |
| 222 | |
| 223 | #define bfin_read_SPI2_CTL() bfin_read16(SPI2_CTL) |
| 224 | #define bfin_write_SPI2_CTL(val) bfin_write16(SPI2_CTL, val) |
| 225 | #define bfin_read_SPI2_FLG() bfin_read16(SPI2_FLG) |
| 226 | #define bfin_write_SPI2_FLG(val) bfin_write16(SPI2_FLG, val) |
| 227 | #define bfin_read_SPI2_STAT() bfin_read16(SPI2_STAT) |
| 228 | #define bfin_write_SPI2_STAT(val) bfin_write16(SPI2_STAT, val) |
| 229 | #define bfin_read_SPI2_TDBR() bfin_read16(SPI2_TDBR) |
| 230 | #define bfin_write_SPI2_TDBR(val) bfin_write16(SPI2_TDBR, val) |
| 231 | #define bfin_read_SPI2_RDBR() bfin_read16(SPI2_RDBR) |
| 232 | #define bfin_write_SPI2_RDBR(val) bfin_write16(SPI2_RDBR, val) |
| 233 | #define bfin_read_SPI2_BAUD() bfin_read16(SPI2_BAUD) |
| 234 | #define bfin_write_SPI2_BAUD(val) bfin_write16(SPI2_BAUD, val) |
| 235 | #define bfin_read_SPI2_SHADOW() bfin_read16(SPI2_SHADOW) |
| 236 | #define bfin_write_SPI2_SHADOW(val) bfin_write16(SPI2_SHADOW, val) |
| 237 | |
| 238 | /* ATAPI Registers */ |
| 239 | |
| 240 | #define bfin_read_ATAPI_CONTROL() bfin_read16(ATAPI_CONTROL) |
| 241 | #define bfin_write_ATAPI_CONTROL(val) bfin_write16(ATAPI_CONTROL, val) |
| 242 | #define bfin_read_ATAPI_STATUS() bfin_read16(ATAPI_STATUS) |
| 243 | #define bfin_write_ATAPI_STATUS(val) bfin_write16(ATAPI_STATUS, val) |
| 244 | #define bfin_read_ATAPI_DEV_ADDR() bfin_read16(ATAPI_DEV_ADDR) |
| 245 | #define bfin_write_ATAPI_DEV_ADDR(val) bfin_write16(ATAPI_DEV_ADDR, val) |
| 246 | #define bfin_read_ATAPI_DEV_TXBUF() bfin_read16(ATAPI_DEV_TXBUF) |
| 247 | #define bfin_write_ATAPI_DEV_TXBUF(val) bfin_write16(ATAPI_DEV_TXBUF, val) |
| 248 | #define bfin_read_ATAPI_DEV_RXBUF() bfin_read16(ATAPI_DEV_RXBUF) |
| 249 | #define bfin_write_ATAPI_DEV_RXBUF(val) bfin_write16(ATAPI_DEV_RXBUF, val) |
| 250 | #define bfin_read_ATAPI_INT_MASK() bfin_read16(ATAPI_INT_MASK) |
| 251 | #define bfin_write_ATAPI_INT_MASK(val) bfin_write16(ATAPI_INT_MASK, val) |
| 252 | #define bfin_read_ATAPI_INT_STATUS() bfin_read16(ATAPI_INT_STATUS) |
| 253 | #define bfin_write_ATAPI_INT_STATUS(val) bfin_write16(ATAPI_INT_STATUS, val) |
| 254 | #define bfin_read_ATAPI_XFER_LEN() bfin_read16(ATAPI_XFER_LEN) |
| 255 | #define bfin_write_ATAPI_XFER_LEN(val) bfin_write16(ATAPI_XFER_LEN, val) |
| 256 | #define bfin_read_ATAPI_LINE_STATUS() bfin_read16(ATAPI_LINE_STATUS) |
| 257 | #define bfin_write_ATAPI_LINE_STATUS(val) bfin_write16(ATAPI_LINE_STATUS, val) |
| 258 | #define bfin_read_ATAPI_SM_STATE() bfin_read16(ATAPI_SM_STATE) |
| 259 | #define bfin_write_ATAPI_SM_STATE(val) bfin_write16(ATAPI_SM_STATE, val) |
| 260 | #define bfin_read_ATAPI_TERMINATE() bfin_read16(ATAPI_TERMINATE) |
| 261 | #define bfin_write_ATAPI_TERMINATE(val) bfin_write16(ATAPI_TERMINATE, val) |
| 262 | #define bfin_read_ATAPI_PIO_TFRCNT() bfin_read16(ATAPI_PIO_TFRCNT) |
| 263 | #define bfin_write_ATAPI_PIO_TFRCNT(val) bfin_write16(ATAPI_PIO_TFRCNT, val) |
| 264 | #define bfin_read_ATAPI_DMA_TFRCNT() bfin_read16(ATAPI_DMA_TFRCNT) |
| 265 | #define bfin_write_ATAPI_DMA_TFRCNT(val) bfin_write16(ATAPI_DMA_TFRCNT, val) |
| 266 | #define bfin_read_ATAPI_UMAIN_TFRCNT() bfin_read16(ATAPI_UMAIN_TFRCNT) |
| 267 | #define bfin_write_ATAPI_UMAIN_TFRCNT(val) bfin_write16(ATAPI_UMAIN_TFRCNT, val) |
| 268 | #define bfin_read_ATAPI_UDMAOUT_TFRCNT() bfin_read16(ATAPI_UDMAOUT_TFRCNT) |
| 269 | #define bfin_write_ATAPI_UDMAOUT_TFRCNT(val) bfin_write16(ATAPI_UDMAOUT_TFRCNT, val) |
| 270 | #define bfin_read_ATAPI_REG_TIM_0() bfin_read16(ATAPI_REG_TIM_0) |
| 271 | #define bfin_write_ATAPI_REG_TIM_0(val) bfin_write16(ATAPI_REG_TIM_0, val) |
| 272 | #define bfin_read_ATAPI_PIO_TIM_0() bfin_read16(ATAPI_PIO_TIM_0) |
| 273 | #define bfin_write_ATAPI_PIO_TIM_0(val) bfin_write16(ATAPI_PIO_TIM_0, val) |
| 274 | #define bfin_read_ATAPI_PIO_TIM_1() bfin_read16(ATAPI_PIO_TIM_1) |
| 275 | #define bfin_write_ATAPI_PIO_TIM_1(val) bfin_write16(ATAPI_PIO_TIM_1, val) |
| 276 | #define bfin_read_ATAPI_MULTI_TIM_0() bfin_read16(ATAPI_MULTI_TIM_0) |
| 277 | #define bfin_write_ATAPI_MULTI_TIM_0(val) bfin_write16(ATAPI_MULTI_TIM_0, val) |
| 278 | #define bfin_read_ATAPI_MULTI_TIM_1() bfin_read16(ATAPI_MULTI_TIM_1) |
| 279 | #define bfin_write_ATAPI_MULTI_TIM_1(val) bfin_write16(ATAPI_MULTI_TIM_1, val) |
| 280 | #define bfin_read_ATAPI_MULTI_TIM_2() bfin_read16(ATAPI_MULTI_TIM_2) |
| 281 | #define bfin_write_ATAPI_MULTI_TIM_2(val) bfin_write16(ATAPI_MULTI_TIM_2, val) |
| 282 | #define bfin_read_ATAPI_ULTRA_TIM_0() bfin_read16(ATAPI_ULTRA_TIM_0) |
| 283 | #define bfin_write_ATAPI_ULTRA_TIM_0(val) bfin_write16(ATAPI_ULTRA_TIM_0, val) |
| 284 | #define bfin_read_ATAPI_ULTRA_TIM_1() bfin_read16(ATAPI_ULTRA_TIM_1) |
| 285 | #define bfin_write_ATAPI_ULTRA_TIM_1(val) bfin_write16(ATAPI_ULTRA_TIM_1, val) |
| 286 | #define bfin_read_ATAPI_ULTRA_TIM_2() bfin_read16(ATAPI_ULTRA_TIM_2) |
| 287 | #define bfin_write_ATAPI_ULTRA_TIM_2(val) bfin_write16(ATAPI_ULTRA_TIM_2, val) |
| 288 | #define bfin_read_ATAPI_ULTRA_TIM_3() bfin_read16(ATAPI_ULTRA_TIM_3) |
| 289 | #define bfin_write_ATAPI_ULTRA_TIM_3(val) bfin_write16(ATAPI_ULTRA_TIM_3, val) |
| 290 | |
| 291 | /* SDH Registers */ |
| 292 | |
| 293 | #define bfin_read_SDH_PWR_CTL() bfin_read16(SDH_PWR_CTL) |
| 294 | #define bfin_write_SDH_PWR_CTL(val) bfin_write16(SDH_PWR_CTL, val) |
| 295 | #define bfin_read_SDH_CLK_CTL() bfin_read16(SDH_CLK_CTL) |
| 296 | #define bfin_write_SDH_CLK_CTL(val) bfin_write16(SDH_CLK_CTL, val) |
| 297 | #define bfin_read_SDH_ARGUMENT() bfin_read32(SDH_ARGUMENT) |
| 298 | #define bfin_write_SDH_ARGUMENT(val) bfin_write32(SDH_ARGUMENT, val) |
| 299 | #define bfin_read_SDH_COMMAND() bfin_read16(SDH_COMMAND) |
| 300 | #define bfin_write_SDH_COMMAND(val) bfin_write16(SDH_COMMAND, val) |
| 301 | #define bfin_read_SDH_RESP_CMD() bfin_read16(SDH_RESP_CMD) |
| 302 | #define bfin_write_SDH_RESP_CMD(val) bfin_write16(SDH_RESP_CMD, val) |
| 303 | #define bfin_read_SDH_RESPONSE0() bfin_read32(SDH_RESPONSE0) |
| 304 | #define bfin_write_SDH_RESPONSE0(val) bfin_write32(SDH_RESPONSE0, val) |
| 305 | #define bfin_read_SDH_RESPONSE1() bfin_read32(SDH_RESPONSE1) |
| 306 | #define bfin_write_SDH_RESPONSE1(val) bfin_write32(SDH_RESPONSE1, val) |
| 307 | #define bfin_read_SDH_RESPONSE2() bfin_read32(SDH_RESPONSE2) |
| 308 | #define bfin_write_SDH_RESPONSE2(val) bfin_write32(SDH_RESPONSE2, val) |
| 309 | #define bfin_read_SDH_RESPONSE3() bfin_read32(SDH_RESPONSE3) |
| 310 | #define bfin_write_SDH_RESPONSE3(val) bfin_write32(SDH_RESPONSE3, val) |
| 311 | #define bfin_read_SDH_DATA_TIMER() bfin_read32(SDH_DATA_TIMER) |
| 312 | #define bfin_write_SDH_DATA_TIMER(val) bfin_write32(SDH_DATA_TIMER, val) |
| 313 | #define bfin_read_SDH_DATA_LGTH() bfin_read16(SDH_DATA_LGTH) |
| 314 | #define bfin_write_SDH_DATA_LGTH(val) bfin_write16(SDH_DATA_LGTH, val) |
| 315 | #define bfin_read_SDH_DATA_CTL() bfin_read16(SDH_DATA_CTL) |
| 316 | #define bfin_write_SDH_DATA_CTL(val) bfin_write16(SDH_DATA_CTL, val) |
| 317 | #define bfin_read_SDH_DATA_CNT() bfin_read16(SDH_DATA_CNT) |
| 318 | #define bfin_write_SDH_DATA_CNT(val) bfin_write16(SDH_DATA_CNT, val) |
| 319 | #define bfin_read_SDH_STATUS() bfin_read32(SDH_STATUS) |
| 320 | #define bfin_write_SDH_STATUS(val) bfin_write32(SDH_STATUS, val) |
| 321 | #define bfin_read_SDH_STATUS_CLR() bfin_read16(SDH_STATUS_CLR) |
| 322 | #define bfin_write_SDH_STATUS_CLR(val) bfin_write16(SDH_STATUS_CLR, val) |
| 323 | #define bfin_read_SDH_MASK0() bfin_read32(SDH_MASK0) |
| 324 | #define bfin_write_SDH_MASK0(val) bfin_write32(SDH_MASK0, val) |
| 325 | #define bfin_read_SDH_MASK1() bfin_read32(SDH_MASK1) |
| 326 | #define bfin_write_SDH_MASK1(val) bfin_write32(SDH_MASK1, val) |
| 327 | #define bfin_read_SDH_FIFO_CNT() bfin_read16(SDH_FIFO_CNT) |
| 328 | #define bfin_write_SDH_FIFO_CNT(val) bfin_write16(SDH_FIFO_CNT, val) |
| 329 | #define bfin_read_SDH_FIFO() bfin_read32(SDH_FIFO) |
| 330 | #define bfin_write_SDH_FIFO(val) bfin_write32(SDH_FIFO, val) |
| 331 | #define bfin_read_SDH_E_STATUS() bfin_read16(SDH_E_STATUS) |
| 332 | #define bfin_write_SDH_E_STATUS(val) bfin_write16(SDH_E_STATUS, val) |
| 333 | #define bfin_read_SDH_E_MASK() bfin_read16(SDH_E_MASK) |
| 334 | #define bfin_write_SDH_E_MASK(val) bfin_write16(SDH_E_MASK, val) |
| 335 | #define bfin_read_SDH_CFG() bfin_read16(SDH_CFG) |
| 336 | #define bfin_write_SDH_CFG(val) bfin_write16(SDH_CFG, val) |
| 337 | #define bfin_read_SDH_RD_WAIT_EN() bfin_read16(SDH_RD_WAIT_EN) |
| 338 | #define bfin_write_SDH_RD_WAIT_EN(val) bfin_write16(SDH_RD_WAIT_EN, val) |
| 339 | #define bfin_read_SDH_PID0() bfin_read16(SDH_PID0) |
| 340 | #define bfin_write_SDH_PID0(val) bfin_write16(SDH_PID0, val) |
| 341 | #define bfin_read_SDH_PID1() bfin_read16(SDH_PID1) |
| 342 | #define bfin_write_SDH_PID1(val) bfin_write16(SDH_PID1, val) |
| 343 | #define bfin_read_SDH_PID2() bfin_read16(SDH_PID2) |
| 344 | #define bfin_write_SDH_PID2(val) bfin_write16(SDH_PID2, val) |
| 345 | #define bfin_read_SDH_PID3() bfin_read16(SDH_PID3) |
| 346 | #define bfin_write_SDH_PID3(val) bfin_write16(SDH_PID3, val) |
| 347 | #define bfin_read_SDH_PID4() bfin_read16(SDH_PID4) |
| 348 | #define bfin_write_SDH_PID4(val) bfin_write16(SDH_PID4, val) |
| 349 | #define bfin_read_SDH_PID5() bfin_read16(SDH_PID5) |
| 350 | #define bfin_write_SDH_PID5(val) bfin_write16(SDH_PID5, val) |
| 351 | #define bfin_read_SDH_PID6() bfin_read16(SDH_PID6) |
| 352 | #define bfin_write_SDH_PID6(val) bfin_write16(SDH_PID6, val) |
| 353 | #define bfin_read_SDH_PID7() bfin_read16(SDH_PID7) |
| 354 | #define bfin_write_SDH_PID7(val) bfin_write16(SDH_PID7, val) |
| 355 | |
| 356 | /* HOST Port Registers */ |
| 357 | |
| 358 | #define bfin_read_HOST_CONTROL() bfin_read16(HOST_CONTROL) |
| 359 | #define bfin_write_HOST_CONTROL(val) bfin_write16(HOST_CONTROL, val) |
| 360 | #define bfin_read_HOST_STATUS() bfin_read16(HOST_STATUS) |
| 361 | #define bfin_write_HOST_STATUS(val) bfin_write16(HOST_STATUS, val) |
| 362 | #define bfin_read_HOST_TIMEOUT() bfin_read16(HOST_TIMEOUT) |
| 363 | #define bfin_write_HOST_TIMEOUT(val) bfin_write16(HOST_TIMEOUT, val) |
| 364 | |
| 365 | /* USB Control Registers */ |
| 366 | |
| 367 | #define bfin_read_USB_FADDR() bfin_read16(USB_FADDR) |
| 368 | #define bfin_write_USB_FADDR(val) bfin_write16(USB_FADDR, val) |
| 369 | #define bfin_read_USB_POWER() bfin_read16(USB_POWER) |
| 370 | #define bfin_write_USB_POWER(val) bfin_write16(USB_POWER, val) |
| 371 | #define bfin_read_USB_INTRTX() bfin_read16(USB_INTRTX) |
| 372 | #define bfin_write_USB_INTRTX(val) bfin_write16(USB_INTRTX, val) |
| 373 | #define bfin_read_USB_INTRRX() bfin_read16(USB_INTRRX) |
| 374 | #define bfin_write_USB_INTRRX(val) bfin_write16(USB_INTRRX, val) |
| 375 | #define bfin_read_USB_INTRTXE() bfin_read16(USB_INTRTXE) |
| 376 | #define bfin_write_USB_INTRTXE(val) bfin_write16(USB_INTRTXE, val) |
| 377 | #define bfin_read_USB_INTRRXE() bfin_read16(USB_INTRRXE) |
| 378 | #define bfin_write_USB_INTRRXE(val) bfin_write16(USB_INTRRXE, val) |
| 379 | #define bfin_read_USB_INTRUSB() bfin_read16(USB_INTRUSB) |
| 380 | #define bfin_write_USB_INTRUSB(val) bfin_write16(USB_INTRUSB, val) |
| 381 | #define bfin_read_USB_INTRUSBE() bfin_read16(USB_INTRUSBE) |
| 382 | #define bfin_write_USB_INTRUSBE(val) bfin_write16(USB_INTRUSBE, val) |
| 383 | #define bfin_read_USB_FRAME() bfin_read16(USB_FRAME) |
| 384 | #define bfin_write_USB_FRAME(val) bfin_write16(USB_FRAME, val) |
| 385 | #define bfin_read_USB_INDEX() bfin_read16(USB_INDEX) |
| 386 | #define bfin_write_USB_INDEX(val) bfin_write16(USB_INDEX, val) |
| 387 | #define bfin_read_USB_TESTMODE() bfin_read16(USB_TESTMODE) |
| 388 | #define bfin_write_USB_TESTMODE(val) bfin_write16(USB_TESTMODE, val) |
| 389 | #define bfin_read_USB_GLOBINTR() bfin_read16(USB_GLOBINTR) |
| 390 | #define bfin_write_USB_GLOBINTR(val) bfin_write16(USB_GLOBINTR, val) |
| 391 | #define bfin_read_USB_GLOBAL_CTL() bfin_read16(USB_GLOBAL_CTL) |
| 392 | #define bfin_write_USB_GLOBAL_CTL(val) bfin_write16(USB_GLOBAL_CTL, val) |
| 393 | |
| 394 | /* USB Packet Control Registers */ |
| 395 | |
| 396 | #define bfin_read_USB_TX_MAX_PACKET() bfin_read16(USB_TX_MAX_PACKET) |
| 397 | #define bfin_write_USB_TX_MAX_PACKET(val) bfin_write16(USB_TX_MAX_PACKET, val) |
| 398 | #define bfin_read_USB_CSR0() bfin_read16(USB_CSR0) |
| 399 | #define bfin_write_USB_CSR0(val) bfin_write16(USB_CSR0, val) |
| 400 | #define bfin_read_USB_TXCSR() bfin_read16(USB_TXCSR) |
| 401 | #define bfin_write_USB_TXCSR(val) bfin_write16(USB_TXCSR, val) |
| 402 | #define bfin_read_USB_RX_MAX_PACKET() bfin_read16(USB_RX_MAX_PACKET) |
| 403 | #define bfin_write_USB_RX_MAX_PACKET(val) bfin_write16(USB_RX_MAX_PACKET, val) |
| 404 | #define bfin_read_USB_RXCSR() bfin_read16(USB_RXCSR) |
| 405 | #define bfin_write_USB_RXCSR(val) bfin_write16(USB_RXCSR, val) |
| 406 | #define bfin_read_USB_COUNT0() bfin_read16(USB_COUNT0) |
| 407 | #define bfin_write_USB_COUNT0(val) bfin_write16(USB_COUNT0, val) |
| 408 | #define bfin_read_USB_RXCOUNT() bfin_read16(USB_RXCOUNT) |
| 409 | #define bfin_write_USB_RXCOUNT(val) bfin_write16(USB_RXCOUNT, val) |
| 410 | #define bfin_read_USB_TXTYPE() bfin_read16(USB_TXTYPE) |
| 411 | #define bfin_write_USB_TXTYPE(val) bfin_write16(USB_TXTYPE, val) |
| 412 | #define bfin_read_USB_NAKLIMIT0() bfin_read16(USB_NAKLIMIT0) |
| 413 | #define bfin_write_USB_NAKLIMIT0(val) bfin_write16(USB_NAKLIMIT0, val) |
| 414 | #define bfin_read_USB_TXINTERVAL() bfin_read16(USB_TXINTERVAL) |
| 415 | #define bfin_write_USB_TXINTERVAL(val) bfin_write16(USB_TXINTERVAL, val) |
| 416 | #define bfin_read_USB_RXTYPE() bfin_read16(USB_RXTYPE) |
| 417 | #define bfin_write_USB_RXTYPE(val) bfin_write16(USB_RXTYPE, val) |
| 418 | #define bfin_read_USB_RXINTERVAL() bfin_read16(USB_RXINTERVAL) |
| 419 | #define bfin_write_USB_RXINTERVAL(val) bfin_write16(USB_RXINTERVAL, val) |
| 420 | #define bfin_read_USB_TXCOUNT() bfin_read16(USB_TXCOUNT) |
| 421 | #define bfin_write_USB_TXCOUNT(val) bfin_write16(USB_TXCOUNT, val) |
| 422 | |
| 423 | /* USB Endbfin_read_()oint FIFO Registers */ |
| 424 | |
| 425 | #define bfin_read_USB_EP0_FIFO() bfin_read16(USB_EP0_FIFO) |
| 426 | #define bfin_write_USB_EP0_FIFO(val) bfin_write16(USB_EP0_FIFO, val) |
| 427 | #define bfin_read_USB_EP1_FIFO() bfin_read16(USB_EP1_FIFO) |
| 428 | #define bfin_write_USB_EP1_FIFO(val) bfin_write16(USB_EP1_FIFO, val) |
| 429 | #define bfin_read_USB_EP2_FIFO() bfin_read16(USB_EP2_FIFO) |
| 430 | #define bfin_write_USB_EP2_FIFO(val) bfin_write16(USB_EP2_FIFO, val) |
| 431 | #define bfin_read_USB_EP3_FIFO() bfin_read16(USB_EP3_FIFO) |
| 432 | #define bfin_write_USB_EP3_FIFO(val) bfin_write16(USB_EP3_FIFO, val) |
| 433 | #define bfin_read_USB_EP4_FIFO() bfin_read16(USB_EP4_FIFO) |
| 434 | #define bfin_write_USB_EP4_FIFO(val) bfin_write16(USB_EP4_FIFO, val) |
| 435 | #define bfin_read_USB_EP5_FIFO() bfin_read16(USB_EP5_FIFO) |
| 436 | #define bfin_write_USB_EP5_FIFO(val) bfin_write16(USB_EP5_FIFO, val) |
| 437 | #define bfin_read_USB_EP6_FIFO() bfin_read16(USB_EP6_FIFO) |
| 438 | #define bfin_write_USB_EP6_FIFO(val) bfin_write16(USB_EP6_FIFO, val) |
| 439 | #define bfin_read_USB_EP7_FIFO() bfin_read16(USB_EP7_FIFO) |
| 440 | #define bfin_write_USB_EP7_FIFO(val) bfin_write16(USB_EP7_FIFO, val) |
| 441 | |
| 442 | /* USB OTG Control Registers */ |
| 443 | |
| 444 | #define bfin_read_USB_OTG_DEV_CTL() bfin_read16(USB_OTG_DEV_CTL) |
| 445 | #define bfin_write_USB_OTG_DEV_CTL(val) bfin_write16(USB_OTG_DEV_CTL, val) |
| 446 | #define bfin_read_USB_OTG_VBUS_IRQ() bfin_read16(USB_OTG_VBUS_IRQ) |
| 447 | #define bfin_write_USB_OTG_VBUS_IRQ(val) bfin_write16(USB_OTG_VBUS_IRQ, val) |
| 448 | #define bfin_read_USB_OTG_VBUS_MASK() bfin_read16(USB_OTG_VBUS_MASK) |
| 449 | #define bfin_write_USB_OTG_VBUS_MASK(val) bfin_write16(USB_OTG_VBUS_MASK, val) |
| 450 | |
| 451 | /* USB Phy Control Registers */ |
| 452 | |
| 453 | #define bfin_read_USB_LINKINFO() bfin_read16(USB_LINKINFO) |
| 454 | #define bfin_write_USB_LINKINFO(val) bfin_write16(USB_LINKINFO, val) |
| 455 | #define bfin_read_USB_VPLEN() bfin_read16(USB_VPLEN) |
| 456 | #define bfin_write_USB_VPLEN(val) bfin_write16(USB_VPLEN, val) |
| 457 | #define bfin_read_USB_HS_EOF1() bfin_read16(USB_HS_EOF1) |
| 458 | #define bfin_write_USB_HS_EOF1(val) bfin_write16(USB_HS_EOF1, val) |
| 459 | #define bfin_read_USB_FS_EOF1() bfin_read16(USB_FS_EOF1) |
| 460 | #define bfin_write_USB_FS_EOF1(val) bfin_write16(USB_FS_EOF1, val) |
| 461 | #define bfin_read_USB_LS_EOF1() bfin_read16(USB_LS_EOF1) |
| 462 | #define bfin_write_USB_LS_EOF1(val) bfin_write16(USB_LS_EOF1, val) |
| 463 | |
| 464 | /* (APHY_CNTRL is for ADI usage only) */ |
| 465 | |
| 466 | #define bfin_read_USB_APHY_CNTRL() bfin_read16(USB_APHY_CNTRL) |
| 467 | #define bfin_write_USB_APHY_CNTRL(val) bfin_write16(USB_APHY_CNTRL, val) |
| 468 | |
| 469 | /* (APHY_CALIB is for ADI usage only) */ |
| 470 | |
| 471 | #define bfin_read_USB_APHY_CALIB() bfin_read16(USB_APHY_CALIB) |
| 472 | #define bfin_write_USB_APHY_CALIB(val) bfin_write16(USB_APHY_CALIB, val) |
| 473 | #define bfin_read_USB_APHY_CNTRL2() bfin_read16(USB_APHY_CNTRL2) |
| 474 | #define bfin_write_USB_APHY_CNTRL2(val) bfin_write16(USB_APHY_CNTRL2, val) |
| 475 | |
| 476 | /* (PHY_TEST is for ADI usage only) */ |
| 477 | |
| 478 | #define bfin_read_USB_PHY_TEST() bfin_read16(USB_PHY_TEST) |
| 479 | #define bfin_write_USB_PHY_TEST(val) bfin_write16(USB_PHY_TEST, val) |
| 480 | #define bfin_read_USB_PLLOSC_CTRL() bfin_read16(USB_PLLOSC_CTRL) |
| 481 | #define bfin_write_USB_PLLOSC_CTRL(val) bfin_write16(USB_PLLOSC_CTRL, val) |
| 482 | #define bfin_read_USB_SRP_CLKDIV() bfin_read16(USB_SRP_CLKDIV) |
| 483 | #define bfin_write_USB_SRP_CLKDIV(val) bfin_write16(USB_SRP_CLKDIV, val) |
| 484 | |
| 485 | /* USB Endbfin_read_()oint 0 Control Registers */ |
| 486 | |
| 487 | #define bfin_read_USB_EP_NI0_TXMAXP() bfin_read16(USB_EP_NI0_TXMAXP) |
| 488 | #define bfin_write_USB_EP_NI0_TXMAXP(val) bfin_write16(USB_EP_NI0_TXMAXP, val) |
| 489 | #define bfin_read_USB_EP_NI0_TXCSR() bfin_read16(USB_EP_NI0_TXCSR) |
| 490 | #define bfin_write_USB_EP_NI0_TXCSR(val) bfin_write16(USB_EP_NI0_TXCSR, val) |
| 491 | #define bfin_read_USB_EP_NI0_RXMAXP() bfin_read16(USB_EP_NI0_RXMAXP) |
| 492 | #define bfin_write_USB_EP_NI0_RXMAXP(val) bfin_write16(USB_EP_NI0_RXMAXP, val) |
| 493 | #define bfin_read_USB_EP_NI0_RXCSR() bfin_read16(USB_EP_NI0_RXCSR) |
| 494 | #define bfin_write_USB_EP_NI0_RXCSR(val) bfin_write16(USB_EP_NI0_RXCSR, val) |
| 495 | #define bfin_read_USB_EP_NI0_RXCOUNT() bfin_read16(USB_EP_NI0_RXCOUNT) |
| 496 | #define bfin_write_USB_EP_NI0_RXCOUNT(val) bfin_write16(USB_EP_NI0_RXCOUNT, val) |
| 497 | #define bfin_read_USB_EP_NI0_TXTYPE() bfin_read16(USB_EP_NI0_TXTYPE) |
| 498 | #define bfin_write_USB_EP_NI0_TXTYPE(val) bfin_write16(USB_EP_NI0_TXTYPE, val) |
| 499 | #define bfin_read_USB_EP_NI0_TXINTERVAL() bfin_read16(USB_EP_NI0_TXINTERVAL) |
| 500 | #define bfin_write_USB_EP_NI0_TXINTERVAL(val) bfin_write16(USB_EP_NI0_TXINTERVAL, val) |
| 501 | #define bfin_read_USB_EP_NI0_RXTYPE() bfin_read16(USB_EP_NI0_RXTYPE) |
| 502 | #define bfin_write_USB_EP_NI0_RXTYPE(val) bfin_write16(USB_EP_NI0_RXTYPE, val) |
| 503 | #define bfin_read_USB_EP_NI0_RXINTERVAL() bfin_read16(USB_EP_NI0_RXINTERVAL) |
| 504 | #define bfin_write_USB_EP_NI0_RXINTERVAL(val) bfin_write16(USB_EP_NI0_RXINTERVAL, val) |
| 505 | |
| 506 | /* USB Endbfin_read_()oint 1 Control Registers */ |
| 507 | |
| 508 | #define bfin_read_USB_EP_NI0_TXCOUNT() bfin_read16(USB_EP_NI0_TXCOUNT) |
| 509 | #define bfin_write_USB_EP_NI0_TXCOUNT(val) bfin_write16(USB_EP_NI0_TXCOUNT, val) |
| 510 | #define bfin_read_USB_EP_NI1_TXMAXP() bfin_read16(USB_EP_NI1_TXMAXP) |
| 511 | #define bfin_write_USB_EP_NI1_TXMAXP(val) bfin_write16(USB_EP_NI1_TXMAXP, val) |
| 512 | #define bfin_read_USB_EP_NI1_TXCSR() bfin_read16(USB_EP_NI1_TXCSR) |
| 513 | #define bfin_write_USB_EP_NI1_TXCSR(val) bfin_write16(USB_EP_NI1_TXCSR, val) |
| 514 | #define bfin_read_USB_EP_NI1_RXMAXP() bfin_read16(USB_EP_NI1_RXMAXP) |
| 515 | #define bfin_write_USB_EP_NI1_RXMAXP(val) bfin_write16(USB_EP_NI1_RXMAXP, val) |
| 516 | #define bfin_read_USB_EP_NI1_RXCSR() bfin_read16(USB_EP_NI1_RXCSR) |
| 517 | #define bfin_write_USB_EP_NI1_RXCSR(val) bfin_write16(USB_EP_NI1_RXCSR, val) |
| 518 | #define bfin_read_USB_EP_NI1_RXCOUNT() bfin_read16(USB_EP_NI1_RXCOUNT) |
| 519 | #define bfin_write_USB_EP_NI1_RXCOUNT(val) bfin_write16(USB_EP_NI1_RXCOUNT, val) |
| 520 | #define bfin_read_USB_EP_NI1_TXTYPE() bfin_read16(USB_EP_NI1_TXTYPE) |
| 521 | #define bfin_write_USB_EP_NI1_TXTYPE(val) bfin_write16(USB_EP_NI1_TXTYPE, val) |
| 522 | #define bfin_read_USB_EP_NI1_TXINTERVAL() bfin_read16(USB_EP_NI1_TXINTERVAL) |
| 523 | #define bfin_write_USB_EP_NI1_TXINTERVAL(val) bfin_write16(USB_EP_NI1_TXINTERVAL, val) |
| 524 | #define bfin_read_USB_EP_NI1_RXTYPE() bfin_read16(USB_EP_NI1_RXTYPE) |
| 525 | #define bfin_write_USB_EP_NI1_RXTYPE(val) bfin_write16(USB_EP_NI1_RXTYPE, val) |
| 526 | #define bfin_read_USB_EP_NI1_RXINTERVAL() bfin_read16(USB_EP_NI1_RXINTERVAL) |
| 527 | #define bfin_write_USB_EP_NI1_RXINTERVAL(val) bfin_write16(USB_EP_NI1_RXINTERVAL, val) |
| 528 | |
| 529 | /* USB Endbfin_read_()oint 2 Control Registers */ |
| 530 | |
| 531 | #define bfin_read_USB_EP_NI1_TXCOUNT() bfin_read16(USB_EP_NI1_TXCOUNT) |
| 532 | #define bfin_write_USB_EP_NI1_TXCOUNT(val) bfin_write16(USB_EP_NI1_TXCOUNT, val) |
| 533 | #define bfin_read_USB_EP_NI2_TXMAXP() bfin_read16(USB_EP_NI2_TXMAXP) |
| 534 | #define bfin_write_USB_EP_NI2_TXMAXP(val) bfin_write16(USB_EP_NI2_TXMAXP, val) |
| 535 | #define bfin_read_USB_EP_NI2_TXCSR() bfin_read16(USB_EP_NI2_TXCSR) |
| 536 | #define bfin_write_USB_EP_NI2_TXCSR(val) bfin_write16(USB_EP_NI2_TXCSR, val) |
| 537 | #define bfin_read_USB_EP_NI2_RXMAXP() bfin_read16(USB_EP_NI2_RXMAXP) |
| 538 | #define bfin_write_USB_EP_NI2_RXMAXP(val) bfin_write16(USB_EP_NI2_RXMAXP, val) |
| 539 | #define bfin_read_USB_EP_NI2_RXCSR() bfin_read16(USB_EP_NI2_RXCSR) |
| 540 | #define bfin_write_USB_EP_NI2_RXCSR(val) bfin_write16(USB_EP_NI2_RXCSR, val) |
| 541 | #define bfin_read_USB_EP_NI2_RXCOUNT() bfin_read16(USB_EP_NI2_RXCOUNT) |
| 542 | #define bfin_write_USB_EP_NI2_RXCOUNT(val) bfin_write16(USB_EP_NI2_RXCOUNT, val) |
| 543 | #define bfin_read_USB_EP_NI2_TXTYPE() bfin_read16(USB_EP_NI2_TXTYPE) |
| 544 | #define bfin_write_USB_EP_NI2_TXTYPE(val) bfin_write16(USB_EP_NI2_TXTYPE, val) |
| 545 | #define bfin_read_USB_EP_NI2_TXINTERVAL() bfin_read16(USB_EP_NI2_TXINTERVAL) |
| 546 | #define bfin_write_USB_EP_NI2_TXINTERVAL(val) bfin_write16(USB_EP_NI2_TXINTERVAL, val) |
| 547 | #define bfin_read_USB_EP_NI2_RXTYPE() bfin_read16(USB_EP_NI2_RXTYPE) |
| 548 | #define bfin_write_USB_EP_NI2_RXTYPE(val) bfin_write16(USB_EP_NI2_RXTYPE, val) |
| 549 | #define bfin_read_USB_EP_NI2_RXINTERVAL() bfin_read16(USB_EP_NI2_RXINTERVAL) |
| 550 | #define bfin_write_USB_EP_NI2_RXINTERVAL(val) bfin_write16(USB_EP_NI2_RXINTERVAL, val) |
| 551 | |
| 552 | /* USB Endbfin_read_()oint 3 Control Registers */ |
| 553 | |
| 554 | #define bfin_read_USB_EP_NI2_TXCOUNT() bfin_read16(USB_EP_NI2_TXCOUNT) |
| 555 | #define bfin_write_USB_EP_NI2_TXCOUNT(val) bfin_write16(USB_EP_NI2_TXCOUNT, val) |
| 556 | #define bfin_read_USB_EP_NI3_TXMAXP() bfin_read16(USB_EP_NI3_TXMAXP) |
| 557 | #define bfin_write_USB_EP_NI3_TXMAXP(val) bfin_write16(USB_EP_NI3_TXMAXP, val) |
| 558 | #define bfin_read_USB_EP_NI3_TXCSR() bfin_read16(USB_EP_NI3_TXCSR) |
| 559 | #define bfin_write_USB_EP_NI3_TXCSR(val) bfin_write16(USB_EP_NI3_TXCSR, val) |
| 560 | #define bfin_read_USB_EP_NI3_RXMAXP() bfin_read16(USB_EP_NI3_RXMAXP) |
| 561 | #define bfin_write_USB_EP_NI3_RXMAXP(val) bfin_write16(USB_EP_NI3_RXMAXP, val) |
| 562 | #define bfin_read_USB_EP_NI3_RXCSR() bfin_read16(USB_EP_NI3_RXCSR) |
| 563 | #define bfin_write_USB_EP_NI3_RXCSR(val) bfin_write16(USB_EP_NI3_RXCSR, val) |
| 564 | #define bfin_read_USB_EP_NI3_RXCOUNT() bfin_read16(USB_EP_NI3_RXCOUNT) |
| 565 | #define bfin_write_USB_EP_NI3_RXCOUNT(val) bfin_write16(USB_EP_NI3_RXCOUNT, val) |
| 566 | #define bfin_read_USB_EP_NI3_TXTYPE() bfin_read16(USB_EP_NI3_TXTYPE) |
| 567 | #define bfin_write_USB_EP_NI3_TXTYPE(val) bfin_write16(USB_EP_NI3_TXTYPE, val) |
| 568 | #define bfin_read_USB_EP_NI3_TXINTERVAL() bfin_read16(USB_EP_NI3_TXINTERVAL) |
| 569 | #define bfin_write_USB_EP_NI3_TXINTERVAL(val) bfin_write16(USB_EP_NI3_TXINTERVAL, val) |
| 570 | #define bfin_read_USB_EP_NI3_RXTYPE() bfin_read16(USB_EP_NI3_RXTYPE) |
| 571 | #define bfin_write_USB_EP_NI3_RXTYPE(val) bfin_write16(USB_EP_NI3_RXTYPE, val) |
| 572 | #define bfin_read_USB_EP_NI3_RXINTERVAL() bfin_read16(USB_EP_NI3_RXINTERVAL) |
| 573 | #define bfin_write_USB_EP_NI3_RXINTERVAL(val) bfin_write16(USB_EP_NI3_RXINTERVAL, val) |
| 574 | |
| 575 | /* USB Endbfin_read_()oint 4 Control Registers */ |
| 576 | |
| 577 | #define bfin_read_USB_EP_NI3_TXCOUNT() bfin_read16(USB_EP_NI3_TXCOUNT) |
| 578 | #define bfin_write_USB_EP_NI3_TXCOUNT(val) bfin_write16(USB_EP_NI3_TXCOUNT, val) |
| 579 | #define bfin_read_USB_EP_NI4_TXMAXP() bfin_read16(USB_EP_NI4_TXMAXP) |
| 580 | #define bfin_write_USB_EP_NI4_TXMAXP(val) bfin_write16(USB_EP_NI4_TXMAXP, val) |
| 581 | #define bfin_read_USB_EP_NI4_TXCSR() bfin_read16(USB_EP_NI4_TXCSR) |
| 582 | #define bfin_write_USB_EP_NI4_TXCSR(val) bfin_write16(USB_EP_NI4_TXCSR, val) |
| 583 | #define bfin_read_USB_EP_NI4_RXMAXP() bfin_read16(USB_EP_NI4_RXMAXP) |
| 584 | #define bfin_write_USB_EP_NI4_RXMAXP(val) bfin_write16(USB_EP_NI4_RXMAXP, val) |
| 585 | #define bfin_read_USB_EP_NI4_RXCSR() bfin_read16(USB_EP_NI4_RXCSR) |
| 586 | #define bfin_write_USB_EP_NI4_RXCSR(val) bfin_write16(USB_EP_NI4_RXCSR, val) |
| 587 | #define bfin_read_USB_EP_NI4_RXCOUNT() bfin_read16(USB_EP_NI4_RXCOUNT) |
| 588 | #define bfin_write_USB_EP_NI4_RXCOUNT(val) bfin_write16(USB_EP_NI4_RXCOUNT, val) |
| 589 | #define bfin_read_USB_EP_NI4_TXTYPE() bfin_read16(USB_EP_NI4_TXTYPE) |
| 590 | #define bfin_write_USB_EP_NI4_TXTYPE(val) bfin_write16(USB_EP_NI4_TXTYPE, val) |
| 591 | #define bfin_read_USB_EP_NI4_TXINTERVAL() bfin_read16(USB_EP_NI4_TXINTERVAL) |
| 592 | #define bfin_write_USB_EP_NI4_TXINTERVAL(val) bfin_write16(USB_EP_NI4_TXINTERVAL, val) |
| 593 | #define bfin_read_USB_EP_NI4_RXTYPE() bfin_read16(USB_EP_NI4_RXTYPE) |
| 594 | #define bfin_write_USB_EP_NI4_RXTYPE(val) bfin_write16(USB_EP_NI4_RXTYPE, val) |
| 595 | #define bfin_read_USB_EP_NI4_RXINTERVAL() bfin_read16(USB_EP_NI4_RXINTERVAL) |
| 596 | #define bfin_write_USB_EP_NI4_RXINTERVAL(val) bfin_write16(USB_EP_NI4_RXINTERVAL, val) |
| 597 | |
| 598 | /* USB Endbfin_read_()oint 5 Control Registers */ |
| 599 | |
| 600 | #define bfin_read_USB_EP_NI4_TXCOUNT() bfin_read16(USB_EP_NI4_TXCOUNT) |
| 601 | #define bfin_write_USB_EP_NI4_TXCOUNT(val) bfin_write16(USB_EP_NI4_TXCOUNT, val) |
| 602 | #define bfin_read_USB_EP_NI5_TXMAXP() bfin_read16(USB_EP_NI5_TXMAXP) |
| 603 | #define bfin_write_USB_EP_NI5_TXMAXP(val) bfin_write16(USB_EP_NI5_TXMAXP, val) |
| 604 | #define bfin_read_USB_EP_NI5_TXCSR() bfin_read16(USB_EP_NI5_TXCSR) |
| 605 | #define bfin_write_USB_EP_NI5_TXCSR(val) bfin_write16(USB_EP_NI5_TXCSR, val) |
| 606 | #define bfin_read_USB_EP_NI5_RXMAXP() bfin_read16(USB_EP_NI5_RXMAXP) |
| 607 | #define bfin_write_USB_EP_NI5_RXMAXP(val) bfin_write16(USB_EP_NI5_RXMAXP, val) |
| 608 | #define bfin_read_USB_EP_NI5_RXCSR() bfin_read16(USB_EP_NI5_RXCSR) |
| 609 | #define bfin_write_USB_EP_NI5_RXCSR(val) bfin_write16(USB_EP_NI5_RXCSR, val) |
| 610 | #define bfin_read_USB_EP_NI5_RXCOUNT() bfin_read16(USB_EP_NI5_RXCOUNT) |
| 611 | #define bfin_write_USB_EP_NI5_RXCOUNT(val) bfin_write16(USB_EP_NI5_RXCOUNT, val) |
| 612 | #define bfin_read_USB_EP_NI5_TXTYPE() bfin_read16(USB_EP_NI5_TXTYPE) |
| 613 | #define bfin_write_USB_EP_NI5_TXTYPE(val) bfin_write16(USB_EP_NI5_TXTYPE, val) |
| 614 | #define bfin_read_USB_EP_NI5_TXINTERVAL() bfin_read16(USB_EP_NI5_TXINTERVAL) |
| 615 | #define bfin_write_USB_EP_NI5_TXINTERVAL(val) bfin_write16(USB_EP_NI5_TXINTERVAL, val) |
| 616 | #define bfin_read_USB_EP_NI5_RXTYPE() bfin_read16(USB_EP_NI5_RXTYPE) |
| 617 | #define bfin_write_USB_EP_NI5_RXTYPE(val) bfin_write16(USB_EP_NI5_RXTYPE, val) |
| 618 | #define bfin_read_USB_EP_NI5_RXINTERVAL() bfin_read16(USB_EP_NI5_RXINTERVAL) |
| 619 | #define bfin_write_USB_EP_NI5_RXINTERVAL(val) bfin_write16(USB_EP_NI5_RXINTERVAL, val) |
| 620 | |
| 621 | /* USB Endbfin_read_()oint 6 Control Registers */ |
| 622 | |
| 623 | #define bfin_read_USB_EP_NI5_TXCOUNT() bfin_read16(USB_EP_NI5_TXCOUNT) |
| 624 | #define bfin_write_USB_EP_NI5_TXCOUNT(val) bfin_write16(USB_EP_NI5_TXCOUNT, val) |
| 625 | #define bfin_read_USB_EP_NI6_TXMAXP() bfin_read16(USB_EP_NI6_TXMAXP) |
| 626 | #define bfin_write_USB_EP_NI6_TXMAXP(val) bfin_write16(USB_EP_NI6_TXMAXP, val) |
| 627 | #define bfin_read_USB_EP_NI6_TXCSR() bfin_read16(USB_EP_NI6_TXCSR) |
| 628 | #define bfin_write_USB_EP_NI6_TXCSR(val) bfin_write16(USB_EP_NI6_TXCSR, val) |
| 629 | #define bfin_read_USB_EP_NI6_RXMAXP() bfin_read16(USB_EP_NI6_RXMAXP) |
| 630 | #define bfin_write_USB_EP_NI6_RXMAXP(val) bfin_write16(USB_EP_NI6_RXMAXP, val) |
| 631 | #define bfin_read_USB_EP_NI6_RXCSR() bfin_read16(USB_EP_NI6_RXCSR) |
| 632 | #define bfin_write_USB_EP_NI6_RXCSR(val) bfin_write16(USB_EP_NI6_RXCSR, val) |
| 633 | #define bfin_read_USB_EP_NI6_RXCOUNT() bfin_read16(USB_EP_NI6_RXCOUNT) |
| 634 | #define bfin_write_USB_EP_NI6_RXCOUNT(val) bfin_write16(USB_EP_NI6_RXCOUNT, val) |
| 635 | #define bfin_read_USB_EP_NI6_TXTYPE() bfin_read16(USB_EP_NI6_TXTYPE) |
| 636 | #define bfin_write_USB_EP_NI6_TXTYPE(val) bfin_write16(USB_EP_NI6_TXTYPE, val) |
| 637 | #define bfin_read_USB_EP_NI6_TXINTERVAL() bfin_read16(USB_EP_NI6_TXINTERVAL) |
| 638 | #define bfin_write_USB_EP_NI6_TXINTERVAL(val) bfin_write16(USB_EP_NI6_TXINTERVAL, val) |
| 639 | #define bfin_read_USB_EP_NI6_RXTYPE() bfin_read16(USB_EP_NI6_RXTYPE) |
| 640 | #define bfin_write_USB_EP_NI6_RXTYPE(val) bfin_write16(USB_EP_NI6_RXTYPE, val) |
| 641 | #define bfin_read_USB_EP_NI6_RXINTERVAL() bfin_read16(USB_EP_NI6_RXINTERVAL) |
| 642 | #define bfin_write_USB_EP_NI6_RXINTERVAL(val) bfin_write16(USB_EP_NI6_RXINTERVAL, val) |
| 643 | |
| 644 | /* USB Endbfin_read_()oint 7 Control Registers */ |
| 645 | |
| 646 | #define bfin_read_USB_EP_NI6_TXCOUNT() bfin_read16(USB_EP_NI6_TXCOUNT) |
| 647 | #define bfin_write_USB_EP_NI6_TXCOUNT(val) bfin_write16(USB_EP_NI6_TXCOUNT, val) |
| 648 | #define bfin_read_USB_EP_NI7_TXMAXP() bfin_read16(USB_EP_NI7_TXMAXP) |
| 649 | #define bfin_write_USB_EP_NI7_TXMAXP(val) bfin_write16(USB_EP_NI7_TXMAXP, val) |
| 650 | #define bfin_read_USB_EP_NI7_TXCSR() bfin_read16(USB_EP_NI7_TXCSR) |
| 651 | #define bfin_write_USB_EP_NI7_TXCSR(val) bfin_write16(USB_EP_NI7_TXCSR, val) |
| 652 | #define bfin_read_USB_EP_NI7_RXMAXP() bfin_read16(USB_EP_NI7_RXMAXP) |
| 653 | #define bfin_write_USB_EP_NI7_RXMAXP(val) bfin_write16(USB_EP_NI7_RXMAXP, val) |
| 654 | #define bfin_read_USB_EP_NI7_RXCSR() bfin_read16(USB_EP_NI7_RXCSR) |
| 655 | #define bfin_write_USB_EP_NI7_RXCSR(val) bfin_write16(USB_EP_NI7_RXCSR, val) |
| 656 | #define bfin_read_USB_EP_NI7_RXCOUNT() bfin_read16(USB_EP_NI7_RXCOUNT) |
| 657 | #define bfin_write_USB_EP_NI7_RXCOUNT(val) bfin_write16(USB_EP_NI7_RXCOUNT, val) |
| 658 | #define bfin_read_USB_EP_NI7_TXTYPE() bfin_read16(USB_EP_NI7_TXTYPE) |
| 659 | #define bfin_write_USB_EP_NI7_TXTYPE(val) bfin_write16(USB_EP_NI7_TXTYPE, val) |
| 660 | #define bfin_read_USB_EP_NI7_TXINTERVAL() bfin_read16(USB_EP_NI7_TXINTERVAL) |
| 661 | #define bfin_write_USB_EP_NI7_TXINTERVAL(val) bfin_write16(USB_EP_NI7_TXINTERVAL, val) |
| 662 | #define bfin_read_USB_EP_NI7_RXTYPE() bfin_read16(USB_EP_NI7_RXTYPE) |
| 663 | #define bfin_write_USB_EP_NI7_RXTYPE(val) bfin_write16(USB_EP_NI7_RXTYPE, val) |
| 664 | #define bfin_read_USB_EP_NI7_RXINTERVAL() bfin_read16(USB_EP_NI7_RXINTERVAL) |
| 665 | #define bfin_write_USB_EP_NI7_RXINTERVAL(val) bfin_write16(USB_EP_NI7_RXINTERVAL, val) |
| 666 | #define bfin_read_USB_EP_NI7_TXCOUNT() bfin_read16(USB_EP_NI7_TXCOUNT) |
| 667 | #define bfin_write_USB_EP_NI7_TXCOUNT(val) bfin_write16(USB_EP_NI7_TXCOUNT, val) |
| 668 | #define bfin_read_USB_DMA_INTERRUPT() bfin_read16(USB_DMA_INTERRUPT) |
| 669 | #define bfin_write_USB_DMA_INTERRUPT(val) bfin_write16(USB_DMA_INTERRUPT, val) |
| 670 | |
| 671 | /* USB Channel 0 Config Registers */ |
| 672 | |
| 673 | #define bfin_read_USB_DMA0CONTROL() bfin_read16(USB_DMA0CONTROL) |
| 674 | #define bfin_write_USB_DMA0CONTROL(val) bfin_write16(USB_DMA0CONTROL, val) |
| 675 | #define bfin_read_USB_DMA0ADDRLOW() bfin_read16(USB_DMA0ADDRLOW) |
| 676 | #define bfin_write_USB_DMA0ADDRLOW(val) bfin_write16(USB_DMA0ADDRLOW, val) |
| 677 | #define bfin_read_USB_DMA0ADDRHIGH() bfin_read16(USB_DMA0ADDRHIGH) |
| 678 | #define bfin_write_USB_DMA0ADDRHIGH(val) bfin_write16(USB_DMA0ADDRHIGH, val) |
| 679 | #define bfin_read_USB_DMA0COUNTLOW() bfin_read16(USB_DMA0COUNTLOW) |
| 680 | #define bfin_write_USB_DMA0COUNTLOW(val) bfin_write16(USB_DMA0COUNTLOW, val) |
| 681 | #define bfin_read_USB_DMA0COUNTHIGH() bfin_read16(USB_DMA0COUNTHIGH) |
| 682 | #define bfin_write_USB_DMA0COUNTHIGH(val) bfin_write16(USB_DMA0COUNTHIGH, val) |
| 683 | |
| 684 | /* USB Channel 1 Config Registers */ |
| 685 | |
| 686 | #define bfin_read_USB_DMA1CONTROL() bfin_read16(USB_DMA1CONTROL) |
| 687 | #define bfin_write_USB_DMA1CONTROL(val) bfin_write16(USB_DMA1CONTROL, val) |
| 688 | #define bfin_read_USB_DMA1ADDRLOW() bfin_read16(USB_DMA1ADDRLOW) |
| 689 | #define bfin_write_USB_DMA1ADDRLOW(val) bfin_write16(USB_DMA1ADDRLOW, val) |
| 690 | #define bfin_read_USB_DMA1ADDRHIGH() bfin_read16(USB_DMA1ADDRHIGH) |
| 691 | #define bfin_write_USB_DMA1ADDRHIGH(val) bfin_write16(USB_DMA1ADDRHIGH, val) |
| 692 | #define bfin_read_USB_DMA1COUNTLOW() bfin_read16(USB_DMA1COUNTLOW) |
| 693 | #define bfin_write_USB_DMA1COUNTLOW(val) bfin_write16(USB_DMA1COUNTLOW, val) |
| 694 | #define bfin_read_USB_DMA1COUNTHIGH() bfin_read16(USB_DMA1COUNTHIGH) |
| 695 | #define bfin_write_USB_DMA1COUNTHIGH(val) bfin_write16(USB_DMA1COUNTHIGH, val) |
| 696 | |
| 697 | /* USB Channel 2 Config Registers */ |
| 698 | |
| 699 | #define bfin_read_USB_DMA2CONTROL() bfin_read16(USB_DMA2CONTROL) |
| 700 | #define bfin_write_USB_DMA2CONTROL(val) bfin_write16(USB_DMA2CONTROL, val) |
| 701 | #define bfin_read_USB_DMA2ADDRLOW() bfin_read16(USB_DMA2ADDRLOW) |
| 702 | #define bfin_write_USB_DMA2ADDRLOW(val) bfin_write16(USB_DMA2ADDRLOW, val) |
| 703 | #define bfin_read_USB_DMA2ADDRHIGH() bfin_read16(USB_DMA2ADDRHIGH) |
| 704 | #define bfin_write_USB_DMA2ADDRHIGH(val) bfin_write16(USB_DMA2ADDRHIGH, val) |
| 705 | #define bfin_read_USB_DMA2COUNTLOW() bfin_read16(USB_DMA2COUNTLOW) |
| 706 | #define bfin_write_USB_DMA2COUNTLOW(val) bfin_write16(USB_DMA2COUNTLOW, val) |
| 707 | #define bfin_read_USB_DMA2COUNTHIGH() bfin_read16(USB_DMA2COUNTHIGH) |
| 708 | #define bfin_write_USB_DMA2COUNTHIGH(val) bfin_write16(USB_DMA2COUNTHIGH, val) |
| 709 | |
| 710 | /* USB Channel 3 Config Registers */ |
| 711 | |
| 712 | #define bfin_read_USB_DMA3CONTROL() bfin_read16(USB_DMA3CONTROL) |
| 713 | #define bfin_write_USB_DMA3CONTROL(val) bfin_write16(USB_DMA3CONTROL, val) |
| 714 | #define bfin_read_USB_DMA3ADDRLOW() bfin_read16(USB_DMA3ADDRLOW) |
| 715 | #define bfin_write_USB_DMA3ADDRLOW(val) bfin_write16(USB_DMA3ADDRLOW, val) |
| 716 | #define bfin_read_USB_DMA3ADDRHIGH() bfin_read16(USB_DMA3ADDRHIGH) |
| 717 | #define bfin_write_USB_DMA3ADDRHIGH(val) bfin_write16(USB_DMA3ADDRHIGH, val) |
| 718 | #define bfin_read_USB_DMA3COUNTLOW() bfin_read16(USB_DMA3COUNTLOW) |
| 719 | #define bfin_write_USB_DMA3COUNTLOW(val) bfin_write16(USB_DMA3COUNTLOW, val) |
| 720 | #define bfin_read_USB_DMA3COUNTHIGH() bfin_read16(USB_DMA3COUNTHIGH) |
| 721 | #define bfin_write_USB_DMA3COUNTHIGH(val) bfin_write16(USB_DMA3COUNTHIGH, val) |
| 722 | |
| 723 | /* USB Channel 4 Config Registers */ |
| 724 | |
| 725 | #define bfin_read_USB_DMA4CONTROL() bfin_read16(USB_DMA4CONTROL) |
| 726 | #define bfin_write_USB_DMA4CONTROL(val) bfin_write16(USB_DMA4CONTROL, val) |
| 727 | #define bfin_read_USB_DMA4ADDRLOW() bfin_read16(USB_DMA4ADDRLOW) |
| 728 | #define bfin_write_USB_DMA4ADDRLOW(val) bfin_write16(USB_DMA4ADDRLOW, val) |
| 729 | #define bfin_read_USB_DMA4ADDRHIGH() bfin_read16(USB_DMA4ADDRHIGH) |
| 730 | #define bfin_write_USB_DMA4ADDRHIGH(val) bfin_write16(USB_DMA4ADDRHIGH, val) |
| 731 | #define bfin_read_USB_DMA4COUNTLOW() bfin_read16(USB_DMA4COUNTLOW) |
| 732 | #define bfin_write_USB_DMA4COUNTLOW(val) bfin_write16(USB_DMA4COUNTLOW, val) |
| 733 | #define bfin_read_USB_DMA4COUNTHIGH() bfin_read16(USB_DMA4COUNTHIGH) |
| 734 | #define bfin_write_USB_DMA4COUNTHIGH(val) bfin_write16(USB_DMA4COUNTHIGH, val) |
| 735 | |
| 736 | /* USB Channel 5 Config Registers */ |
| 737 | |
| 738 | #define bfin_read_USB_DMA5CONTROL() bfin_read16(USB_DMA5CONTROL) |
| 739 | #define bfin_write_USB_DMA5CONTROL(val) bfin_write16(USB_DMA5CONTROL, val) |
| 740 | #define bfin_read_USB_DMA5ADDRLOW() bfin_read16(USB_DMA5ADDRLOW) |
| 741 | #define bfin_write_USB_DMA5ADDRLOW(val) bfin_write16(USB_DMA5ADDRLOW, val) |
| 742 | #define bfin_read_USB_DMA5ADDRHIGH() bfin_read16(USB_DMA5ADDRHIGH) |
| 743 | #define bfin_write_USB_DMA5ADDRHIGH(val) bfin_write16(USB_DMA5ADDRHIGH, val) |
| 744 | #define bfin_read_USB_DMA5COUNTLOW() bfin_read16(USB_DMA5COUNTLOW) |
| 745 | #define bfin_write_USB_DMA5COUNTLOW(val) bfin_write16(USB_DMA5COUNTLOW, val) |
| 746 | #define bfin_read_USB_DMA5COUNTHIGH() bfin_read16(USB_DMA5COUNTHIGH) |
| 747 | #define bfin_write_USB_DMA5COUNTHIGH(val) bfin_write16(USB_DMA5COUNTHIGH, val) |
| 748 | |
| 749 | /* USB Channel 6 Config Registers */ |
| 750 | |
| 751 | #define bfin_read_USB_DMA6CONTROL() bfin_read16(USB_DMA6CONTROL) |
| 752 | #define bfin_write_USB_DMA6CONTROL(val) bfin_write16(USB_DMA6CONTROL, val) |
| 753 | #define bfin_read_USB_DMA6ADDRLOW() bfin_read16(USB_DMA6ADDRLOW) |
| 754 | #define bfin_write_USB_DMA6ADDRLOW(val) bfin_write16(USB_DMA6ADDRLOW, val) |
| 755 | #define bfin_read_USB_DMA6ADDRHIGH() bfin_read16(USB_DMA6ADDRHIGH) |
| 756 | #define bfin_write_USB_DMA6ADDRHIGH(val) bfin_write16(USB_DMA6ADDRHIGH, val) |
| 757 | #define bfin_read_USB_DMA6COUNTLOW() bfin_read16(USB_DMA6COUNTLOW) |
| 758 | #define bfin_write_USB_DMA6COUNTLOW(val) bfin_write16(USB_DMA6COUNTLOW, val) |
| 759 | #define bfin_read_USB_DMA6COUNTHIGH() bfin_read16(USB_DMA6COUNTHIGH) |
| 760 | #define bfin_write_USB_DMA6COUNTHIGH(val) bfin_write16(USB_DMA6COUNTHIGH, val) |
| 761 | |
| 762 | /* USB Channel 7 Config Registers */ |
| 763 | |
| 764 | #define bfin_read_USB_DMA7CONTROL() bfin_read16(USB_DMA7CONTROL) |
| 765 | #define bfin_write_USB_DMA7CONTROL(val) bfin_write16(USB_DMA7CONTROL, val) |
| 766 | #define bfin_read_USB_DMA7ADDRLOW() bfin_read16(USB_DMA7ADDRLOW) |
| 767 | #define bfin_write_USB_DMA7ADDRLOW(val) bfin_write16(USB_DMA7ADDRLOW, val) |
| 768 | #define bfin_read_USB_DMA7ADDRHIGH() bfin_read16(USB_DMA7ADDRHIGH) |
| 769 | #define bfin_write_USB_DMA7ADDRHIGH(val) bfin_write16(USB_DMA7ADDRHIGH, val) |
| 770 | #define bfin_read_USB_DMA7COUNTLOW() bfin_read16(USB_DMA7COUNTLOW) |
| 771 | #define bfin_write_USB_DMA7COUNTLOW(val) bfin_write16(USB_DMA7COUNTLOW, val) |
| 772 | #define bfin_read_USB_DMA7COUNTHIGH() bfin_read16(USB_DMA7COUNTHIGH) |
| 773 | #define bfin_write_USB_DMA7COUNTHIGH(val) bfin_write16(USB_DMA7COUNTHIGH, val) |
| 774 | |
| 775 | /* Keybfin_read_()ad Registers */ |
| 776 | |
| 777 | #define bfin_read_KPAD_CTL() bfin_read16(KPAD_CTL) |
| 778 | #define bfin_write_KPAD_CTL(val) bfin_write16(KPAD_CTL, val) |
| 779 | #define bfin_read_KPAD_PRESCALE() bfin_read16(KPAD_PRESCALE) |
| 780 | #define bfin_write_KPAD_PRESCALE(val) bfin_write16(KPAD_PRESCALE, val) |
| 781 | #define bfin_read_KPAD_MSEL() bfin_read16(KPAD_MSEL) |
| 782 | #define bfin_write_KPAD_MSEL(val) bfin_write16(KPAD_MSEL, val) |
| 783 | #define bfin_read_KPAD_ROWCOL() bfin_read16(KPAD_ROWCOL) |
| 784 | #define bfin_write_KPAD_ROWCOL(val) bfin_write16(KPAD_ROWCOL, val) |
| 785 | #define bfin_read_KPAD_STAT() bfin_read16(KPAD_STAT) |
| 786 | #define bfin_write_KPAD_STAT(val) bfin_write16(KPAD_STAT, val) |
| 787 | #define bfin_read_KPAD_SOFTEVAL() bfin_read16(KPAD_SOFTEVAL) |
| 788 | #define bfin_write_KPAD_SOFTEVAL(val) bfin_write16(KPAD_SOFTEVAL, val) |
| 789 | |
| 790 | /* Pixel Combfin_read_()ositor (PIXC) Registers */ |
| 791 | |
| 792 | #define bfin_read_PIXC_CTL() bfin_read16(PIXC_CTL) |
| 793 | #define bfin_write_PIXC_CTL(val) bfin_write16(PIXC_CTL, val) |
| 794 | #define bfin_read_PIXC_PPL() bfin_read16(PIXC_PPL) |
| 795 | #define bfin_write_PIXC_PPL(val) bfin_write16(PIXC_PPL, val) |
| 796 | #define bfin_read_PIXC_LPF() bfin_read16(PIXC_LPF) |
| 797 | #define bfin_write_PIXC_LPF(val) bfin_write16(PIXC_LPF, val) |
| 798 | #define bfin_read_PIXC_AHSTART() bfin_read16(PIXC_AHSTART) |
| 799 | #define bfin_write_PIXC_AHSTART(val) bfin_write16(PIXC_AHSTART, val) |
| 800 | #define bfin_read_PIXC_AHEND() bfin_read16(PIXC_AHEND) |
| 801 | #define bfin_write_PIXC_AHEND(val) bfin_write16(PIXC_AHEND, val) |
| 802 | #define bfin_read_PIXC_AVSTART() bfin_read16(PIXC_AVSTART) |
| 803 | #define bfin_write_PIXC_AVSTART(val) bfin_write16(PIXC_AVSTART, val) |
| 804 | #define bfin_read_PIXC_AVEND() bfin_read16(PIXC_AVEND) |
| 805 | #define bfin_write_PIXC_AVEND(val) bfin_write16(PIXC_AVEND, val) |
| 806 | #define bfin_read_PIXC_ATRANSP() bfin_read16(PIXC_ATRANSP) |
| 807 | #define bfin_write_PIXC_ATRANSP(val) bfin_write16(PIXC_ATRANSP, val) |
| 808 | #define bfin_read_PIXC_BHSTART() bfin_read16(PIXC_BHSTART) |
| 809 | #define bfin_write_PIXC_BHSTART(val) bfin_write16(PIXC_BHSTART, val) |
| 810 | #define bfin_read_PIXC_BHEND() bfin_read16(PIXC_BHEND) |
| 811 | #define bfin_write_PIXC_BHEND(val) bfin_write16(PIXC_BHEND, val) |
| 812 | #define bfin_read_PIXC_BVSTART() bfin_read16(PIXC_BVSTART) |
| 813 | #define bfin_write_PIXC_BVSTART(val) bfin_write16(PIXC_BVSTART, val) |
| 814 | #define bfin_read_PIXC_BVEND() bfin_read16(PIXC_BVEND) |
| 815 | #define bfin_write_PIXC_BVEND(val) bfin_write16(PIXC_BVEND, val) |
| 816 | #define bfin_read_PIXC_BTRANSP() bfin_read16(PIXC_BTRANSP) |
| 817 | #define bfin_write_PIXC_BTRANSP(val) bfin_write16(PIXC_BTRANSP, val) |
| 818 | #define bfin_read_PIXC_INTRSTAT() bfin_read16(PIXC_INTRSTAT) |
| 819 | #define bfin_write_PIXC_INTRSTAT(val) bfin_write16(PIXC_INTRSTAT, val) |
| 820 | #define bfin_read_PIXC_RYCON() bfin_read32(PIXC_RYCON) |
| 821 | #define bfin_write_PIXC_RYCON(val) bfin_write32(PIXC_RYCON, val) |
| 822 | #define bfin_read_PIXC_GUCON() bfin_read32(PIXC_GUCON) |
| 823 | #define bfin_write_PIXC_GUCON(val) bfin_write32(PIXC_GUCON, val) |
| 824 | #define bfin_read_PIXC_BVCON() bfin_read32(PIXC_BVCON) |
| 825 | #define bfin_write_PIXC_BVCON(val) bfin_write32(PIXC_BVCON, val) |
| 826 | #define bfin_read_PIXC_CCBIAS() bfin_read32(PIXC_CCBIAS) |
| 827 | #define bfin_write_PIXC_CCBIAS(val) bfin_write32(PIXC_CCBIAS, val) |
| 828 | #define bfin_read_PIXC_TC() bfin_read32(PIXC_TC) |
| 829 | #define bfin_write_PIXC_TC(val) bfin_write32(PIXC_TC, val) |
| 830 | |
| 831 | /* Handshake MDMA 0 Registers */ |
| 832 | |
| 833 | #define bfin_read_HMDMA0_CONTROL() bfin_read16(HMDMA0_CONTROL) |
| 834 | #define bfin_write_HMDMA0_CONTROL(val) bfin_write16(HMDMA0_CONTROL, val) |
| 835 | #define bfin_read_HMDMA0_ECINIT() bfin_read16(HMDMA0_ECINIT) |
| 836 | #define bfin_write_HMDMA0_ECINIT(val) bfin_write16(HMDMA0_ECINIT, val) |
| 837 | #define bfin_read_HMDMA0_BCINIT() bfin_read16(HMDMA0_BCINIT) |
| 838 | #define bfin_write_HMDMA0_BCINIT(val) bfin_write16(HMDMA0_BCINIT, val) |
| 839 | #define bfin_read_HMDMA0_ECURGENT() bfin_read16(HMDMA0_ECURGENT) |
| 840 | #define bfin_write_HMDMA0_ECURGENT(val) bfin_write16(HMDMA0_ECURGENT, val) |
| 841 | #define bfin_read_HMDMA0_ECOVERFLOW() bfin_read16(HMDMA0_ECOVERFLOW) |
| 842 | #define bfin_write_HMDMA0_ECOVERFLOW(val) bfin_write16(HMDMA0_ECOVERFLOW, val) |
| 843 | #define bfin_read_HMDMA0_ECOUNT() bfin_read16(HMDMA0_ECOUNT) |
| 844 | #define bfin_write_HMDMA0_ECOUNT(val) bfin_write16(HMDMA0_ECOUNT, val) |
| 845 | #define bfin_read_HMDMA0_BCOUNT() bfin_read16(HMDMA0_BCOUNT) |
| 846 | #define bfin_write_HMDMA0_BCOUNT(val) bfin_write16(HMDMA0_BCOUNT, val) |
| 847 | |
| 848 | /* Handshake MDMA 1 Registers */ |
| 849 | |
| 850 | #define bfin_read_HMDMA1_CONTROL() bfin_read16(HMDMA1_CONTROL) |
| 851 | #define bfin_write_HMDMA1_CONTROL(val) bfin_write16(HMDMA1_CONTROL, val) |
| 852 | #define bfin_read_HMDMA1_ECINIT() bfin_read16(HMDMA1_ECINIT) |
| 853 | #define bfin_write_HMDMA1_ECINIT(val) bfin_write16(HMDMA1_ECINIT, val) |
| 854 | #define bfin_read_HMDMA1_BCINIT() bfin_read16(HMDMA1_BCINIT) |
| 855 | #define bfin_write_HMDMA1_BCINIT(val) bfin_write16(HMDMA1_BCINIT, val) |
| 856 | #define bfin_read_HMDMA1_ECURGENT() bfin_read16(HMDMA1_ECURGENT) |
| 857 | #define bfin_write_HMDMA1_ECURGENT(val) bfin_write16(HMDMA1_ECURGENT, val) |
| 858 | #define bfin_read_HMDMA1_ECOVERFLOW() bfin_read16(HMDMA1_ECOVERFLOW) |
| 859 | #define bfin_write_HMDMA1_ECOVERFLOW(val) bfin_write16(HMDMA1_ECOVERFLOW, val) |
| 860 | #define bfin_read_HMDMA1_ECOUNT() bfin_read16(HMDMA1_ECOUNT) |
| 861 | #define bfin_write_HMDMA1_ECOUNT(val) bfin_write16(HMDMA1_ECOUNT, val) |
| 862 | #define bfin_read_HMDMA1_BCOUNT() bfin_read16(HMDMA1_BCOUNT) |
| 863 | #define bfin_write_HMDMA1_BCOUNT(val) bfin_write16(HMDMA1_BCOUNT, val) |
| 864 | |
| 865 | #endif /* _CDEF_BF548_H */ |