| Stephen Boyd | cd0c1f8 | 2014-02-26 10:59:26 -0800 | [diff] [blame] | 1 | Qualcomm PM8xxx PMIC multi-function devices |
| 2 | |
| Josh Cartwright | 5de5b2d | 2014-03-12 12:17:24 -0500 | [diff] [blame] | 3 | The PM8xxx family of Power Management ICs are used to provide regulated |
| 4 | voltages and other various functionality to Qualcomm SoCs. |
| 5 | |
| 6 | = PROPERTIES |
| Stephen Boyd | cd0c1f8 | 2014-02-26 10:59:26 -0800 | [diff] [blame] | 7 | |
| 8 | - compatible: |
| 9 | Usage: required |
| 10 | Value type: <string> |
| 11 | Definition: must be one of: |
| 12 | "qcom,pm8058" |
| Srinivas Kandagatla | 953f432 | 2016-11-15 12:01:51 +0000 | [diff] [blame] | 13 | "qcom,pm8821" |
| Stephen Boyd | cd0c1f8 | 2014-02-26 10:59:26 -0800 | [diff] [blame] | 14 | "qcom,pm8921" |
| 15 | |
| 16 | - #address-cells: |
| 17 | Usage: required |
| 18 | Value type: <u32> |
| 19 | Definition: must be 1 |
| 20 | |
| 21 | - #size-cells: |
| 22 | Usage: required |
| 23 | Value type: <u32> |
| 24 | Definition: must be 0 |
| 25 | |
| 26 | - interrupts: |
| 27 | Usage: required |
| 28 | Value type: <prop-encoded-array> |
| 29 | Definition: specifies the interrupt that indicates a subdevice |
| 30 | has generated an interrupt (summary interrupt). The |
| 31 | format of the specifier is defined by the binding document |
| 32 | describing the node's interrupt parent. |
| 33 | |
| 34 | - #interrupt-cells: |
| 35 | Usage: required |
| 36 | Value type : <u32> |
| 37 | Definition: must be 2. Specifies the number of cells needed to encode |
| 38 | an interrupt source. The 1st cell contains the interrupt |
| 39 | number. The 2nd cell is the trigger type and level flags |
| 40 | encoded as follows: |
| 41 | |
| 42 | 1 = low-to-high edge triggered |
| 43 | 2 = high-to-low edge triggered |
| 44 | 4 = active high level-sensitive |
| 45 | 8 = active low level-sensitive |
| 46 | |
| 47 | - interrupt-controller: |
| 48 | Usage: required |
| 49 | Value type: <empty> |
| 50 | Definition: identifies this node as an interrupt controller |
| 51 | |
| Josh Cartwright | 5de5b2d | 2014-03-12 12:17:24 -0500 | [diff] [blame] | 52 | = SUBCOMPONENTS |
| 53 | |
| 54 | The PMIC contains multiple independent functions, each described in a subnode. |
| 55 | The below bindings specify the set of valid subnodes. |
| 56 | |
| 57 | == Real-Time Clock |
| 58 | |
| 59 | - compatible: |
| 60 | Usage: required |
| 61 | Value type: <string> |
| 62 | Definition: must be one of: |
| 63 | "qcom,pm8058-rtc" |
| 64 | "qcom,pm8921-rtc" |
| Stanimir Varbanov | a5669e4 | 2014-09-23 16:52:40 +0300 | [diff] [blame] | 65 | "qcom,pm8941-rtc" |
| Neil Armstrong | 08655bc | 2016-08-11 15:16:44 +0200 | [diff] [blame] | 66 | "qcom,pm8018-rtc" |
| Josh Cartwright | 5de5b2d | 2014-03-12 12:17:24 -0500 | [diff] [blame] | 67 | |
| 68 | - reg: |
| 69 | Usage: required |
| 70 | Value type: <prop-encoded-array> |
| 71 | Definition: single entry specifying the base address of the RTC registers |
| 72 | |
| 73 | - interrupts: |
| 74 | Usage: required |
| 75 | Value type: <prop-encoded-array> |
| 76 | Definition: single entry specifying the RTC's alarm interrupt |
| 77 | |
| 78 | - allow-set-time: |
| 79 | Usage: optional |
| 80 | Value type: <empty> |
| 81 | Definition: indicates that the setting of RTC time is allowed by |
| 82 | the host CPU |
| 83 | |
| 84 | = EXAMPLE |
| Stephen Boyd | cd0c1f8 | 2014-02-26 10:59:26 -0800 | [diff] [blame] | 85 | |
| 86 | pmicintc: pmic@0 { |
| 87 | compatible = "qcom,pm8921"; |
| 88 | interrupts = <104 8>; |
| 89 | #interrupt-cells = <2>; |
| 90 | interrupt-controller; |
| 91 | #address-cells = <1>; |
| 92 | #size-cells = <0>; |
| 93 | |
| Josh Cartwright | 5de5b2d | 2014-03-12 12:17:24 -0500 | [diff] [blame] | 94 | rtc@11d { |
| 95 | compatible = "qcom,pm8921-rtc"; |
| 96 | reg = <0x11d>; |
| 97 | interrupts = <0x27 0>; |
| Stephen Boyd | cd0c1f8 | 2014-02-26 10:59:26 -0800 | [diff] [blame] | 98 | }; |
| 99 | }; |