blob: 95f88c7c87f39ad75334ad695800f6f33e42769a [file] [log] [blame]
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +08001/*
2 * at91sam9x5ek.dtsi - Device Tree file for AT91SAM9x5CM Base board
3 *
4 * Copyright (C) 2012 Atmel,
5 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
Jean-Christophe PLAGNIOL-VILLARD6db64d22013-05-15 01:21:50 +08009#include "at91sam9x5cm.dtsi"
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +080010
11/ {
12 model = "Atmel AT91SAM9X5-EK";
13 compatible = "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
14
15 chosen {
Nicolas Ferreb090e5f2013-03-22 12:32:09 +010016 bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +080017 };
18
19 ahb {
20 apb {
Ludovic Desroches4134a452012-11-19 12:24:02 +010021 mmc0: mmc@f0008000 {
Jean-Christophe PLAGNIOL-VILLARD199e2ed2012-11-20 00:38:18 +080022 pinctrl-0 = <
23 &pinctrl_board_mmc0
24 &pinctrl_mmc0_slot0_clk_cmd_dat0
25 &pinctrl_mmc0_slot0_dat1_3>;
Ludovic Desroches4134a452012-11-19 12:24:02 +010026 status = "okay";
27 slot@0 {
28 reg = <0>;
29 bus-width = <4>;
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +080030 cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
Ludovic Desroches4134a452012-11-19 12:24:02 +010031 };
32 };
33
34 mmc1: mmc@f000c000 {
Jean-Christophe PLAGNIOL-VILLARD199e2ed2012-11-20 00:38:18 +080035 pinctrl-0 = <
36 &pinctrl_board_mmc1
37 &pinctrl_mmc1_slot0_clk_cmd_dat0
38 &pinctrl_mmc1_slot0_dat1_3>;
Ludovic Desroches4134a452012-11-19 12:24:02 +010039 status = "okay";
40 slot@0 {
41 reg = <0>;
42 bus-width = <4>;
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +080043 cd-gpios = <&pioD 14 GPIO_ACTIVE_HIGH>;
Ludovic Desroches4134a452012-11-19 12:24:02 +010044 };
45 };
46
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +080047 dbgu: serial@fffff200 {
48 status = "okay";
49 };
50
51 usart0: serial@f801c000 {
52 status = "okay";
53 };
54
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +080055 i2c0: i2c@f8010000 {
56 status = "okay";
57 };
58
Jean-Christophe PLAGNIOL-VILLARD199e2ed2012-11-20 00:38:18 +080059 pinctrl@fffff400 {
60 mmc0 {
61 pinctrl_board_mmc0: mmc0-board {
62 atmel,pins =
63 <3 15 0x0 0x5>; /* PD15 gpio CD pin pull up and deglitch */
64 };
65 };
66
67 mmc1 {
68 pinctrl_board_mmc1: mmc1-board {
69 atmel,pins =
70 <3 14 0x0 0x5>; /* PD14 gpio CD pin pull up and deglitch */
71 };
72 };
73 };
Richard Genoudb6811e92013-04-03 14:03:05 +080074
75 spi0: spi@f0000000 {
76 status = "okay";
77 cs-gpios = <&pioA 14 0>, <0>, <0>, <0>;
78 m25p80@0 {
79 compatible = "atmel,at25df321a";
80 spi-max-frequency = <50000000>;
81 reg = <0>;
82 };
83 };
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +080084 };
85
86 usb0: ohci@00600000 {
87 status = "okay";
88 num-ports = <2>;
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +080089 atmel,vbus-gpio = <&pioD 19 GPIO_ACTIVE_LOW
90 &pioD 20 GPIO_ACTIVE_LOW
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +080091 >;
92 };
93
94 usb1: ehci@00700000 {
95 status = "okay";
96 };
97 };
98};