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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * PowerPC64 SLB support.
3 *
4 * Copyright (C) 2004 David Gibson <dwg@au.ibm.com>, IBM
Sankar P5cdcd9d2009-05-12 12:41:13 +05305 * Based on earlier code written by:
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 * Dave Engebretsen and Mike Corrigan {engebret|mikejc}@us.ibm.com
7 * Copyright (c) 2001 Dave Engebretsen
8 * Copyright (C) 2002 Anton Blanchard <anton@au.ibm.com>, IBM
9 *
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 */
16
Linus Torvalds1da177e2005-04-16 15:20:36 -070017#include <asm/pgtable.h>
18#include <asm/mmu.h>
19#include <asm/mmu_context.h>
20#include <asm/paca.h>
21#include <asm/cputable.h>
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +110022#include <asm/cacheflush.h>
Michael Neuling2f6093c2006-08-07 16:19:19 +100023#include <asm/smp.h>
24#include <linux/compiler.h>
will schmidtaa39be02007-10-30 06:24:19 +110025#include <asm/udbg.h>
Anton Blanchardb68a70c2011-04-04 23:56:18 +000026#include <asm/code-patching.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +110028
29extern void slb_allocate_realmode(unsigned long ea);
30extern void slb_allocate_user(unsigned long ea);
31
32static void slb_allocate(unsigned long ea)
33{
34 /* Currently, we do real mode for all SLBs including user, but
35 * that will change if we bring back dynamic VSIDs
36 */
37 slb_allocate_realmode(ea);
38}
Linus Torvalds1da177e2005-04-16 15:20:36 -070039
Paul Mackerras3b575062008-05-02 14:29:12 +100040#define slb_esid_mask(ssize) \
41 (((ssize) == MMU_SEGSIZE_256M)? ESID_MASK: ESID_MASK_1T)
42
Paul Mackerras1189be62007-10-11 20:37:10 +100043static inline unsigned long mk_esid_data(unsigned long ea, int ssize,
Anshuman Khandual2be682a2015-07-29 12:39:59 +053044 unsigned long entry)
Linus Torvalds1da177e2005-04-16 15:20:36 -070045{
Anshuman Khandual2be682a2015-07-29 12:39:59 +053046 return (ea & slb_esid_mask(ssize)) | SLB_ESID_V | entry;
Linus Torvalds1da177e2005-04-16 15:20:36 -070047}
48
Paul Mackerras1189be62007-10-11 20:37:10 +100049static inline unsigned long mk_vsid_data(unsigned long ea, int ssize,
50 unsigned long flags)
Linus Torvalds1da177e2005-04-16 15:20:36 -070051{
Paul Mackerras1189be62007-10-11 20:37:10 +100052 return (get_kernel_vsid(ea, ssize) << slb_vsid_shift(ssize)) | flags |
53 ((unsigned long) ssize << SLB_VSID_SSIZE_SHIFT);
Linus Torvalds1da177e2005-04-16 15:20:36 -070054}
55
Paul Mackerras1189be62007-10-11 20:37:10 +100056static inline void slb_shadow_update(unsigned long ea, int ssize,
Michael Neuling67439b72007-08-03 11:55:39 +100057 unsigned long flags,
Michael Neuling2f6093c2006-08-07 16:19:19 +100058 unsigned long entry)
Linus Torvalds1da177e2005-04-16 15:20:36 -070059{
Michael Neuling2f6093c2006-08-07 16:19:19 +100060 /*
61 * Clear the ESID first so the entry is not valid while we are
Michael Neuling00efee72007-08-24 16:58:37 +100062 * updating it. No write barriers are needed here, provided
63 * we only update the current CPU's SLB shadow buffer.
Michael Neuling2f6093c2006-08-07 16:19:19 +100064 */
65 get_slb_shadow()->save_area[entry].esid = 0;
Anton Blanchard7ffcf8e2013-08-07 02:01:46 +100066 get_slb_shadow()->save_area[entry].vsid =
67 cpu_to_be64(mk_vsid_data(ea, ssize, flags));
68 get_slb_shadow()->save_area[entry].esid =
69 cpu_to_be64(mk_esid_data(ea, ssize, entry));
Michael Neuling2f6093c2006-08-07 16:19:19 +100070}
71
Paul Mackerrasedd06222007-08-10 21:04:07 +100072static inline void slb_shadow_clear(unsigned long entry)
Michael Neuling2f6093c2006-08-07 16:19:19 +100073{
Paul Mackerrasedd06222007-08-10 21:04:07 +100074 get_slb_shadow()->save_area[entry].esid = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -070075}
76
Paul Mackerras1189be62007-10-11 20:37:10 +100077static inline void create_shadowed_slbe(unsigned long ea, int ssize,
78 unsigned long flags,
Paul Mackerras175587c2007-08-25 13:14:28 +100079 unsigned long entry)
80{
81 /*
82 * Updating the shadow buffer before writing the SLB ensures
83 * we don't get a stale entry here if we get preempted by PHYP
84 * between these two statements.
85 */
Paul Mackerras1189be62007-10-11 20:37:10 +100086 slb_shadow_update(ea, ssize, flags, entry);
Paul Mackerras175587c2007-08-25 13:14:28 +100087
88 asm volatile("slbmte %0,%1" :
Paul Mackerras1189be62007-10-11 20:37:10 +100089 : "r" (mk_vsid_data(ea, ssize, flags)),
90 "r" (mk_esid_data(ea, ssize, entry))
Paul Mackerras175587c2007-08-25 13:14:28 +100091 : "memory" );
92}
93
Paul Mackerras9c1e1052009-08-17 15:17:54 +100094static void __slb_flush_and_rebolt(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -070095{
96 /* If you change this make sure you change SLB_NUM_BOLTED
Alexander Grafd8d164a92014-05-15 14:38:03 +020097 * and PR KVM appropriately too. */
Paul Mackerrasbf72aeb2006-06-15 10:45:18 +100098 unsigned long linear_llp, vmalloc_llp, lflags, vflags;
Paul Mackerras1189be62007-10-11 20:37:10 +100099 unsigned long ksp_esid_data, ksp_vsid_data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700100
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +1100101 linear_llp = mmu_psize_defs[mmu_linear_psize].sllp;
Paul Mackerrasbf72aeb2006-06-15 10:45:18 +1000102 vmalloc_llp = mmu_psize_defs[mmu_vmalloc_psize].sllp;
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +1100103 lflags = SLB_VSID_KERNEL | linear_llp;
Paul Mackerrasbf72aeb2006-06-15 10:45:18 +1000104 vflags = SLB_VSID_KERNEL | vmalloc_llp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105
Paul Mackerras1189be62007-10-11 20:37:10 +1000106 ksp_esid_data = mk_esid_data(get_paca()->kstack, mmu_kernel_ssize, 2);
107 if ((ksp_esid_data & ~0xfffffffUL) <= PAGE_OFFSET) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700108 ksp_esid_data &= ~SLB_ESID_V;
Paul Mackerras1189be62007-10-11 20:37:10 +1000109 ksp_vsid_data = 0;
Paul Mackerrasedd06222007-08-10 21:04:07 +1000110 slb_shadow_clear(2);
111 } else {
112 /* Update stack entry; others don't change */
Paul Mackerras1189be62007-10-11 20:37:10 +1000113 slb_shadow_update(get_paca()->kstack, mmu_kernel_ssize, lflags, 2);
Anton Blanchard7ffcf8e2013-08-07 02:01:46 +1000114 ksp_vsid_data =
115 be64_to_cpu(get_slb_shadow()->save_area[2].vsid);
Paul Mackerrasedd06222007-08-10 21:04:07 +1000116 }
Michael Neuling2f6093c2006-08-07 16:19:19 +1000117
Linus Torvalds1da177e2005-04-16 15:20:36 -0700118 /* We need to do this all in asm, so we're sure we don't touch
119 * the stack between the slbia and rebolting it. */
120 asm volatile("isync\n"
121 "slbia\n"
122 /* Slot 1 - first VMALLOC segment */
123 "slbmte %0,%1\n"
124 /* Slot 2 - kernel stack */
125 "slbmte %2,%3\n"
126 "isync"
Paul Mackerras1189be62007-10-11 20:37:10 +1000127 :: "r"(mk_vsid_data(VMALLOC_START, mmu_kernel_ssize, vflags)),
128 "r"(mk_esid_data(VMALLOC_START, mmu_kernel_ssize, 1)),
129 "r"(ksp_vsid_data),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700130 "r"(ksp_esid_data)
131 : "memory");
132}
133
Paul Mackerras9c1e1052009-08-17 15:17:54 +1000134void slb_flush_and_rebolt(void)
135{
136
137 WARN_ON(!irqs_disabled());
138
139 /*
140 * We can't take a PMU exception in the following code, so hard
141 * disable interrupts.
142 */
143 hard_irq_disable();
144
145 __slb_flush_and_rebolt();
146 get_paca()->slb_cache_ptr = 0;
147}
148
Michael Neuling67439b72007-08-03 11:55:39 +1000149void slb_vmalloc_update(void)
150{
151 unsigned long vflags;
152
153 vflags = SLB_VSID_KERNEL | mmu_psize_defs[mmu_vmalloc_psize].sllp;
Paul Mackerras1189be62007-10-11 20:37:10 +1000154 slb_shadow_update(VMALLOC_START, mmu_kernel_ssize, vflags, 1);
Michael Neuling67439b72007-08-03 11:55:39 +1000155 slb_flush_and_rebolt();
156}
157
will schmidt465ccab2007-10-31 05:59:33 +1100158/* Helper function to compare esids. There are four cases to handle.
159 * 1. The system is not 1T segment size capable. Use the GET_ESID compare.
160 * 2. The system is 1T capable, both addresses are < 1T, use the GET_ESID compare.
161 * 3. The system is 1T capable, only one of the two addresses is > 1T. This is not a match.
162 * 4. The system is 1T capable, both addresses are > 1T, use the GET_ESID_1T macro to compare.
163 */
164static inline int esids_match(unsigned long addr1, unsigned long addr2)
165{
166 int esid_1t_count;
167
168 /* System is not 1T segment size capable. */
Matt Evans44ae3ab2011-04-06 19:48:50 +0000169 if (!mmu_has_feature(MMU_FTR_1T_SEGMENT))
will schmidt465ccab2007-10-31 05:59:33 +1100170 return (GET_ESID(addr1) == GET_ESID(addr2));
171
172 esid_1t_count = (((addr1 >> SID_SHIFT_1T) != 0) +
173 ((addr2 >> SID_SHIFT_1T) != 0));
174
175 /* both addresses are < 1T */
176 if (esid_1t_count == 0)
177 return (GET_ESID(addr1) == GET_ESID(addr2));
178
179 /* One address < 1T, the other > 1T. Not a match */
180 if (esid_1t_count == 1)
181 return 0;
182
183 /* Both addresses are > 1T. */
184 return (GET_ESID_1T(addr1) == GET_ESID_1T(addr2));
185}
186
Linus Torvalds1da177e2005-04-16 15:20:36 -0700187/* Flush all user entries from the segment table of the current processor. */
188void switch_slb(struct task_struct *tsk, struct mm_struct *mm)
189{
Paul Mackerras9c1e1052009-08-17 15:17:54 +1000190 unsigned long offset;
Paul Mackerras1189be62007-10-11 20:37:10 +1000191 unsigned long slbie_data = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700192 unsigned long pc = KSTK_EIP(tsk);
193 unsigned long stack = KSTK_ESP(tsk);
Anton Blanchardde4376c2009-07-13 20:53:53 +0000194 unsigned long exec_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700195
Paul Mackerras9c1e1052009-08-17 15:17:54 +1000196 /*
197 * We need interrupts hard-disabled here, not just soft-disabled,
198 * so that a PMU interrupt can't occur, which might try to access
199 * user memory (to get a stack trace) and possible cause an SLB miss
200 * which would update the slb_cache/slb_cache_ptr fields in the PACA.
201 */
202 hard_irq_disable();
203 offset = get_paca()->slb_cache_ptr;
Matt Evans44ae3ab2011-04-06 19:48:50 +0000204 if (!mmu_has_feature(MMU_FTR_NO_SLBIE_B) &&
Olof Johanssonf66bce52007-10-16 00:58:59 +1000205 offset <= SLB_CACHE_ENTRIES) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700206 int i;
207 asm volatile("isync" : : : "memory");
208 for (i = 0; i < offset; i++) {
Paul Mackerras1189be62007-10-11 20:37:10 +1000209 slbie_data = (unsigned long)get_paca()->slb_cache[i]
210 << SID_SHIFT; /* EA */
211 slbie_data |= user_segment_size(slbie_data)
212 << SLBIE_SSIZE_SHIFT;
213 slbie_data |= SLBIE_C; /* C set for user addresses */
214 asm volatile("slbie %0" : : "r" (slbie_data));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700215 }
216 asm volatile("isync" : : : "memory");
217 } else {
Paul Mackerras9c1e1052009-08-17 15:17:54 +1000218 __slb_flush_and_rebolt();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219 }
220
221 /* Workaround POWER5 < DD2.1 issue */
222 if (offset == 1 || offset > SLB_CACHE_ENTRIES)
Paul Mackerras1189be62007-10-11 20:37:10 +1000223 asm volatile("slbie %0" : : "r" (slbie_data));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700224
225 get_paca()->slb_cache_ptr = 0;
226 get_paca()->context = mm->context;
227
228 /*
229 * preload some userspace segments into the SLB.
Anton Blanchardde4376c2009-07-13 20:53:53 +0000230 * Almost all 32 and 64bit PowerPC executables are linked at
231 * 0x10000000 so it makes sense to preload this segment.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700232 */
Anton Blanchardde4376c2009-07-13 20:53:53 +0000233 exec_base = 0x10000000;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700234
Anton Blanchard5eb9bac2009-07-13 20:53:52 +0000235 if (is_kernel_addr(pc) || is_kernel_addr(stack) ||
Anton Blanchardde4376c2009-07-13 20:53:53 +0000236 is_kernel_addr(exec_base))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700237 return;
Anton Blanchard5eb9bac2009-07-13 20:53:52 +0000238
Linus Torvalds1da177e2005-04-16 15:20:36 -0700239 slb_allocate(pc);
240
Anton Blanchard5eb9bac2009-07-13 20:53:52 +0000241 if (!esids_match(pc, stack))
242 slb_allocate(stack);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700243
Anton Blanchardde4376c2009-07-13 20:53:53 +0000244 if (!esids_match(pc, exec_base) &&
245 !esids_match(stack, exec_base))
246 slb_allocate(exec_base);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700247}
248
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +1100249static inline void patch_slb_encoding(unsigned int *insn_addr,
250 unsigned int immed)
251{
Anshuman Khandual79d0be72015-07-29 12:40:02 +0530252
253 /*
254 * This function patches either an li or a cmpldi instruction with
255 * a new immediate value. This relies on the fact that both li
256 * (which is actually addi) and cmpldi both take a 16-bit immediate
257 * value, and it is situated in the same location in the instruction,
258 * ie. bits 16-31 (Big endian bit order) or the lower 16 bits.
259 * The signedness of the immediate operand differs between the two
260 * instructions however this code is only ever patching a small value,
261 * much less than 1 << 15, so we can get away with it.
262 * To patch the value we read the existing instruction, clear the
263 * immediate value, and or in our new value, then write the instruction
264 * back.
265 */
266 unsigned int insn = (*insn_addr & 0xffff0000) | immed;
Anton Blanchardb68a70c2011-04-04 23:56:18 +0000267 patch_instruction(insn_addr, insn);
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +1100268}
269
Anton Blanchardb86206e2014-03-10 09:44:22 +1100270extern u32 slb_miss_kernel_load_linear[];
271extern u32 slb_miss_kernel_load_io[];
272extern u32 slb_compare_rr_to_size[];
273extern u32 slb_miss_kernel_load_vmemmap[];
274
Brian King46db2f82009-08-28 12:06:29 +0000275void slb_set_size(u16 size)
276{
Brian King46db2f82009-08-28 12:06:29 +0000277 if (mmu_slb_size == size)
278 return;
279
280 mmu_slb_size = size;
281 patch_slb_encoding(slb_compare_rr_to_size, mmu_slb_size);
282}
283
Linus Torvalds1da177e2005-04-16 15:20:36 -0700284void slb_initialize(void)
285{
Paul Mackerrasbf72aeb2006-06-15 10:45:18 +1000286 unsigned long linear_llp, vmalloc_llp, io_llp;
Stephen Rothwell56291e12006-11-14 12:57:38 +1100287 unsigned long lflags, vflags;
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +1100288 static int slb_encoding_inited;
Benjamin Herrenschmidtcec08e72008-04-30 15:41:48 +1000289#ifdef CONFIG_SPARSEMEM_VMEMMAP
Benjamin Herrenschmidtcec08e72008-04-30 15:41:48 +1000290 unsigned long vmemmap_llp;
291#endif
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +1100292
293 /* Prepare our SLB miss handler based on our page size */
294 linear_llp = mmu_psize_defs[mmu_linear_psize].sllp;
Paul Mackerrasbf72aeb2006-06-15 10:45:18 +1000295 io_llp = mmu_psize_defs[mmu_io_psize].sllp;
296 vmalloc_llp = mmu_psize_defs[mmu_vmalloc_psize].sllp;
297 get_paca()->vmalloc_sllp = SLB_VSID_KERNEL | vmalloc_llp;
Benjamin Herrenschmidtcec08e72008-04-30 15:41:48 +1000298#ifdef CONFIG_SPARSEMEM_VMEMMAP
299 vmemmap_llp = mmu_psize_defs[mmu_vmemmap_psize].sllp;
300#endif
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +1100301 if (!slb_encoding_inited) {
302 slb_encoding_inited = 1;
303 patch_slb_encoding(slb_miss_kernel_load_linear,
304 SLB_VSID_KERNEL | linear_llp);
Paul Mackerrasbf72aeb2006-06-15 10:45:18 +1000305 patch_slb_encoding(slb_miss_kernel_load_io,
306 SLB_VSID_KERNEL | io_llp);
Michael Neuling584f8b72007-12-06 17:24:48 +1100307 patch_slb_encoding(slb_compare_rr_to_size,
308 mmu_slb_size);
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +1100309
Michael Ellerman651e2dd2009-06-17 18:13:51 +0000310 pr_devel("SLB: linear LLP = %04lx\n", linear_llp);
311 pr_devel("SLB: io LLP = %04lx\n", io_llp);
Benjamin Herrenschmidtcec08e72008-04-30 15:41:48 +1000312
313#ifdef CONFIG_SPARSEMEM_VMEMMAP
314 patch_slb_encoding(slb_miss_kernel_load_vmemmap,
315 SLB_VSID_KERNEL | vmemmap_llp);
Michael Ellerman651e2dd2009-06-17 18:13:51 +0000316 pr_devel("SLB: vmemmap LLP = %04lx\n", vmemmap_llp);
Benjamin Herrenschmidtcec08e72008-04-30 15:41:48 +1000317#endif
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +1100318 }
319
Stephen Rothwell56291e12006-11-14 12:57:38 +1100320 get_paca()->stab_rr = SLB_NUM_BOLTED;
321
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +1100322 lflags = SLB_VSID_KERNEL | linear_llp;
Paul Mackerrasbf72aeb2006-06-15 10:45:18 +1000323 vflags = SLB_VSID_KERNEL | vmalloc_llp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700324
Anshuman Khandual2be682a2015-07-29 12:39:59 +0530325 /* Invalidate the entire SLB (even entry 0) & all the ERATS */
Paul Mackerras175587c2007-08-25 13:14:28 +1000326 asm volatile("isync":::"memory");
327 asm volatile("slbmte %0,%0"::"r" (0) : "memory");
328 asm volatile("isync; slbia; isync":::"memory");
Paul Mackerras1189be62007-10-11 20:37:10 +1000329 create_shadowed_slbe(PAGE_OFFSET, mmu_kernel_ssize, lflags, 0);
Paul Mackerras1189be62007-10-11 20:37:10 +1000330 create_shadowed_slbe(VMALLOC_START, mmu_kernel_ssize, vflags, 1);
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +1100331
Paul Mackerras3b575062008-05-02 14:29:12 +1000332 /* For the boot cpu, we're running on the stack in init_thread_union,
333 * which is in the first segment of the linear mapping, and also
334 * get_paca()->kstack hasn't been initialized yet.
335 * For secondary cpus, we need to bolt the kernel stack entry now.
336 */
Paul Mackerrasdfbe0d32008-01-15 17:29:33 +1100337 slb_shadow_clear(2);
Paul Mackerras3b575062008-05-02 14:29:12 +1000338 if (raw_smp_processor_id() != boot_cpuid &&
339 (get_paca()->kstack & slb_esid_mask(mmu_kernel_ssize)) > PAGE_OFFSET)
340 create_shadowed_slbe(get_paca()->kstack,
341 mmu_kernel_ssize, lflags, 2);
Paul Mackerrasdfbe0d32008-01-15 17:29:33 +1100342
Paul Mackerras175587c2007-08-25 13:14:28 +1000343 asm volatile("isync":::"memory");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700344}