Mateusz Krawczuk | 94ad0f6 | 2013-09-28 18:25:29 +0200 | [diff] [blame^] | 1 | /* |
| 2 | * Samsung's S5PV210 SoC device tree source |
| 3 | * |
| 4 | * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. |
| 5 | * |
| 6 | * Mateusz Krawczuk <m.krawczuk@partner.samsung.com> |
| 7 | * Tomasz Figa <t.figa@samsung.com> |
| 8 | * |
| 9 | * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210 |
| 10 | * based board files can include this file and provide values for board specfic |
| 11 | * bindings. |
| 12 | * |
| 13 | * Note: This file does not include device nodes for all the controllers in |
| 14 | * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional |
| 15 | * nodes can be added to this file. |
| 16 | * |
| 17 | * This program is free software; you can redistribute it and/or modify |
| 18 | * it under the terms of the GNU General Public License version 2 as |
| 19 | * published by the Free Software Foundation. |
| 20 | */ |
| 21 | |
| 22 | #include "skeleton.dtsi" |
| 23 | #include <dt-bindings/clock/s5pv210.h> |
| 24 | #include <dt-bindings/clock/s5pv210-audss.h> |
| 25 | |
| 26 | / { |
| 27 | aliases { |
| 28 | csis0 = &csis0; |
| 29 | fimc0 = &fimc0; |
| 30 | fimc1 = &fimc1; |
| 31 | fimc2 = &fimc2; |
| 32 | i2c0 = &i2c0; |
| 33 | i2c1 = &i2c1; |
| 34 | i2c2 = &i2c2; |
| 35 | i2s0 = &i2s0; |
| 36 | i2s1 = &i2s1; |
| 37 | i2s2 = &i2s2; |
| 38 | pinctrl0 = &pinctrl0; |
| 39 | spi0 = &spi0; |
| 40 | spi1 = &spi1; |
| 41 | }; |
| 42 | |
| 43 | cpus { |
| 44 | #address-cells = <1>; |
| 45 | #size-cells = <0>; |
| 46 | |
| 47 | cpu@0 { |
| 48 | device_type = "cpu"; |
| 49 | compatible = "arm,cortex-a8"; |
| 50 | reg = <0>; |
| 51 | }; |
| 52 | }; |
| 53 | |
| 54 | soc { |
| 55 | compatible = "simple-bus"; |
| 56 | #address-cells = <1>; |
| 57 | #size-cells = <1>; |
| 58 | ranges; |
| 59 | |
| 60 | external-clocks { |
| 61 | compatible = "simple-bus"; |
| 62 | #address-cells = <1>; |
| 63 | #size-cells = <0>; |
| 64 | |
| 65 | xxti: oscillator@0 { |
| 66 | compatible = "fixed-clock"; |
| 67 | reg = <0>; |
| 68 | clock-frequency = <0>; |
| 69 | clock-output-names = "xxti"; |
| 70 | #clock-cells = <0>; |
| 71 | }; |
| 72 | |
| 73 | xusbxti: oscillator@1 { |
| 74 | compatible = "fixed-clock"; |
| 75 | reg = <1>; |
| 76 | clock-frequency = <0>; |
| 77 | clock-output-names = "xusbxti"; |
| 78 | #clock-cells = <0>; |
| 79 | }; |
| 80 | }; |
| 81 | |
| 82 | onenand: onenand@b0000000 { |
| 83 | compatible = "samsung,s5pv210-onenand"; |
| 84 | reg = <0xb0600000 0x2000>, |
| 85 | <0xb0000000 0x20000>, |
| 86 | <0xb0040000 0x20000>; |
| 87 | interrupt-parent = <&vic1>; |
| 88 | interrupts = <31>; |
| 89 | clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>; |
| 90 | clock-names = "bus", "onenand"; |
| 91 | #address-cells = <1>; |
| 92 | #size-cells = <1>; |
| 93 | status = "disabled"; |
| 94 | }; |
| 95 | |
| 96 | chipid@e0000000 { |
| 97 | compatible = "samsung,s5pv210-chipid"; |
| 98 | reg = <0xe0000000 0x1000>; |
| 99 | }; |
| 100 | |
| 101 | clocks: clock-controller@e0100000 { |
| 102 | compatible = "samsung,s5pv210-clock", "simple-bus"; |
| 103 | reg = <0xe0100000 0x10000>; |
| 104 | clock-names = "xxti", "xusbxti"; |
| 105 | clocks = <&xxti>, <&xusbxti>; |
| 106 | #clock-cells = <1>; |
| 107 | #address-cells = <1>; |
| 108 | #size-cells = <1>; |
| 109 | ranges; |
| 110 | |
| 111 | pmu_syscon: syscon@e0108000 { |
| 112 | compatible = "samsung-s5pv210-pmu", "syscon"; |
| 113 | reg = <0xe0108000 0x8000>; |
| 114 | }; |
| 115 | }; |
| 116 | |
| 117 | pinctrl0: pinctrl@e0200000 { |
| 118 | compatible = "samsung,s5pv210-pinctrl"; |
| 119 | reg = <0xe0200000 0x1000>; |
| 120 | interrupt-parent = <&vic0>; |
| 121 | interrupts = <30>; |
| 122 | |
| 123 | wakeup-interrupt-controller { |
| 124 | compatible = "samsung,exynos4210-wakeup-eint"; |
| 125 | interrupts = <16>; |
| 126 | interrupt-parent = <&vic0>; |
| 127 | }; |
| 128 | }; |
| 129 | |
| 130 | amba { |
| 131 | #address-cells = <1>; |
| 132 | #size-cells = <1>; |
| 133 | compatible = "arm,amba-bus"; |
| 134 | ranges; |
| 135 | |
| 136 | pdma0: dma@e0900000 { |
| 137 | compatible = "arm,pl330", "arm,primecell"; |
| 138 | reg = <0xe0900000 0x1000>; |
| 139 | interrupt-parent = <&vic0>; |
| 140 | interrupts = <19>; |
| 141 | clocks = <&clocks CLK_PDMA0>; |
| 142 | clock-names = "apb_pclk"; |
| 143 | #dma-cells = <1>; |
| 144 | #dma-channels = <8>; |
| 145 | #dma-requests = <32>; |
| 146 | }; |
| 147 | |
| 148 | pdma1: dma@e0a00000 { |
| 149 | compatible = "arm,pl330", "arm,primecell"; |
| 150 | reg = <0xe0a00000 0x1000>; |
| 151 | interrupt-parent = <&vic0>; |
| 152 | interrupts = <20>; |
| 153 | clocks = <&clocks CLK_PDMA1>; |
| 154 | clock-names = "apb_pclk"; |
| 155 | #dma-cells = <1>; |
| 156 | #dma-channels = <8>; |
| 157 | #dma-requests = <32>; |
| 158 | }; |
| 159 | }; |
| 160 | |
| 161 | spi0: spi@e1300000 { |
| 162 | compatible = "samsung,s5pv210-spi"; |
| 163 | reg = <0xe1300000 0x1000>; |
| 164 | interrupt-parent = <&vic1>; |
| 165 | interrupts = <15>; |
| 166 | dmas = <&pdma0 7>, <&pdma0 6>; |
| 167 | dma-names = "tx", "rx"; |
| 168 | clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>; |
| 169 | clock-names = "spi", "spi_busclk0"; |
| 170 | pinctrl-names = "default"; |
| 171 | pinctrl-0 = <&spi0_bus>; |
| 172 | #address-cells = <1>; |
| 173 | #size-cells = <0>; |
| 174 | status = "disabled"; |
| 175 | }; |
| 176 | |
| 177 | spi1: spi@e1400000 { |
| 178 | compatible = "samsung,s5pv210-spi"; |
| 179 | reg = <0xe1400000 0x1000>; |
| 180 | interrupt-parent = <&vic1>; |
| 181 | interrupts = <16>; |
| 182 | dmas = <&pdma1 7>, <&pdma1 6>; |
| 183 | dma-names = "tx", "rx"; |
| 184 | clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>; |
| 185 | clock-names = "spi", "spi_busclk0"; |
| 186 | pinctrl-names = "default"; |
| 187 | pinctrl-0 = <&spi1_bus>; |
| 188 | #address-cells = <1>; |
| 189 | #size-cells = <0>; |
| 190 | status = "disabled"; |
| 191 | }; |
| 192 | |
| 193 | keypad: keypad@e1600000 { |
| 194 | compatible = "samsung,s5pv210-keypad"; |
| 195 | reg = <0xe1600000 0x1000>; |
| 196 | interrupt-parent = <&vic2>; |
| 197 | interrupts = <25>; |
| 198 | clocks = <&clocks CLK_KEYIF>; |
| 199 | clock-names = "keypad"; |
| 200 | status = "disabled"; |
| 201 | }; |
| 202 | |
| 203 | i2c0: i2c@e1800000 { |
| 204 | compatible = "samsung,s3c2440-i2c"; |
| 205 | reg = <0xe1800000 0x1000>; |
| 206 | interrupt-parent = <&vic1>; |
| 207 | interrupts = <14>; |
| 208 | clocks = <&clocks CLK_I2C0>; |
| 209 | clock-names = "i2c"; |
| 210 | pinctrl-names = "default"; |
| 211 | pinctrl-0 = <&i2c0_bus>; |
| 212 | #address-cells = <1>; |
| 213 | #size-cells = <0>; |
| 214 | status = "disabled"; |
| 215 | }; |
| 216 | |
| 217 | i2c2: i2c@e1a00000 { |
| 218 | compatible = "samsung,s3c2440-i2c"; |
| 219 | reg = <0xe1a00000 0x1000>; |
| 220 | interrupt-parent = <&vic1>; |
| 221 | interrupts = <19>; |
| 222 | clocks = <&clocks CLK_I2C2>; |
| 223 | clock-names = "i2c"; |
| 224 | pinctrl-0 = <&i2c2_bus>; |
| 225 | pinctrl-names = "default"; |
| 226 | #address-cells = <1>; |
| 227 | #size-cells = <0>; |
| 228 | status = "disabled"; |
| 229 | }; |
| 230 | |
| 231 | audio-subsystem { |
| 232 | compatible = "samsung,s5pv210-audss", "simple-bus"; |
| 233 | #address-cells = <1>; |
| 234 | #size-cells = <1>; |
| 235 | ranges; |
| 236 | |
| 237 | clk_audss: clock-controller@eee10000 { |
| 238 | compatible = "samsung,s5pv210-audss-clock"; |
| 239 | reg = <0xeee10000 0x1000>; |
| 240 | clock-names = "hclk", "xxti", |
| 241 | "fout_epll", |
| 242 | "sclk_audio0"; |
| 243 | clocks = <&clocks DOUT_HCLKP>, <&xxti>, |
| 244 | <&clocks FOUT_EPLL>, |
| 245 | <&clocks SCLK_AUDIO0>; |
| 246 | #clock-cells = <1>; |
| 247 | }; |
| 248 | |
| 249 | i2s0: i2s@eee30000 { |
| 250 | compatible = "samsung,s5pv210-i2s"; |
| 251 | reg = <0xeee30000 0x1000>; |
| 252 | interrupt-parent = <&vic2>; |
| 253 | interrupts = <16>; |
| 254 | dma-names = "rx", "tx", "tx-sec"; |
| 255 | dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>; |
| 256 | clock-names = "iis", |
| 257 | "i2s_opclk0", |
| 258 | "i2s_opclk1"; |
| 259 | clocks = <&clk_audss CLK_I2S>, |
| 260 | <&clk_audss CLK_I2S>, |
| 261 | <&clk_audss CLK_DOUT_AUD_BUS>; |
| 262 | samsung,idma-addr = <0xc0010000>; |
| 263 | pinctrl-names = "default"; |
| 264 | pinctrl-0 = <&i2s0_bus>; |
| 265 | #sound-dai-cells = <0>; |
| 266 | status = "disabled"; |
| 267 | }; |
| 268 | }; |
| 269 | |
| 270 | i2s1: i2s@e2100000 { |
| 271 | compatible = "samsung,s3c6410-i2s"; |
| 272 | reg = <0xe2100000 0x1000>; |
| 273 | interrupt-parent = <&vic2>; |
| 274 | interrupts = <17>; |
| 275 | dma-names = "rx", "tx"; |
| 276 | dmas = <&pdma1 12>, <&pdma1 13>; |
| 277 | clock-names = "iis", "i2s_opclk0"; |
| 278 | clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>; |
| 279 | pinctrl-names = "default"; |
| 280 | pinctrl-0 = <&i2s1_bus>; |
| 281 | #sound-dai-cells = <0>; |
| 282 | status = "disabled"; |
| 283 | }; |
| 284 | |
| 285 | i2s2: i2s@e2a00000 { |
| 286 | compatible = "samsung,s3c6410-i2s"; |
| 287 | reg = <0xe2a00000 0x1000>; |
| 288 | interrupt-parent = <&vic2>; |
| 289 | interrupts = <18>; |
| 290 | dma-names = "rx", "tx"; |
| 291 | dmas = <&pdma1 14>, <&pdma1 15>; |
| 292 | clock-names = "iis", "i2s_opclk0"; |
| 293 | clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>; |
| 294 | pinctrl-names = "default"; |
| 295 | pinctrl-0 = <&i2s2_bus>; |
| 296 | #sound-dai-cells = <0>; |
| 297 | status = "disabled"; |
| 298 | }; |
| 299 | |
| 300 | pwm: pwm@e2500000 { |
| 301 | compatible = "samsung,s5pc100-pwm"; |
| 302 | reg = <0xe2500000 0x1000>; |
| 303 | interrupt-parent = <&vic0>; |
| 304 | interrupts = <21>, <22>, <23>, <24>, <25>; |
| 305 | clock-names = "timers"; |
| 306 | clocks = <&clocks CLK_PWM>; |
| 307 | #pwm-cells = <3>; |
| 308 | }; |
| 309 | |
| 310 | watchdog: watchdog@e2700000 { |
| 311 | compatible = "samsung,s3c2410-wdt"; |
| 312 | reg = <0xe2700000 0x1000>; |
| 313 | interrupt-parent = <&vic0>; |
| 314 | interrupts = <26>; |
| 315 | clock-names = "watchdog"; |
| 316 | clocks = <&clocks CLK_WDT>; |
| 317 | }; |
| 318 | |
| 319 | rtc: rtc@e2800000 { |
| 320 | compatible = "samsung,s3c6410-rtc"; |
| 321 | reg = <0xe2800000 0x100>; |
| 322 | interrupt-parent = <&vic0>; |
| 323 | interrupts = <28>, <29>; |
| 324 | clocks = <&clocks CLK_RTC>; |
| 325 | clock-names = "rtc"; |
| 326 | status = "disabled"; |
| 327 | }; |
| 328 | |
| 329 | uart0: serial@e2900000 { |
| 330 | compatible = "samsung,s5pv210-uart"; |
| 331 | reg = <0xe2900000 0x400>; |
| 332 | interrupt-parent = <&vic1>; |
| 333 | interrupts = <10>; |
| 334 | clock-names = "uart", "clk_uart_baud0", |
| 335 | "clk_uart_baud1"; |
| 336 | clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>, |
| 337 | <&clocks SCLK_UART0>; |
| 338 | status = "disabled"; |
| 339 | }; |
| 340 | |
| 341 | uart1: serial@e2900400 { |
| 342 | compatible = "samsung,s5pv210-uart"; |
| 343 | reg = <0xe2900400 0x400>; |
| 344 | interrupt-parent = <&vic1>; |
| 345 | interrupts = <11>; |
| 346 | clock-names = "uart", "clk_uart_baud0", |
| 347 | "clk_uart_baud1"; |
| 348 | clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>, |
| 349 | <&clocks SCLK_UART1>; |
| 350 | status = "disabled"; |
| 351 | }; |
| 352 | |
| 353 | uart2: serial@e2900800 { |
| 354 | compatible = "samsung,s5pv210-uart"; |
| 355 | reg = <0xe2900800 0x400>; |
| 356 | interrupt-parent = <&vic1>; |
| 357 | interrupts = <12>; |
| 358 | clock-names = "uart", "clk_uart_baud0", |
| 359 | "clk_uart_baud1"; |
| 360 | clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>, |
| 361 | <&clocks SCLK_UART2>; |
| 362 | status = "disabled"; |
| 363 | }; |
| 364 | |
| 365 | uart3: serial@e2900c00 { |
| 366 | compatible = "samsung,s5pv210-uart"; |
| 367 | reg = <0xe2900c00 0x400>; |
| 368 | interrupt-parent = <&vic1>; |
| 369 | interrupts = <13>; |
| 370 | clock-names = "uart", "clk_uart_baud0", |
| 371 | "clk_uart_baud1"; |
| 372 | clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>, |
| 373 | <&clocks SCLK_UART3>; |
| 374 | status = "disabled"; |
| 375 | }; |
| 376 | |
| 377 | sdhci0: sdhci@eb000000 { |
| 378 | compatible = "samsung,s3c6410-sdhci"; |
| 379 | reg = <0xeb000000 0x100000>; |
| 380 | interrupt-parent = <&vic1>; |
| 381 | interrupts = <26>; |
| 382 | clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; |
| 383 | clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>, |
| 384 | <&clocks SCLK_MMC0>; |
| 385 | status = "disabled"; |
| 386 | }; |
| 387 | |
| 388 | sdhci1: sdhci@eb100000 { |
| 389 | compatible = "samsung,s3c6410-sdhci"; |
| 390 | reg = <0xeb100000 0x100000>; |
| 391 | interrupt-parent = <&vic1>; |
| 392 | interrupts = <27>; |
| 393 | clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; |
| 394 | clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>, |
| 395 | <&clocks SCLK_MMC1>; |
| 396 | status = "disabled"; |
| 397 | }; |
| 398 | |
| 399 | sdhci2: sdhci@eb200000 { |
| 400 | compatible = "samsung,s3c6410-sdhci"; |
| 401 | reg = <0xeb200000 0x100000>; |
| 402 | interrupt-parent = <&vic1>; |
| 403 | interrupts = <28>; |
| 404 | clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; |
| 405 | clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>, |
| 406 | <&clocks SCLK_MMC2>; |
| 407 | status = "disabled"; |
| 408 | }; |
| 409 | |
| 410 | sdhci3: sdhci@eb300000 { |
| 411 | compatible = "samsung,s3c6410-sdhci"; |
| 412 | reg = <0xeb300000 0x100000>; |
| 413 | interrupt-parent = <&vic3>; |
| 414 | interrupts = <2>; |
| 415 | clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3"; |
| 416 | clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>, |
| 417 | <&clocks SCLK_MMC3>; |
| 418 | status = "disabled"; |
| 419 | }; |
| 420 | |
| 421 | hsotg: hsotg@ec000000 { |
| 422 | compatible = "samsung,s3c6400-hsotg"; |
| 423 | reg = <0xec000000 0x20000>; |
| 424 | interrupt-parent = <&vic1>; |
| 425 | interrupts = <24>; |
| 426 | clocks = <&clocks CLK_USB_OTG>; |
| 427 | clock-names = "otg"; |
| 428 | phy-names = "usb2-phy"; |
| 429 | phys = <&usbphy 0>; |
| 430 | status = "disabled"; |
| 431 | }; |
| 432 | |
| 433 | usbphy: usbphy@ec100000 { |
| 434 | compatible = "samsung,s5pv210-usb2-phy"; |
| 435 | reg = <0xec100000 0x100>; |
| 436 | samsung,pmureg-phandle = <&pmu_syscon>; |
| 437 | clocks = <&clocks CLK_USB_OTG>, <&xusbxti>; |
| 438 | clock-names = "phy", "ref"; |
| 439 | #phy-cells = <1>; |
| 440 | status = "disabled"; |
| 441 | }; |
| 442 | |
| 443 | ehci: ehci@ec200000 { |
| 444 | compatible = "samsung,exynos4210-ehci"; |
| 445 | reg = <0xec200000 0x100>; |
| 446 | interrupts = <23>; |
| 447 | interrupt-parent = <&vic1>; |
| 448 | clocks = <&clocks CLK_USB_HOST>; |
| 449 | clock-names = "usbhost"; |
| 450 | #address-cells = <1>; |
| 451 | #size-cells = <0>; |
| 452 | status = "disabled"; |
| 453 | |
| 454 | port@0 { |
| 455 | reg = <0>; |
| 456 | phys = <&usbphy 1>; |
| 457 | }; |
| 458 | }; |
| 459 | |
| 460 | ohci: ohci@ec300000 { |
| 461 | compatible = "samsung,exynos4210-ohci"; |
| 462 | reg = <0xec300000 0x100>; |
| 463 | interrupts = <23>; |
| 464 | clocks = <&clocks CLK_USB_HOST>; |
| 465 | clock-names = "usbhost"; |
| 466 | #address-cells = <1>; |
| 467 | #size-cells = <0>; |
| 468 | status = "disabled"; |
| 469 | |
| 470 | port@0 { |
| 471 | reg = <0>; |
| 472 | phys = <&usbphy 1>; |
| 473 | }; |
| 474 | }; |
| 475 | |
| 476 | mfc: codec@f1700000 { |
| 477 | compatible = "samsung,mfc-v5"; |
| 478 | reg = <0xf1700000 0x10000>; |
| 479 | interrupt-parent = <&vic2>; |
| 480 | interrupts = <14>; |
| 481 | clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>; |
| 482 | clock-names = "sclk_mfc", "mfc"; |
| 483 | }; |
| 484 | |
| 485 | vic0: interrupt-controller@f2000000 { |
| 486 | compatible = "arm,pl192-vic"; |
| 487 | interrupt-controller; |
| 488 | reg = <0xf2000000 0x1000>; |
| 489 | #interrupt-cells = <1>; |
| 490 | }; |
| 491 | |
| 492 | vic1: interrupt-controller@f2100000 { |
| 493 | compatible = "arm,pl192-vic"; |
| 494 | interrupt-controller; |
| 495 | reg = <0xf2100000 0x1000>; |
| 496 | #interrupt-cells = <1>; |
| 497 | }; |
| 498 | |
| 499 | vic2: interrupt-controller@f2200000 { |
| 500 | compatible = "arm,pl192-vic"; |
| 501 | interrupt-controller; |
| 502 | reg = <0xf2200000 0x1000>; |
| 503 | #interrupt-cells = <1>; |
| 504 | }; |
| 505 | |
| 506 | vic3: interrupt-controller@f2300000 { |
| 507 | compatible = "arm,pl192-vic"; |
| 508 | interrupt-controller; |
| 509 | reg = <0xf2300000 0x1000>; |
| 510 | #interrupt-cells = <1>; |
| 511 | }; |
| 512 | |
| 513 | fimd: fimd@f8000000 { |
| 514 | compatible = "samsung,exynos4210-fimd"; |
| 515 | interrupt-parent = <&vic2>; |
| 516 | reg = <0xf8000000 0x20000>; |
| 517 | interrupt-names = "fifo", "vsync", "lcd_sys"; |
| 518 | interrupts = <0>, <1>, <2>; |
| 519 | clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>; |
| 520 | clock-names = "sclk_fimd", "fimd"; |
| 521 | status = "disabled"; |
| 522 | }; |
| 523 | |
| 524 | g2d: g2d@fa000000 { |
| 525 | compatible = "samsung,s5pv210-g2d"; |
| 526 | reg = <0xfa000000 0x1000>; |
| 527 | interrupt-parent = <&vic2>; |
| 528 | interrupts = <9>; |
| 529 | clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>; |
| 530 | clock-names = "sclk_fimg2d", "fimg2d"; |
| 531 | }; |
| 532 | |
| 533 | mdma1: mdma@fa200000 { |
| 534 | compatible = "arm,pl330", "arm,primecell"; |
| 535 | reg = <0xfa200000 0x1000>; |
| 536 | interrupt-parent = <&vic0>; |
| 537 | interrupts = <18>; |
| 538 | clocks = <&clocks CLK_MDMA>; |
| 539 | clock-names = "apb_pclk"; |
| 540 | #dma-cells = <1>; |
| 541 | #dma-channels = <8>; |
| 542 | #dma-requests = <1>; |
| 543 | }; |
| 544 | |
| 545 | i2c1: i2c@fab00000 { |
| 546 | compatible = "samsung,s3c2440-i2c"; |
| 547 | reg = <0xfab00000 0x1000>; |
| 548 | interrupt-parent = <&vic2>; |
| 549 | interrupts = <13>; |
| 550 | clocks = <&clocks CLK_I2C1>; |
| 551 | clock-names = "i2c"; |
| 552 | pinctrl-names = "default"; |
| 553 | pinctrl-0 = <&i2c1_bus>; |
| 554 | #address-cells = <1>; |
| 555 | #size-cells = <0>; |
| 556 | status = "disabled"; |
| 557 | }; |
| 558 | |
| 559 | camera: camera { |
| 560 | compatible = "samsung,fimc", "simple-bus"; |
| 561 | pinctrl-names = "default"; |
| 562 | pinctrl-0 = <>; |
| 563 | clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>; |
| 564 | clock-names = "sclk_cam0", "sclk_cam1"; |
| 565 | #address-cells = <1>; |
| 566 | #size-cells = <1>; |
| 567 | ranges; |
| 568 | |
| 569 | clock_cam: clock-controller { |
| 570 | #clock-cells = <1>; |
| 571 | }; |
| 572 | |
| 573 | csis0: csis@fa600000 { |
| 574 | compatible = "samsung,s5pv210-csis"; |
| 575 | reg = <0xfa600000 0x4000>; |
| 576 | interrupt-parent = <&vic2>; |
| 577 | interrupts = <29>; |
| 578 | clocks = <&clocks CLK_CSIS>, |
| 579 | <&clocks SCLK_CSIS>; |
| 580 | clock-names = "clk_csis", |
| 581 | "sclk_csis"; |
| 582 | bus-width = <4>; |
| 583 | status = "disabled"; |
| 584 | #address-cells = <1>; |
| 585 | #size-cells = <0>; |
| 586 | }; |
| 587 | |
| 588 | fimc0: fimc@fb200000 { |
| 589 | compatible = "samsung,s5pv210-fimc"; |
| 590 | reg = <0xfb200000 0x1000>; |
| 591 | interrupts = <5>; |
| 592 | interrupt-parent = <&vic2>; |
| 593 | clocks = <&clocks CLK_FIMC0>, |
| 594 | <&clocks SCLK_FIMC0>; |
| 595 | clock-names = "fimc", |
| 596 | "sclk_fimc"; |
| 597 | samsung,pix-limits = <4224 8192 1920 4224>; |
| 598 | samsung,mainscaler-ext; |
| 599 | samsung,cam-if; |
| 600 | }; |
| 601 | |
| 602 | fimc1: fimc@fb300000 { |
| 603 | compatible = "samsung,s5pv210-fimc"; |
| 604 | reg = <0xfb300000 0x1000>; |
| 605 | interrupt-parent = <&vic2>; |
| 606 | interrupts = <6>; |
| 607 | clocks = <&clocks CLK_FIMC1>, |
| 608 | <&clocks SCLK_FIMC1>; |
| 609 | clock-names = "fimc", |
| 610 | "sclk_fimc"; |
| 611 | samsung,pix-limits = <4224 8192 1920 4224>; |
| 612 | samsung,mainscaler-ext; |
| 613 | samsung,cam-if; |
| 614 | }; |
| 615 | |
| 616 | fimc2: fimc@fb400000 { |
| 617 | compatible = "samsung,s5pv210-fimc"; |
| 618 | reg = <0xfb400000 0x1000>; |
| 619 | interrupt-parent = <&vic2>; |
| 620 | interrupts = <7>; |
| 621 | clocks = <&clocks CLK_FIMC2>, |
| 622 | <&clocks SCLK_FIMC2>; |
| 623 | clock-names = "fimc", |
| 624 | "sclk_fimc"; |
| 625 | samsung,pix-limits = <4224 8192 1920 4224>; |
| 626 | samsung,mainscaler-ext; |
| 627 | samsung,lcd-wb; |
| 628 | }; |
| 629 | }; |
| 630 | }; |
| 631 | }; |
| 632 | |
| 633 | #include "s5pv210-pinctrl.dtsi" |