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Jonas Aaberg5f5663a2011-09-14 09:10:54 +02001/*
2 * Copyright (C) ST-Ericsson SA 2011
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Mattias Wallin <mattias.wallin@stericsson.com> for ST-Ericsson
6 */
7#include <linux/io.h>
Linus Walleijb1e3be062011-10-03 09:30:20 +02008#include <linux/errno.h>
Jonas Aaberg5f5663a2011-09-14 09:10:54 +02009#include <linux/clksrc-dbx500-prcmu.h>
10
11#include <asm/localtimer.h>
12
13#include <plat/mtu.h>
14
15#include <mach/setup.h>
16#include <mach/hardware.h>
17
18static void __init ux500_timer_init(void)
19{
Linus Walleijb1e3be062011-10-03 09:30:20 +020020 void __iomem *prcmu_timer_base;
21
Jonas Aaberg5f5663a2011-09-14 09:10:54 +020022 if (cpu_is_u5500()) {
23#ifdef CONFIG_LOCAL_TIMERS
24 twd_base = __io_address(U5500_TWD_BASE);
25#endif
26 mtu_base = __io_address(U5500_MTU0_BASE);
Linus Walleijb1e3be062011-10-03 09:30:20 +020027 prcmu_timer_base = __io_address(U5500_PRCMU_TIMER_3_BASE);
Jonas Aaberg5f5663a2011-09-14 09:10:54 +020028 } else if (cpu_is_u8500()) {
29#ifdef CONFIG_LOCAL_TIMERS
30 twd_base = __io_address(U8500_TWD_BASE);
31#endif
32 mtu_base = __io_address(U8500_MTU0_BASE);
Linus Walleijb1e3be062011-10-03 09:30:20 +020033 prcmu_timer_base = __io_address(U8500_PRCMU_TIMER_4_BASE);
Jonas Aaberg5f5663a2011-09-14 09:10:54 +020034 } else {
35 ux500_unknown_soc();
36 }
37
38 /*
39 * Here we register the timerblocks active in the system.
40 * Localtimers (twd) is started when both cpu is up and running.
41 * MTU register a clocksource, clockevent and sched_clock.
42 * Since the MTU is located in the VAPE power domain
43 * it will be cleared in sleep which makes it unsuitable.
44 * We however need it as a timer tick (clockevent)
45 * during boot to calibrate delay until twd is started.
46 * RTC-RTT have problems as timer tick during boot since it is
47 * depending on delay which is not yet calibrated. RTC-RTT is in the
48 * always-on powerdomain and is used as clockevent instead of twd when
49 * sleeping.
50 * The PRCMU timer 4(3 for DB5500) register a clocksource and
51 * sched_clock with higher rating then MTU since is always-on.
52 *
53 */
54
55 nmdk_timer_init();
Linus Walleijb1e3be062011-10-03 09:30:20 +020056 clksrc_dbx500_prcmu_init(prcmu_timer_base);
Jonas Aaberg5f5663a2011-09-14 09:10:54 +020057}
58
Jonas Aabergbb219db2011-09-21 07:47:02 +020059static void ux500_timer_reset(void)
60{
61 nmdk_clkevt_reset();
62 nmdk_clksrc_reset();
63}
64
Jonas Aaberg5f5663a2011-09-14 09:10:54 +020065struct sys_timer ux500_timer = {
66 .init = ux500_timer_init,
Jonas Aabergbb219db2011-09-21 07:47:02 +020067 .resume = ux500_timer_reset,
Jonas Aaberg5f5663a2011-09-14 09:10:54 +020068};