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Graeme Gregory518fb722011-05-02 16:20:08 -05001/*
2 * tps65910.c -- TI tps65910
3 *
4 * Copyright 2010 Texas Instruments Inc.
5 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
7 * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/err.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
22#include <linux/regulator/machine.h>
Graeme Gregory518fb722011-05-02 16:20:08 -050023#include <linux/slab.h>
24#include <linux/gpio.h>
25#include <linux/mfd/tps65910.h>
Rhyland Klein67901782012-05-08 11:42:41 -070026#include <linux/regulator/of_regulator.h>
Graeme Gregory518fb722011-05-02 16:20:08 -050027
Graeme Gregory518fb722011-05-02 16:20:08 -050028#define TPS65910_SUPPLY_STATE_ENABLED 0x1
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +053029#define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
30 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
Laxman Dewanganf30b0712012-03-07 18:21:49 +053031 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
32 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
Graeme Gregory518fb722011-05-02 16:20:08 -050033
Axel Lind9fe28f2012-06-21 18:48:00 +080034/* supported VIO voltages in microvolts */
35static const unsigned int VIO_VSEL_table[] = {
36 1500000, 1800000, 2500000, 3300000,
Graeme Gregory518fb722011-05-02 16:20:08 -050037};
38
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -050039/* VSEL tables for TPS65910 specific LDOs and dcdc's */
40
Axel Lind9fe28f2012-06-21 18:48:00 +080041/* supported VDD3 voltages in microvolts */
42static const unsigned int VDD3_VSEL_table[] = {
43 5000000,
Graeme Gregory518fb722011-05-02 16:20:08 -050044};
45
Axel Lind9fe28f2012-06-21 18:48:00 +080046/* supported VDIG1 voltages in microvolts */
47static const unsigned int VDIG1_VSEL_table[] = {
48 1200000, 1500000, 1800000, 2700000,
Graeme Gregory518fb722011-05-02 16:20:08 -050049};
50
Axel Lind9fe28f2012-06-21 18:48:00 +080051/* supported VDIG2 voltages in microvolts */
52static const unsigned int VDIG2_VSEL_table[] = {
53 1000000, 1100000, 1200000, 1800000,
Graeme Gregory518fb722011-05-02 16:20:08 -050054};
55
Axel Lind9fe28f2012-06-21 18:48:00 +080056/* supported VPLL voltages in microvolts */
57static const unsigned int VPLL_VSEL_table[] = {
58 1000000, 1100000, 1800000, 2500000,
Graeme Gregory518fb722011-05-02 16:20:08 -050059};
60
Axel Lind9fe28f2012-06-21 18:48:00 +080061/* supported VDAC voltages in microvolts */
62static const unsigned int VDAC_VSEL_table[] = {
63 1800000, 2600000, 2800000, 2850000,
Graeme Gregory518fb722011-05-02 16:20:08 -050064};
65
Axel Lind9fe28f2012-06-21 18:48:00 +080066/* supported VAUX1 voltages in microvolts */
67static const unsigned int VAUX1_VSEL_table[] = {
68 1800000, 2500000, 2800000, 2850000,
Graeme Gregory518fb722011-05-02 16:20:08 -050069};
70
Axel Lind9fe28f2012-06-21 18:48:00 +080071/* supported VAUX2 voltages in microvolts */
72static const unsigned int VAUX2_VSEL_table[] = {
73 1800000, 2800000, 2900000, 3300000,
Graeme Gregory518fb722011-05-02 16:20:08 -050074};
75
Axel Lind9fe28f2012-06-21 18:48:00 +080076/* supported VAUX33 voltages in microvolts */
77static const unsigned int VAUX33_VSEL_table[] = {
78 1800000, 2000000, 2800000, 3300000,
Graeme Gregory518fb722011-05-02 16:20:08 -050079};
80
Axel Lind9fe28f2012-06-21 18:48:00 +080081/* supported VMMC voltages in microvolts */
82static const unsigned int VMMC_VSEL_table[] = {
83 1800000, 2800000, 3000000, 3300000,
Graeme Gregory518fb722011-05-02 16:20:08 -050084};
85
86struct tps_info {
87 const char *name;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +053088 u8 n_voltages;
Axel Lind9fe28f2012-06-21 18:48:00 +080089 const unsigned int *voltage_table;
Laxman Dewangan0651eed2012-03-13 11:35:20 +053090 int enable_time_us;
Graeme Gregory518fb722011-05-02 16:20:08 -050091};
92
93static struct tps_info tps65910_regs[] = {
94 {
Laxman Dewangan33a69432012-05-19 20:04:06 +053095 .name = "vrtc",
Laxman Dewangan0651eed2012-03-13 11:35:20 +053096 .enable_time_us = 2200,
Graeme Gregory518fb722011-05-02 16:20:08 -050097 },
98 {
Laxman Dewangan33a69432012-05-19 20:04:06 +053099 .name = "vio",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530100 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
101 .voltage_table = VIO_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530102 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500103 },
104 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530105 .name = "vdd1",
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530106 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500107 },
108 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530109 .name = "vdd2",
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530110 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500111 },
112 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530113 .name = "vdd3",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530114 .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
115 .voltage_table = VDD3_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530116 .enable_time_us = 200,
Graeme Gregory518fb722011-05-02 16:20:08 -0500117 },
118 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530119 .name = "vdig1",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530120 .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
121 .voltage_table = VDIG1_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530122 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500123 },
124 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530125 .name = "vdig2",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530126 .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
127 .voltage_table = VDIG2_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530128 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500129 },
130 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530131 .name = "vpll",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530132 .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
133 .voltage_table = VPLL_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530134 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500135 },
136 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530137 .name = "vdac",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530138 .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
139 .voltage_table = VDAC_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530140 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500141 },
142 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530143 .name = "vaux1",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530144 .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
145 .voltage_table = VAUX1_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530146 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500147 },
148 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530149 .name = "vaux2",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530150 .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
151 .voltage_table = VAUX2_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530152 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500153 },
154 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530155 .name = "vaux33",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530156 .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
157 .voltage_table = VAUX33_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530158 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500159 },
160 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530161 .name = "vmmc",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530162 .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
163 .voltage_table = VMMC_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530164 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500165 },
166};
167
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500168static struct tps_info tps65911_regs[] = {
169 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530170 .name = "vrtc",
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530171 .enable_time_us = 2200,
Laxman Dewanganc2f8efd2012-01-18 20:46:56 +0530172 },
173 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530174 .name = "vio",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530175 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
176 .voltage_table = VIO_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530177 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500178 },
179 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530180 .name = "vdd1",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530181 .n_voltages = 73,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530182 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500183 },
184 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530185 .name = "vdd2",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530186 .n_voltages = 73,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530187 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500188 },
189 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530190 .name = "vddctrl",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530191 .n_voltages = 65,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530192 .enable_time_us = 900,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500193 },
194 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530195 .name = "ldo1",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530196 .n_voltages = 47,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530197 .enable_time_us = 420,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500198 },
199 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530200 .name = "ldo2",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530201 .n_voltages = 47,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530202 .enable_time_us = 420,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500203 },
204 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530205 .name = "ldo3",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530206 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530207 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500208 },
209 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530210 .name = "ldo4",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530211 .n_voltages = 47,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530212 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500213 },
214 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530215 .name = "ldo5",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530216 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530217 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500218 },
219 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530220 .name = "ldo6",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530221 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530222 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500223 },
224 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530225 .name = "ldo7",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530226 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530227 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500228 },
229 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530230 .name = "ldo8",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530231 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530232 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500233 },
234};
235
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530236#define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
237static unsigned int tps65910_ext_sleep_control[] = {
238 0,
239 EXT_CONTROL_REG_BITS(VIO, 1, 0),
240 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
241 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
242 EXT_CONTROL_REG_BITS(VDD3, 1, 3),
243 EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
244 EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
245 EXT_CONTROL_REG_BITS(VPLL, 0, 6),
246 EXT_CONTROL_REG_BITS(VDAC, 0, 7),
247 EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
248 EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
249 EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
250 EXT_CONTROL_REG_BITS(VMMC, 0, 0),
251};
252
253static unsigned int tps65911_ext_sleep_control[] = {
254 0,
255 EXT_CONTROL_REG_BITS(VIO, 1, 0),
256 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
257 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
258 EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
259 EXT_CONTROL_REG_BITS(LDO1, 0, 1),
260 EXT_CONTROL_REG_BITS(LDO2, 0, 2),
261 EXT_CONTROL_REG_BITS(LDO3, 0, 7),
262 EXT_CONTROL_REG_BITS(LDO4, 0, 6),
263 EXT_CONTROL_REG_BITS(LDO5, 0, 3),
264 EXT_CONTROL_REG_BITS(LDO6, 0, 0),
265 EXT_CONTROL_REG_BITS(LDO7, 0, 5),
266 EXT_CONTROL_REG_BITS(LDO8, 0, 4),
267};
268
Graeme Gregory518fb722011-05-02 16:20:08 -0500269struct tps65910_reg {
Axel Lin39aa9b62011-07-11 09:57:43 +0800270 struct regulator_desc *desc;
Graeme Gregory518fb722011-05-02 16:20:08 -0500271 struct tps65910 *mfd;
Axel Lin39aa9b62011-07-11 09:57:43 +0800272 struct regulator_dev **rdev;
273 struct tps_info **info;
Graeme Gregory518fb722011-05-02 16:20:08 -0500274 struct mutex mutex;
Axel Lin39aa9b62011-07-11 09:57:43 +0800275 int num_regulators;
Graeme Gregory518fb722011-05-02 16:20:08 -0500276 int mode;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500277 int (*get_ctrl_reg)(int);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530278 unsigned int *ext_sleep_control;
279 unsigned int board_ext_control[TPS65910_NUM_REGS];
Graeme Gregory518fb722011-05-02 16:20:08 -0500280};
281
282static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg)
283{
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700284 unsigned int val;
Graeme Gregory518fb722011-05-02 16:20:08 -0500285 int err;
286
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700287 err = tps65910_reg_read(pmic->mfd, reg, &val);
Graeme Gregory518fb722011-05-02 16:20:08 -0500288 if (err)
289 return err;
290
291 return val;
292}
293
Graeme Gregory518fb722011-05-02 16:20:08 -0500294static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,
295 u8 set_mask, u8 clear_mask)
296{
297 int err, data;
298
299 mutex_lock(&pmic->mutex);
300
301 data = tps65910_read(pmic, reg);
302 if (data < 0) {
303 dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
304 err = data;
305 goto out;
306 }
307
308 data &= ~clear_mask;
309 data |= set_mask;
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700310 err = tps65910_reg_write(pmic->mfd, reg, data);
Graeme Gregory518fb722011-05-02 16:20:08 -0500311 if (err)
312 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
313
314out:
315 mutex_unlock(&pmic->mutex);
316 return err;
317}
318
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700319static int tps65910_reg_read_locked(struct tps65910_reg *pmic, u8 reg)
Graeme Gregory518fb722011-05-02 16:20:08 -0500320{
321 int data;
322
323 mutex_lock(&pmic->mutex);
324
325 data = tps65910_read(pmic, reg);
326 if (data < 0)
327 dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
328
329 mutex_unlock(&pmic->mutex);
330 return data;
331}
332
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700333static int tps65910_reg_write_locked(struct tps65910_reg *pmic, u8 reg, u8 val)
Graeme Gregory518fb722011-05-02 16:20:08 -0500334{
335 int err;
336
337 mutex_lock(&pmic->mutex);
338
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700339 err = tps65910_reg_write(pmic->mfd, reg, val);
Graeme Gregory518fb722011-05-02 16:20:08 -0500340 if (err < 0)
341 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
342
343 mutex_unlock(&pmic->mutex);
344 return err;
345}
346
347static int tps65910_get_ctrl_register(int id)
348{
349 switch (id) {
350 case TPS65910_REG_VRTC:
351 return TPS65910_VRTC;
352 case TPS65910_REG_VIO:
353 return TPS65910_VIO;
354 case TPS65910_REG_VDD1:
355 return TPS65910_VDD1;
356 case TPS65910_REG_VDD2:
357 return TPS65910_VDD2;
358 case TPS65910_REG_VDD3:
359 return TPS65910_VDD3;
360 case TPS65910_REG_VDIG1:
361 return TPS65910_VDIG1;
362 case TPS65910_REG_VDIG2:
363 return TPS65910_VDIG2;
364 case TPS65910_REG_VPLL:
365 return TPS65910_VPLL;
366 case TPS65910_REG_VDAC:
367 return TPS65910_VDAC;
368 case TPS65910_REG_VAUX1:
369 return TPS65910_VAUX1;
370 case TPS65910_REG_VAUX2:
371 return TPS65910_VAUX2;
372 case TPS65910_REG_VAUX33:
373 return TPS65910_VAUX33;
374 case TPS65910_REG_VMMC:
375 return TPS65910_VMMC;
376 default:
377 return -EINVAL;
378 }
379}
380
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500381static int tps65911_get_ctrl_register(int id)
382{
383 switch (id) {
384 case TPS65910_REG_VRTC:
385 return TPS65910_VRTC;
386 case TPS65910_REG_VIO:
387 return TPS65910_VIO;
388 case TPS65910_REG_VDD1:
389 return TPS65910_VDD1;
390 case TPS65910_REG_VDD2:
391 return TPS65910_VDD2;
392 case TPS65911_REG_VDDCTRL:
393 return TPS65911_VDDCTRL;
394 case TPS65911_REG_LDO1:
395 return TPS65911_LDO1;
396 case TPS65911_REG_LDO2:
397 return TPS65911_LDO2;
398 case TPS65911_REG_LDO3:
399 return TPS65911_LDO3;
400 case TPS65911_REG_LDO4:
401 return TPS65911_LDO4;
402 case TPS65911_REG_LDO5:
403 return TPS65911_LDO5;
404 case TPS65911_REG_LDO6:
405 return TPS65911_LDO6;
406 case TPS65911_REG_LDO7:
407 return TPS65911_LDO7;
408 case TPS65911_REG_LDO8:
409 return TPS65911_LDO8;
410 default:
411 return -EINVAL;
412 }
413}
414
Graeme Gregory518fb722011-05-02 16:20:08 -0500415static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
416{
417 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
418 struct tps65910 *mfd = pmic->mfd;
419 int reg, value, id = rdev_get_id(dev);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500420
421 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500422 if (reg < 0)
423 return reg;
424
425 switch (mode) {
426 case REGULATOR_MODE_NORMAL:
427 return tps65910_modify_bits(pmic, reg, LDO_ST_ON_BIT,
428 LDO_ST_MODE_BIT);
429 case REGULATOR_MODE_IDLE:
430 value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700431 return tps65910_reg_set_bits(mfd, reg, value);
Graeme Gregory518fb722011-05-02 16:20:08 -0500432 case REGULATOR_MODE_STANDBY:
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700433 return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT);
Graeme Gregory518fb722011-05-02 16:20:08 -0500434 }
435
436 return -EINVAL;
437}
438
439static unsigned int tps65910_get_mode(struct regulator_dev *dev)
440{
441 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
442 int reg, value, id = rdev_get_id(dev);
443
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500444 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500445 if (reg < 0)
446 return reg;
447
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700448 value = tps65910_reg_read_locked(pmic, reg);
Graeme Gregory518fb722011-05-02 16:20:08 -0500449 if (value < 0)
450 return value;
451
Axel Lin58599392012-03-13 07:15:27 +0800452 if (!(value & LDO_ST_ON_BIT))
Graeme Gregory518fb722011-05-02 16:20:08 -0500453 return REGULATOR_MODE_STANDBY;
454 else if (value & LDO_ST_MODE_BIT)
455 return REGULATOR_MODE_IDLE;
456 else
457 return REGULATOR_MODE_NORMAL;
458}
459
Laxman Dewangan18039e02012-03-14 13:00:58 +0530460static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
Graeme Gregory518fb722011-05-02 16:20:08 -0500461{
462 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
Laxman Dewangan18039e02012-03-14 13:00:58 +0530463 int id = rdev_get_id(dev);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500464 int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
Graeme Gregory518fb722011-05-02 16:20:08 -0500465
466 switch (id) {
467 case TPS65910_REG_VDD1:
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700468 opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_OP);
469 mult = tps65910_reg_read_locked(pmic, TPS65910_VDD1);
Graeme Gregory518fb722011-05-02 16:20:08 -0500470 mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700471 srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_SR);
Graeme Gregory518fb722011-05-02 16:20:08 -0500472 sr = opvsel & VDD1_OP_CMD_MASK;
473 opvsel &= VDD1_OP_SEL_MASK;
474 srvsel &= VDD1_SR_SEL_MASK;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500475 vselmax = 75;
Graeme Gregory518fb722011-05-02 16:20:08 -0500476 break;
477 case TPS65910_REG_VDD2:
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700478 opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_OP);
479 mult = tps65910_reg_read_locked(pmic, TPS65910_VDD2);
Graeme Gregory518fb722011-05-02 16:20:08 -0500480 mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700481 srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_SR);
Graeme Gregory518fb722011-05-02 16:20:08 -0500482 sr = opvsel & VDD2_OP_CMD_MASK;
483 opvsel &= VDD2_OP_SEL_MASK;
484 srvsel &= VDD2_SR_SEL_MASK;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500485 vselmax = 75;
486 break;
487 case TPS65911_REG_VDDCTRL:
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700488 opvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_OP);
489 srvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_SR);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500490 sr = opvsel & VDDCTRL_OP_CMD_MASK;
491 opvsel &= VDDCTRL_OP_SEL_MASK;
492 srvsel &= VDDCTRL_SR_SEL_MASK;
493 vselmax = 64;
Graeme Gregory518fb722011-05-02 16:20:08 -0500494 break;
495 }
496
497 /* multiplier 0 == 1 but 2,3 normal */
498 if (!mult)
499 mult=1;
500
501 if (sr) {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500502 /* normalise to valid range */
503 if (srvsel < 3)
504 srvsel = 3;
505 if (srvsel > vselmax)
506 srvsel = vselmax;
Laxman Dewangan18039e02012-03-14 13:00:58 +0530507 return srvsel - 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500508 } else {
509
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500510 /* normalise to valid range*/
511 if (opvsel < 3)
512 opvsel = 3;
513 if (opvsel > vselmax)
514 opvsel = vselmax;
Laxman Dewangan18039e02012-03-14 13:00:58 +0530515 return opvsel - 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500516 }
Laxman Dewangan18039e02012-03-14 13:00:58 +0530517 return -EINVAL;
Graeme Gregory518fb722011-05-02 16:20:08 -0500518}
519
Axel Lin1f904fd2012-05-09 09:22:47 +0800520static int tps65910_get_voltage_sel(struct regulator_dev *dev)
Graeme Gregory518fb722011-05-02 16:20:08 -0500521{
522 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
Axel Lin1f904fd2012-05-09 09:22:47 +0800523 int reg, value, id = rdev_get_id(dev);
Graeme Gregory518fb722011-05-02 16:20:08 -0500524
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500525 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500526 if (reg < 0)
527 return reg;
528
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700529 value = tps65910_reg_read_locked(pmic, reg);
Graeme Gregory518fb722011-05-02 16:20:08 -0500530 if (value < 0)
531 return value;
532
533 switch (id) {
534 case TPS65910_REG_VIO:
535 case TPS65910_REG_VDIG1:
536 case TPS65910_REG_VDIG2:
537 case TPS65910_REG_VPLL:
538 case TPS65910_REG_VDAC:
539 case TPS65910_REG_VAUX1:
540 case TPS65910_REG_VAUX2:
541 case TPS65910_REG_VAUX33:
542 case TPS65910_REG_VMMC:
543 value &= LDO_SEL_MASK;
544 value >>= LDO_SEL_SHIFT;
545 break;
546 default:
547 return -EINVAL;
548 }
549
Axel Lin1f904fd2012-05-09 09:22:47 +0800550 return value;
Graeme Gregory518fb722011-05-02 16:20:08 -0500551}
552
553static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
554{
Axel Lind9fe28f2012-06-21 18:48:00 +0800555 return dev->desc->volt_table[0];
Graeme Gregory518fb722011-05-02 16:20:08 -0500556}
557
Axel Lin1f904fd2012-05-09 09:22:47 +0800558static int tps65911_get_voltage_sel(struct regulator_dev *dev)
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500559{
560 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
Axel Lin1f904fd2012-05-09 09:22:47 +0800561 int id = rdev_get_id(dev);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500562 u8 value, reg;
563
564 reg = pmic->get_ctrl_reg(id);
565
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700566 value = tps65910_reg_read_locked(pmic, reg);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500567
568 switch (id) {
569 case TPS65911_REG_LDO1:
570 case TPS65911_REG_LDO2:
571 case TPS65911_REG_LDO4:
572 value &= LDO1_SEL_MASK;
573 value >>= LDO_SEL_SHIFT;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500574 break;
575 case TPS65911_REG_LDO3:
576 case TPS65911_REG_LDO5:
577 case TPS65911_REG_LDO6:
578 case TPS65911_REG_LDO7:
579 case TPS65911_REG_LDO8:
580 value &= LDO3_SEL_MASK;
581 value >>= LDO_SEL_SHIFT;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500582 break;
583 case TPS65910_REG_VIO:
Laxman Dewangane882eae2012-02-17 18:56:11 +0530584 value &= LDO_SEL_MASK;
585 value >>= LDO_SEL_SHIFT;
Axel Lin1f904fd2012-05-09 09:22:47 +0800586 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500587 default:
588 return -EINVAL;
589 }
590
Axel Lin1f904fd2012-05-09 09:22:47 +0800591 return value;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500592}
593
Axel Lin94732b92012-03-09 10:22:20 +0800594static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
595 unsigned selector)
Graeme Gregory518fb722011-05-02 16:20:08 -0500596{
597 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
598 int id = rdev_get_id(dev), vsel;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500599 int dcdc_mult = 0;
Graeme Gregory518fb722011-05-02 16:20:08 -0500600
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500601 switch (id) {
602 case TPS65910_REG_VDD1:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530603 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500604 if (dcdc_mult == 1)
605 dcdc_mult--;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530606 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500607
Graeme Gregory518fb722011-05-02 16:20:08 -0500608 tps65910_modify_bits(pmic, TPS65910_VDD1,
609 (dcdc_mult << VDD1_VGAIN_SEL_SHIFT),
610 VDD1_VGAIN_SEL_MASK);
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700611 tps65910_reg_write_locked(pmic, TPS65910_VDD1_OP, vsel);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500612 break;
613 case TPS65910_REG_VDD2:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530614 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500615 if (dcdc_mult == 1)
616 dcdc_mult--;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530617 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500618
Graeme Gregory518fb722011-05-02 16:20:08 -0500619 tps65910_modify_bits(pmic, TPS65910_VDD2,
620 (dcdc_mult << VDD2_VGAIN_SEL_SHIFT),
621 VDD1_VGAIN_SEL_MASK);
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700622 tps65910_reg_write_locked(pmic, TPS65910_VDD2_OP, vsel);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500623 break;
624 case TPS65911_REG_VDDCTRL:
Laxman Dewanganc4632ae2012-03-07 16:39:05 +0530625 vsel = selector + 3;
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700626 tps65910_reg_write_locked(pmic, TPS65911_VDDCTRL_OP, vsel);
Graeme Gregory518fb722011-05-02 16:20:08 -0500627 }
628
629 return 0;
630}
631
Axel Lin94732b92012-03-09 10:22:20 +0800632static int tps65910_set_voltage_sel(struct regulator_dev *dev,
633 unsigned selector)
Graeme Gregory518fb722011-05-02 16:20:08 -0500634{
635 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
636 int reg, id = rdev_get_id(dev);
637
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500638 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500639 if (reg < 0)
640 return reg;
641
642 switch (id) {
643 case TPS65910_REG_VIO:
644 case TPS65910_REG_VDIG1:
645 case TPS65910_REG_VDIG2:
646 case TPS65910_REG_VPLL:
647 case TPS65910_REG_VDAC:
648 case TPS65910_REG_VAUX1:
649 case TPS65910_REG_VAUX2:
650 case TPS65910_REG_VAUX33:
651 case TPS65910_REG_VMMC:
652 return tps65910_modify_bits(pmic, reg,
653 (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
654 }
655
656 return -EINVAL;
657}
658
Axel Lin94732b92012-03-09 10:22:20 +0800659static int tps65911_set_voltage_sel(struct regulator_dev *dev,
660 unsigned selector)
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500661{
662 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
663 int reg, id = rdev_get_id(dev);
664
665 reg = pmic->get_ctrl_reg(id);
666 if (reg < 0)
667 return reg;
668
669 switch (id) {
670 case TPS65911_REG_LDO1:
671 case TPS65911_REG_LDO2:
672 case TPS65911_REG_LDO4:
673 return tps65910_modify_bits(pmic, reg,
674 (selector << LDO_SEL_SHIFT), LDO1_SEL_MASK);
675 case TPS65911_REG_LDO3:
676 case TPS65911_REG_LDO5:
677 case TPS65911_REG_LDO6:
678 case TPS65911_REG_LDO7:
679 case TPS65911_REG_LDO8:
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500680 return tps65910_modify_bits(pmic, reg,
681 (selector << LDO_SEL_SHIFT), LDO3_SEL_MASK);
Laxman Dewangane882eae2012-02-17 18:56:11 +0530682 case TPS65910_REG_VIO:
683 return tps65910_modify_bits(pmic, reg,
684 (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500685 }
686
687 return -EINVAL;
688}
689
690
Graeme Gregory518fb722011-05-02 16:20:08 -0500691static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
692 unsigned selector)
693{
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500694 int volt, mult = 1, id = rdev_get_id(dev);
Graeme Gregory518fb722011-05-02 16:20:08 -0500695
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500696 switch (id) {
697 case TPS65910_REG_VDD1:
698 case TPS65910_REG_VDD2:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530699 mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500700 volt = VDD1_2_MIN_VOLT +
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530701 (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
Axel Lind04156b2011-07-10 21:44:09 +0800702 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500703 case TPS65911_REG_VDDCTRL:
704 volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
Axel Lind04156b2011-07-10 21:44:09 +0800705 break;
706 default:
707 BUG();
708 return -EINVAL;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500709 }
Graeme Gregory518fb722011-05-02 16:20:08 -0500710
711 return volt * 100 * mult;
712}
713
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500714static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
715{
716 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
717 int step_mv = 0, id = rdev_get_id(dev);
718
719 switch(id) {
720 case TPS65911_REG_LDO1:
721 case TPS65911_REG_LDO2:
722 case TPS65911_REG_LDO4:
723 /* The first 5 values of the selector correspond to 1V */
724 if (selector < 5)
725 selector = 0;
726 else
727 selector -= 4;
728
729 step_mv = 50;
730 break;
731 case TPS65911_REG_LDO3:
732 case TPS65911_REG_LDO5:
733 case TPS65911_REG_LDO6:
734 case TPS65911_REG_LDO7:
735 case TPS65911_REG_LDO8:
736 /* The first 3 values of the selector correspond to 1V */
737 if (selector < 3)
738 selector = 0;
739 else
740 selector -= 2;
741
742 step_mv = 100;
743 break;
744 case TPS65910_REG_VIO:
Axel Lind9fe28f2012-06-21 18:48:00 +0800745 return pmic->info[id]->voltage_table[selector];
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500746 default:
747 return -EINVAL;
748 }
749
750 return (LDO_MIN_VOLT + selector * step_mv) * 1000;
751}
752
Graeme Gregory518fb722011-05-02 16:20:08 -0500753/* Regulator ops (except VRTC) */
754static struct regulator_ops tps65910_ops_dcdc = {
Axel Lina40a9c42012-04-17 14:34:46 +0800755 .is_enabled = regulator_is_enabled_regmap,
756 .enable = regulator_enable_regmap,
757 .disable = regulator_disable_regmap,
Graeme Gregory518fb722011-05-02 16:20:08 -0500758 .set_mode = tps65910_set_mode,
759 .get_mode = tps65910_get_mode,
Laxman Dewangan18039e02012-03-14 13:00:58 +0530760 .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
Axel Lin94732b92012-03-09 10:22:20 +0800761 .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
Axel Lin01bc3a12012-06-20 22:40:10 +0800762 .set_voltage_time_sel = regulator_set_voltage_time_sel,
Graeme Gregory518fb722011-05-02 16:20:08 -0500763 .list_voltage = tps65910_list_voltage_dcdc,
764};
765
766static struct regulator_ops tps65910_ops_vdd3 = {
Axel Lina40a9c42012-04-17 14:34:46 +0800767 .is_enabled = regulator_is_enabled_regmap,
768 .enable = regulator_enable_regmap,
769 .disable = regulator_disable_regmap,
Graeme Gregory518fb722011-05-02 16:20:08 -0500770 .set_mode = tps65910_set_mode,
771 .get_mode = tps65910_get_mode,
772 .get_voltage = tps65910_get_voltage_vdd3,
Axel Lind9fe28f2012-06-21 18:48:00 +0800773 .list_voltage = regulator_list_voltage_table,
Graeme Gregory518fb722011-05-02 16:20:08 -0500774};
775
776static struct regulator_ops tps65910_ops = {
Axel Lina40a9c42012-04-17 14:34:46 +0800777 .is_enabled = regulator_is_enabled_regmap,
778 .enable = regulator_enable_regmap,
779 .disable = regulator_disable_regmap,
Graeme Gregory518fb722011-05-02 16:20:08 -0500780 .set_mode = tps65910_set_mode,
781 .get_mode = tps65910_get_mode,
Axel Lin1f904fd2012-05-09 09:22:47 +0800782 .get_voltage_sel = tps65910_get_voltage_sel,
Axel Lin94732b92012-03-09 10:22:20 +0800783 .set_voltage_sel = tps65910_set_voltage_sel,
Axel Lind9fe28f2012-06-21 18:48:00 +0800784 .list_voltage = regulator_list_voltage_table,
Graeme Gregory518fb722011-05-02 16:20:08 -0500785};
786
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500787static struct regulator_ops tps65911_ops = {
Axel Lina40a9c42012-04-17 14:34:46 +0800788 .is_enabled = regulator_is_enabled_regmap,
789 .enable = regulator_enable_regmap,
790 .disable = regulator_disable_regmap,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500791 .set_mode = tps65910_set_mode,
792 .get_mode = tps65910_get_mode,
Axel Lin1f904fd2012-05-09 09:22:47 +0800793 .get_voltage_sel = tps65911_get_voltage_sel,
Axel Lin94732b92012-03-09 10:22:20 +0800794 .set_voltage_sel = tps65911_set_voltage_sel,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500795 .list_voltage = tps65911_list_voltage,
796};
797
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530798static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
799 int id, int ext_sleep_config)
800{
801 struct tps65910 *mfd = pmic->mfd;
802 u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
803 u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
804 int ret;
805
806 /*
807 * Regulator can not be control from multiple external input EN1, EN2
808 * and EN3 together.
809 */
810 if (ext_sleep_config & EXT_SLEEP_CONTROL) {
811 int en_count;
812 en_count = ((ext_sleep_config &
813 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
814 en_count += ((ext_sleep_config &
815 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
816 en_count += ((ext_sleep_config &
817 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
Laxman Dewanganf30b0712012-03-07 18:21:49 +0530818 en_count += ((ext_sleep_config &
819 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530820 if (en_count > 1) {
821 dev_err(mfd->dev,
822 "External sleep control flag is not proper\n");
823 return -EINVAL;
824 }
825 }
826
827 pmic->board_ext_control[id] = ext_sleep_config;
828
829 /* External EN1 control */
830 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700831 ret = tps65910_reg_set_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530832 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
833 else
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700834 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530835 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
836 if (ret < 0) {
837 dev_err(mfd->dev,
838 "Error in configuring external control EN1\n");
839 return ret;
840 }
841
842 /* External EN2 control */
843 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700844 ret = tps65910_reg_set_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530845 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
846 else
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700847 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530848 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
849 if (ret < 0) {
850 dev_err(mfd->dev,
851 "Error in configuring external control EN2\n");
852 return ret;
853 }
854
855 /* External EN3 control for TPS65910 LDO only */
856 if ((tps65910_chip_id(mfd) == TPS65910) &&
857 (id >= TPS65910_REG_VDIG1)) {
858 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700859 ret = tps65910_reg_set_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530860 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
861 else
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700862 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530863 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
864 if (ret < 0) {
865 dev_err(mfd->dev,
866 "Error in configuring external control EN3\n");
867 return ret;
868 }
869 }
870
871 /* Return if no external control is selected */
872 if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
873 /* Clear all sleep controls */
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700874 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530875 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
876 if (!ret)
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700877 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530878 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
879 if (ret < 0)
880 dev_err(mfd->dev,
881 "Error in configuring SLEEP register\n");
882 return ret;
883 }
884
885 /*
886 * For regulator that has separate operational and sleep register make
887 * sure that operational is used and clear sleep register to turn
888 * regulator off when external control is inactive
889 */
890 if ((id == TPS65910_REG_VDD1) ||
891 (id == TPS65910_REG_VDD2) ||
892 ((id == TPS65911_REG_VDDCTRL) &&
893 (tps65910_chip_id(mfd) == TPS65911))) {
894 int op_reg_add = pmic->get_ctrl_reg(id) + 1;
895 int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700896 int opvsel = tps65910_reg_read_locked(pmic, op_reg_add);
897 int srvsel = tps65910_reg_read_locked(pmic, sr_reg_add);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530898 if (opvsel & VDD1_OP_CMD_MASK) {
899 u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700900 ret = tps65910_reg_write_locked(pmic, op_reg_add,
901 reg_val);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530902 if (ret < 0) {
903 dev_err(mfd->dev,
904 "Error in configuring op register\n");
905 return ret;
906 }
907 }
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700908 ret = tps65910_reg_write_locked(pmic, sr_reg_add, 0);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530909 if (ret < 0) {
910 dev_err(mfd->dev, "Error in settting sr register\n");
911 return ret;
912 }
913 }
914
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700915 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530916 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
Laxman Dewanganf30b0712012-03-07 18:21:49 +0530917 if (!ret) {
918 if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700919 ret = tps65910_reg_set_bits(mfd,
Laxman Dewanganf30b0712012-03-07 18:21:49 +0530920 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
921 else
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700922 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewanganf30b0712012-03-07 18:21:49 +0530923 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
924 }
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530925 if (ret < 0)
926 dev_err(mfd->dev,
927 "Error in configuring SLEEP register\n");
Laxman Dewanganf30b0712012-03-07 18:21:49 +0530928
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530929 return ret;
930}
931
Rhyland Klein67901782012-05-08 11:42:41 -0700932#ifdef CONFIG_OF
933
934static struct of_regulator_match tps65910_matches[] = {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530935 { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] },
936 { .name = "vio", .driver_data = (void *) &tps65910_regs[1] },
937 { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] },
938 { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] },
939 { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] },
940 { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] },
941 { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] },
942 { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] },
943 { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] },
944 { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] },
945 { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] },
946 { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] },
947 { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] },
Rhyland Klein67901782012-05-08 11:42:41 -0700948};
949
950static struct of_regulator_match tps65911_matches[] = {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530951 { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] },
952 { .name = "vio", .driver_data = (void *) &tps65911_regs[1] },
953 { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] },
954 { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] },
955 { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] },
956 { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] },
957 { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] },
958 { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] },
959 { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] },
960 { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] },
961 { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] },
962 { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] },
963 { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] },
Rhyland Klein67901782012-05-08 11:42:41 -0700964};
965
966static struct tps65910_board *tps65910_parse_dt_reg_data(
Laxman Dewangan84df8c12012-05-20 21:48:50 +0530967 struct platform_device *pdev,
968 struct of_regulator_match **tps65910_reg_matches)
Rhyland Klein67901782012-05-08 11:42:41 -0700969{
970 struct tps65910_board *pmic_plat_data;
971 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
972 struct device_node *np = pdev->dev.parent->of_node;
973 struct device_node *regulators;
974 struct of_regulator_match *matches;
975 unsigned int prop;
976 int idx = 0, ret, count;
977
978 pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data),
979 GFP_KERNEL);
980
981 if (!pmic_plat_data) {
982 dev_err(&pdev->dev, "Failure to alloc pdata for regulators.\n");
983 return NULL;
984 }
985
986 regulators = of_find_node_by_name(np, "regulators");
Laxman Dewangan92ab9532012-05-20 21:48:49 +0530987 if (!regulators) {
988 dev_err(&pdev->dev, "regulator node not found\n");
989 return NULL;
990 }
Rhyland Klein67901782012-05-08 11:42:41 -0700991
992 switch (tps65910_chip_id(tps65910)) {
993 case TPS65910:
994 count = ARRAY_SIZE(tps65910_matches);
995 matches = tps65910_matches;
996 break;
997 case TPS65911:
998 count = ARRAY_SIZE(tps65911_matches);
999 matches = tps65911_matches;
1000 break;
1001 default:
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301002 dev_err(&pdev->dev, "Invalid tps chip version\n");
Rhyland Klein67901782012-05-08 11:42:41 -07001003 return NULL;
1004 }
1005
1006 ret = of_regulator_match(pdev->dev.parent, regulators, matches, count);
1007 if (ret < 0) {
1008 dev_err(&pdev->dev, "Error parsing regulator init data: %d\n",
1009 ret);
1010 return NULL;
1011 }
1012
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301013 *tps65910_reg_matches = matches;
1014
Rhyland Klein67901782012-05-08 11:42:41 -07001015 for (idx = 0; idx < count; idx++) {
1016 if (!matches[idx].init_data || !matches[idx].of_node)
1017 continue;
1018
1019 pmic_plat_data->tps65910_pmic_init_data[idx] =
1020 matches[idx].init_data;
1021
1022 ret = of_property_read_u32(matches[idx].of_node,
1023 "ti,regulator-ext-sleep-control", &prop);
1024 if (!ret)
1025 pmic_plat_data->regulator_ext_sleep_control[idx] = prop;
1026 }
1027
1028 return pmic_plat_data;
1029}
1030#else
1031static inline struct tps65910_board *tps65910_parse_dt_reg_data(
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301032 struct platform_device *pdev,
1033 struct of_regulator_match **tps65910_reg_matches)
Rhyland Klein67901782012-05-08 11:42:41 -07001034{
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301035 *tps65910_reg_matches = NULL;
Mark Brown74ea0e52012-06-15 19:04:33 +01001036 return NULL;
Rhyland Klein67901782012-05-08 11:42:41 -07001037}
1038#endif
1039
Graeme Gregory518fb722011-05-02 16:20:08 -05001040static __devinit int tps65910_probe(struct platform_device *pdev)
1041{
1042 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
Mark Brownc1727082012-04-04 00:50:22 +01001043 struct regulator_config config = { };
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001044 struct tps_info *info;
Graeme Gregory518fb722011-05-02 16:20:08 -05001045 struct regulator_init_data *reg_data;
1046 struct regulator_dev *rdev;
1047 struct tps65910_reg *pmic;
1048 struct tps65910_board *pmic_plat_data;
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301049 struct of_regulator_match *tps65910_reg_matches = NULL;
Graeme Gregory518fb722011-05-02 16:20:08 -05001050 int i, err;
1051
1052 pmic_plat_data = dev_get_platdata(tps65910->dev);
Rhyland Klein67901782012-05-08 11:42:41 -07001053 if (!pmic_plat_data && tps65910->dev->of_node)
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301054 pmic_plat_data = tps65910_parse_dt_reg_data(pdev,
1055 &tps65910_reg_matches);
Rhyland Klein67901782012-05-08 11:42:41 -07001056
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301057 if (!pmic_plat_data) {
1058 dev_err(&pdev->dev, "Platform data not found\n");
Graeme Gregory518fb722011-05-02 16:20:08 -05001059 return -EINVAL;
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301060 }
Graeme Gregory518fb722011-05-02 16:20:08 -05001061
Axel Lin9eb0c422012-04-11 14:40:18 +08001062 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301063 if (!pmic) {
1064 dev_err(&pdev->dev, "Memory allocation failed for pmic\n");
Graeme Gregory518fb722011-05-02 16:20:08 -05001065 return -ENOMEM;
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301066 }
Graeme Gregory518fb722011-05-02 16:20:08 -05001067
1068 mutex_init(&pmic->mutex);
1069 pmic->mfd = tps65910;
1070 platform_set_drvdata(pdev, pmic);
1071
1072 /* Give control of all register to control port */
Rhyland Klein3f7e8272012-05-08 11:42:38 -07001073 tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL,
Graeme Gregory518fb722011-05-02 16:20:08 -05001074 DEVCTRL_SR_CTL_I2C_SEL_MASK);
1075
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001076 switch(tps65910_chip_id(tps65910)) {
1077 case TPS65910:
1078 pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
Axel Lin39aa9b62011-07-11 09:57:43 +08001079 pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301080 pmic->ext_sleep_control = tps65910_ext_sleep_control;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001081 info = tps65910_regs;
Axel Lind04156b2011-07-10 21:44:09 +08001082 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001083 case TPS65911:
1084 pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
Axel Lin39aa9b62011-07-11 09:57:43 +08001085 pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301086 pmic->ext_sleep_control = tps65911_ext_sleep_control;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001087 info = tps65911_regs;
Axel Lind04156b2011-07-10 21:44:09 +08001088 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001089 default:
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301090 dev_err(&pdev->dev, "Invalid tps chip version\n");
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001091 return -ENODEV;
1092 }
1093
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301094 pmic->desc = devm_kzalloc(&pdev->dev, pmic->num_regulators *
Axel Lin39aa9b62011-07-11 09:57:43 +08001095 sizeof(struct regulator_desc), GFP_KERNEL);
1096 if (!pmic->desc) {
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301097 dev_err(&pdev->dev, "Memory alloc fails for desc\n");
1098 return -ENOMEM;
Axel Lin39aa9b62011-07-11 09:57:43 +08001099 }
1100
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301101 pmic->info = devm_kzalloc(&pdev->dev, pmic->num_regulators *
Axel Lin39aa9b62011-07-11 09:57:43 +08001102 sizeof(struct tps_info *), GFP_KERNEL);
1103 if (!pmic->info) {
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301104 dev_err(&pdev->dev, "Memory alloc fails for info\n");
1105 return -ENOMEM;
Axel Lin39aa9b62011-07-11 09:57:43 +08001106 }
1107
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301108 pmic->rdev = devm_kzalloc(&pdev->dev, pmic->num_regulators *
Axel Lin39aa9b62011-07-11 09:57:43 +08001109 sizeof(struct regulator_dev *), GFP_KERNEL);
1110 if (!pmic->rdev) {
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301111 dev_err(&pdev->dev, "Memory alloc fails for rdev\n");
1112 return -ENOMEM;
Axel Lin39aa9b62011-07-11 09:57:43 +08001113 }
1114
Kyle Mannac1fc1482011-11-03 12:08:06 -05001115 for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
1116 i++, info++) {
1117
1118 reg_data = pmic_plat_data->tps65910_pmic_init_data[i];
1119
1120 /* Regulator API handles empty constraints but not NULL
1121 * constraints */
1122 if (!reg_data)
1123 continue;
1124
Graeme Gregory518fb722011-05-02 16:20:08 -05001125 /* Register the regulators */
1126 pmic->info[i] = info;
1127
1128 pmic->desc[i].name = info->name;
Axel Lin77fa44d2011-05-12 13:47:50 +08001129 pmic->desc[i].id = i;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +05301130 pmic->desc[i].n_voltages = info->n_voltages;
Axel Lin94f48ab2012-07-04 09:59:17 +08001131 pmic->desc[i].enable_time = info->enable_time_us;
Graeme Gregory518fb722011-05-02 16:20:08 -05001132
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001133 if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
Graeme Gregory518fb722011-05-02 16:20:08 -05001134 pmic->desc[i].ops = &tps65910_ops_dcdc;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +05301135 pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
1136 VDD1_2_NUM_VOLT_COARSE;
Axel Lin01bc3a12012-06-20 22:40:10 +08001137 pmic->desc[i].ramp_delay = 12500;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001138 } else if (i == TPS65910_REG_VDD3) {
Axel Lin01bc3a12012-06-20 22:40:10 +08001139 if (tps65910_chip_id(tps65910) == TPS65910) {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001140 pmic->desc[i].ops = &tps65910_ops_vdd3;
Axel Lind9fe28f2012-06-21 18:48:00 +08001141 pmic->desc[i].volt_table = info->voltage_table;
Axel Lin01bc3a12012-06-20 22:40:10 +08001142 } else {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001143 pmic->desc[i].ops = &tps65910_ops_dcdc;
Axel Lin01bc3a12012-06-20 22:40:10 +08001144 pmic->desc[i].ramp_delay = 5000;
1145 }
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001146 } else {
Axel Lind9fe28f2012-06-21 18:48:00 +08001147 if (tps65910_chip_id(tps65910) == TPS65910) {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001148 pmic->desc[i].ops = &tps65910_ops;
Axel Lind9fe28f2012-06-21 18:48:00 +08001149 pmic->desc[i].volt_table = info->voltage_table;
1150 } else {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001151 pmic->desc[i].ops = &tps65911_ops;
Axel Lind9fe28f2012-06-21 18:48:00 +08001152 }
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001153 }
Graeme Gregory518fb722011-05-02 16:20:08 -05001154
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301155 err = tps65910_set_ext_sleep_config(pmic, i,
1156 pmic_plat_data->regulator_ext_sleep_control[i]);
1157 /*
1158 * Failing on regulator for configuring externally control
1159 * is not a serious issue, just throw warning.
1160 */
1161 if (err < 0)
1162 dev_warn(tps65910->dev,
1163 "Failed to initialise ext control config\n");
1164
Graeme Gregory518fb722011-05-02 16:20:08 -05001165 pmic->desc[i].type = REGULATOR_VOLTAGE;
1166 pmic->desc[i].owner = THIS_MODULE;
Axel Lina40a9c42012-04-17 14:34:46 +08001167 pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i);
1168 pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED;
Graeme Gregory518fb722011-05-02 16:20:08 -05001169
Mark Brownc1727082012-04-04 00:50:22 +01001170 config.dev = tps65910->dev;
1171 config.init_data = reg_data;
1172 config.driver_data = pmic;
Axel Lina40a9c42012-04-17 14:34:46 +08001173 config.regmap = tps65910->regmap;
Mark Brownc1727082012-04-04 00:50:22 +01001174
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301175 if (tps65910_reg_matches)
1176 config.of_node = tps65910_reg_matches[i].of_node;
Rhyland Klein67901782012-05-08 11:42:41 -07001177
Mark Brownc1727082012-04-04 00:50:22 +01001178 rdev = regulator_register(&pmic->desc[i], &config);
Graeme Gregory518fb722011-05-02 16:20:08 -05001179 if (IS_ERR(rdev)) {
1180 dev_err(tps65910->dev,
1181 "failed to register %s regulator\n",
1182 pdev->name);
1183 err = PTR_ERR(rdev);
Axel Lin39aa9b62011-07-11 09:57:43 +08001184 goto err_unregister_regulator;
Graeme Gregory518fb722011-05-02 16:20:08 -05001185 }
1186
1187 /* Save regulator for cleanup */
1188 pmic->rdev[i] = rdev;
1189 }
1190 return 0;
1191
Axel Lin39aa9b62011-07-11 09:57:43 +08001192err_unregister_regulator:
Graeme Gregory518fb722011-05-02 16:20:08 -05001193 while (--i >= 0)
1194 regulator_unregister(pmic->rdev[i]);
Graeme Gregory518fb722011-05-02 16:20:08 -05001195 return err;
1196}
1197
1198static int __devexit tps65910_remove(struct platform_device *pdev)
1199{
Axel Lin39aa9b62011-07-11 09:57:43 +08001200 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
Graeme Gregory518fb722011-05-02 16:20:08 -05001201 int i;
1202
Axel Lin39aa9b62011-07-11 09:57:43 +08001203 for (i = 0; i < pmic->num_regulators; i++)
1204 regulator_unregister(pmic->rdev[i]);
Graeme Gregory518fb722011-05-02 16:20:08 -05001205
Graeme Gregory518fb722011-05-02 16:20:08 -05001206 return 0;
1207}
1208
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301209static void tps65910_shutdown(struct platform_device *pdev)
1210{
1211 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
1212 int i;
1213
1214 /*
1215 * Before bootloader jumps to kernel, it makes sure that required
1216 * external control signals are in desired state so that given rails
1217 * can be configure accordingly.
1218 * If rails are configured to be controlled from external control
1219 * then before shutting down/rebooting the system, the external
1220 * control configuration need to be remove from the rails so that
1221 * its output will be available as per register programming even
1222 * if external controls are removed. This is require when the POR
1223 * value of the control signals are not in active state and before
1224 * bootloader initializes it, the system requires the rail output
1225 * to be active for booting.
1226 */
1227 for (i = 0; i < pmic->num_regulators; i++) {
1228 int err;
1229 if (!pmic->rdev[i])
1230 continue;
1231
1232 err = tps65910_set_ext_sleep_config(pmic, i, 0);
1233 if (err < 0)
1234 dev_err(&pdev->dev,
1235 "Error in clearing external control\n");
1236 }
1237}
1238
Graeme Gregory518fb722011-05-02 16:20:08 -05001239static struct platform_driver tps65910_driver = {
1240 .driver = {
1241 .name = "tps65910-pmic",
1242 .owner = THIS_MODULE,
1243 },
1244 .probe = tps65910_probe,
1245 .remove = __devexit_p(tps65910_remove),
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301246 .shutdown = tps65910_shutdown,
Graeme Gregory518fb722011-05-02 16:20:08 -05001247};
1248
1249static int __init tps65910_init(void)
1250{
1251 return platform_driver_register(&tps65910_driver);
1252}
1253subsys_initcall(tps65910_init);
1254
1255static void __exit tps65910_cleanup(void)
1256{
1257 platform_driver_unregister(&tps65910_driver);
1258}
1259module_exit(tps65910_cleanup);
1260
1261MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
Axel Linae0e6542012-02-21 10:14:55 +08001262MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
Graeme Gregory518fb722011-05-02 16:20:08 -05001263MODULE_LICENSE("GPL v2");
1264MODULE_ALIAS("platform:tps65910-pmic");