| Roland McGrath | 1eeaed7 | 2008-01-30 13:31:51 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 1994 Linus Torvalds |
| 3 | * |
| 4 | * Pentium III FXSR, SSE support |
| 5 | * General FPU state handling cleanups |
| 6 | * Gareth Hughes <gareth@valinux.com>, May 2000 |
| 7 | * x86-64 work by Andi Kleen 2002 |
| 8 | */ |
| 9 | |
| Ingo Molnar | df6b35f | 2015-04-24 02:46:00 +0200 | [diff] [blame] | 10 | #ifndef _ASM_X86_FPU_API_H |
| 11 | #define _ASM_X86_FPU_API_H |
| Roland McGrath | 1eeaed7 | 2008-01-30 13:31:51 +0100 | [diff] [blame] | 12 | |
| Suresh Siddha | e491401 | 2008-08-13 22:02:26 +1000 | [diff] [blame] | 13 | #include <linux/hardirq.h> |
| Roland McGrath | 1eeaed7 | 2008-01-30 13:31:51 +0100 | [diff] [blame] | 14 | |
| Suresh Siddha | b1a74bf | 2012-09-20 11:01:49 -0700 | [diff] [blame] | 15 | /* |
| 16 | * Careful: __kernel_fpu_begin/end() must be called with preempt disabled |
| 17 | * and they don't touch the preempt state on their own. |
| 18 | * If you enable preemption after __kernel_fpu_begin(), preempt notifier |
| 19 | * should call the __kernel_fpu_end() to prevent the kernel/user FPU |
| 20 | * state from getting corrupted. KVM for example uses this model. |
| 21 | * |
| 22 | * All other cases use kernel_fpu_begin/end() which disable preemption |
| 23 | * during kernel FPU usage. |
| 24 | */ |
| 25 | extern void __kernel_fpu_begin(void); |
| 26 | extern void __kernel_fpu_end(void); |
| Ingo Molnar | d63e79b | 2015-04-26 12:07:18 +0200 | [diff] [blame] | 27 | extern void kernel_fpu_begin(void); |
| 28 | extern void kernel_fpu_end(void); |
| Ingo Molnar | 952f07e | 2015-04-26 16:56:05 +0200 | [diff] [blame^] | 29 | extern bool irq_fpu_usable(void); |
| Roland McGrath | 1eeaed7 | 2008-01-30 13:31:51 +0100 | [diff] [blame] | 30 | |
| Suresh Siddha | e491401 | 2008-08-13 22:02:26 +1000 | [diff] [blame] | 31 | /* |
| 32 | * Some instructions like VIA's padlock instructions generate a spurious |
| 33 | * DNA fault but don't modify SSE registers. And these instructions |
| Chuck Ebbert | 0b8c3d5 | 2009-06-09 10:40:50 -0400 | [diff] [blame] | 34 | * get used from interrupt context as well. To prevent these kernel instructions |
| 35 | * in interrupt context interacting wrongly with other user/kernel fpu usage, we |
| Suresh Siddha | e491401 | 2008-08-13 22:02:26 +1000 | [diff] [blame] | 36 | * should use them only in the context of irq_ts_save/restore() |
| 37 | */ |
| 38 | static inline int irq_ts_save(void) |
| 39 | { |
| 40 | /* |
| Chuck Ebbert | 0b8c3d5 | 2009-06-09 10:40:50 -0400 | [diff] [blame] | 41 | * If in process context and not atomic, we can take a spurious DNA fault. |
| 42 | * Otherwise, doing clts() in process context requires disabling preemption |
| 43 | * or some heavy lifting like kernel_fpu_begin() |
| Suresh Siddha | e491401 | 2008-08-13 22:02:26 +1000 | [diff] [blame] | 44 | */ |
| Chuck Ebbert | 0b8c3d5 | 2009-06-09 10:40:50 -0400 | [diff] [blame] | 45 | if (!in_atomic()) |
| Suresh Siddha | e491401 | 2008-08-13 22:02:26 +1000 | [diff] [blame] | 46 | return 0; |
| 47 | |
| 48 | if (read_cr0() & X86_CR0_TS) { |
| 49 | clts(); |
| 50 | return 1; |
| 51 | } |
| 52 | |
| 53 | return 0; |
| 54 | } |
| 55 | |
| 56 | static inline void irq_ts_restore(int TS_state) |
| 57 | { |
| 58 | if (TS_state) |
| 59 | stts(); |
| 60 | } |
| 61 | |
| Ingo Molnar | df6b35f | 2015-04-24 02:46:00 +0200 | [diff] [blame] | 62 | #endif /* _ASM_X86_FPU_API_H */ |