Ivo van Doorn | 95ea362 | 2007-09-25 17:57:13 -0700 | [diff] [blame^] | 1 | /* |
| 2 | Copyright (C) 2004 - 2007 rt2x00 SourceForge Project |
| 3 | <http://rt2x00.serialmonkey.com> |
| 4 | |
| 5 | This program is free software; you can redistribute it and/or modify |
| 6 | it under the terms of the GNU General Public License as published by |
| 7 | the Free Software Foundation; either version 2 of the License, or |
| 8 | (at your option) any later version. |
| 9 | |
| 10 | This program is distributed in the hope that it will be useful, |
| 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | GNU General Public License for more details. |
| 14 | |
| 15 | You should have received a copy of the GNU General Public License |
| 16 | along with this program; if not, write to the |
| 17 | Free Software Foundation, Inc., |
| 18 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 19 | */ |
| 20 | |
| 21 | /* |
| 22 | Module: rt2500usb |
| 23 | Abstract: rt2500usb device specific routines. |
| 24 | Supported chipsets: RT2570. |
| 25 | */ |
| 26 | |
| 27 | /* |
| 28 | * Set enviroment defines for rt2x00.h |
| 29 | */ |
| 30 | #define DRV_NAME "rt2500usb" |
| 31 | |
| 32 | #include <linux/delay.h> |
| 33 | #include <linux/etherdevice.h> |
| 34 | #include <linux/init.h> |
| 35 | #include <linux/kernel.h> |
| 36 | #include <linux/module.h> |
| 37 | #include <linux/usb.h> |
| 38 | |
| 39 | #include "rt2x00.h" |
| 40 | #include "rt2x00usb.h" |
| 41 | #include "rt2500usb.h" |
| 42 | |
| 43 | /* |
| 44 | * Register access. |
| 45 | * All access to the CSR registers will go through the methods |
| 46 | * rt2500usb_register_read and rt2500usb_register_write. |
| 47 | * BBP and RF register require indirect register access, |
| 48 | * and use the CSR registers BBPCSR and RFCSR to achieve this. |
| 49 | * These indirect registers work with busy bits, |
| 50 | * and we will try maximal REGISTER_BUSY_COUNT times to access |
| 51 | * the register while taking a REGISTER_BUSY_DELAY us delay |
| 52 | * between each attampt. When the busy bit is still set at that time, |
| 53 | * the access attempt is considered to have failed, |
| 54 | * and we will print an error. |
| 55 | */ |
| 56 | static inline void rt2500usb_register_read(const struct rt2x00_dev *rt2x00dev, |
| 57 | const unsigned int offset, |
| 58 | u16 *value) |
| 59 | { |
| 60 | __le16 reg; |
| 61 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ, |
| 62 | USB_VENDOR_REQUEST_IN, offset, |
| 63 | ®, sizeof(u16), REGISTER_TIMEOUT); |
| 64 | *value = le16_to_cpu(reg); |
| 65 | } |
| 66 | |
| 67 | static inline void rt2500usb_register_multiread(const struct rt2x00_dev |
| 68 | *rt2x00dev, |
| 69 | const unsigned int offset, |
| 70 | void *value, const u16 length) |
| 71 | { |
| 72 | int timeout = REGISTER_TIMEOUT * (length / sizeof(u16)); |
| 73 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ, |
| 74 | USB_VENDOR_REQUEST_IN, offset, |
| 75 | value, length, timeout); |
| 76 | } |
| 77 | |
| 78 | static inline void rt2500usb_register_write(const struct rt2x00_dev *rt2x00dev, |
| 79 | const unsigned int offset, |
| 80 | u16 value) |
| 81 | { |
| 82 | __le16 reg = cpu_to_le16(value); |
| 83 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE, |
| 84 | USB_VENDOR_REQUEST_OUT, offset, |
| 85 | ®, sizeof(u16), REGISTER_TIMEOUT); |
| 86 | } |
| 87 | |
| 88 | static inline void rt2500usb_register_multiwrite(const struct rt2x00_dev |
| 89 | *rt2x00dev, |
| 90 | const unsigned int offset, |
| 91 | void *value, const u16 length) |
| 92 | { |
| 93 | int timeout = REGISTER_TIMEOUT * (length / sizeof(u16)); |
| 94 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE, |
| 95 | USB_VENDOR_REQUEST_OUT, offset, |
| 96 | value, length, timeout); |
| 97 | } |
| 98 | |
| 99 | static u16 rt2500usb_bbp_check(const struct rt2x00_dev *rt2x00dev) |
| 100 | { |
| 101 | u16 reg; |
| 102 | unsigned int i; |
| 103 | |
| 104 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { |
| 105 | rt2500usb_register_read(rt2x00dev, PHY_CSR8, ®); |
| 106 | if (!rt2x00_get_field16(reg, PHY_CSR8_BUSY)) |
| 107 | break; |
| 108 | udelay(REGISTER_BUSY_DELAY); |
| 109 | } |
| 110 | |
| 111 | return reg; |
| 112 | } |
| 113 | |
| 114 | static void rt2500usb_bbp_write(const struct rt2x00_dev *rt2x00dev, |
| 115 | const unsigned int word, const u8 value) |
| 116 | { |
| 117 | u16 reg; |
| 118 | |
| 119 | /* |
| 120 | * Wait until the BBP becomes ready. |
| 121 | */ |
| 122 | reg = rt2500usb_bbp_check(rt2x00dev); |
| 123 | if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) { |
| 124 | ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n"); |
| 125 | return; |
| 126 | } |
| 127 | |
| 128 | /* |
| 129 | * Write the data into the BBP. |
| 130 | */ |
| 131 | reg = 0; |
| 132 | rt2x00_set_field16(®, PHY_CSR7_DATA, value); |
| 133 | rt2x00_set_field16(®, PHY_CSR7_REG_ID, word); |
| 134 | rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 0); |
| 135 | |
| 136 | rt2500usb_register_write(rt2x00dev, PHY_CSR7, reg); |
| 137 | } |
| 138 | |
| 139 | static void rt2500usb_bbp_read(const struct rt2x00_dev *rt2x00dev, |
| 140 | const unsigned int word, u8 *value) |
| 141 | { |
| 142 | u16 reg; |
| 143 | |
| 144 | /* |
| 145 | * Wait until the BBP becomes ready. |
| 146 | */ |
| 147 | reg = rt2500usb_bbp_check(rt2x00dev); |
| 148 | if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) { |
| 149 | ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n"); |
| 150 | return; |
| 151 | } |
| 152 | |
| 153 | /* |
| 154 | * Write the request into the BBP. |
| 155 | */ |
| 156 | reg = 0; |
| 157 | rt2x00_set_field16(®, PHY_CSR7_REG_ID, word); |
| 158 | rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 1); |
| 159 | |
| 160 | rt2500usb_register_write(rt2x00dev, PHY_CSR7, reg); |
| 161 | |
| 162 | /* |
| 163 | * Wait until the BBP becomes ready. |
| 164 | */ |
| 165 | reg = rt2500usb_bbp_check(rt2x00dev); |
| 166 | if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) { |
| 167 | ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n"); |
| 168 | *value = 0xff; |
| 169 | return; |
| 170 | } |
| 171 | |
| 172 | rt2500usb_register_read(rt2x00dev, PHY_CSR7, ®); |
| 173 | *value = rt2x00_get_field16(reg, PHY_CSR7_DATA); |
| 174 | } |
| 175 | |
| 176 | static void rt2500usb_rf_write(const struct rt2x00_dev *rt2x00dev, |
| 177 | const unsigned int word, const u32 value) |
| 178 | { |
| 179 | u16 reg; |
| 180 | unsigned int i; |
| 181 | |
| 182 | if (!word) |
| 183 | return; |
| 184 | |
| 185 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { |
| 186 | rt2500usb_register_read(rt2x00dev, PHY_CSR10, ®); |
| 187 | if (!rt2x00_get_field16(reg, PHY_CSR10_RF_BUSY)) |
| 188 | goto rf_write; |
| 189 | udelay(REGISTER_BUSY_DELAY); |
| 190 | } |
| 191 | |
| 192 | ERROR(rt2x00dev, "PHY_CSR10 register busy. Write failed.\n"); |
| 193 | return; |
| 194 | |
| 195 | rf_write: |
| 196 | reg = 0; |
| 197 | rt2x00_set_field16(®, PHY_CSR9_RF_VALUE, value); |
| 198 | rt2500usb_register_write(rt2x00dev, PHY_CSR9, reg); |
| 199 | |
| 200 | reg = 0; |
| 201 | rt2x00_set_field16(®, PHY_CSR10_RF_VALUE, value >> 16); |
| 202 | rt2x00_set_field16(®, PHY_CSR10_RF_NUMBER_OF_BITS, 20); |
| 203 | rt2x00_set_field16(®, PHY_CSR10_RF_IF_SELECT, 0); |
| 204 | rt2x00_set_field16(®, PHY_CSR10_RF_BUSY, 1); |
| 205 | |
| 206 | rt2500usb_register_write(rt2x00dev, PHY_CSR10, reg); |
| 207 | rt2x00_rf_write(rt2x00dev, word, value); |
| 208 | } |
| 209 | |
| 210 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS |
| 211 | #define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u16)) ) |
| 212 | |
| 213 | static void rt2500usb_read_csr(const struct rt2x00_dev *rt2x00dev, |
| 214 | const unsigned int word, u32 *data) |
| 215 | { |
| 216 | rt2500usb_register_read(rt2x00dev, CSR_OFFSET(word), (u16 *) data); |
| 217 | } |
| 218 | |
| 219 | static void rt2500usb_write_csr(const struct rt2x00_dev *rt2x00dev, |
| 220 | const unsigned int word, u32 data) |
| 221 | { |
| 222 | rt2500usb_register_write(rt2x00dev, CSR_OFFSET(word), data); |
| 223 | } |
| 224 | |
| 225 | static const struct rt2x00debug rt2500usb_rt2x00debug = { |
| 226 | .owner = THIS_MODULE, |
| 227 | .csr = { |
| 228 | .read = rt2500usb_read_csr, |
| 229 | .write = rt2500usb_write_csr, |
| 230 | .word_size = sizeof(u16), |
| 231 | .word_count = CSR_REG_SIZE / sizeof(u16), |
| 232 | }, |
| 233 | .eeprom = { |
| 234 | .read = rt2x00_eeprom_read, |
| 235 | .write = rt2x00_eeprom_write, |
| 236 | .word_size = sizeof(u16), |
| 237 | .word_count = EEPROM_SIZE / sizeof(u16), |
| 238 | }, |
| 239 | .bbp = { |
| 240 | .read = rt2500usb_bbp_read, |
| 241 | .write = rt2500usb_bbp_write, |
| 242 | .word_size = sizeof(u8), |
| 243 | .word_count = BBP_SIZE / sizeof(u8), |
| 244 | }, |
| 245 | .rf = { |
| 246 | .read = rt2x00_rf_read, |
| 247 | .write = rt2500usb_rf_write, |
| 248 | .word_size = sizeof(u32), |
| 249 | .word_count = RF_SIZE / sizeof(u32), |
| 250 | }, |
| 251 | }; |
| 252 | #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ |
| 253 | |
| 254 | /* |
| 255 | * Configuration handlers. |
| 256 | */ |
| 257 | static void rt2500usb_config_mac_addr(struct rt2x00_dev *rt2x00dev, u8 *addr) |
| 258 | { |
| 259 | __le16 reg[3]; |
| 260 | |
| 261 | memset(®, 0, sizeof(reg)); |
| 262 | memcpy(®, addr, ETH_ALEN); |
| 263 | |
| 264 | /* |
| 265 | * The MAC address is passed to us as an array of bytes, |
| 266 | * that array is little endian, so no need for byte ordering. |
| 267 | */ |
| 268 | rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, ®, sizeof(reg)); |
| 269 | } |
| 270 | |
| 271 | static void rt2500usb_config_bssid(struct rt2x00_dev *rt2x00dev, u8 *bssid) |
| 272 | { |
| 273 | __le16 reg[3]; |
| 274 | |
| 275 | memset(®, 0, sizeof(reg)); |
| 276 | memcpy(®, bssid, ETH_ALEN); |
| 277 | |
| 278 | /* |
| 279 | * The BSSID is passed to us as an array of bytes, |
| 280 | * that array is little endian, so no need for byte ordering. |
| 281 | */ |
| 282 | rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, ®, sizeof(reg)); |
| 283 | } |
| 284 | |
| 285 | static void rt2500usb_config_packet_filter(struct rt2x00_dev *rt2x00dev, |
| 286 | const unsigned int filter) |
| 287 | { |
| 288 | int promisc = !!(filter & IFF_PROMISC); |
| 289 | int multicast = !!(filter & IFF_MULTICAST); |
| 290 | int broadcast = !!(filter & IFF_BROADCAST); |
| 291 | u16 reg; |
| 292 | |
| 293 | rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); |
| 294 | rt2x00_set_field16(®, TXRX_CSR2_DROP_NOT_TO_ME, !promisc); |
| 295 | rt2x00_set_field16(®, TXRX_CSR2_DROP_MULTICAST, !multicast); |
| 296 | rt2x00_set_field16(®, TXRX_CSR2_DROP_BROADCAST, !broadcast); |
| 297 | rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); |
| 298 | } |
| 299 | |
| 300 | static void rt2500usb_config_type(struct rt2x00_dev *rt2x00dev, const int type) |
| 301 | { |
| 302 | u16 reg; |
| 303 | |
| 304 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0); |
| 305 | |
| 306 | /* |
| 307 | * Apply hardware packet filter. |
| 308 | */ |
| 309 | rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); |
| 310 | |
| 311 | if (!is_monitor_present(&rt2x00dev->interface) && |
| 312 | (type == IEEE80211_IF_TYPE_IBSS || type == IEEE80211_IF_TYPE_STA)) |
| 313 | rt2x00_set_field16(®, TXRX_CSR2_DROP_TODS, 1); |
| 314 | else |
| 315 | rt2x00_set_field16(®, TXRX_CSR2_DROP_TODS, 0); |
| 316 | |
| 317 | /* |
| 318 | * If there is a non-monitor interface present |
| 319 | * the packet should be strict (even if a monitor interface is present!). |
| 320 | * When there is only 1 interface present which is in monitor mode |
| 321 | * we should start accepting _all_ frames. |
| 322 | */ |
| 323 | if (is_interface_present(&rt2x00dev->interface)) { |
| 324 | rt2x00_set_field16(®, TXRX_CSR2_DROP_CRC, 1); |
| 325 | rt2x00_set_field16(®, TXRX_CSR2_DROP_PHYSICAL, 1); |
| 326 | rt2x00_set_field16(®, TXRX_CSR2_DROP_CONTROL, 1); |
| 327 | rt2x00_set_field16(®, TXRX_CSR2_DROP_VERSION_ERROR, 1); |
| 328 | } else if (is_monitor_present(&rt2x00dev->interface)) { |
| 329 | rt2x00_set_field16(®, TXRX_CSR2_DROP_CRC, 0); |
| 330 | rt2x00_set_field16(®, TXRX_CSR2_DROP_PHYSICAL, 0); |
| 331 | rt2x00_set_field16(®, TXRX_CSR2_DROP_CONTROL, 0); |
| 332 | rt2x00_set_field16(®, TXRX_CSR2_DROP_VERSION_ERROR, 0); |
| 333 | } |
| 334 | |
| 335 | rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); |
| 336 | |
| 337 | /* |
| 338 | * Enable beacon config |
| 339 | */ |
| 340 | rt2500usb_register_read(rt2x00dev, TXRX_CSR20, ®); |
| 341 | rt2x00_set_field16(®, TXRX_CSR20_OFFSET, |
| 342 | (PREAMBLE + get_duration(IEEE80211_HEADER, 2)) >> 6); |
| 343 | if (type == IEEE80211_IF_TYPE_STA) |
| 344 | rt2x00_set_field16(®, TXRX_CSR20_BCN_EXPECT_WINDOW, 0); |
| 345 | else |
| 346 | rt2x00_set_field16(®, TXRX_CSR20_BCN_EXPECT_WINDOW, 2); |
| 347 | rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg); |
| 348 | |
| 349 | /* |
| 350 | * Enable synchronisation. |
| 351 | */ |
| 352 | rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®); |
| 353 | rt2x00_set_field16(®, TXRX_CSR18_OFFSET, 0); |
| 354 | rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg); |
| 355 | |
| 356 | rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); |
| 357 | if (is_interface_present(&rt2x00dev->interface)) { |
| 358 | rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1); |
| 359 | rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1); |
| 360 | } |
| 361 | |
| 362 | rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0); |
| 363 | if (type == IEEE80211_IF_TYPE_IBSS || type == IEEE80211_IF_TYPE_AP) |
| 364 | rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, 2); |
| 365 | else if (type == IEEE80211_IF_TYPE_STA) |
| 366 | rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, 1); |
| 367 | else if (is_monitor_present(&rt2x00dev->interface) && |
| 368 | !is_interface_present(&rt2x00dev->interface)) |
| 369 | rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, 0); |
| 370 | |
| 371 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); |
| 372 | } |
| 373 | |
| 374 | static void rt2500usb_config_rate(struct rt2x00_dev *rt2x00dev, const int rate) |
| 375 | { |
| 376 | struct ieee80211_conf *conf = &rt2x00dev->hw->conf; |
| 377 | u16 reg; |
| 378 | u16 value; |
| 379 | u16 preamble; |
| 380 | |
| 381 | if (DEVICE_GET_RATE_FIELD(rate, PREAMBLE)) |
| 382 | preamble = SHORT_PREAMBLE; |
| 383 | else |
| 384 | preamble = PREAMBLE; |
| 385 | |
| 386 | reg = DEVICE_GET_RATE_FIELD(rate, RATEMASK) & DEV_BASIC_RATEMASK; |
| 387 | |
| 388 | rt2500usb_register_write(rt2x00dev, TXRX_CSR11, reg); |
| 389 | |
| 390 | rt2500usb_register_read(rt2x00dev, TXRX_CSR1, ®); |
| 391 | value = ((conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) ? |
| 392 | SHORT_DIFS : DIFS) + |
| 393 | PLCP + preamble + get_duration(ACK_SIZE, 10); |
| 394 | rt2x00_set_field16(®, TXRX_CSR1_ACK_TIMEOUT, value); |
| 395 | rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg); |
| 396 | |
| 397 | rt2500usb_register_read(rt2x00dev, TXRX_CSR10, ®); |
| 398 | if (preamble == SHORT_PREAMBLE) |
| 399 | rt2x00_set_field16(®, TXRX_CSR10_AUTORESPOND_PREAMBLE, 1); |
| 400 | else |
| 401 | rt2x00_set_field16(®, TXRX_CSR10_AUTORESPOND_PREAMBLE, 0); |
| 402 | rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg); |
| 403 | } |
| 404 | |
| 405 | static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev, |
| 406 | const int phymode) |
| 407 | { |
| 408 | struct ieee80211_hw_mode *mode; |
| 409 | struct ieee80211_rate *rate; |
| 410 | |
| 411 | if (phymode == MODE_IEEE80211A) |
| 412 | rt2x00dev->curr_hwmode = HWMODE_A; |
| 413 | else if (phymode == MODE_IEEE80211B) |
| 414 | rt2x00dev->curr_hwmode = HWMODE_B; |
| 415 | else |
| 416 | rt2x00dev->curr_hwmode = HWMODE_G; |
| 417 | |
| 418 | mode = &rt2x00dev->hwmodes[rt2x00dev->curr_hwmode]; |
| 419 | rate = &mode->rates[mode->num_rates - 1]; |
| 420 | |
| 421 | rt2500usb_config_rate(rt2x00dev, rate->val2); |
| 422 | |
| 423 | if (phymode == MODE_IEEE80211B) { |
| 424 | rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x000b); |
| 425 | rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x0040); |
| 426 | } else { |
| 427 | rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0005); |
| 428 | rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x016c); |
| 429 | } |
| 430 | } |
| 431 | |
| 432 | static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev, |
| 433 | const int index, const int channel, |
| 434 | const int txpower) |
| 435 | { |
| 436 | struct rf_channel reg; |
| 437 | |
| 438 | /* |
| 439 | * Fill rf_reg structure. |
| 440 | */ |
| 441 | memcpy(®, &rt2x00dev->spec.channels[index], sizeof(reg)); |
| 442 | |
| 443 | /* |
| 444 | * Set TXpower. |
| 445 | */ |
| 446 | rt2x00_set_field32(®.rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower)); |
| 447 | |
| 448 | /* |
| 449 | * For RT2525E we should first set the channel to half band higher. |
| 450 | */ |
| 451 | if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) { |
| 452 | static const u32 vals[] = { |
| 453 | 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2, |
| 454 | 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba, |
| 455 | 0x000008ba, 0x000008be, 0x000008b7, 0x00000902, |
| 456 | 0x00000902, 0x00000906 |
| 457 | }; |
| 458 | |
| 459 | rt2500usb_rf_write(rt2x00dev, 2, vals[channel - 1]); |
| 460 | if (reg.rf4) |
| 461 | rt2500usb_rf_write(rt2x00dev, 4, reg.rf4); |
| 462 | } |
| 463 | |
| 464 | rt2500usb_rf_write(rt2x00dev, 1, reg.rf1); |
| 465 | rt2500usb_rf_write(rt2x00dev, 2, reg.rf2); |
| 466 | rt2500usb_rf_write(rt2x00dev, 3, reg.rf3); |
| 467 | if (reg.rf4) |
| 468 | rt2500usb_rf_write(rt2x00dev, 4, reg.rf4); |
| 469 | } |
| 470 | |
| 471 | static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev, |
| 472 | const int txpower) |
| 473 | { |
| 474 | u32 rf3; |
| 475 | |
| 476 | rt2x00_rf_read(rt2x00dev, 3, &rf3); |
| 477 | rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower)); |
| 478 | rt2500usb_rf_write(rt2x00dev, 3, rf3); |
| 479 | } |
| 480 | |
| 481 | static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev, |
| 482 | const int antenna_tx, const int antenna_rx) |
| 483 | { |
| 484 | u8 r2; |
| 485 | u8 r14; |
| 486 | u16 csr5; |
| 487 | u16 csr6; |
| 488 | |
| 489 | rt2500usb_bbp_read(rt2x00dev, 2, &r2); |
| 490 | rt2500usb_bbp_read(rt2x00dev, 14, &r14); |
| 491 | rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5); |
| 492 | rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6); |
| 493 | |
| 494 | /* |
| 495 | * Configure the TX antenna. |
| 496 | */ |
| 497 | switch (antenna_tx) { |
| 498 | case ANTENNA_SW_DIVERSITY: |
| 499 | case ANTENNA_HW_DIVERSITY: |
| 500 | rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1); |
| 501 | rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1); |
| 502 | rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1); |
| 503 | break; |
| 504 | case ANTENNA_A: |
| 505 | rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0); |
| 506 | rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0); |
| 507 | rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0); |
| 508 | break; |
| 509 | case ANTENNA_B: |
| 510 | rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2); |
| 511 | rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2); |
| 512 | rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2); |
| 513 | break; |
| 514 | } |
| 515 | |
| 516 | /* |
| 517 | * Configure the RX antenna. |
| 518 | */ |
| 519 | switch (antenna_rx) { |
| 520 | case ANTENNA_SW_DIVERSITY: |
| 521 | case ANTENNA_HW_DIVERSITY: |
| 522 | rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1); |
| 523 | break; |
| 524 | case ANTENNA_A: |
| 525 | rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0); |
| 526 | break; |
| 527 | case ANTENNA_B: |
| 528 | rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2); |
| 529 | break; |
| 530 | } |
| 531 | |
| 532 | /* |
| 533 | * RT2525E and RT5222 need to flip TX I/Q |
| 534 | */ |
| 535 | if (rt2x00_rf(&rt2x00dev->chip, RF2525E) || |
| 536 | rt2x00_rf(&rt2x00dev->chip, RF5222)) { |
| 537 | rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1); |
| 538 | rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1); |
| 539 | rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1); |
| 540 | |
| 541 | /* |
| 542 | * RT2525E does not need RX I/Q Flip. |
| 543 | */ |
| 544 | if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) |
| 545 | rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0); |
| 546 | } else { |
| 547 | rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0); |
| 548 | rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0); |
| 549 | } |
| 550 | |
| 551 | rt2500usb_bbp_write(rt2x00dev, 2, r2); |
| 552 | rt2500usb_bbp_write(rt2x00dev, 14, r14); |
| 553 | rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5); |
| 554 | rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6); |
| 555 | } |
| 556 | |
| 557 | static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev, |
| 558 | const int short_slot_time, |
| 559 | const int beacon_int) |
| 560 | { |
| 561 | u16 reg; |
| 562 | |
| 563 | rt2500usb_register_write(rt2x00dev, MAC_CSR10, |
| 564 | short_slot_time ? SHORT_SLOT_TIME : SLOT_TIME); |
| 565 | |
| 566 | rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®); |
| 567 | rt2x00_set_field16(®, TXRX_CSR18_INTERVAL, beacon_int * 4); |
| 568 | rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg); |
| 569 | } |
| 570 | |
| 571 | static void rt2500usb_config(struct rt2x00_dev *rt2x00dev, |
| 572 | const unsigned int flags, |
| 573 | struct ieee80211_conf *conf) |
| 574 | { |
| 575 | int short_slot_time = conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME; |
| 576 | |
| 577 | if (flags & CONFIG_UPDATE_PHYMODE) |
| 578 | rt2500usb_config_phymode(rt2x00dev, conf->phymode); |
| 579 | if (flags & CONFIG_UPDATE_CHANNEL) |
| 580 | rt2500usb_config_channel(rt2x00dev, conf->channel_val, |
| 581 | conf->channel, conf->power_level); |
| 582 | if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL)) |
| 583 | rt2500usb_config_txpower(rt2x00dev, conf->power_level); |
| 584 | if (flags & CONFIG_UPDATE_ANTENNA) |
| 585 | rt2500usb_config_antenna(rt2x00dev, conf->antenna_sel_tx, |
| 586 | conf->antenna_sel_rx); |
| 587 | if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT)) |
| 588 | rt2500usb_config_duration(rt2x00dev, short_slot_time, |
| 589 | conf->beacon_int); |
| 590 | } |
| 591 | |
| 592 | /* |
| 593 | * LED functions. |
| 594 | */ |
| 595 | static void rt2500usb_enable_led(struct rt2x00_dev *rt2x00dev) |
| 596 | { |
| 597 | u16 reg; |
| 598 | |
| 599 | rt2500usb_register_read(rt2x00dev, MAC_CSR21, ®); |
| 600 | rt2x00_set_field16(®, MAC_CSR21_ON_PERIOD, 70); |
| 601 | rt2x00_set_field16(®, MAC_CSR21_OFF_PERIOD, 30); |
| 602 | rt2500usb_register_write(rt2x00dev, MAC_CSR21, reg); |
| 603 | |
| 604 | rt2500usb_register_read(rt2x00dev, MAC_CSR20, ®); |
| 605 | |
| 606 | if (rt2x00dev->led_mode == LED_MODE_TXRX_ACTIVITY) { |
| 607 | rt2x00_set_field16(®, MAC_CSR20_LINK, 1); |
| 608 | rt2x00_set_field16(®, MAC_CSR20_ACTIVITY, 0); |
| 609 | } else if (rt2x00dev->led_mode == LED_MODE_ASUS) { |
| 610 | rt2x00_set_field16(®, MAC_CSR20_LINK, 0); |
| 611 | rt2x00_set_field16(®, MAC_CSR20_ACTIVITY, 1); |
| 612 | } else { |
| 613 | rt2x00_set_field16(®, MAC_CSR20_LINK, 1); |
| 614 | rt2x00_set_field16(®, MAC_CSR20_ACTIVITY, 1); |
| 615 | } |
| 616 | |
| 617 | rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg); |
| 618 | } |
| 619 | |
| 620 | static void rt2500usb_disable_led(struct rt2x00_dev *rt2x00dev) |
| 621 | { |
| 622 | u16 reg; |
| 623 | |
| 624 | rt2500usb_register_read(rt2x00dev, MAC_CSR20, ®); |
| 625 | rt2x00_set_field16(®, MAC_CSR20_LINK, 0); |
| 626 | rt2x00_set_field16(®, MAC_CSR20_ACTIVITY, 0); |
| 627 | rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg); |
| 628 | } |
| 629 | |
| 630 | /* |
| 631 | * Link tuning |
| 632 | */ |
| 633 | static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev) |
| 634 | { |
| 635 | u16 reg; |
| 636 | |
| 637 | /* |
| 638 | * Update FCS error count from register. |
| 639 | */ |
| 640 | rt2500usb_register_read(rt2x00dev, STA_CSR0, ®); |
| 641 | rt2x00dev->link.rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR); |
| 642 | |
| 643 | /* |
| 644 | * Update False CCA count from register. |
| 645 | */ |
| 646 | rt2500usb_register_read(rt2x00dev, STA_CSR3, ®); |
| 647 | rt2x00dev->link.false_cca = |
| 648 | rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR); |
| 649 | } |
| 650 | |
| 651 | static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev) |
| 652 | { |
| 653 | u16 eeprom; |
| 654 | u16 value; |
| 655 | |
| 656 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom); |
| 657 | value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW); |
| 658 | rt2500usb_bbp_write(rt2x00dev, 24, value); |
| 659 | |
| 660 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom); |
| 661 | value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW); |
| 662 | rt2500usb_bbp_write(rt2x00dev, 25, value); |
| 663 | |
| 664 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom); |
| 665 | value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW); |
| 666 | rt2500usb_bbp_write(rt2x00dev, 61, value); |
| 667 | |
| 668 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom); |
| 669 | value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER); |
| 670 | rt2500usb_bbp_write(rt2x00dev, 17, value); |
| 671 | |
| 672 | rt2x00dev->link.vgc_level = value; |
| 673 | } |
| 674 | |
| 675 | static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev) |
| 676 | { |
| 677 | int rssi = rt2x00_get_link_rssi(&rt2x00dev->link); |
| 678 | u16 bbp_thresh; |
| 679 | u16 vgc_bound; |
| 680 | u16 sens; |
| 681 | u16 r24; |
| 682 | u16 r25; |
| 683 | u16 r61; |
| 684 | u16 r17_sens; |
| 685 | u8 r17; |
| 686 | u8 up_bound; |
| 687 | u8 low_bound; |
| 688 | |
| 689 | /* |
| 690 | * Determine the BBP tuning threshold and correctly |
| 691 | * set BBP 24, 25 and 61. |
| 692 | */ |
| 693 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh); |
| 694 | bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD); |
| 695 | |
| 696 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24); |
| 697 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25); |
| 698 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61); |
| 699 | |
| 700 | if ((rssi + bbp_thresh) > 0) { |
| 701 | r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH); |
| 702 | r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH); |
| 703 | r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH); |
| 704 | } else { |
| 705 | r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW); |
| 706 | r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW); |
| 707 | r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW); |
| 708 | } |
| 709 | |
| 710 | rt2500usb_bbp_write(rt2x00dev, 24, r24); |
| 711 | rt2500usb_bbp_write(rt2x00dev, 25, r25); |
| 712 | rt2500usb_bbp_write(rt2x00dev, 61, r61); |
| 713 | |
| 714 | /* |
| 715 | * Read current r17 value, as well as the sensitivity values |
| 716 | * for the r17 register. |
| 717 | */ |
| 718 | rt2500usb_bbp_read(rt2x00dev, 17, &r17); |
| 719 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens); |
| 720 | |
| 721 | /* |
| 722 | * A too low RSSI will cause too much false CCA which will |
| 723 | * then corrupt the R17 tuning. To remidy this the tuning should |
| 724 | * be stopped (While making sure the R17 value will not exceed limits) |
| 725 | */ |
| 726 | if (rssi >= -40) { |
| 727 | if (r17 != 0x60) |
| 728 | rt2500usb_bbp_write(rt2x00dev, 17, 0x60); |
| 729 | return; |
| 730 | } |
| 731 | |
| 732 | /* |
| 733 | * Special big-R17 for short distance |
| 734 | */ |
| 735 | if (rssi >= -58) { |
| 736 | sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW); |
| 737 | if (r17 != sens) |
| 738 | rt2500usb_bbp_write(rt2x00dev, 17, sens); |
| 739 | return; |
| 740 | } |
| 741 | |
| 742 | /* |
| 743 | * Special mid-R17 for middle distance |
| 744 | */ |
| 745 | if (rssi >= -74) { |
| 746 | sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH); |
| 747 | if (r17 != sens) |
| 748 | rt2500usb_bbp_write(rt2x00dev, 17, sens); |
| 749 | return; |
| 750 | } |
| 751 | |
| 752 | /* |
| 753 | * Leave short or middle distance condition, restore r17 |
| 754 | * to the dynamic tuning range. |
| 755 | */ |
| 756 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound); |
| 757 | vgc_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER); |
| 758 | |
| 759 | low_bound = 0x32; |
| 760 | if (rssi >= -77) |
| 761 | up_bound = vgc_bound; |
| 762 | else |
| 763 | up_bound = vgc_bound - (-77 - rssi); |
| 764 | |
| 765 | if (up_bound < low_bound) |
| 766 | up_bound = low_bound; |
| 767 | |
| 768 | if (r17 > up_bound) { |
| 769 | rt2500usb_bbp_write(rt2x00dev, 17, up_bound); |
| 770 | rt2x00dev->link.vgc_level = up_bound; |
| 771 | } else if (rt2x00dev->link.false_cca > 512 && r17 < up_bound) { |
| 772 | rt2500usb_bbp_write(rt2x00dev, 17, ++r17); |
| 773 | rt2x00dev->link.vgc_level = r17; |
| 774 | } else if (rt2x00dev->link.false_cca < 100 && r17 > low_bound) { |
| 775 | rt2500usb_bbp_write(rt2x00dev, 17, --r17); |
| 776 | rt2x00dev->link.vgc_level = r17; |
| 777 | } |
| 778 | } |
| 779 | |
| 780 | /* |
| 781 | * Initialization functions. |
| 782 | */ |
| 783 | static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev) |
| 784 | { |
| 785 | u16 reg; |
| 786 | |
| 787 | rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001, |
| 788 | USB_MODE_TEST, REGISTER_TIMEOUT); |
| 789 | rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308, |
| 790 | 0x00f0, REGISTER_TIMEOUT); |
| 791 | |
| 792 | rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); |
| 793 | rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 1); |
| 794 | rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); |
| 795 | |
| 796 | rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111); |
| 797 | rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11); |
| 798 | |
| 799 | rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); |
| 800 | rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 1); |
| 801 | rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 1); |
| 802 | rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0); |
| 803 | rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); |
| 804 | |
| 805 | rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); |
| 806 | rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0); |
| 807 | rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0); |
| 808 | rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0); |
| 809 | rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); |
| 810 | |
| 811 | rt2500usb_register_read(rt2x00dev, TXRX_CSR5, ®); |
| 812 | rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0, 13); |
| 813 | rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0_VALID, 1); |
| 814 | rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1, 12); |
| 815 | rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1_VALID, 1); |
| 816 | rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg); |
| 817 | |
| 818 | rt2500usb_register_read(rt2x00dev, TXRX_CSR6, ®); |
| 819 | rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0, 10); |
| 820 | rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0_VALID, 1); |
| 821 | rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1, 11); |
| 822 | rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1_VALID, 1); |
| 823 | rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg); |
| 824 | |
| 825 | rt2500usb_register_read(rt2x00dev, TXRX_CSR7, ®); |
| 826 | rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0, 7); |
| 827 | rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0_VALID, 1); |
| 828 | rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1, 6); |
| 829 | rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1_VALID, 1); |
| 830 | rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg); |
| 831 | |
| 832 | rt2500usb_register_read(rt2x00dev, TXRX_CSR8, ®); |
| 833 | rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0, 5); |
| 834 | rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0_VALID, 1); |
| 835 | rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1, 0); |
| 836 | rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1_VALID, 0); |
| 837 | rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg); |
| 838 | |
| 839 | rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f); |
| 840 | rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d); |
| 841 | |
| 842 | if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE)) |
| 843 | return -EBUSY; |
| 844 | |
| 845 | rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); |
| 846 | rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0); |
| 847 | rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0); |
| 848 | rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 1); |
| 849 | rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); |
| 850 | |
| 851 | if (rt2x00_get_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) { |
| 852 | rt2500usb_register_read(rt2x00dev, PHY_CSR2, ®); |
| 853 | reg &= ~0x0002; |
| 854 | } else { |
| 855 | reg = 0x3002; |
| 856 | } |
| 857 | rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg); |
| 858 | |
| 859 | rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002); |
| 860 | rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053); |
| 861 | rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee); |
| 862 | rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000); |
| 863 | |
| 864 | rt2500usb_register_read(rt2x00dev, MAC_CSR8, ®); |
| 865 | rt2x00_set_field16(®, MAC_CSR8_MAX_FRAME_UNIT, |
| 866 | rt2x00dev->rx->data_size); |
| 867 | rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg); |
| 868 | |
| 869 | rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®); |
| 870 | rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER); |
| 871 | rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, 0xff); |
| 872 | rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg); |
| 873 | |
| 874 | rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®); |
| 875 | rt2x00_set_field16(®, MAC_CSR18_DELAY_AFTER_BEACON, 90); |
| 876 | rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); |
| 877 | |
| 878 | rt2500usb_register_read(rt2x00dev, PHY_CSR4, ®); |
| 879 | rt2x00_set_field16(®, PHY_CSR4_LOW_RF_LE, 1); |
| 880 | rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg); |
| 881 | |
| 882 | rt2500usb_register_read(rt2x00dev, TXRX_CSR1, ®); |
| 883 | rt2x00_set_field16(®, TXRX_CSR1_AUTO_SEQUENCE, 1); |
| 884 | rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg); |
| 885 | |
| 886 | return 0; |
| 887 | } |
| 888 | |
| 889 | static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev) |
| 890 | { |
| 891 | unsigned int i; |
| 892 | u16 eeprom; |
| 893 | u8 value; |
| 894 | u8 reg_id; |
| 895 | |
| 896 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { |
| 897 | rt2500usb_bbp_read(rt2x00dev, 0, &value); |
| 898 | if ((value != 0xff) && (value != 0x00)) |
| 899 | goto continue_csr_init; |
| 900 | NOTICE(rt2x00dev, "Waiting for BBP register.\n"); |
| 901 | udelay(REGISTER_BUSY_DELAY); |
| 902 | } |
| 903 | |
| 904 | ERROR(rt2x00dev, "BBP register access failed, aborting.\n"); |
| 905 | return -EACCES; |
| 906 | |
| 907 | continue_csr_init: |
| 908 | rt2500usb_bbp_write(rt2x00dev, 3, 0x02); |
| 909 | rt2500usb_bbp_write(rt2x00dev, 4, 0x19); |
| 910 | rt2500usb_bbp_write(rt2x00dev, 14, 0x1c); |
| 911 | rt2500usb_bbp_write(rt2x00dev, 15, 0x30); |
| 912 | rt2500usb_bbp_write(rt2x00dev, 16, 0xac); |
| 913 | rt2500usb_bbp_write(rt2x00dev, 18, 0x18); |
| 914 | rt2500usb_bbp_write(rt2x00dev, 19, 0xff); |
| 915 | rt2500usb_bbp_write(rt2x00dev, 20, 0x1e); |
| 916 | rt2500usb_bbp_write(rt2x00dev, 21, 0x08); |
| 917 | rt2500usb_bbp_write(rt2x00dev, 22, 0x08); |
| 918 | rt2500usb_bbp_write(rt2x00dev, 23, 0x08); |
| 919 | rt2500usb_bbp_write(rt2x00dev, 24, 0x80); |
| 920 | rt2500usb_bbp_write(rt2x00dev, 25, 0x50); |
| 921 | rt2500usb_bbp_write(rt2x00dev, 26, 0x08); |
| 922 | rt2500usb_bbp_write(rt2x00dev, 27, 0x23); |
| 923 | rt2500usb_bbp_write(rt2x00dev, 30, 0x10); |
| 924 | rt2500usb_bbp_write(rt2x00dev, 31, 0x2b); |
| 925 | rt2500usb_bbp_write(rt2x00dev, 32, 0xb9); |
| 926 | rt2500usb_bbp_write(rt2x00dev, 34, 0x12); |
| 927 | rt2500usb_bbp_write(rt2x00dev, 35, 0x50); |
| 928 | rt2500usb_bbp_write(rt2x00dev, 39, 0xc4); |
| 929 | rt2500usb_bbp_write(rt2x00dev, 40, 0x02); |
| 930 | rt2500usb_bbp_write(rt2x00dev, 41, 0x60); |
| 931 | rt2500usb_bbp_write(rt2x00dev, 53, 0x10); |
| 932 | rt2500usb_bbp_write(rt2x00dev, 54, 0x18); |
| 933 | rt2500usb_bbp_write(rt2x00dev, 56, 0x08); |
| 934 | rt2500usb_bbp_write(rt2x00dev, 57, 0x10); |
| 935 | rt2500usb_bbp_write(rt2x00dev, 58, 0x08); |
| 936 | rt2500usb_bbp_write(rt2x00dev, 61, 0x60); |
| 937 | rt2500usb_bbp_write(rt2x00dev, 62, 0x10); |
| 938 | rt2500usb_bbp_write(rt2x00dev, 75, 0xff); |
| 939 | |
| 940 | DEBUG(rt2x00dev, "Start initialization from EEPROM...\n"); |
| 941 | for (i = 0; i < EEPROM_BBP_SIZE; i++) { |
| 942 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom); |
| 943 | |
| 944 | if (eeprom != 0xffff && eeprom != 0x0000) { |
| 945 | reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID); |
| 946 | value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE); |
| 947 | DEBUG(rt2x00dev, "BBP: 0x%02x, value: 0x%02x.\n", |
| 948 | reg_id, value); |
| 949 | rt2500usb_bbp_write(rt2x00dev, reg_id, value); |
| 950 | } |
| 951 | } |
| 952 | DEBUG(rt2x00dev, "...End initialization from EEPROM.\n"); |
| 953 | |
| 954 | return 0; |
| 955 | } |
| 956 | |
| 957 | /* |
| 958 | * Device state switch handlers. |
| 959 | */ |
| 960 | static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev, |
| 961 | enum dev_state state) |
| 962 | { |
| 963 | u16 reg; |
| 964 | |
| 965 | rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); |
| 966 | rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, |
| 967 | state == STATE_RADIO_RX_OFF); |
| 968 | rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); |
| 969 | } |
| 970 | |
| 971 | static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev) |
| 972 | { |
| 973 | /* |
| 974 | * Initialize all registers. |
| 975 | */ |
| 976 | if (rt2500usb_init_registers(rt2x00dev) || |
| 977 | rt2500usb_init_bbp(rt2x00dev)) { |
| 978 | ERROR(rt2x00dev, "Register initialization failed.\n"); |
| 979 | return -EIO; |
| 980 | } |
| 981 | |
| 982 | rt2x00usb_enable_radio(rt2x00dev); |
| 983 | |
| 984 | /* |
| 985 | * Enable LED |
| 986 | */ |
| 987 | rt2500usb_enable_led(rt2x00dev); |
| 988 | |
| 989 | return 0; |
| 990 | } |
| 991 | |
| 992 | static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev) |
| 993 | { |
| 994 | /* |
| 995 | * Disable LED |
| 996 | */ |
| 997 | rt2500usb_disable_led(rt2x00dev); |
| 998 | |
| 999 | rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121); |
| 1000 | rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121); |
| 1001 | |
| 1002 | /* |
| 1003 | * Disable synchronisation. |
| 1004 | */ |
| 1005 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0); |
| 1006 | |
| 1007 | rt2x00usb_disable_radio(rt2x00dev); |
| 1008 | } |
| 1009 | |
| 1010 | static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev, |
| 1011 | enum dev_state state) |
| 1012 | { |
| 1013 | u16 reg; |
| 1014 | u16 reg2; |
| 1015 | unsigned int i; |
| 1016 | char put_to_sleep; |
| 1017 | char bbp_state; |
| 1018 | char rf_state; |
| 1019 | |
| 1020 | put_to_sleep = (state != STATE_AWAKE); |
| 1021 | |
| 1022 | reg = 0; |
| 1023 | rt2x00_set_field16(®, MAC_CSR17_BBP_DESIRE_STATE, state); |
| 1024 | rt2x00_set_field16(®, MAC_CSR17_RF_DESIRE_STATE, state); |
| 1025 | rt2x00_set_field16(®, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep); |
| 1026 | rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); |
| 1027 | rt2x00_set_field16(®, MAC_CSR17_SET_STATE, 1); |
| 1028 | rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); |
| 1029 | |
| 1030 | /* |
| 1031 | * Device is not guaranteed to be in the requested state yet. |
| 1032 | * We must wait until the register indicates that the |
| 1033 | * device has entered the correct state. |
| 1034 | */ |
| 1035 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { |
| 1036 | rt2500usb_register_read(rt2x00dev, MAC_CSR17, ®2); |
| 1037 | bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE); |
| 1038 | rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE); |
| 1039 | if (bbp_state == state && rf_state == state) |
| 1040 | return 0; |
| 1041 | rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); |
| 1042 | msleep(30); |
| 1043 | } |
| 1044 | |
| 1045 | NOTICE(rt2x00dev, "Device failed to enter state %d, " |
| 1046 | "current device state: bbp %d and rf %d.\n", |
| 1047 | state, bbp_state, rf_state); |
| 1048 | |
| 1049 | return -EBUSY; |
| 1050 | } |
| 1051 | |
| 1052 | static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev, |
| 1053 | enum dev_state state) |
| 1054 | { |
| 1055 | int retval = 0; |
| 1056 | |
| 1057 | switch (state) { |
| 1058 | case STATE_RADIO_ON: |
| 1059 | retval = rt2500usb_enable_radio(rt2x00dev); |
| 1060 | break; |
| 1061 | case STATE_RADIO_OFF: |
| 1062 | rt2500usb_disable_radio(rt2x00dev); |
| 1063 | break; |
| 1064 | case STATE_RADIO_RX_ON: |
| 1065 | case STATE_RADIO_RX_OFF: |
| 1066 | rt2500usb_toggle_rx(rt2x00dev, state); |
| 1067 | break; |
| 1068 | case STATE_DEEP_SLEEP: |
| 1069 | case STATE_SLEEP: |
| 1070 | case STATE_STANDBY: |
| 1071 | case STATE_AWAKE: |
| 1072 | retval = rt2500usb_set_state(rt2x00dev, state); |
| 1073 | break; |
| 1074 | default: |
| 1075 | retval = -ENOTSUPP; |
| 1076 | break; |
| 1077 | } |
| 1078 | |
| 1079 | return retval; |
| 1080 | } |
| 1081 | |
| 1082 | /* |
| 1083 | * TX descriptor initialization |
| 1084 | */ |
| 1085 | static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, |
| 1086 | struct data_desc *txd, |
| 1087 | struct data_entry_desc *desc, |
| 1088 | struct ieee80211_hdr *ieee80211hdr, |
| 1089 | unsigned int length, |
| 1090 | struct ieee80211_tx_control *control) |
| 1091 | { |
| 1092 | u32 word; |
| 1093 | |
| 1094 | /* |
| 1095 | * Start writing the descriptor words. |
| 1096 | */ |
| 1097 | rt2x00_desc_read(txd, 1, &word); |
| 1098 | rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER); |
| 1099 | rt2x00_set_field32(&word, TXD_W1_AIFS, desc->aifs); |
| 1100 | rt2x00_set_field32(&word, TXD_W1_CWMIN, desc->cw_min); |
| 1101 | rt2x00_set_field32(&word, TXD_W1_CWMAX, desc->cw_max); |
| 1102 | rt2x00_desc_write(txd, 1, word); |
| 1103 | |
| 1104 | rt2x00_desc_read(txd, 2, &word); |
| 1105 | rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, desc->signal); |
| 1106 | rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, desc->service); |
| 1107 | rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, desc->length_low); |
| 1108 | rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, desc->length_high); |
| 1109 | rt2x00_desc_write(txd, 2, word); |
| 1110 | |
| 1111 | rt2x00_desc_read(txd, 0, &word); |
| 1112 | rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, control->retry_limit); |
| 1113 | rt2x00_set_field32(&word, TXD_W0_MORE_FRAG, |
| 1114 | test_bit(ENTRY_TXD_MORE_FRAG, &desc->flags)); |
| 1115 | rt2x00_set_field32(&word, TXD_W0_ACK, |
| 1116 | !(control->flags & IEEE80211_TXCTL_NO_ACK)); |
| 1117 | rt2x00_set_field32(&word, TXD_W0_TIMESTAMP, |
| 1118 | test_bit(ENTRY_TXD_REQ_TIMESTAMP, &desc->flags)); |
| 1119 | rt2x00_set_field32(&word, TXD_W0_OFDM, |
| 1120 | test_bit(ENTRY_TXD_OFDM_RATE, &desc->flags)); |
| 1121 | rt2x00_set_field32(&word, TXD_W0_NEW_SEQ, |
| 1122 | !!(control->flags & IEEE80211_TXCTL_FIRST_FRAGMENT)); |
| 1123 | rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs); |
| 1124 | rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, length); |
| 1125 | rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE); |
| 1126 | rt2x00_desc_write(txd, 0, word); |
| 1127 | } |
| 1128 | |
| 1129 | /* |
| 1130 | * TX data initialization |
| 1131 | */ |
| 1132 | static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev, |
| 1133 | unsigned int queue) |
| 1134 | { |
| 1135 | u16 reg; |
| 1136 | |
| 1137 | if (queue != IEEE80211_TX_QUEUE_BEACON) |
| 1138 | return; |
| 1139 | |
| 1140 | rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); |
| 1141 | if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) { |
| 1142 | rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 1); |
| 1143 | /* |
| 1144 | * Beacon generation will fail initially. |
| 1145 | * To prevent this we need to register the TXRX_CSR19 |
| 1146 | * register several times. |
| 1147 | */ |
| 1148 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); |
| 1149 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0); |
| 1150 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); |
| 1151 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0); |
| 1152 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); |
| 1153 | } |
| 1154 | } |
| 1155 | |
| 1156 | /* |
| 1157 | * RX control handlers |
| 1158 | */ |
| 1159 | static int rt2500usb_fill_rxdone(struct data_entry *entry, |
| 1160 | int *signal, int *rssi, int *ofdm, int *size) |
| 1161 | { |
| 1162 | struct urb *urb = entry->priv; |
| 1163 | struct data_desc *rxd = (struct data_desc *)(entry->skb->data + |
| 1164 | (urb->actual_length - |
| 1165 | entry->ring->desc_size)); |
| 1166 | u32 word0; |
| 1167 | u32 word1; |
| 1168 | |
| 1169 | rt2x00_desc_read(rxd, 0, &word0); |
| 1170 | rt2x00_desc_read(rxd, 1, &word1); |
| 1171 | |
| 1172 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR) || |
| 1173 | rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR) || |
| 1174 | rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR)) |
| 1175 | return -EINVAL; |
| 1176 | |
| 1177 | /* |
| 1178 | * Obtain the status about this packet. |
| 1179 | */ |
| 1180 | *signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL); |
| 1181 | *rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) - |
| 1182 | entry->ring->rt2x00dev->rssi_offset; |
| 1183 | *ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM); |
| 1184 | *size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); |
| 1185 | |
| 1186 | return 0; |
| 1187 | } |
| 1188 | |
| 1189 | /* |
| 1190 | * Interrupt functions. |
| 1191 | */ |
| 1192 | static void rt2500usb_beacondone(struct urb *urb) |
| 1193 | { |
| 1194 | struct data_entry *entry = (struct data_entry *)urb->context; |
| 1195 | struct data_ring *ring = entry->ring; |
| 1196 | |
| 1197 | if (!test_bit(DEVICE_ENABLED_RADIO, &ring->rt2x00dev->flags)) |
| 1198 | return; |
| 1199 | |
| 1200 | /* |
| 1201 | * Check if this was the guardian beacon, |
| 1202 | * if that was the case we need to send the real beacon now. |
| 1203 | * Otherwise we should free the sk_buffer, the device |
| 1204 | * should be doing the rest of the work now. |
| 1205 | */ |
| 1206 | if (ring->index == 1) { |
| 1207 | rt2x00_ring_index_done_inc(ring); |
| 1208 | entry = rt2x00_get_data_entry(ring); |
| 1209 | usb_submit_urb(entry->priv, GFP_ATOMIC); |
| 1210 | rt2x00_ring_index_inc(ring); |
| 1211 | } else if (ring->index_done == 1) { |
| 1212 | entry = rt2x00_get_data_entry_done(ring); |
| 1213 | if (entry->skb) { |
| 1214 | dev_kfree_skb(entry->skb); |
| 1215 | entry->skb = NULL; |
| 1216 | } |
| 1217 | rt2x00_ring_index_done_inc(ring); |
| 1218 | } |
| 1219 | } |
| 1220 | |
| 1221 | /* |
| 1222 | * Device probe functions. |
| 1223 | */ |
| 1224 | static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev) |
| 1225 | { |
| 1226 | u16 word; |
| 1227 | u8 *mac; |
| 1228 | |
| 1229 | rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE); |
| 1230 | |
| 1231 | /* |
| 1232 | * Start validation of the data that has been read. |
| 1233 | */ |
| 1234 | mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0); |
| 1235 | if (!is_valid_ether_addr(mac)) { |
| 1236 | random_ether_addr(mac); |
| 1237 | EEPROM(rt2x00dev, "MAC: " MAC_FMT "\n", MAC_ARG(mac)); |
| 1238 | } |
| 1239 | |
| 1240 | rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word); |
| 1241 | if (word == 0xffff) { |
| 1242 | rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2); |
| 1243 | rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT, 0); |
| 1244 | rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT, 0); |
| 1245 | rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE, 0); |
| 1246 | rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0); |
| 1247 | rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0); |
| 1248 | rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522); |
| 1249 | rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word); |
| 1250 | EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word); |
| 1251 | } |
| 1252 | |
| 1253 | rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word); |
| 1254 | if (word == 0xffff) { |
| 1255 | rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0); |
| 1256 | rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0); |
| 1257 | rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0); |
| 1258 | rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word); |
| 1259 | EEPROM(rt2x00dev, "NIC: 0x%04x\n", word); |
| 1260 | } |
| 1261 | |
| 1262 | rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word); |
| 1263 | if (word == 0xffff) { |
| 1264 | rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI, |
| 1265 | DEFAULT_RSSI_OFFSET); |
| 1266 | rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word); |
| 1267 | EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word); |
| 1268 | } |
| 1269 | |
| 1270 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word); |
| 1271 | if (word == 0xffff) { |
| 1272 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45); |
| 1273 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word); |
| 1274 | EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word); |
| 1275 | } |
| 1276 | |
| 1277 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word); |
| 1278 | if (word == 0xffff) { |
| 1279 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40); |
| 1280 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word); |
| 1281 | EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word); |
| 1282 | } |
| 1283 | |
| 1284 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word); |
| 1285 | if (word == 0xffff) { |
| 1286 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48); |
| 1287 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41); |
| 1288 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word); |
| 1289 | EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word); |
| 1290 | } |
| 1291 | |
| 1292 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word); |
| 1293 | if (word == 0xffff) { |
| 1294 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40); |
| 1295 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80); |
| 1296 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word); |
| 1297 | EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word); |
| 1298 | } |
| 1299 | |
| 1300 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word); |
| 1301 | if (word == 0xffff) { |
| 1302 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40); |
| 1303 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50); |
| 1304 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word); |
| 1305 | EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word); |
| 1306 | } |
| 1307 | |
| 1308 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word); |
| 1309 | if (word == 0xffff) { |
| 1310 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60); |
| 1311 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d); |
| 1312 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word); |
| 1313 | EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word); |
| 1314 | } |
| 1315 | |
| 1316 | return 0; |
| 1317 | } |
| 1318 | |
| 1319 | static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev) |
| 1320 | { |
| 1321 | u16 reg; |
| 1322 | u16 value; |
| 1323 | u16 eeprom; |
| 1324 | |
| 1325 | /* |
| 1326 | * Read EEPROM word for configuration. |
| 1327 | */ |
| 1328 | rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom); |
| 1329 | |
| 1330 | /* |
| 1331 | * Identify RF chipset. |
| 1332 | */ |
| 1333 | value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); |
| 1334 | rt2500usb_register_read(rt2x00dev, MAC_CSR0, ®); |
| 1335 | rt2x00_set_chip(rt2x00dev, RT2570, value, reg); |
| 1336 | |
| 1337 | if (rt2x00_rev(&rt2x00dev->chip, 0xffff0)) { |
| 1338 | ERROR(rt2x00dev, "Invalid RT chipset detected.\n"); |
| 1339 | return -ENODEV; |
| 1340 | } |
| 1341 | |
| 1342 | if (!rt2x00_rf(&rt2x00dev->chip, RF2522) && |
| 1343 | !rt2x00_rf(&rt2x00dev->chip, RF2523) && |
| 1344 | !rt2x00_rf(&rt2x00dev->chip, RF2524) && |
| 1345 | !rt2x00_rf(&rt2x00dev->chip, RF2525) && |
| 1346 | !rt2x00_rf(&rt2x00dev->chip, RF2525E) && |
| 1347 | !rt2x00_rf(&rt2x00dev->chip, RF5222)) { |
| 1348 | ERROR(rt2x00dev, "Invalid RF chipset detected.\n"); |
| 1349 | return -ENODEV; |
| 1350 | } |
| 1351 | |
| 1352 | /* |
| 1353 | * Identify default antenna configuration. |
| 1354 | */ |
| 1355 | rt2x00dev->hw->conf.antenna_sel_tx = |
| 1356 | rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT); |
| 1357 | rt2x00dev->hw->conf.antenna_sel_rx = |
| 1358 | rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT); |
| 1359 | |
| 1360 | /* |
| 1361 | * Store led mode, for correct led behaviour. |
| 1362 | */ |
| 1363 | rt2x00dev->led_mode = |
| 1364 | rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE); |
| 1365 | |
| 1366 | /* |
| 1367 | * Check if the BBP tuning should be disabled. |
| 1368 | */ |
| 1369 | rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom); |
| 1370 | if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE)) |
| 1371 | __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags); |
| 1372 | |
| 1373 | /* |
| 1374 | * Read the RSSI <-> dBm offset information. |
| 1375 | */ |
| 1376 | rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom); |
| 1377 | rt2x00dev->rssi_offset = |
| 1378 | rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI); |
| 1379 | |
| 1380 | return 0; |
| 1381 | } |
| 1382 | |
| 1383 | /* |
| 1384 | * RF value list for RF2522 |
| 1385 | * Supports: 2.4 GHz |
| 1386 | */ |
| 1387 | static const struct rf_channel rf_vals_bg_2522[] = { |
| 1388 | { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 }, |
| 1389 | { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 }, |
| 1390 | { 3, 0x00002050, 0x000c2002, 0x00000101, 0 }, |
| 1391 | { 4, 0x00002050, 0x000c2016, 0x00000101, 0 }, |
| 1392 | { 5, 0x00002050, 0x000c202a, 0x00000101, 0 }, |
| 1393 | { 6, 0x00002050, 0x000c203e, 0x00000101, 0 }, |
| 1394 | { 7, 0x00002050, 0x000c2052, 0x00000101, 0 }, |
| 1395 | { 8, 0x00002050, 0x000c2066, 0x00000101, 0 }, |
| 1396 | { 9, 0x00002050, 0x000c207a, 0x00000101, 0 }, |
| 1397 | { 10, 0x00002050, 0x000c208e, 0x00000101, 0 }, |
| 1398 | { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 }, |
| 1399 | { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 }, |
| 1400 | { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 }, |
| 1401 | { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 }, |
| 1402 | }; |
| 1403 | |
| 1404 | /* |
| 1405 | * RF value list for RF2523 |
| 1406 | * Supports: 2.4 GHz |
| 1407 | */ |
| 1408 | static const struct rf_channel rf_vals_bg_2523[] = { |
| 1409 | { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b }, |
| 1410 | { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b }, |
| 1411 | { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b }, |
| 1412 | { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b }, |
| 1413 | { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b }, |
| 1414 | { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b }, |
| 1415 | { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b }, |
| 1416 | { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b }, |
| 1417 | { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b }, |
| 1418 | { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b }, |
| 1419 | { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b }, |
| 1420 | { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b }, |
| 1421 | { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b }, |
| 1422 | { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 }, |
| 1423 | }; |
| 1424 | |
| 1425 | /* |
| 1426 | * RF value list for RF2524 |
| 1427 | * Supports: 2.4 GHz |
| 1428 | */ |
| 1429 | static const struct rf_channel rf_vals_bg_2524[] = { |
| 1430 | { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b }, |
| 1431 | { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b }, |
| 1432 | { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b }, |
| 1433 | { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b }, |
| 1434 | { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b }, |
| 1435 | { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b }, |
| 1436 | { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b }, |
| 1437 | { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b }, |
| 1438 | { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b }, |
| 1439 | { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b }, |
| 1440 | { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b }, |
| 1441 | { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b }, |
| 1442 | { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b }, |
| 1443 | { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 }, |
| 1444 | }; |
| 1445 | |
| 1446 | /* |
| 1447 | * RF value list for RF2525 |
| 1448 | * Supports: 2.4 GHz |
| 1449 | */ |
| 1450 | static const struct rf_channel rf_vals_bg_2525[] = { |
| 1451 | { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b }, |
| 1452 | { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b }, |
| 1453 | { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b }, |
| 1454 | { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b }, |
| 1455 | { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b }, |
| 1456 | { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b }, |
| 1457 | { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b }, |
| 1458 | { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b }, |
| 1459 | { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b }, |
| 1460 | { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b }, |
| 1461 | { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b }, |
| 1462 | { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b }, |
| 1463 | { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b }, |
| 1464 | { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 }, |
| 1465 | }; |
| 1466 | |
| 1467 | /* |
| 1468 | * RF value list for RF2525e |
| 1469 | * Supports: 2.4 GHz |
| 1470 | */ |
| 1471 | static const struct rf_channel rf_vals_bg_2525e[] = { |
| 1472 | { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b }, |
| 1473 | { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 }, |
| 1474 | { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b }, |
| 1475 | { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 }, |
| 1476 | { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b }, |
| 1477 | { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 }, |
| 1478 | { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b }, |
| 1479 | { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 }, |
| 1480 | { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b }, |
| 1481 | { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 }, |
| 1482 | { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b }, |
| 1483 | { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 }, |
| 1484 | { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b }, |
| 1485 | { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 }, |
| 1486 | }; |
| 1487 | |
| 1488 | /* |
| 1489 | * RF value list for RF5222 |
| 1490 | * Supports: 2.4 GHz & 5.2 GHz |
| 1491 | */ |
| 1492 | static const struct rf_channel rf_vals_5222[] = { |
| 1493 | { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b }, |
| 1494 | { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b }, |
| 1495 | { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b }, |
| 1496 | { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b }, |
| 1497 | { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b }, |
| 1498 | { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b }, |
| 1499 | { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b }, |
| 1500 | { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b }, |
| 1501 | { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b }, |
| 1502 | { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b }, |
| 1503 | { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b }, |
| 1504 | { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b }, |
| 1505 | { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b }, |
| 1506 | { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b }, |
| 1507 | |
| 1508 | /* 802.11 UNI / HyperLan 2 */ |
| 1509 | { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f }, |
| 1510 | { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f }, |
| 1511 | { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f }, |
| 1512 | { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f }, |
| 1513 | { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f }, |
| 1514 | { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f }, |
| 1515 | { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f }, |
| 1516 | { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f }, |
| 1517 | |
| 1518 | /* 802.11 HyperLan 2 */ |
| 1519 | { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f }, |
| 1520 | { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f }, |
| 1521 | { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f }, |
| 1522 | { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f }, |
| 1523 | { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f }, |
| 1524 | { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f }, |
| 1525 | { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f }, |
| 1526 | { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f }, |
| 1527 | { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f }, |
| 1528 | { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f }, |
| 1529 | |
| 1530 | /* 802.11 UNII */ |
| 1531 | { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f }, |
| 1532 | { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 }, |
| 1533 | { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 }, |
| 1534 | { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 }, |
| 1535 | { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 }, |
| 1536 | }; |
| 1537 | |
| 1538 | static void rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev) |
| 1539 | { |
| 1540 | struct hw_mode_spec *spec = &rt2x00dev->spec; |
| 1541 | u8 *txpower; |
| 1542 | unsigned int i; |
| 1543 | |
| 1544 | /* |
| 1545 | * Initialize all hw fields. |
| 1546 | */ |
| 1547 | rt2x00dev->hw->flags = |
| 1548 | IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE | |
| 1549 | IEEE80211_HW_RX_INCLUDES_FCS | |
| 1550 | IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
| 1551 | IEEE80211_HW_MONITOR_DURING_OPER | |
| 1552 | IEEE80211_HW_NO_PROBE_FILTERING; |
| 1553 | rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE; |
| 1554 | rt2x00dev->hw->max_signal = MAX_SIGNAL; |
| 1555 | rt2x00dev->hw->max_rssi = MAX_RX_SSI; |
| 1556 | rt2x00dev->hw->queues = 2; |
| 1557 | |
| 1558 | SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev); |
| 1559 | SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, |
| 1560 | rt2x00_eeprom_addr(rt2x00dev, |
| 1561 | EEPROM_MAC_ADDR_0)); |
| 1562 | |
| 1563 | /* |
| 1564 | * Convert tx_power array in eeprom. |
| 1565 | */ |
| 1566 | txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START); |
| 1567 | for (i = 0; i < 14; i++) |
| 1568 | txpower[i] = TXPOWER_FROM_DEV(txpower[i]); |
| 1569 | |
| 1570 | /* |
| 1571 | * Initialize hw_mode information. |
| 1572 | */ |
| 1573 | spec->num_modes = 2; |
| 1574 | spec->num_rates = 12; |
| 1575 | spec->tx_power_a = NULL; |
| 1576 | spec->tx_power_bg = txpower; |
| 1577 | spec->tx_power_default = DEFAULT_TXPOWER; |
| 1578 | |
| 1579 | if (rt2x00_rf(&rt2x00dev->chip, RF2522)) { |
| 1580 | spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522); |
| 1581 | spec->channels = rf_vals_bg_2522; |
| 1582 | } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) { |
| 1583 | spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523); |
| 1584 | spec->channels = rf_vals_bg_2523; |
| 1585 | } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) { |
| 1586 | spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524); |
| 1587 | spec->channels = rf_vals_bg_2524; |
| 1588 | } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) { |
| 1589 | spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525); |
| 1590 | spec->channels = rf_vals_bg_2525; |
| 1591 | } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) { |
| 1592 | spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e); |
| 1593 | spec->channels = rf_vals_bg_2525e; |
| 1594 | } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) { |
| 1595 | spec->num_channels = ARRAY_SIZE(rf_vals_5222); |
| 1596 | spec->channels = rf_vals_5222; |
| 1597 | spec->num_modes = 3; |
| 1598 | } |
| 1599 | } |
| 1600 | |
| 1601 | static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev) |
| 1602 | { |
| 1603 | int retval; |
| 1604 | |
| 1605 | /* |
| 1606 | * Allocate eeprom data. |
| 1607 | */ |
| 1608 | retval = rt2500usb_validate_eeprom(rt2x00dev); |
| 1609 | if (retval) |
| 1610 | return retval; |
| 1611 | |
| 1612 | retval = rt2500usb_init_eeprom(rt2x00dev); |
| 1613 | if (retval) |
| 1614 | return retval; |
| 1615 | |
| 1616 | /* |
| 1617 | * Initialize hw specifications. |
| 1618 | */ |
| 1619 | rt2500usb_probe_hw_mode(rt2x00dev); |
| 1620 | |
| 1621 | /* |
| 1622 | * USB devices require scheduled packet filter toggling |
| 1623 | *This device requires the beacon ring |
| 1624 | */ |
| 1625 | __set_bit(PACKET_FILTER_SCHEDULED, &rt2x00dev->flags); |
| 1626 | __set_bit(REQUIRE_BEACON_RING, &rt2x00dev->flags); |
| 1627 | |
| 1628 | /* |
| 1629 | * Set the rssi offset. |
| 1630 | */ |
| 1631 | rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET; |
| 1632 | |
| 1633 | return 0; |
| 1634 | } |
| 1635 | |
| 1636 | /* |
| 1637 | * IEEE80211 stack callback functions. |
| 1638 | */ |
| 1639 | static int rt2500usb_beacon_update(struct ieee80211_hw *hw, |
| 1640 | struct sk_buff *skb, |
| 1641 | struct ieee80211_tx_control *control) |
| 1642 | { |
| 1643 | struct rt2x00_dev *rt2x00dev = hw->priv; |
| 1644 | struct usb_device *usb_dev = |
| 1645 | interface_to_usbdev(rt2x00dev_usb(rt2x00dev)); |
| 1646 | struct data_ring *ring = |
| 1647 | rt2x00lib_get_ring(rt2x00dev, IEEE80211_TX_QUEUE_BEACON); |
| 1648 | struct data_entry *beacon; |
| 1649 | struct data_entry *guardian; |
| 1650 | int length; |
| 1651 | |
| 1652 | /* |
| 1653 | * Just in case the ieee80211 doesn't set this, |
| 1654 | * but we need this queue set for the descriptor |
| 1655 | * initialization. |
| 1656 | */ |
| 1657 | control->queue = IEEE80211_TX_QUEUE_BEACON; |
| 1658 | |
| 1659 | /* |
| 1660 | * Obtain 2 entries, one for the guardian byte, |
| 1661 | * the second for the actual beacon. |
| 1662 | */ |
| 1663 | guardian = rt2x00_get_data_entry(ring); |
| 1664 | rt2x00_ring_index_inc(ring); |
| 1665 | beacon = rt2x00_get_data_entry(ring); |
| 1666 | |
| 1667 | /* |
| 1668 | * First we create the beacon. |
| 1669 | */ |
| 1670 | skb_push(skb, ring->desc_size); |
| 1671 | rt2x00lib_write_tx_desc(rt2x00dev, (struct data_desc *)skb->data, |
| 1672 | (struct ieee80211_hdr *)(skb->data + |
| 1673 | ring->desc_size), |
| 1674 | skb->len - ring->desc_size, control); |
| 1675 | |
| 1676 | /* |
| 1677 | * Length passed to usb_fill_urb cannot be an odd number, |
| 1678 | * so add 1 byte to make it even. |
| 1679 | */ |
| 1680 | length = skb->len; |
| 1681 | if (length % 2) |
| 1682 | length++; |
| 1683 | |
| 1684 | usb_fill_bulk_urb(beacon->priv, usb_dev, |
| 1685 | usb_sndbulkpipe(usb_dev, 1), |
| 1686 | skb->data, length, rt2500usb_beacondone, beacon); |
| 1687 | |
| 1688 | beacon->skb = skb; |
| 1689 | |
| 1690 | /* |
| 1691 | * Second we need to create the guardian byte. |
| 1692 | * We only need a single byte, so lets recycle |
| 1693 | * the 'flags' field we are not using for beacons. |
| 1694 | */ |
| 1695 | guardian->flags = 0; |
| 1696 | usb_fill_bulk_urb(guardian->priv, usb_dev, |
| 1697 | usb_sndbulkpipe(usb_dev, 1), |
| 1698 | &guardian->flags, 1, rt2500usb_beacondone, guardian); |
| 1699 | |
| 1700 | /* |
| 1701 | * Send out the guardian byte. |
| 1702 | */ |
| 1703 | usb_submit_urb(guardian->priv, GFP_ATOMIC); |
| 1704 | |
| 1705 | /* |
| 1706 | * Enable beacon generation. |
| 1707 | */ |
| 1708 | rt2500usb_kick_tx_queue(rt2x00dev, IEEE80211_TX_QUEUE_BEACON); |
| 1709 | |
| 1710 | return 0; |
| 1711 | } |
| 1712 | |
| 1713 | static const struct ieee80211_ops rt2500usb_mac80211_ops = { |
| 1714 | .tx = rt2x00mac_tx, |
| 1715 | .add_interface = rt2x00mac_add_interface, |
| 1716 | .remove_interface = rt2x00mac_remove_interface, |
| 1717 | .config = rt2x00mac_config, |
| 1718 | .config_interface = rt2x00mac_config_interface, |
| 1719 | .set_multicast_list = rt2x00mac_set_multicast_list, |
| 1720 | .get_stats = rt2x00mac_get_stats, |
| 1721 | .conf_tx = rt2x00mac_conf_tx, |
| 1722 | .get_tx_stats = rt2x00mac_get_tx_stats, |
| 1723 | .beacon_update = rt2500usb_beacon_update, |
| 1724 | }; |
| 1725 | |
| 1726 | static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = { |
| 1727 | .probe_hw = rt2500usb_probe_hw, |
| 1728 | .initialize = rt2x00usb_initialize, |
| 1729 | .uninitialize = rt2x00usb_uninitialize, |
| 1730 | .set_device_state = rt2500usb_set_device_state, |
| 1731 | .link_stats = rt2500usb_link_stats, |
| 1732 | .reset_tuner = rt2500usb_reset_tuner, |
| 1733 | .link_tuner = rt2500usb_link_tuner, |
| 1734 | .write_tx_desc = rt2500usb_write_tx_desc, |
| 1735 | .write_tx_data = rt2x00usb_write_tx_data, |
| 1736 | .kick_tx_queue = rt2500usb_kick_tx_queue, |
| 1737 | .fill_rxdone = rt2500usb_fill_rxdone, |
| 1738 | .config_mac_addr = rt2500usb_config_mac_addr, |
| 1739 | .config_bssid = rt2500usb_config_bssid, |
| 1740 | .config_packet_filter = rt2500usb_config_packet_filter, |
| 1741 | .config_type = rt2500usb_config_type, |
| 1742 | .config = rt2500usb_config, |
| 1743 | }; |
| 1744 | |
| 1745 | static const struct rt2x00_ops rt2500usb_ops = { |
| 1746 | .name = DRV_NAME, |
| 1747 | .rxd_size = RXD_DESC_SIZE, |
| 1748 | .txd_size = TXD_DESC_SIZE, |
| 1749 | .eeprom_size = EEPROM_SIZE, |
| 1750 | .rf_size = RF_SIZE, |
| 1751 | .lib = &rt2500usb_rt2x00_ops, |
| 1752 | .hw = &rt2500usb_mac80211_ops, |
| 1753 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS |
| 1754 | .debugfs = &rt2500usb_rt2x00debug, |
| 1755 | #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ |
| 1756 | }; |
| 1757 | |
| 1758 | /* |
| 1759 | * rt2500usb module information. |
| 1760 | */ |
| 1761 | static struct usb_device_id rt2500usb_device_table[] = { |
| 1762 | /* ASUS */ |
| 1763 | { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1764 | { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1765 | /* Belkin */ |
| 1766 | { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1767 | { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1768 | { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1769 | /* Cisco Systems */ |
| 1770 | { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1771 | { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1772 | { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1773 | /* Conceptronic */ |
| 1774 | { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1775 | /* D-LINK */ |
| 1776 | { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1777 | /* Gigabyte */ |
| 1778 | { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1779 | { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1780 | /* Hercules */ |
| 1781 | { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1782 | /* Melco */ |
| 1783 | { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1784 | { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1785 | { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1786 | { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1787 | |
| 1788 | /* MSI */ |
| 1789 | { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1790 | { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1791 | { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1792 | /* Ralink */ |
| 1793 | { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1794 | { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1795 | { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1796 | { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1797 | /* Siemens */ |
| 1798 | { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1799 | /* SMC */ |
| 1800 | { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1801 | /* Spairon */ |
| 1802 | { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1803 | /* Trust */ |
| 1804 | { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1805 | /* Zinwell */ |
| 1806 | { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) }, |
| 1807 | { 0, } |
| 1808 | }; |
| 1809 | |
| 1810 | MODULE_AUTHOR(DRV_PROJECT); |
| 1811 | MODULE_VERSION(DRV_VERSION); |
| 1812 | MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver."); |
| 1813 | MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards"); |
| 1814 | MODULE_DEVICE_TABLE(usb, rt2500usb_device_table); |
| 1815 | MODULE_LICENSE("GPL"); |
| 1816 | |
| 1817 | static struct usb_driver rt2500usb_driver = { |
| 1818 | .name = DRV_NAME, |
| 1819 | .id_table = rt2500usb_device_table, |
| 1820 | .probe = rt2x00usb_probe, |
| 1821 | .disconnect = rt2x00usb_disconnect, |
| 1822 | .suspend = rt2x00usb_suspend, |
| 1823 | .resume = rt2x00usb_resume, |
| 1824 | }; |
| 1825 | |
| 1826 | static int __init rt2500usb_init(void) |
| 1827 | { |
| 1828 | return usb_register(&rt2500usb_driver); |
| 1829 | } |
| 1830 | |
| 1831 | static void __exit rt2500usb_exit(void) |
| 1832 | { |
| 1833 | usb_deregister(&rt2500usb_driver); |
| 1834 | } |
| 1835 | |
| 1836 | module_init(rt2500usb_init); |
| 1837 | module_exit(rt2500usb_exit); |