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Boris BREZILLON0ad61252013-12-02 15:07:02 +01001/*
2 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 */
10
11#include <linux/clk-provider.h>
12#include <linux/clkdev.h>
13#include <linux/clk/at91_pmc.h>
14#include <linux/of.h>
Boris Brezillon863a81c2014-09-05 09:54:13 +020015#include <linux/mfd/syscon.h>
Alexandre Bellonib3b02ea2017-06-08 02:36:47 +020016#include <linux/platform_device.h>
Boris Brezillon1bdf0232014-09-07 08:14:29 +020017#include <linux/regmap.h>
Alexandre Bellonib3b02ea2017-06-08 02:36:47 +020018#include <linux/syscore_ops.h>
Boris BREZILLON0ad61252013-12-02 15:07:02 +010019
20#include <asm/proc-fns.h>
21
22#include "pmc.h"
23
Alexandre Bellonib3b02ea2017-06-08 02:36:47 +020024#define PMC_MAX_IDS 128
25
Boris BREZILLON0ad61252013-12-02 15:07:02 +010026int of_at91_get_clk_range(struct device_node *np, const char *propname,
27 struct clk_range *range)
28{
29 u32 min, max;
30 int ret;
31
32 ret = of_property_read_u32_index(np, propname, 0, &min);
33 if (ret)
34 return ret;
35
36 ret = of_property_read_u32_index(np, propname, 1, &max);
37 if (ret)
38 return ret;
39
40 if (range) {
41 range->min = min;
42 range->max = max;
43 }
44
45 return 0;
46}
47EXPORT_SYMBOL_GPL(of_at91_get_clk_range);
Alexandre Bellonib3b02ea2017-06-08 02:36:47 +020048
49#ifdef CONFIG_PM
50static struct regmap *pmcreg;
51
52static u8 registered_ids[PMC_MAX_IDS];
53
54static struct
55{
56 u32 scsr;
57 u32 pcsr0;
58 u32 uckr;
59 u32 mor;
60 u32 mcfr;
61 u32 pllar;
62 u32 mckr;
63 u32 usb;
64 u32 imr;
65 u32 pcsr1;
66 u32 pcr[PMC_MAX_IDS];
67 u32 audio_pll0;
68 u32 audio_pll1;
69} pmc_cache;
70
71void pmc_register_id(u8 id)
72{
73 int i;
74
75 for (i = 0; i < PMC_MAX_IDS; i++) {
76 if (registered_ids[i] == 0) {
77 registered_ids[i] = id;
78 break;
79 }
80 if (registered_ids[i] == id)
81 break;
82 }
83}
84
85static int pmc_suspend(void)
86{
87 int i;
88
89 regmap_read(pmcreg, AT91_PMC_IMR, &pmc_cache.scsr);
90 regmap_read(pmcreg, AT91_PMC_PCSR, &pmc_cache.pcsr0);
91 regmap_read(pmcreg, AT91_CKGR_UCKR, &pmc_cache.uckr);
92 regmap_read(pmcreg, AT91_CKGR_MOR, &pmc_cache.mor);
93 regmap_read(pmcreg, AT91_CKGR_MCFR, &pmc_cache.mcfr);
94 regmap_read(pmcreg, AT91_CKGR_PLLAR, &pmc_cache.pllar);
95 regmap_read(pmcreg, AT91_PMC_MCKR, &pmc_cache.mckr);
96 regmap_read(pmcreg, AT91_PMC_USB, &pmc_cache.usb);
97 regmap_read(pmcreg, AT91_PMC_IMR, &pmc_cache.imr);
98 regmap_read(pmcreg, AT91_PMC_PCSR1, &pmc_cache.pcsr1);
99
100 for (i = 0; registered_ids[i]; i++) {
101 regmap_write(pmcreg, AT91_PMC_PCR,
102 (registered_ids[i] & AT91_PMC_PCR_PID_MASK));
103 regmap_read(pmcreg, AT91_PMC_PCR,
104 &pmc_cache.pcr[registered_ids[i]]);
105 }
106
107 return 0;
108}
109
Romain Izard960e1c42017-12-11 17:55:33 +0100110static bool pmc_ready(unsigned int mask)
111{
112 unsigned int status;
113
114 regmap_read(pmcreg, AT91_PMC_SR, &status);
115
116 return ((status & mask) == mask) ? 1 : 0;
117}
118
Alexandre Bellonib3b02ea2017-06-08 02:36:47 +0200119static void pmc_resume(void)
120{
Romain Izard960e1c42017-12-11 17:55:33 +0100121 int i;
Alexandre Bellonib3b02ea2017-06-08 02:36:47 +0200122 u32 tmp;
Romain Izard960e1c42017-12-11 17:55:33 +0100123 u32 mask = AT91_PMC_MCKRDY | AT91_PMC_LOCKA;
Alexandre Bellonib3b02ea2017-06-08 02:36:47 +0200124
125 regmap_read(pmcreg, AT91_PMC_MCKR, &tmp);
126 if (pmc_cache.mckr != tmp)
127 pr_warn("MCKR was not configured properly by the firmware\n");
128 regmap_read(pmcreg, AT91_CKGR_PLLAR, &tmp);
129 if (pmc_cache.pllar != tmp)
130 pr_warn("PLLAR was not configured properly by the firmware\n");
131
132 regmap_write(pmcreg, AT91_PMC_IMR, pmc_cache.scsr);
133 regmap_write(pmcreg, AT91_PMC_PCER, pmc_cache.pcsr0);
134 regmap_write(pmcreg, AT91_CKGR_UCKR, pmc_cache.uckr);
135 regmap_write(pmcreg, AT91_CKGR_MOR, pmc_cache.mor);
136 regmap_write(pmcreg, AT91_CKGR_MCFR, pmc_cache.mcfr);
137 regmap_write(pmcreg, AT91_PMC_USB, pmc_cache.usb);
138 regmap_write(pmcreg, AT91_PMC_IMR, pmc_cache.imr);
139 regmap_write(pmcreg, AT91_PMC_PCER1, pmc_cache.pcsr1);
140
141 for (i = 0; registered_ids[i]; i++) {
142 regmap_write(pmcreg, AT91_PMC_PCR,
143 pmc_cache.pcr[registered_ids[i]] |
144 AT91_PMC_PCR_CMD);
145 }
146
Romain Izard960e1c42017-12-11 17:55:33 +0100147 if (pmc_cache.uckr & AT91_PMC_UPLLEN)
148 mask |= AT91_PMC_LOCKU;
149
150 while (!pmc_ready(mask))
151 cpu_relax();
Alexandre Bellonib3b02ea2017-06-08 02:36:47 +0200152}
153
154static struct syscore_ops pmc_syscore_ops = {
155 .suspend = pmc_suspend,
156 .resume = pmc_resume,
157};
158
159static const struct of_device_id sama5d2_pmc_dt_ids[] = {
160 { .compatible = "atmel,sama5d2-pmc" },
161 { /* sentinel */ }
162};
163
164static int __init pmc_register_ops(void)
165{
166 struct device_node *np;
167
168 np = of_find_matching_node(NULL, sama5d2_pmc_dt_ids);
169
170 pmcreg = syscon_node_to_regmap(np);
171 if (IS_ERR(pmcreg))
172 return PTR_ERR(pmcreg);
173
174 register_syscore_ops(&pmc_syscore_ops);
175
176 return 0;
177}
178/* This has to happen before arch_initcall because of the tcb_clksrc driver */
179postcore_initcall(pmc_register_ops);
180#endif