| Arnd Bergmann | c11fc34 | 2015-01-30 10:45:33 +0100 | [diff] [blame] | 1 | #ifndef _IOP13XX_PCI_H_ |
| 2 | #define _IOP13XX_PCI_H_ |
| 3 | #include <linux/io.h> |
| 4 | #include <mach/irqs.h> |
| 5 | |
| Rob Herring | 17d971e | 2012-02-29 10:58:05 -0600 | [diff] [blame] | 6 | #include <linux/types.h> |
| 7 | |
| Arnd Bergmann | abf2ba1 | 2012-09-14 20:17:50 +0000 | [diff] [blame] | 8 | extern void __iomem *iop13xx_atue_mem_base; |
| 9 | extern void __iomem *iop13xx_atux_mem_base; |
| Rob Herring | 17d971e | 2012-02-29 10:58:05 -0600 | [diff] [blame] | 10 | extern size_t iop13xx_atue_mem_size; |
| 11 | extern size_t iop13xx_atux_mem_size; |
| Arnd Bergmann | c11fc34 | 2015-01-30 10:45:33 +0100 | [diff] [blame] | 12 | |
| 13 | struct pci_sys_data; |
| Lorenzo Pieralisi | 97ad2bd | 2017-06-28 15:13:55 -0500 | [diff] [blame] | 14 | struct pci_host_bridge; |
| Arnd Bergmann | c11fc34 | 2015-01-30 10:45:33 +0100 | [diff] [blame] | 15 | struct hw_pci; |
| 16 | int iop13xx_pci_setup(int nr, struct pci_sys_data *sys); |
| Lorenzo Pieralisi | 97ad2bd | 2017-06-28 15:13:55 -0500 | [diff] [blame] | 17 | int iop13xx_scan_bus(int nr, struct pci_host_bridge *bridge); |
| Arnd Bergmann | c11fc34 | 2015-01-30 10:45:33 +0100 | [diff] [blame] | 18 | void iop13xx_atu_select(struct hw_pci *plat_pci); |
| 19 | void iop13xx_pci_init(void); |
| 20 | void iop13xx_map_pci_memory(void); |
| 21 | |
| 22 | #define IOP_PCI_STATUS_ERROR (PCI_STATUS_PARITY | \ |
| 23 | PCI_STATUS_SIG_TARGET_ABORT | \ |
| 24 | PCI_STATUS_REC_TARGET_ABORT | \ |
| 25 | PCI_STATUS_REC_TARGET_ABORT | \ |
| 26 | PCI_STATUS_REC_MASTER_ABORT | \ |
| 27 | PCI_STATUS_SIG_SYSTEM_ERROR | \ |
| 28 | PCI_STATUS_DETECTED_PARITY) |
| 29 | |
| 30 | #define IOP13XX_ATUE_ATUISR_ERROR (IOP13XX_ATUE_STAT_HALT_ON_ERROR | \ |
| 31 | IOP13XX_ATUE_STAT_ROOT_SYS_ERR | \ |
| 32 | IOP13XX_ATUE_STAT_PCI_IFACE_ERR | \ |
| 33 | IOP13XX_ATUE_STAT_ERR_COR | \ |
| 34 | IOP13XX_ATUE_STAT_ERR_UNCOR | \ |
| 35 | IOP13XX_ATUE_STAT_CRS | \ |
| 36 | IOP13XX_ATUE_STAT_DET_PAR_ERR | \ |
| 37 | IOP13XX_ATUE_STAT_EXT_REC_MABORT | \ |
| 38 | IOP13XX_ATUE_STAT_SIG_TABORT | \ |
| 39 | IOP13XX_ATUE_STAT_EXT_REC_TABORT | \ |
| 40 | IOP13XX_ATUE_STAT_MASTER_DATA_PAR) |
| 41 | |
| 42 | #define IOP13XX_ATUX_ATUISR_ERROR (IOP13XX_ATUX_STAT_TX_SCEM | \ |
| 43 | IOP13XX_ATUX_STAT_REC_SCEM | \ |
| 44 | IOP13XX_ATUX_STAT_TX_SERR | \ |
| 45 | IOP13XX_ATUX_STAT_DET_PAR_ERR | \ |
| 46 | IOP13XX_ATUX_STAT_INT_REC_MABORT | \ |
| 47 | IOP13XX_ATUX_STAT_REC_SERR | \ |
| 48 | IOP13XX_ATUX_STAT_EXT_REC_MABORT | \ |
| 49 | IOP13XX_ATUX_STAT_EXT_REC_TABORT | \ |
| 50 | IOP13XX_ATUX_STAT_EXT_SIG_TABORT | \ |
| 51 | IOP13XX_ATUX_STAT_MASTER_DATA_PAR) |
| 52 | |
| 53 | /* PCI interrupts |
| 54 | */ |
| 55 | #define ATUX_INTA IRQ_IOP13XX_XINT0 |
| 56 | #define ATUX_INTB IRQ_IOP13XX_XINT1 |
| 57 | #define ATUX_INTC IRQ_IOP13XX_XINT2 |
| 58 | #define ATUX_INTD IRQ_IOP13XX_XINT3 |
| 59 | |
| 60 | #define ATUE_INTA IRQ_IOP13XX_ATUE_IMA |
| 61 | #define ATUE_INTB IRQ_IOP13XX_ATUE_IMB |
| 62 | #define ATUE_INTC IRQ_IOP13XX_ATUE_IMC |
| 63 | #define ATUE_INTD IRQ_IOP13XX_ATUE_IMD |
| 64 | |
| 65 | #endif /* _IOP13XX_PCI_H_ */ |