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Tim Harveye3946fe2014-02-07 15:24:56 +08001/*
2 * Copyright 2013 Gateworks Corporation
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
Tim Harvey326cdb12014-09-08 23:07:28 -070013#include <dt-bindings/gpio/gpio.h>
Tim Harveye3946fe2014-02-07 15:24:56 +080014#include "imx6q.dtsi"
15
16/ {
17 model = "Gateworks Ventana GW5400-A";
18 compatible = "gw,imx6q-gw5400-a", "gw,ventana", "fsl,imx6q";
19
20 /* these are used by bootloader for disabling nodes */
21 aliases {
Tim Harveye3946fe2014-02-07 15:24:56 +080022 i2c0 = &i2c1;
23 i2c1 = &i2c2;
24 i2c2 = &i2c3;
25 led0 = &led0;
26 led1 = &led1;
27 led2 = &led2;
Tim Harveye3946fe2014-02-07 15:24:56 +080028 ssi0 = &ssi1;
29 spi0 = &ecspi1;
30 usb0 = &usbh1;
31 usb1 = &usbotg;
Tim Harveye3946fe2014-02-07 15:24:56 +080032 };
33
34 chosen {
35 bootargs = "console=ttymxc1,115200";
36 };
37
38 leds {
39 compatible = "gpio-leds";
Tim Harveyb5f37b72014-09-08 23:07:30 -070040 pinctrl-names = "default";
41 pinctrl-0 = <&pinctrl_gpio_leds>;
Tim Harveye3946fe2014-02-07 15:24:56 +080042
43 led0: user1 {
44 label = "user1";
Tim Harvey326cdb12014-09-08 23:07:28 -070045 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 -> MX6_PANLEDG */
Tim Harveye3946fe2014-02-07 15:24:56 +080046 default-state = "on";
47 linux,default-trigger = "heartbeat";
48 };
49
50 led1: user2 {
51 label = "user2";
Tim Harvey326cdb12014-09-08 23:07:28 -070052 gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; /* 106 -> MX6_PANLEDR */
Tim Harveye3946fe2014-02-07 15:24:56 +080053 default-state = "off";
54 };
55
56 led2: user3 {
57 label = "user3";
Tim Harvey326cdb12014-09-08 23:07:28 -070058 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* 111 -> MX6_LOCLED# */
Tim Harveye3946fe2014-02-07 15:24:56 +080059 default-state = "off";
60 };
61 };
62
Marco Franchiad00e082018-01-24 11:22:14 -020063 memory@10000000 {
Tim Harveye3946fe2014-02-07 15:24:56 +080064 reg = <0x10000000 0x40000000>;
65 };
66
67 pps {
68 compatible = "pps-gpio";
Tim Harveyb5f37b72014-09-08 23:07:30 -070069 pinctrl-names = "default";
70 pinctrl-0 = <&pinctrl_gpio_leds>;
Tim Harvey326cdb12014-09-08 23:07:28 -070071 gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
Tim Harveye3946fe2014-02-07 15:24:56 +080072 status = "okay";
73 };
74
75 regulators {
76 compatible = "simple-bus";
77 #address-cells = <1>;
78 #size-cells = <0>;
79
80 reg_1p0v: regulator@0 {
81 compatible = "regulator-fixed";
82 reg = <0>;
83 regulator-name = "1P0V";
84 regulator-min-microvolt = <1000000>;
85 regulator-max-microvolt = <1000000>;
86 regulator-always-on;
87 };
88
89 reg_3p3v: regulator@1 {
90 compatible = "regulator-fixed";
91 reg = <1>;
92 regulator-name = "3P3V";
93 regulator-min-microvolt = <3300000>;
94 regulator-max-microvolt = <3300000>;
95 regulator-always-on;
96 };
97
98 reg_usb_h1_vbus: regulator@2 {
99 compatible = "regulator-fixed";
100 reg = <2>;
101 regulator-name = "usb_h1_vbus";
102 regulator-min-microvolt = <5000000>;
103 regulator-max-microvolt = <5000000>;
104 regulator-always-on;
105 };
106
107 reg_usb_otg_vbus: regulator@3 {
108 compatible = "regulator-fixed";
109 reg = <3>;
110 regulator-name = "usb_otg_vbus";
111 regulator-min-microvolt = <5000000>;
112 regulator-max-microvolt = <5000000>;
Tim Harvey326cdb12014-09-08 23:07:28 -0700113 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
Tim Harveye3946fe2014-02-07 15:24:56 +0800114 enable-active-high;
115 };
116 };
117
118 sound {
Tim Harveyb12d1e92014-05-21 23:04:54 -0700119 compatible = "fsl,imx6q-ventana-sgtl5000",
Tim Harveye3946fe2014-02-07 15:24:56 +0800120 "fsl,imx-audio-sgtl5000";
Tim Harveyb12d1e92014-05-21 23:04:54 -0700121 model = "sgtl5000-audio";
Tim Harveye3946fe2014-02-07 15:24:56 +0800122 ssi-controller = <&ssi1>;
123 audio-codec = <&codec>;
124 audio-routing =
125 "MIC_IN", "Mic Jack",
126 "Mic Jack", "Mic Bias",
127 "Headphone Jack", "HP_OUT";
128 mux-int-port = <1>;
129 mux-ext-port = <4>;
130 };
131};
132
133&audmux {
134 pinctrl-names = "default";
135 pinctrl-0 = <&pinctrl_audmux>;
136 status = "okay";
137};
138
139&ecspi1 {
Tim Harvey326cdb12014-09-08 23:07:28 -0700140 cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
Tim Harveye3946fe2014-02-07 15:24:56 +0800141 pinctrl-names = "default";
142 pinctrl-0 = <&pinctrl_ecspi1>;
143 status = "okay";
144
145 flash: m25p80@0 {
Rafał Miłecki79826ac2015-08-16 08:39:17 +0200146 compatible = "sst,w25q256", "jedec,spi-nor";
Tim Harveye3946fe2014-02-07 15:24:56 +0800147 spi-max-frequency = <30000000>;
148 reg = <0>;
149 };
150};
151
152&fec {
153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_enet>;
Krzysztof Hałasa3a35e472015-12-11 14:22:04 +0100155 phy-mode = "rgmii-id";
Fabio Estevam12de44f2017-06-04 14:31:15 -0300156 phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
Tim Harveye3946fe2014-02-07 15:24:56 +0800157 status = "okay";
158};
159
Tim Harveyaef15db2014-04-23 00:47:51 -0700160&hdmi {
161 ddc-i2c-bus = <&i2c3>;
162 status = "okay";
163};
164
Tim Harveye3946fe2014-02-07 15:24:56 +0800165&i2c1 {
166 clock-frequency = <100000>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&pinctrl_i2c1>;
169 status = "okay";
170
171 eeprom1: eeprom@50 {
172 compatible = "atmel,24c02";
173 reg = <0x50>;
174 pagesize = <16>;
175 };
176
177 eeprom2: eeprom@51 {
178 compatible = "atmel,24c02";
179 reg = <0x51>;
180 pagesize = <16>;
181 };
182
183 eeprom3: eeprom@52 {
184 compatible = "atmel,24c02";
185 reg = <0x52>;
186 pagesize = <16>;
187 };
188
189 eeprom4: eeprom@53 {
190 compatible = "atmel,24c02";
191 reg = <0x53>;
192 pagesize = <16>;
193 };
194
195 gpio: pca9555@23 {
196 compatible = "nxp,pca9555";
197 reg = <0x23>;
198 gpio-controller;
199 #gpio-cells = <2>;
200 };
201
Tim Harveye3946fe2014-02-07 15:24:56 +0800202 rtc: ds1672@68 {
203 compatible = "dallas,ds1672";
204 reg = <0x68>;
205 };
206};
207
208&i2c2 {
209 clock-frequency = <100000>;
210 pinctrl-names = "default";
211 pinctrl-0 = <&pinctrl_i2c2>;
212 status = "okay";
213
Rob Herring8dccafa2017-10-13 12:54:51 -0500214 pmic: pfuze100@8 {
Tim Harveye3946fe2014-02-07 15:24:56 +0800215 compatible = "fsl,pfuze100";
216 reg = <0x08>;
217
218 regulators {
219 sw1a_reg: sw1ab {
220 regulator-min-microvolt = <300000>;
221 regulator-max-microvolt = <1875000>;
222 regulator-boot-on;
223 regulator-always-on;
224 regulator-ramp-delay = <6250>;
225 };
226
227 sw1c_reg: sw1c {
228 regulator-min-microvolt = <300000>;
229 regulator-max-microvolt = <1875000>;
230 regulator-boot-on;
231 regulator-always-on;
232 regulator-ramp-delay = <6250>;
233 };
234
235 sw2_reg: sw2 {
236 regulator-min-microvolt = <800000>;
237 regulator-max-microvolt = <3950000>;
238 regulator-boot-on;
239 regulator-always-on;
240 };
241
242 sw3a_reg: sw3a {
243 regulator-min-microvolt = <400000>;
244 regulator-max-microvolt = <1975000>;
245 regulator-boot-on;
246 regulator-always-on;
247 };
248
249 sw3b_reg: sw3b {
250 regulator-min-microvolt = <400000>;
251 regulator-max-microvolt = <1975000>;
252 regulator-boot-on;
253 regulator-always-on;
254 };
255
256 sw4_reg: sw4 {
257 regulator-min-microvolt = <800000>;
258 regulator-max-microvolt = <3300000>;
259 };
260
261 swbst_reg: swbst {
262 regulator-min-microvolt = <5000000>;
263 regulator-max-microvolt = <5150000>;
264 };
265
266 snvs_reg: vsnvs {
267 regulator-min-microvolt = <1000000>;
268 regulator-max-microvolt = <3000000>;
269 regulator-boot-on;
270 regulator-always-on;
271 };
272
273 vref_reg: vrefddr {
274 regulator-boot-on;
275 regulator-always-on;
276 };
277
278 vgen1_reg: vgen1 {
279 regulator-min-microvolt = <800000>;
280 regulator-max-microvolt = <1550000>;
281 };
282
283 vgen2_reg: vgen2 {
284 regulator-min-microvolt = <800000>;
285 regulator-max-microvolt = <1550000>;
286 };
287
288 vgen3_reg: vgen3 {
289 regulator-min-microvolt = <1800000>;
290 regulator-max-microvolt = <3300000>;
291 };
292
293 vgen4_reg: vgen4 {
294 regulator-min-microvolt = <1800000>;
295 regulator-max-microvolt = <3300000>;
296 regulator-always-on;
297 };
298
299 vgen5_reg: vgen5 {
300 regulator-min-microvolt = <1800000>;
301 regulator-max-microvolt = <3300000>;
302 regulator-always-on;
303 };
304
305 vgen6_reg: vgen6 {
306 regulator-min-microvolt = <1800000>;
307 regulator-max-microvolt = <3300000>;
308 regulator-always-on;
309 };
310 };
311 };
Tim Harveye3946fe2014-02-07 15:24:56 +0800312};
313
314&i2c3 {
315 clock-frequency = <100000>;
316 pinctrl-names = "default";
317 pinctrl-0 = <&pinctrl_i2c3>;
318 status = "okay";
319
320 accelerometer: mma8450@1c {
321 compatible = "fsl,mma8450";
322 reg = <0x1c>;
323 };
324
Rob Herring8dccafa2017-10-13 12:54:51 -0500325 codec: sgtl5000@a {
Tim Harveye3946fe2014-02-07 15:24:56 +0800326 compatible = "fsl,sgtl5000";
327 reg = <0x0a>;
Fabio Estevamb26a68c2016-04-26 22:28:29 -0300328 clocks = <&clks IMX6QDL_CLK_CKO>;
Tim Harveye3946fe2014-02-07 15:24:56 +0800329 VDDA-supply = <&sw4_reg>;
330 VDDIO-supply = <&reg_3p3v>;
331 };
332
Rob Herring8dccafa2017-10-13 12:54:51 -0500333 touchscreen: egalax_ts@4 {
Tim Harveye3946fe2014-02-07 15:24:56 +0800334 compatible = "eeti,egalax_ts";
335 reg = <0x04>;
336 interrupt-parent = <&gpio7>;
Tim Harvey326cdb12014-09-08 23:07:28 -0700337 interrupts = <12 2>;
338 wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
Tim Harveye3946fe2014-02-07 15:24:56 +0800339 };
Tim Harveye3946fe2014-02-07 15:24:56 +0800340};
341
Tim Harveye3946fe2014-02-07 15:24:56 +0800342&ldb {
343 status = "okay";
Tim Harveye3946fe2014-02-07 15:24:56 +0800344};
345
346&pcie {
Tim Harvey326cdb12014-09-08 23:07:28 -0700347 reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
Tim Harveye3946fe2014-02-07 15:24:56 +0800348 status = "okay";
Tim Harveye3946fe2014-02-07 15:24:56 +0800349};
350
351&ssi1 {
Tim Harveye3946fe2014-02-07 15:24:56 +0800352 status = "okay";
353};
354
355&uart1 {
356 pinctrl-names = "default";
357 pinctrl-0 = <&pinctrl_uart1>;
358 status = "okay";
359};
360
361&uart2 {
362 pinctrl-names = "default";
363 pinctrl-0 = <&pinctrl_uart2>;
364 status = "okay";
365};
366
367&uart5 {
368 pinctrl-names = "default";
369 pinctrl-0 = <&pinctrl_uart5>;
370 status = "okay";
371};
372
373&usbotg {
374 vbus-supply = <&reg_usb_otg_vbus>;
375 pinctrl-names = "default";
376 pinctrl-0 = <&pinctrl_usbotg>;
377 disable-over-current;
378 status = "okay";
379};
380
381&usbh1 {
382 vbus-supply = <&reg_usb_h1_vbus>;
383 status = "okay";
384};
385
386&usdhc3 {
387 pinctrl-names = "default";
388 pinctrl-0 = <&pinctrl_usdhc3>;
Tim Harvey326cdb12014-09-08 23:07:28 -0700389 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
Tim Harveye3946fe2014-02-07 15:24:56 +0800390 vmmc-supply = <&reg_3p3v>;
391 status = "okay";
392};
Tim Harveyb5f37b72014-09-08 23:07:30 -0700393
394&iomuxc {
Tim Harveyd31c46c2017-09-18 13:11:01 -0700395 pinctrl_audmux: audmuxgrp {
396 fsl,pins = <
397 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
398 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
399 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
400 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
401 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
402 >;
403 };
Tim Harveyb5f37b72014-09-08 23:07:30 -0700404
Tim Harveyd31c46c2017-09-18 13:11:01 -0700405 pinctrl_ecspi1: ecspi1grp {
406 fsl,pins = <
407 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
408 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
409 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
410 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b0 /* SPINOR_CS0# */
411 >;
412 };
Tim Harveyb5f37b72014-09-08 23:07:30 -0700413
Tim Harveyd31c46c2017-09-18 13:11:01 -0700414 pinctrl_enet: enetgrp {
415 fsl,pins = <
416 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
417 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
418 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
419 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
420 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
421 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
422 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
423 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
424 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
425 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
426 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
427 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
428 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
429 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
430 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
431 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
432 >;
433 };
Tim Harveyb5f37b72014-09-08 23:07:30 -0700434
Tim Harveyd31c46c2017-09-18 13:11:01 -0700435 pinctrl_gpio_leds: gpioledsgrp {
436 fsl,pins = <
437 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 /* user1 led */
438 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 /* user2 led */
439 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 /* user3 led */
440 >;
441 };
Tim Harveyb5f37b72014-09-08 23:07:30 -0700442
Tim Harveyd31c46c2017-09-18 13:11:01 -0700443 pinctrl_i2c1: i2c1grp {
444 fsl,pins = <
445 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
446 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
447 >;
448 };
Tim Harveyb5f37b72014-09-08 23:07:30 -0700449
Tim Harveyd31c46c2017-09-18 13:11:01 -0700450 pinctrl_i2c2: i2c2grp {
451 fsl,pins = <
452 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
453 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
454 >;
455 };
Tim Harveyb5f37b72014-09-08 23:07:30 -0700456
Tim Harveyd31c46c2017-09-18 13:11:01 -0700457 pinctrl_i2c3: i2c3grp {
458 fsl,pins = <
459 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
460 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
461 >;
462 };
Tim Harveyb5f37b72014-09-08 23:07:30 -0700463
Tim Harveyd31c46c2017-09-18 13:11:01 -0700464 pinctrl_pcie: pciegrp {
465 fsl,pins = <
466 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* PCIE IRQ */
467 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
468 >;
469 };
Tim Harveyb5f37b72014-09-08 23:07:30 -0700470
Tim Harveyd31c46c2017-09-18 13:11:01 -0700471 pinctrl_pps: ppsgrp {
472 fsl,pins = <
473 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0 /* GPS_PPS */
474 >;
475 };
Tim Harveyb5f37b72014-09-08 23:07:30 -0700476
Tim Harveyd31c46c2017-09-18 13:11:01 -0700477 pinctrl_uart1: uart1grp {
478 fsl,pins = <
479 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
480 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
481 >;
482 };
Tim Harveyb5f37b72014-09-08 23:07:30 -0700483
Tim Harveyd31c46c2017-09-18 13:11:01 -0700484 pinctrl_uart2: uart2grp {
485 fsl,pins = <
486 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
487 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
488 >;
489 };
Tim Harveyb5f37b72014-09-08 23:07:30 -0700490
Tim Harveyd31c46c2017-09-18 13:11:01 -0700491 pinctrl_uart5: uart5grp {
492 fsl,pins = <
493 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
494 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
495 >;
496 };
Tim Harveyb5f37b72014-09-08 23:07:30 -0700497
Tim Harveyd31c46c2017-09-18 13:11:01 -0700498 pinctrl_usbotg: usbotggrp {
499 fsl,pins = <
500 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
501 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */
502 >;
503 };
Tim Harveyb5f37b72014-09-08 23:07:30 -0700504
Tim Harveyd31c46c2017-09-18 13:11:01 -0700505 pinctrl_usdhc3: usdhc3grp {
506 fsl,pins = <
507 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
508 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
509 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
510 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
511 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
512 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
513 >;
Tim Harveyb5f37b72014-09-08 23:07:30 -0700514 };
515};