Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1 | /* savage_state.c -- State and drawing support for Savage |
| 2 | * |
| 3 | * Copyright 2004 Felix Kuehling |
| 4 | * All Rights Reserved. |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the "Software"), |
| 8 | * to deal in the Software without restriction, including without limitation |
| 9 | * the rights to use, copy, modify, merge, publish, distribute, sub license, |
| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
| 11 | * Software is furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice (including the |
| 14 | * next paragraph) shall be included in all copies or substantial portions |
| 15 | * of the Software. |
| 16 | * |
| 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 18 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 20 | * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR |
| 21 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF |
| 22 | * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION |
| 23 | * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 24 | */ |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 25 | #include <drm/drmP.h> |
| 26 | #include <drm/savage_drm.h> |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 27 | #include "savage_drv.h" |
| 28 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 29 | void savage_emit_clip_rect_s3d(drm_savage_private_t * dev_priv, |
Dave Airlie | eddca55 | 2007-07-11 16:09:54 +1000 | [diff] [blame] | 30 | const struct drm_clip_rect * pbox) |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 31 | { |
| 32 | uint32_t scstart = dev_priv->state.s3d.new_scstart; |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 33 | uint32_t scend = dev_priv->state.s3d.new_scend; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 34 | scstart = (scstart & ~SAVAGE_SCISSOR_MASK_S3D) | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 35 | ((uint32_t) pbox->x1 & 0x000007ff) | |
| 36 | (((uint32_t) pbox->y1 << 16) & 0x07ff0000); |
| 37 | scend = (scend & ~SAVAGE_SCISSOR_MASK_S3D) | |
| 38 | (((uint32_t) pbox->x2 - 1) & 0x000007ff) | |
| 39 | ((((uint32_t) pbox->y2 - 1) << 16) & 0x07ff0000); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 40 | if (scstart != dev_priv->state.s3d.scstart || |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 41 | scend != dev_priv->state.s3d.scend) { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 42 | DMA_LOCALS; |
| 43 | BEGIN_DMA(4); |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 44 | DMA_WRITE(BCI_CMD_WAIT | BCI_CMD_WAIT_3D); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 45 | DMA_SET_REGISTERS(SAVAGE_SCSTART_S3D, 2); |
| 46 | DMA_WRITE(scstart); |
| 47 | DMA_WRITE(scend); |
| 48 | dev_priv->state.s3d.scstart = scstart; |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 49 | dev_priv->state.s3d.scend = scend; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 50 | dev_priv->waiting = 1; |
| 51 | DMA_COMMIT(); |
| 52 | } |
| 53 | } |
| 54 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 55 | void savage_emit_clip_rect_s4(drm_savage_private_t * dev_priv, |
Dave Airlie | eddca55 | 2007-07-11 16:09:54 +1000 | [diff] [blame] | 56 | const struct drm_clip_rect * pbox) |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 57 | { |
| 58 | uint32_t drawctrl0 = dev_priv->state.s4.new_drawctrl0; |
| 59 | uint32_t drawctrl1 = dev_priv->state.s4.new_drawctrl1; |
| 60 | drawctrl0 = (drawctrl0 & ~SAVAGE_SCISSOR_MASK_S4) | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 61 | ((uint32_t) pbox->x1 & 0x000007ff) | |
| 62 | (((uint32_t) pbox->y1 << 12) & 0x00fff000); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 63 | drawctrl1 = (drawctrl1 & ~SAVAGE_SCISSOR_MASK_S4) | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 64 | (((uint32_t) pbox->x2 - 1) & 0x000007ff) | |
| 65 | ((((uint32_t) pbox->y2 - 1) << 12) & 0x00fff000); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 66 | if (drawctrl0 != dev_priv->state.s4.drawctrl0 || |
| 67 | drawctrl1 != dev_priv->state.s4.drawctrl1) { |
| 68 | DMA_LOCALS; |
| 69 | BEGIN_DMA(4); |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 70 | DMA_WRITE(BCI_CMD_WAIT | BCI_CMD_WAIT_3D); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 71 | DMA_SET_REGISTERS(SAVAGE_DRAWCTRL0_S4, 2); |
| 72 | DMA_WRITE(drawctrl0); |
| 73 | DMA_WRITE(drawctrl1); |
| 74 | dev_priv->state.s4.drawctrl0 = drawctrl0; |
| 75 | dev_priv->state.s4.drawctrl1 = drawctrl1; |
| 76 | dev_priv->waiting = 1; |
| 77 | DMA_COMMIT(); |
| 78 | } |
| 79 | } |
| 80 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 81 | static int savage_verify_texaddr(drm_savage_private_t * dev_priv, int unit, |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 82 | uint32_t addr) |
| 83 | { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 84 | if ((addr & 6) != 2) { /* reserved bits */ |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 85 | DRM_ERROR("bad texAddr%d %08x (reserved bits)\n", unit, addr); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 86 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 87 | } |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 88 | if (!(addr & 1)) { /* local */ |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 89 | addr &= ~7; |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 90 | if (addr < dev_priv->texture_offset || |
| 91 | addr >= dev_priv->texture_offset + dev_priv->texture_size) { |
| 92 | DRM_ERROR |
| 93 | ("bad texAddr%d %08x (local addr out of range)\n", |
| 94 | unit, addr); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 95 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 96 | } |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 97 | } else { /* AGP */ |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 98 | if (!dev_priv->agp_textures) { |
| 99 | DRM_ERROR("bad texAddr%d %08x (AGP not available)\n", |
| 100 | unit, addr); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 101 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 102 | } |
| 103 | addr &= ~7; |
| 104 | if (addr < dev_priv->agp_textures->offset || |
| 105 | addr >= (dev_priv->agp_textures->offset + |
| 106 | dev_priv->agp_textures->size)) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 107 | DRM_ERROR |
| 108 | ("bad texAddr%d %08x (AGP addr out of range)\n", |
| 109 | unit, addr); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 110 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 111 | } |
| 112 | } |
| 113 | return 0; |
| 114 | } |
| 115 | |
| 116 | #define SAVE_STATE(reg,where) \ |
| 117 | if(start <= reg && start+count > reg) \ |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 118 | dev_priv->state.where = regs[reg - start] |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 119 | #define SAVE_STATE_MASK(reg,where,mask) do { \ |
| 120 | if(start <= reg && start+count > reg) { \ |
| 121 | uint32_t tmp; \ |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 122 | tmp = regs[reg - start]; \ |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 123 | dev_priv->state.where = (tmp & (mask)) | \ |
| 124 | (dev_priv->state.where & ~(mask)); \ |
| 125 | } \ |
| 126 | } while (0) |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 127 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 128 | static int savage_verify_state_s3d(drm_savage_private_t * dev_priv, |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 129 | unsigned int start, unsigned int count, |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 130 | const uint32_t *regs) |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 131 | { |
| 132 | if (start < SAVAGE_TEXPALADDR_S3D || |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 133 | start + count - 1 > SAVAGE_DESTTEXRWWATERMARK_S3D) { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 134 | DRM_ERROR("invalid register range (0x%04x-0x%04x)\n", |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 135 | start, start + count - 1); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 136 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 137 | } |
| 138 | |
| 139 | SAVE_STATE_MASK(SAVAGE_SCSTART_S3D, s3d.new_scstart, |
| 140 | ~SAVAGE_SCISSOR_MASK_S3D); |
| 141 | SAVE_STATE_MASK(SAVAGE_SCEND_S3D, s3d.new_scend, |
| 142 | ~SAVAGE_SCISSOR_MASK_S3D); |
| 143 | |
| 144 | /* if any texture regs were changed ... */ |
| 145 | if (start <= SAVAGE_TEXCTRL_S3D && |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 146 | start + count > SAVAGE_TEXPALADDR_S3D) { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 147 | /* ... check texture state */ |
| 148 | SAVE_STATE(SAVAGE_TEXCTRL_S3D, s3d.texctrl); |
| 149 | SAVE_STATE(SAVAGE_TEXADDR_S3D, s3d.texaddr); |
| 150 | if (dev_priv->state.s3d.texctrl & SAVAGE_TEXCTRL_TEXEN_MASK) |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 151 | return savage_verify_texaddr(dev_priv, 0, |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 152 | dev_priv->state.s3d.texaddr); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 153 | } |
| 154 | |
| 155 | return 0; |
| 156 | } |
| 157 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 158 | static int savage_verify_state_s4(drm_savage_private_t * dev_priv, |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 159 | unsigned int start, unsigned int count, |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 160 | const uint32_t *regs) |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 161 | { |
| 162 | int ret = 0; |
| 163 | |
| 164 | if (start < SAVAGE_DRAWLOCALCTRL_S4 || |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 165 | start + count - 1 > SAVAGE_TEXBLENDCOLOR_S4) { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 166 | DRM_ERROR("invalid register range (0x%04x-0x%04x)\n", |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 167 | start, start + count - 1); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 168 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 169 | } |
| 170 | |
| 171 | SAVE_STATE_MASK(SAVAGE_DRAWCTRL0_S4, s4.new_drawctrl0, |
| 172 | ~SAVAGE_SCISSOR_MASK_S4); |
| 173 | SAVE_STATE_MASK(SAVAGE_DRAWCTRL1_S4, s4.new_drawctrl1, |
| 174 | ~SAVAGE_SCISSOR_MASK_S4); |
| 175 | |
| 176 | /* if any texture regs were changed ... */ |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 177 | if (start <= SAVAGE_TEXDESCR_S4 && |
| 178 | start + count > SAVAGE_TEXPALADDR_S4) { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 179 | /* ... check texture state */ |
| 180 | SAVE_STATE(SAVAGE_TEXDESCR_S4, s4.texdescr); |
| 181 | SAVE_STATE(SAVAGE_TEXADDR0_S4, s4.texaddr0); |
| 182 | SAVE_STATE(SAVAGE_TEXADDR1_S4, s4.texaddr1); |
| 183 | if (dev_priv->state.s4.texdescr & SAVAGE_TEXDESCR_TEX0EN_MASK) |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 184 | ret |= savage_verify_texaddr(dev_priv, 0, |
| 185 | dev_priv->state.s4.texaddr0); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 186 | if (dev_priv->state.s4.texdescr & SAVAGE_TEXDESCR_TEX1EN_MASK) |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 187 | ret |= savage_verify_texaddr(dev_priv, 1, |
| 188 | dev_priv->state.s4.texaddr1); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 189 | } |
| 190 | |
| 191 | return ret; |
| 192 | } |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 193 | |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 194 | #undef SAVE_STATE |
| 195 | #undef SAVE_STATE_MASK |
| 196 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 197 | static int savage_dispatch_state(drm_savage_private_t * dev_priv, |
| 198 | const drm_savage_cmd_header_t * cmd_header, |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 199 | const uint32_t *regs) |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 200 | { |
| 201 | unsigned int count = cmd_header->state.count; |
| 202 | unsigned int start = cmd_header->state.start; |
| 203 | unsigned int count2 = 0; |
| 204 | unsigned int bci_size; |
| 205 | int ret; |
| 206 | DMA_LOCALS; |
| 207 | |
| 208 | if (!count) |
| 209 | return 0; |
| 210 | |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 211 | if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { |
| 212 | ret = savage_verify_state_s3d(dev_priv, start, count, regs); |
| 213 | if (ret != 0) |
| 214 | return ret; |
| 215 | /* scissor regs are emitted in savage_dispatch_draw */ |
| 216 | if (start < SAVAGE_SCSTART_S3D) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 217 | if (start + count > SAVAGE_SCEND_S3D + 1) |
| 218 | count2 = count - (SAVAGE_SCEND_S3D + 1 - start); |
| 219 | if (start + count > SAVAGE_SCSTART_S3D) |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 220 | count = SAVAGE_SCSTART_S3D - start; |
| 221 | } else if (start <= SAVAGE_SCEND_S3D) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 222 | if (start + count > SAVAGE_SCEND_S3D + 1) { |
| 223 | count -= SAVAGE_SCEND_S3D + 1 - start; |
| 224 | start = SAVAGE_SCEND_S3D + 1; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 225 | } else |
| 226 | return 0; |
| 227 | } |
| 228 | } else { |
| 229 | ret = savage_verify_state_s4(dev_priv, start, count, regs); |
| 230 | if (ret != 0) |
| 231 | return ret; |
| 232 | /* scissor regs are emitted in savage_dispatch_draw */ |
| 233 | if (start < SAVAGE_DRAWCTRL0_S4) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 234 | if (start + count > SAVAGE_DRAWCTRL1_S4 + 1) |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 235 | count2 = count - |
| 236 | (SAVAGE_DRAWCTRL1_S4 + 1 - start); |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 237 | if (start + count > SAVAGE_DRAWCTRL0_S4) |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 238 | count = SAVAGE_DRAWCTRL0_S4 - start; |
| 239 | } else if (start <= SAVAGE_DRAWCTRL1_S4) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 240 | if (start + count > SAVAGE_DRAWCTRL1_S4 + 1) { |
| 241 | count -= SAVAGE_DRAWCTRL1_S4 + 1 - start; |
| 242 | start = SAVAGE_DRAWCTRL1_S4 + 1; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 243 | } else |
| 244 | return 0; |
| 245 | } |
| 246 | } |
| 247 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 248 | bci_size = count + (count + 254) / 255 + count2 + (count2 + 254) / 255; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 249 | |
| 250 | if (cmd_header->state.global) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 251 | BEGIN_DMA(bci_size + 1); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 252 | DMA_WRITE(BCI_CMD_WAIT | BCI_CMD_WAIT_3D); |
| 253 | dev_priv->waiting = 1; |
| 254 | } else { |
| 255 | BEGIN_DMA(bci_size); |
| 256 | } |
| 257 | |
| 258 | do { |
| 259 | while (count > 0) { |
| 260 | unsigned int n = count < 255 ? count : 255; |
| 261 | DMA_SET_REGISTERS(start, n); |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 262 | DMA_COPY(regs, n); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 263 | count -= n; |
| 264 | start += n; |
| 265 | regs += n; |
| 266 | } |
| 267 | start += 2; |
| 268 | regs += 2; |
| 269 | count = count2; |
| 270 | count2 = 0; |
| 271 | } while (count); |
| 272 | |
| 273 | DMA_COMMIT(); |
| 274 | |
| 275 | return 0; |
| 276 | } |
| 277 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 278 | static int savage_dispatch_dma_prim(drm_savage_private_t * dev_priv, |
| 279 | const drm_savage_cmd_header_t * cmd_header, |
Dave Airlie | 056219e | 2007-07-11 16:17:42 +1000 | [diff] [blame] | 280 | const struct drm_buf * dmabuf) |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 281 | { |
| 282 | unsigned char reorder = 0; |
| 283 | unsigned int prim = cmd_header->prim.prim; |
| 284 | unsigned int skip = cmd_header->prim.skip; |
| 285 | unsigned int n = cmd_header->prim.count; |
| 286 | unsigned int start = cmd_header->prim.start; |
| 287 | unsigned int i; |
| 288 | BCI_LOCALS; |
| 289 | |
| 290 | if (!dmabuf) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 291 | DRM_ERROR("called without dma buffers!\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 292 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 293 | } |
| 294 | |
| 295 | if (!n) |
| 296 | return 0; |
| 297 | |
| 298 | switch (prim) { |
| 299 | case SAVAGE_PRIM_TRILIST_201: |
| 300 | reorder = 1; |
| 301 | prim = SAVAGE_PRIM_TRILIST; |
| 302 | case SAVAGE_PRIM_TRILIST: |
| 303 | if (n % 3 != 0) { |
| 304 | DRM_ERROR("wrong number of vertices %u in TRILIST\n", |
| 305 | n); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 306 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 307 | } |
| 308 | break; |
| 309 | case SAVAGE_PRIM_TRISTRIP: |
| 310 | case SAVAGE_PRIM_TRIFAN: |
| 311 | if (n < 3) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 312 | DRM_ERROR |
| 313 | ("wrong number of vertices %u in TRIFAN/STRIP\n", |
| 314 | n); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 315 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 316 | } |
| 317 | break; |
| 318 | default: |
| 319 | DRM_ERROR("invalid primitive type %u\n", prim); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 320 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 321 | } |
| 322 | |
| 323 | if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { |
| 324 | if (skip != 0) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 325 | DRM_ERROR("invalid skip flags 0x%04x for DMA\n", skip); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 326 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 327 | } |
| 328 | } else { |
| 329 | unsigned int size = 10 - (skip & 1) - (skip >> 1 & 1) - |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 330 | (skip >> 2 & 1) - (skip >> 3 & 1) - (skip >> 4 & 1) - |
| 331 | (skip >> 5 & 1) - (skip >> 6 & 1) - (skip >> 7 & 1); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 332 | if (skip > SAVAGE_SKIP_ALL_S4 || size != 8) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 333 | DRM_ERROR("invalid skip flags 0x%04x for DMA\n", skip); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 334 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 335 | } |
| 336 | if (reorder) { |
| 337 | DRM_ERROR("TRILIST_201 used on Savage4 hardware\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 338 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 339 | } |
| 340 | } |
| 341 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 342 | if (start + n > dmabuf->total / 32) { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 343 | DRM_ERROR("vertex indices (%u-%u) out of range (0-%u)\n", |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 344 | start, start + n - 1, dmabuf->total / 32); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 345 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 346 | } |
| 347 | |
| 348 | /* Vertex DMA doesn't work with command DMA at the same time, |
| 349 | * so we use BCI_... to submit commands here. Flush buffered |
| 350 | * faked DMA first. */ |
| 351 | DMA_FLUSH(); |
| 352 | |
| 353 | if (dmabuf->bus_address != dev_priv->state.common.vbaddr) { |
| 354 | BEGIN_BCI(2); |
| 355 | BCI_SET_REGISTERS(SAVAGE_VERTBUFADDR, 1); |
| 356 | BCI_WRITE(dmabuf->bus_address | dev_priv->dma_type); |
| 357 | dev_priv->state.common.vbaddr = dmabuf->bus_address; |
| 358 | } |
| 359 | if (S3_SAVAGE3D_SERIES(dev_priv->chipset) && dev_priv->waiting) { |
| 360 | /* Workaround for what looks like a hardware bug. If a |
| 361 | * WAIT_3D_IDLE was emitted some time before the |
| 362 | * indexed drawing command then the engine will lock |
| 363 | * up. There are two known workarounds: |
| 364 | * WAIT_IDLE_EMPTY or emit at least 63 NOPs. */ |
| 365 | BEGIN_BCI(63); |
| 366 | for (i = 0; i < 63; ++i) |
| 367 | BCI_WRITE(BCI_CMD_WAIT); |
| 368 | dev_priv->waiting = 0; |
| 369 | } |
| 370 | |
| 371 | prim <<= 25; |
| 372 | while (n != 0) { |
| 373 | /* Can emit up to 255 indices (85 triangles) at once. */ |
| 374 | unsigned int count = n > 255 ? 255 : n; |
| 375 | if (reorder) { |
| 376 | /* Need to reorder indices for correct flat |
| 377 | * shading while preserving the clock sense |
| 378 | * for correct culling. Only on Savage3D. */ |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 379 | int reorder[3] = { -1, -1, -1 }; |
| 380 | reorder[start % 3] = 2; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 381 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 382 | BEGIN_BCI((count + 1 + 1) / 2); |
| 383 | BCI_DRAW_INDICES_S3D(count, prim, start + 2); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 384 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 385 | for (i = start + 1; i + 1 < start + count; i += 2) |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 386 | BCI_WRITE((i + reorder[i % 3]) | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 387 | ((i + 1 + |
| 388 | reorder[(i + 1) % 3]) << 16)); |
| 389 | if (i < start + count) |
| 390 | BCI_WRITE(i + reorder[i % 3]); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 391 | } else if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 392 | BEGIN_BCI((count + 1 + 1) / 2); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 393 | BCI_DRAW_INDICES_S3D(count, prim, start); |
| 394 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 395 | for (i = start + 1; i + 1 < start + count; i += 2) |
| 396 | BCI_WRITE(i | ((i + 1) << 16)); |
| 397 | if (i < start + count) |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 398 | BCI_WRITE(i); |
| 399 | } else { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 400 | BEGIN_BCI((count + 2 + 1) / 2); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 401 | BCI_DRAW_INDICES_S4(count, prim, skip); |
| 402 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 403 | for (i = start; i + 1 < start + count; i += 2) |
| 404 | BCI_WRITE(i | ((i + 1) << 16)); |
| 405 | if (i < start + count) |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 406 | BCI_WRITE(i); |
| 407 | } |
| 408 | |
| 409 | start += count; |
| 410 | n -= count; |
| 411 | |
| 412 | prim |= BCI_CMD_DRAW_CONT; |
| 413 | } |
| 414 | |
| 415 | return 0; |
| 416 | } |
| 417 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 418 | static int savage_dispatch_vb_prim(drm_savage_private_t * dev_priv, |
| 419 | const drm_savage_cmd_header_t * cmd_header, |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 420 | const uint32_t *vtxbuf, unsigned int vb_size, |
| 421 | unsigned int vb_stride) |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 422 | { |
| 423 | unsigned char reorder = 0; |
| 424 | unsigned int prim = cmd_header->prim.prim; |
| 425 | unsigned int skip = cmd_header->prim.skip; |
| 426 | unsigned int n = cmd_header->prim.count; |
| 427 | unsigned int start = cmd_header->prim.start; |
| 428 | unsigned int vtx_size; |
| 429 | unsigned int i; |
| 430 | DMA_LOCALS; |
| 431 | |
| 432 | if (!n) |
| 433 | return 0; |
| 434 | |
| 435 | switch (prim) { |
| 436 | case SAVAGE_PRIM_TRILIST_201: |
| 437 | reorder = 1; |
| 438 | prim = SAVAGE_PRIM_TRILIST; |
| 439 | case SAVAGE_PRIM_TRILIST: |
| 440 | if (n % 3 != 0) { |
| 441 | DRM_ERROR("wrong number of vertices %u in TRILIST\n", |
| 442 | n); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 443 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 444 | } |
| 445 | break; |
| 446 | case SAVAGE_PRIM_TRISTRIP: |
| 447 | case SAVAGE_PRIM_TRIFAN: |
| 448 | if (n < 3) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 449 | DRM_ERROR |
| 450 | ("wrong number of vertices %u in TRIFAN/STRIP\n", |
| 451 | n); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 452 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 453 | } |
| 454 | break; |
| 455 | default: |
| 456 | DRM_ERROR("invalid primitive type %u\n", prim); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 457 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 458 | } |
| 459 | |
| 460 | if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { |
| 461 | if (skip > SAVAGE_SKIP_ALL_S3D) { |
| 462 | DRM_ERROR("invalid skip flags 0x%04x\n", skip); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 463 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 464 | } |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 465 | vtx_size = 8; /* full vertex */ |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 466 | } else { |
| 467 | if (skip > SAVAGE_SKIP_ALL_S4) { |
| 468 | DRM_ERROR("invalid skip flags 0x%04x\n", skip); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 469 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 470 | } |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 471 | vtx_size = 10; /* full vertex */ |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 472 | } |
| 473 | |
| 474 | vtx_size -= (skip & 1) + (skip >> 1 & 1) + |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 475 | (skip >> 2 & 1) + (skip >> 3 & 1) + (skip >> 4 & 1) + |
| 476 | (skip >> 5 & 1) + (skip >> 6 & 1) + (skip >> 7 & 1); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 477 | |
| 478 | if (vtx_size > vb_stride) { |
| 479 | DRM_ERROR("vertex size greater than vb stride (%u > %u)\n", |
| 480 | vtx_size, vb_stride); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 481 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 482 | } |
| 483 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 484 | if (start + n > vb_size / (vb_stride * 4)) { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 485 | DRM_ERROR("vertex indices (%u-%u) out of range (0-%u)\n", |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 486 | start, start + n - 1, vb_size / (vb_stride * 4)); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 487 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 488 | } |
| 489 | |
| 490 | prim <<= 25; |
| 491 | while (n != 0) { |
| 492 | /* Can emit up to 255 vertices (85 triangles) at once. */ |
| 493 | unsigned int count = n > 255 ? 255 : n; |
| 494 | if (reorder) { |
| 495 | /* Need to reorder vertices for correct flat |
| 496 | * shading while preserving the clock sense |
| 497 | * for correct culling. Only on Savage3D. */ |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 498 | int reorder[3] = { -1, -1, -1 }; |
| 499 | reorder[start % 3] = 2; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 500 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 501 | BEGIN_DMA(count * vtx_size + 1); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 502 | DMA_DRAW_PRIMITIVE(count, prim, skip); |
| 503 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 504 | for (i = start; i < start + count; ++i) { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 505 | unsigned int j = i + reorder[i % 3]; |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 506 | DMA_COPY(&vtxbuf[vb_stride * j], vtx_size); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 507 | } |
| 508 | |
| 509 | DMA_COMMIT(); |
| 510 | } else { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 511 | BEGIN_DMA(count * vtx_size + 1); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 512 | DMA_DRAW_PRIMITIVE(count, prim, skip); |
| 513 | |
| 514 | if (vb_stride == vtx_size) { |
Dave Airlie | bc5f452 | 2007-11-05 12:50:58 +1000 | [diff] [blame] | 515 | DMA_COPY(&vtxbuf[vb_stride * start], |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 516 | vtx_size * count); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 517 | } else { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 518 | for (i = start; i < start + count; ++i) { |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 519 | DMA_COPY(&vtxbuf [vb_stride * i], |
| 520 | vtx_size); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 521 | } |
| 522 | } |
| 523 | |
| 524 | DMA_COMMIT(); |
| 525 | } |
| 526 | |
| 527 | start += count; |
| 528 | n -= count; |
| 529 | |
| 530 | prim |= BCI_CMD_DRAW_CONT; |
| 531 | } |
| 532 | |
| 533 | return 0; |
| 534 | } |
| 535 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 536 | static int savage_dispatch_dma_idx(drm_savage_private_t * dev_priv, |
| 537 | const drm_savage_cmd_header_t * cmd_header, |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 538 | const uint16_t *idx, |
Dave Airlie | 056219e | 2007-07-11 16:17:42 +1000 | [diff] [blame] | 539 | const struct drm_buf * dmabuf) |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 540 | { |
| 541 | unsigned char reorder = 0; |
| 542 | unsigned int prim = cmd_header->idx.prim; |
| 543 | unsigned int skip = cmd_header->idx.skip; |
| 544 | unsigned int n = cmd_header->idx.count; |
| 545 | unsigned int i; |
| 546 | BCI_LOCALS; |
| 547 | |
| 548 | if (!dmabuf) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 549 | DRM_ERROR("called without dma buffers!\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 550 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 551 | } |
| 552 | |
| 553 | if (!n) |
| 554 | return 0; |
| 555 | |
| 556 | switch (prim) { |
| 557 | case SAVAGE_PRIM_TRILIST_201: |
| 558 | reorder = 1; |
| 559 | prim = SAVAGE_PRIM_TRILIST; |
| 560 | case SAVAGE_PRIM_TRILIST: |
| 561 | if (n % 3 != 0) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 562 | DRM_ERROR("wrong number of indices %u in TRILIST\n", n); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 563 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 564 | } |
| 565 | break; |
| 566 | case SAVAGE_PRIM_TRISTRIP: |
| 567 | case SAVAGE_PRIM_TRIFAN: |
| 568 | if (n < 3) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 569 | DRM_ERROR |
| 570 | ("wrong number of indices %u in TRIFAN/STRIP\n", n); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 571 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 572 | } |
| 573 | break; |
| 574 | default: |
| 575 | DRM_ERROR("invalid primitive type %u\n", prim); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 576 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 577 | } |
| 578 | |
| 579 | if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { |
| 580 | if (skip != 0) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 581 | DRM_ERROR("invalid skip flags 0x%04x for DMA\n", skip); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 582 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 583 | } |
| 584 | } else { |
| 585 | unsigned int size = 10 - (skip & 1) - (skip >> 1 & 1) - |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 586 | (skip >> 2 & 1) - (skip >> 3 & 1) - (skip >> 4 & 1) - |
| 587 | (skip >> 5 & 1) - (skip >> 6 & 1) - (skip >> 7 & 1); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 588 | if (skip > SAVAGE_SKIP_ALL_S4 || size != 8) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 589 | DRM_ERROR("invalid skip flags 0x%04x for DMA\n", skip); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 590 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 591 | } |
| 592 | if (reorder) { |
| 593 | DRM_ERROR("TRILIST_201 used on Savage4 hardware\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 594 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 595 | } |
| 596 | } |
| 597 | |
| 598 | /* Vertex DMA doesn't work with command DMA at the same time, |
| 599 | * so we use BCI_... to submit commands here. Flush buffered |
| 600 | * faked DMA first. */ |
| 601 | DMA_FLUSH(); |
| 602 | |
| 603 | if (dmabuf->bus_address != dev_priv->state.common.vbaddr) { |
| 604 | BEGIN_BCI(2); |
| 605 | BCI_SET_REGISTERS(SAVAGE_VERTBUFADDR, 1); |
| 606 | BCI_WRITE(dmabuf->bus_address | dev_priv->dma_type); |
| 607 | dev_priv->state.common.vbaddr = dmabuf->bus_address; |
| 608 | } |
| 609 | if (S3_SAVAGE3D_SERIES(dev_priv->chipset) && dev_priv->waiting) { |
| 610 | /* Workaround for what looks like a hardware bug. If a |
| 611 | * WAIT_3D_IDLE was emitted some time before the |
| 612 | * indexed drawing command then the engine will lock |
| 613 | * up. There are two known workarounds: |
| 614 | * WAIT_IDLE_EMPTY or emit at least 63 NOPs. */ |
| 615 | BEGIN_BCI(63); |
| 616 | for (i = 0; i < 63; ++i) |
| 617 | BCI_WRITE(BCI_CMD_WAIT); |
| 618 | dev_priv->waiting = 0; |
| 619 | } |
| 620 | |
| 621 | prim <<= 25; |
| 622 | while (n != 0) { |
| 623 | /* Can emit up to 255 indices (85 triangles) at once. */ |
| 624 | unsigned int count = n > 255 ? 255 : n; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 625 | |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 626 | /* check indices */ |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 627 | for (i = 0; i < count; ++i) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 628 | if (idx[i] > dmabuf->total / 32) { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 629 | DRM_ERROR("idx[%u]=%u out of range (0-%u)\n", |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 630 | i, idx[i], dmabuf->total / 32); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 631 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 632 | } |
| 633 | } |
| 634 | |
| 635 | if (reorder) { |
| 636 | /* Need to reorder indices for correct flat |
| 637 | * shading while preserving the clock sense |
| 638 | * for correct culling. Only on Savage3D. */ |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 639 | int reorder[3] = { 2, -1, -1 }; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 640 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 641 | BEGIN_BCI((count + 1 + 1) / 2); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 642 | BCI_DRAW_INDICES_S3D(count, prim, idx[2]); |
| 643 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 644 | for (i = 1; i + 1 < count; i += 2) |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 645 | BCI_WRITE(idx[i + reorder[i % 3]] | |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 646 | (idx[i + 1 + |
| 647 | reorder[(i + 1) % 3]] << 16)); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 648 | if (i < count) |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 649 | BCI_WRITE(idx[i + reorder[i % 3]]); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 650 | } else if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 651 | BEGIN_BCI((count + 1 + 1) / 2); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 652 | BCI_DRAW_INDICES_S3D(count, prim, idx[0]); |
| 653 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 654 | for (i = 1; i + 1 < count; i += 2) |
| 655 | BCI_WRITE(idx[i] | (idx[i + 1] << 16)); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 656 | if (i < count) |
| 657 | BCI_WRITE(idx[i]); |
| 658 | } else { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 659 | BEGIN_BCI((count + 2 + 1) / 2); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 660 | BCI_DRAW_INDICES_S4(count, prim, skip); |
| 661 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 662 | for (i = 0; i + 1 < count; i += 2) |
| 663 | BCI_WRITE(idx[i] | (idx[i + 1] << 16)); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 664 | if (i < count) |
| 665 | BCI_WRITE(idx[i]); |
| 666 | } |
| 667 | |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 668 | idx += count; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 669 | n -= count; |
| 670 | |
| 671 | prim |= BCI_CMD_DRAW_CONT; |
| 672 | } |
| 673 | |
| 674 | return 0; |
| 675 | } |
| 676 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 677 | static int savage_dispatch_vb_idx(drm_savage_private_t * dev_priv, |
| 678 | const drm_savage_cmd_header_t * cmd_header, |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 679 | const uint16_t *idx, |
| 680 | const uint32_t *vtxbuf, |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 681 | unsigned int vb_size, unsigned int vb_stride) |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 682 | { |
| 683 | unsigned char reorder = 0; |
| 684 | unsigned int prim = cmd_header->idx.prim; |
| 685 | unsigned int skip = cmd_header->idx.skip; |
| 686 | unsigned int n = cmd_header->idx.count; |
| 687 | unsigned int vtx_size; |
| 688 | unsigned int i; |
| 689 | DMA_LOCALS; |
| 690 | |
| 691 | if (!n) |
| 692 | return 0; |
| 693 | |
| 694 | switch (prim) { |
| 695 | case SAVAGE_PRIM_TRILIST_201: |
| 696 | reorder = 1; |
| 697 | prim = SAVAGE_PRIM_TRILIST; |
| 698 | case SAVAGE_PRIM_TRILIST: |
| 699 | if (n % 3 != 0) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 700 | DRM_ERROR("wrong number of indices %u in TRILIST\n", n); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 701 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 702 | } |
| 703 | break; |
| 704 | case SAVAGE_PRIM_TRISTRIP: |
| 705 | case SAVAGE_PRIM_TRIFAN: |
| 706 | if (n < 3) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 707 | DRM_ERROR |
| 708 | ("wrong number of indices %u in TRIFAN/STRIP\n", n); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 709 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 710 | } |
| 711 | break; |
| 712 | default: |
| 713 | DRM_ERROR("invalid primitive type %u\n", prim); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 714 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 715 | } |
| 716 | |
| 717 | if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { |
| 718 | if (skip > SAVAGE_SKIP_ALL_S3D) { |
| 719 | DRM_ERROR("invalid skip flags 0x%04x\n", skip); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 720 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 721 | } |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 722 | vtx_size = 8; /* full vertex */ |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 723 | } else { |
| 724 | if (skip > SAVAGE_SKIP_ALL_S4) { |
| 725 | DRM_ERROR("invalid skip flags 0x%04x\n", skip); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 726 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 727 | } |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 728 | vtx_size = 10; /* full vertex */ |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 729 | } |
| 730 | |
| 731 | vtx_size -= (skip & 1) + (skip >> 1 & 1) + |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 732 | (skip >> 2 & 1) + (skip >> 3 & 1) + (skip >> 4 & 1) + |
| 733 | (skip >> 5 & 1) + (skip >> 6 & 1) + (skip >> 7 & 1); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 734 | |
| 735 | if (vtx_size > vb_stride) { |
| 736 | DRM_ERROR("vertex size greater than vb stride (%u > %u)\n", |
| 737 | vtx_size, vb_stride); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 738 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 739 | } |
| 740 | |
| 741 | prim <<= 25; |
| 742 | while (n != 0) { |
| 743 | /* Can emit up to 255 vertices (85 triangles) at once. */ |
| 744 | unsigned int count = n > 255 ? 255 : n; |
Dave Airlie | bc5f452 | 2007-11-05 12:50:58 +1000 | [diff] [blame] | 745 | |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 746 | /* Check indices */ |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 747 | for (i = 0; i < count; ++i) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 748 | if (idx[i] > vb_size / (vb_stride * 4)) { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 749 | DRM_ERROR("idx[%u]=%u out of range (0-%u)\n", |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 750 | i, idx[i], vb_size / (vb_stride * 4)); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 751 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 752 | } |
| 753 | } |
| 754 | |
| 755 | if (reorder) { |
| 756 | /* Need to reorder vertices for correct flat |
| 757 | * shading while preserving the clock sense |
| 758 | * for correct culling. Only on Savage3D. */ |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 759 | int reorder[3] = { 2, -1, -1 }; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 760 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 761 | BEGIN_DMA(count * vtx_size + 1); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 762 | DMA_DRAW_PRIMITIVE(count, prim, skip); |
| 763 | |
| 764 | for (i = 0; i < count; ++i) { |
| 765 | unsigned int j = idx[i + reorder[i % 3]]; |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 766 | DMA_COPY(&vtxbuf[vb_stride * j], vtx_size); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 767 | } |
| 768 | |
| 769 | DMA_COMMIT(); |
| 770 | } else { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 771 | BEGIN_DMA(count * vtx_size + 1); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 772 | DMA_DRAW_PRIMITIVE(count, prim, skip); |
| 773 | |
| 774 | for (i = 0; i < count; ++i) { |
| 775 | unsigned int j = idx[i]; |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 776 | DMA_COPY(&vtxbuf[vb_stride * j], vtx_size); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 777 | } |
| 778 | |
| 779 | DMA_COMMIT(); |
| 780 | } |
| 781 | |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 782 | idx += count; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 783 | n -= count; |
| 784 | |
| 785 | prim |= BCI_CMD_DRAW_CONT; |
| 786 | } |
| 787 | |
| 788 | return 0; |
| 789 | } |
| 790 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 791 | static int savage_dispatch_clear(drm_savage_private_t * dev_priv, |
| 792 | const drm_savage_cmd_header_t * cmd_header, |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 793 | const drm_savage_cmd_header_t *data, |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 794 | unsigned int nbox, |
Dave Airlie | eddca55 | 2007-07-11 16:09:54 +1000 | [diff] [blame] | 795 | const struct drm_clip_rect *boxes) |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 796 | { |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 797 | unsigned int flags = cmd_header->clear0.flags; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 798 | unsigned int clear_cmd; |
| 799 | unsigned int i, nbufs; |
| 800 | DMA_LOCALS; |
| 801 | |
| 802 | if (nbox == 0) |
| 803 | return 0; |
| 804 | |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 805 | clear_cmd = BCI_CMD_RECT | BCI_CMD_RECT_XP | BCI_CMD_RECT_YP | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 806 | BCI_CMD_SEND_COLOR | BCI_CMD_DEST_PBD_NEW; |
| 807 | BCI_CMD_SET_ROP(clear_cmd, 0xCC); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 808 | |
| 809 | nbufs = ((flags & SAVAGE_FRONT) ? 1 : 0) + |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 810 | ((flags & SAVAGE_BACK) ? 1 : 0) + ((flags & SAVAGE_DEPTH) ? 1 : 0); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 811 | if (nbufs == 0) |
| 812 | return 0; |
| 813 | |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 814 | if (data->clear1.mask != 0xffffffff) { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 815 | /* set mask */ |
| 816 | BEGIN_DMA(2); |
| 817 | DMA_SET_REGISTERS(SAVAGE_BITPLANEWTMASK, 1); |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 818 | DMA_WRITE(data->clear1.mask); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 819 | DMA_COMMIT(); |
| 820 | } |
| 821 | for (i = 0; i < nbox; ++i) { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 822 | unsigned int x, y, w, h; |
| 823 | unsigned int buf; |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 824 | x = boxes[i].x1, y = boxes[i].y1; |
| 825 | w = boxes[i].x2 - boxes[i].x1; |
| 826 | h = boxes[i].y2 - boxes[i].y1; |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 827 | BEGIN_DMA(nbufs * 6); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 828 | for (buf = SAVAGE_FRONT; buf <= SAVAGE_DEPTH; buf <<= 1) { |
| 829 | if (!(flags & buf)) |
| 830 | continue; |
| 831 | DMA_WRITE(clear_cmd); |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 832 | switch (buf) { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 833 | case SAVAGE_FRONT: |
| 834 | DMA_WRITE(dev_priv->front_offset); |
| 835 | DMA_WRITE(dev_priv->front_bd); |
| 836 | break; |
| 837 | case SAVAGE_BACK: |
| 838 | DMA_WRITE(dev_priv->back_offset); |
| 839 | DMA_WRITE(dev_priv->back_bd); |
| 840 | break; |
| 841 | case SAVAGE_DEPTH: |
| 842 | DMA_WRITE(dev_priv->depth_offset); |
| 843 | DMA_WRITE(dev_priv->depth_bd); |
| 844 | break; |
| 845 | } |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 846 | DMA_WRITE(data->clear1.value); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 847 | DMA_WRITE(BCI_X_Y(x, y)); |
| 848 | DMA_WRITE(BCI_W_H(w, h)); |
| 849 | } |
| 850 | DMA_COMMIT(); |
| 851 | } |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 852 | if (data->clear1.mask != 0xffffffff) { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 853 | /* reset mask */ |
| 854 | BEGIN_DMA(2); |
| 855 | DMA_SET_REGISTERS(SAVAGE_BITPLANEWTMASK, 1); |
| 856 | DMA_WRITE(0xffffffff); |
| 857 | DMA_COMMIT(); |
| 858 | } |
| 859 | |
| 860 | return 0; |
| 861 | } |
| 862 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 863 | static int savage_dispatch_swap(drm_savage_private_t * dev_priv, |
Dave Airlie | eddca55 | 2007-07-11 16:09:54 +1000 | [diff] [blame] | 864 | unsigned int nbox, const struct drm_clip_rect *boxes) |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 865 | { |
| 866 | unsigned int swap_cmd; |
| 867 | unsigned int i; |
| 868 | DMA_LOCALS; |
| 869 | |
| 870 | if (nbox == 0) |
| 871 | return 0; |
| 872 | |
| 873 | swap_cmd = BCI_CMD_RECT | BCI_CMD_RECT_XP | BCI_CMD_RECT_YP | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 874 | BCI_CMD_SRC_PBD_COLOR_NEW | BCI_CMD_DEST_GBD; |
| 875 | BCI_CMD_SET_ROP(swap_cmd, 0xCC); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 876 | |
| 877 | for (i = 0; i < nbox; ++i) { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 878 | BEGIN_DMA(6); |
| 879 | DMA_WRITE(swap_cmd); |
| 880 | DMA_WRITE(dev_priv->back_offset); |
| 881 | DMA_WRITE(dev_priv->back_bd); |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 882 | DMA_WRITE(BCI_X_Y(boxes[i].x1, boxes[i].y1)); |
| 883 | DMA_WRITE(BCI_X_Y(boxes[i].x1, boxes[i].y1)); |
| 884 | DMA_WRITE(BCI_W_H(boxes[i].x2 - boxes[i].x1, |
| 885 | boxes[i].y2 - boxes[i].y1)); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 886 | DMA_COMMIT(); |
| 887 | } |
| 888 | |
| 889 | return 0; |
| 890 | } |
| 891 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 892 | static int savage_dispatch_draw(drm_savage_private_t * dev_priv, |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 893 | const drm_savage_cmd_header_t *start, |
| 894 | const drm_savage_cmd_header_t *end, |
Dave Airlie | 056219e | 2007-07-11 16:17:42 +1000 | [diff] [blame] | 895 | const struct drm_buf * dmabuf, |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 896 | const unsigned int *vtxbuf, |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 897 | unsigned int vb_size, unsigned int vb_stride, |
| 898 | unsigned int nbox, |
Dave Airlie | eddca55 | 2007-07-11 16:09:54 +1000 | [diff] [blame] | 899 | const struct drm_clip_rect *boxes) |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 900 | { |
| 901 | unsigned int i, j; |
| 902 | int ret; |
| 903 | |
| 904 | for (i = 0; i < nbox; ++i) { |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 905 | const drm_savage_cmd_header_t *cmdbuf; |
| 906 | dev_priv->emit_clip_rect(dev_priv, &boxes[i]); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 907 | |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 908 | cmdbuf = start; |
| 909 | while (cmdbuf < end) { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 910 | drm_savage_cmd_header_t cmd_header; |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 911 | cmd_header = *cmdbuf; |
| 912 | cmdbuf++; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 913 | switch (cmd_header.cmd.cmd) { |
| 914 | case SAVAGE_CMD_DMA_PRIM: |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 915 | ret = savage_dispatch_dma_prim( |
| 916 | dev_priv, &cmd_header, dmabuf); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 917 | break; |
| 918 | case SAVAGE_CMD_VB_PRIM: |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 919 | ret = savage_dispatch_vb_prim( |
| 920 | dev_priv, &cmd_header, |
| 921 | vtxbuf, vb_size, vb_stride); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 922 | break; |
| 923 | case SAVAGE_CMD_DMA_IDX: |
| 924 | j = (cmd_header.idx.count + 3) / 4; |
| 925 | /* j was check in savage_bci_cmdbuf */ |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 926 | ret = savage_dispatch_dma_idx(dev_priv, |
| 927 | &cmd_header, (const uint16_t *)cmdbuf, |
| 928 | dmabuf); |
| 929 | cmdbuf += j; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 930 | break; |
| 931 | case SAVAGE_CMD_VB_IDX: |
| 932 | j = (cmd_header.idx.count + 3) / 4; |
| 933 | /* j was check in savage_bci_cmdbuf */ |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 934 | ret = savage_dispatch_vb_idx(dev_priv, |
| 935 | &cmd_header, (const uint16_t *)cmdbuf, |
Dave Airlie | bc5f452 | 2007-11-05 12:50:58 +1000 | [diff] [blame] | 936 | (const uint32_t *)vtxbuf, vb_size, |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 937 | vb_stride); |
| 938 | cmdbuf += j; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 939 | break; |
| 940 | default: |
| 941 | /* What's the best return code? EFAULT? */ |
| 942 | DRM_ERROR("IMPLEMENTATION ERROR: " |
| 943 | "non-drawing-command %d\n", |
| 944 | cmd_header.cmd.cmd); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 945 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 946 | } |
| 947 | |
| 948 | if (ret != 0) |
| 949 | return ret; |
| 950 | } |
| 951 | } |
| 952 | |
| 953 | return 0; |
| 954 | } |
| 955 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 956 | int savage_bci_cmdbuf(struct drm_device *dev, void *data, struct drm_file *file_priv) |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 957 | { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 958 | drm_savage_private_t *dev_priv = dev->dev_private; |
Dave Airlie | cdd55a2 | 2007-07-11 16:32:08 +1000 | [diff] [blame] | 959 | struct drm_device_dma *dma = dev->dma; |
Dave Airlie | 056219e | 2007-07-11 16:17:42 +1000 | [diff] [blame] | 960 | struct drm_buf *dmabuf; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 961 | drm_savage_cmdbuf_t *cmdbuf = data; |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 962 | drm_savage_cmd_header_t *kcmd_addr = NULL; |
| 963 | drm_savage_cmd_header_t *first_draw_cmd; |
| 964 | unsigned int *kvb_addr = NULL; |
Dave Airlie | eddca55 | 2007-07-11 16:09:54 +1000 | [diff] [blame] | 965 | struct drm_clip_rect *kbox_addr = NULL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 966 | unsigned int i, j; |
| 967 | int ret = 0; |
| 968 | |
| 969 | DRM_DEBUG("\n"); |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 970 | |
Eric Anholt | 6c340ea | 2007-08-25 20:23:09 +1000 | [diff] [blame] | 971 | LOCK_TEST_WITH_RETURN(dev, file_priv); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 972 | |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 973 | if (dma && dma->buflist) { |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 974 | if (cmdbuf->dma_idx > dma->buf_count) { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 975 | DRM_ERROR |
| 976 | ("vertex buffer index %u out of range (0-%u)\n", |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 977 | cmdbuf->dma_idx, dma->buf_count - 1); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 978 | return -EINVAL; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 979 | } |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 980 | dmabuf = dma->buflist[cmdbuf->dma_idx]; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 981 | } else { |
| 982 | dmabuf = NULL; |
| 983 | } |
| 984 | |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 985 | /* Copy the user buffers into kernel temporary areas. This hasn't been |
| 986 | * a performance loss compared to VERIFYAREA_READ/ |
| 987 | * COPY_FROM_USER_UNCHECKED when done in other drivers, and is correct |
| 988 | * for locking on FreeBSD. |
| 989 | */ |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 990 | if (cmdbuf->size) { |
Xi Wang | 6587eb8 | 2012-04-06 17:38:24 -0400 | [diff] [blame] | 991 | kcmd_addr = kmalloc_array(cmdbuf->size, 8, GFP_KERNEL); |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 992 | if (kcmd_addr == NULL) |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 993 | return -ENOMEM; |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 994 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 995 | if (DRM_COPY_FROM_USER(kcmd_addr, cmdbuf->cmd_addr, |
| 996 | cmdbuf->size * 8)) |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 997 | { |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 998 | kfree(kcmd_addr); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 999 | return -EFAULT; |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 1000 | } |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1001 | cmdbuf->cmd_addr = kcmd_addr; |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 1002 | } |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1003 | if (cmdbuf->vb_size) { |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 1004 | kvb_addr = kmalloc(cmdbuf->vb_size, GFP_KERNEL); |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 1005 | if (kvb_addr == NULL) { |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 1006 | ret = -ENOMEM; |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 1007 | goto done; |
| 1008 | } |
| 1009 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1010 | if (DRM_COPY_FROM_USER(kvb_addr, cmdbuf->vb_addr, |
| 1011 | cmdbuf->vb_size)) { |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 1012 | ret = -EFAULT; |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 1013 | goto done; |
| 1014 | } |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1015 | cmdbuf->vb_addr = kvb_addr; |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 1016 | } |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1017 | if (cmdbuf->nbox) { |
Xi Wang | 6587eb8 | 2012-04-06 17:38:24 -0400 | [diff] [blame] | 1018 | kbox_addr = kmalloc_array(cmdbuf->nbox, sizeof(struct drm_clip_rect), |
| 1019 | GFP_KERNEL); |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 1020 | if (kbox_addr == NULL) { |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 1021 | ret = -ENOMEM; |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 1022 | goto done; |
| 1023 | } |
| 1024 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1025 | if (DRM_COPY_FROM_USER(kbox_addr, cmdbuf->box_addr, |
| 1026 | cmdbuf->nbox * sizeof(struct drm_clip_rect))) { |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 1027 | ret = -EFAULT; |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 1028 | goto done; |
| 1029 | } |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1030 | cmdbuf->box_addr = kbox_addr; |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 1031 | } |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1032 | |
| 1033 | /* Make sure writes to DMA buffers are finished before sending |
| 1034 | * DMA commands to the graphics hardware. */ |
| 1035 | DRM_MEMORYBARRIER(); |
| 1036 | |
| 1037 | /* Coming from user space. Don't know if the Xserver has |
| 1038 | * emitted wait commands. Assuming the worst. */ |
| 1039 | dev_priv->waiting = 1; |
| 1040 | |
| 1041 | i = 0; |
| 1042 | first_draw_cmd = NULL; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1043 | while (i < cmdbuf->size) { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1044 | drm_savage_cmd_header_t cmd_header; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1045 | cmd_header = *(drm_savage_cmd_header_t *)cmdbuf->cmd_addr; |
| 1046 | cmdbuf->cmd_addr++; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1047 | i++; |
| 1048 | |
| 1049 | /* Group drawing commands with same state to minimize |
| 1050 | * iterations over clip rects. */ |
| 1051 | j = 0; |
| 1052 | switch (cmd_header.cmd.cmd) { |
| 1053 | case SAVAGE_CMD_DMA_IDX: |
| 1054 | case SAVAGE_CMD_VB_IDX: |
| 1055 | j = (cmd_header.idx.count + 3) / 4; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1056 | if (i + j > cmdbuf->size) { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1057 | DRM_ERROR("indexed drawing command extends " |
| 1058 | "beyond end of command buffer\n"); |
| 1059 | DMA_FLUSH(); |
Julia Lawall | f104876 | 2012-03-17 18:57:02 +0100 | [diff] [blame] | 1060 | ret = -EINVAL; |
| 1061 | goto done; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1062 | } |
| 1063 | /* fall through */ |
| 1064 | case SAVAGE_CMD_DMA_PRIM: |
| 1065 | case SAVAGE_CMD_VB_PRIM: |
| 1066 | if (!first_draw_cmd) |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1067 | first_draw_cmd = cmdbuf->cmd_addr - 1; |
| 1068 | cmdbuf->cmd_addr += j; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1069 | i += j; |
| 1070 | break; |
| 1071 | default: |
| 1072 | if (first_draw_cmd) { |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 1073 | ret = savage_dispatch_draw( |
| 1074 | dev_priv, first_draw_cmd, |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1075 | cmdbuf->cmd_addr - 1, |
| 1076 | dmabuf, cmdbuf->vb_addr, cmdbuf->vb_size, |
| 1077 | cmdbuf->vb_stride, |
| 1078 | cmdbuf->nbox, cmdbuf->box_addr); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1079 | if (ret != 0) |
Julia Lawall | f104876 | 2012-03-17 18:57:02 +0100 | [diff] [blame] | 1080 | goto done; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1081 | first_draw_cmd = NULL; |
| 1082 | } |
| 1083 | } |
| 1084 | if (first_draw_cmd) |
| 1085 | continue; |
| 1086 | |
| 1087 | switch (cmd_header.cmd.cmd) { |
| 1088 | case SAVAGE_CMD_STATE: |
| 1089 | j = (cmd_header.state.count + 1) / 2; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1090 | if (i + j > cmdbuf->size) { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1091 | DRM_ERROR("command SAVAGE_CMD_STATE extends " |
| 1092 | "beyond end of command buffer\n"); |
| 1093 | DMA_FLUSH(); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 1094 | ret = -EINVAL; |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 1095 | goto done; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1096 | } |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 1097 | ret = savage_dispatch_state(dev_priv, &cmd_header, |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1098 | (const uint32_t *)cmdbuf->cmd_addr); |
| 1099 | cmdbuf->cmd_addr += j; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1100 | i += j; |
| 1101 | break; |
| 1102 | case SAVAGE_CMD_CLEAR: |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1103 | if (i + 1 > cmdbuf->size) { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1104 | DRM_ERROR("command SAVAGE_CMD_CLEAR extends " |
| 1105 | "beyond end of command buffer\n"); |
| 1106 | DMA_FLUSH(); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 1107 | ret = -EINVAL; |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 1108 | goto done; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1109 | } |
| 1110 | ret = savage_dispatch_clear(dev_priv, &cmd_header, |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1111 | cmdbuf->cmd_addr, |
| 1112 | cmdbuf->nbox, |
| 1113 | cmdbuf->box_addr); |
| 1114 | cmdbuf->cmd_addr++; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1115 | i++; |
| 1116 | break; |
| 1117 | case SAVAGE_CMD_SWAP: |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1118 | ret = savage_dispatch_swap(dev_priv, cmdbuf->nbox, |
| 1119 | cmdbuf->box_addr); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1120 | break; |
| 1121 | default: |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1122 | DRM_ERROR("invalid command 0x%x\n", |
| 1123 | cmd_header.cmd.cmd); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1124 | DMA_FLUSH(); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 1125 | ret = -EINVAL; |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 1126 | goto done; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1127 | } |
| 1128 | |
| 1129 | if (ret != 0) { |
| 1130 | DMA_FLUSH(); |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 1131 | goto done; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1132 | } |
| 1133 | } |
| 1134 | |
| 1135 | if (first_draw_cmd) { |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 1136 | ret = savage_dispatch_draw ( |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1137 | dev_priv, first_draw_cmd, cmdbuf->cmd_addr, dmabuf, |
| 1138 | cmdbuf->vb_addr, cmdbuf->vb_size, cmdbuf->vb_stride, |
| 1139 | cmdbuf->nbox, cmdbuf->box_addr); |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1140 | if (ret != 0) { |
| 1141 | DMA_FLUSH(); |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 1142 | goto done; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1143 | } |
| 1144 | } |
| 1145 | |
| 1146 | DMA_FLUSH(); |
| 1147 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1148 | if (dmabuf && cmdbuf->discard) { |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1149 | drm_savage_buf_priv_t *buf_priv = dmabuf->dev_private; |
| 1150 | uint16_t event; |
| 1151 | event = savage_bci_emit_event(dev_priv, SAVAGE_WAIT_3D); |
| 1152 | SET_AGE(&buf_priv->age, event, dev_priv->event_wrap); |
| 1153 | savage_freelist_put(dev, dmabuf); |
| 1154 | } |
| 1155 | |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 1156 | done: |
| 1157 | /* If we didn't need to allocate them, these'll be NULL */ |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 1158 | kfree(kcmd_addr); |
| 1159 | kfree(kvb_addr); |
| 1160 | kfree(kbox_addr); |
Dave Airlie | 3528af1 | 2006-01-02 16:11:44 +1100 | [diff] [blame] | 1161 | |
| 1162 | return ret; |
Dave Airlie | 282a167 | 2005-08-07 15:43:54 +1000 | [diff] [blame] | 1163 | } |