Luca Weiss | 9b02244 | 2023-04-14 14:47:36 +0200 | [diff] [blame^] | 1 | #include <dt-bindings/gpio/gpio.h> |
| 2 | #include <dt-bindings/iio/qcom,spmi-vadc.h> |
| 3 | #include <dt-bindings/input/input.h> |
| 4 | #include "bengal-thermal-overlay.dtsi" |
| 5 | #include "camera/khaje-camera-sensor-qrd.dtsi" |
| 6 | #include "bengal-audio-overlay.dtsi" |
| 7 | #include "khaje-sde-display.dtsi" |
| 8 | |
| 9 | &pm6125_gpios { |
| 10 | key_vol_up { |
| 11 | key_vol_up_default: key_vol_up_default { |
| 12 | pins = "gpio5"; |
| 13 | function = "normal"; |
| 14 | input-enable; |
| 15 | bias-pull-up; |
| 16 | power-source = <0>; |
| 17 | }; |
| 18 | }; |
| 19 | |
| 20 | eldo9_pin { |
| 21 | usb_eldo9:gpio@c000 { |
| 22 | pins = "gpio1"; |
| 23 | function = "normal"; |
| 24 | qcom,drive-strength = <2>; |
| 25 | power-source = <0>; |
| 26 | bias-disable; |
| 27 | output-high; |
| 28 | }; |
| 29 | }; |
| 30 | }; |
| 31 | |
| 32 | &soc { |
| 33 | gpio_keys { |
| 34 | compatible = "gpio-keys"; |
| 35 | label = "gpio-keys"; |
| 36 | |
| 37 | pinctrl-names = "default"; |
| 38 | pinctrl-0 = <&key_vol_up_default>; |
| 39 | |
| 40 | vol_up { |
| 41 | label = "volume_up"; |
| 42 | gpios = <&pm6125_gpios 5 GPIO_ACTIVE_LOW>; |
| 43 | linux,input-type = <1>; |
| 44 | linux,code = <KEY_VOLUMEUP>; |
| 45 | linux,can-disable; |
| 46 | debounce-interval = <15>; |
| 47 | gpio-key,wakeup; |
| 48 | }; |
| 49 | }; |
| 50 | |
| 51 | vdda_usb_ss_dp_core: vdda_usb_ss_dp_core { |
| 52 | compatible = "regulator-fixed"; |
| 53 | regulator-name = "vdd_supply"; |
| 54 | regulator-min-microvolt = <880000>; |
| 55 | regulator-max-microvolt = <880000>; |
| 56 | enable-active-high; |
| 57 | gpio = <&pm6125_gpios 1 GPIO_ACTIVE_HIGH>; |
| 58 | pinctrl-names = "default"; |
| 59 | pinctrl-0 = <&usb_eldo9>; |
| 60 | }; |
| 61 | }; |
| 62 | |
| 63 | &usb_qmp_dp_phy { |
| 64 | vdd-supply = <&vdda_usb_ss_dp_core>; |
| 65 | }; |
| 66 | |
| 67 | &qupv3_se1_i2c { |
| 68 | awinic@64 { |
| 69 | compatible = "awinic,aw2016_led"; |
| 70 | reg = <0x64>; |
| 71 | |
| 72 | awinic,red { |
| 73 | awinic,name = "red"; |
| 74 | awinic,id = <0>; |
| 75 | awinic,imax = <2>; |
| 76 | awinic,led-current = <3>; |
| 77 | awinic,max-brightness = <255>; |
| 78 | awinic,rise-time-ms = <6>; |
| 79 | awinic,hold-time-ms = <0>; |
| 80 | awinic,fall-time-ms = <6>; |
| 81 | awinic,off-time-ms = <4>; |
| 82 | }; |
| 83 | |
| 84 | awinic,green { |
| 85 | awinic,name = "green"; |
| 86 | awinic,id = <1>; |
| 87 | awinic,imax = <2>; |
| 88 | awinic,led-current = <3>; |
| 89 | awinic,max-brightness = <255>; |
| 90 | awinic,rise-time-ms = <6>; |
| 91 | awinic,hold-time-ms = <0>; |
| 92 | awinic,fall-time-ms = <6>; |
| 93 | awinic,off-time-ms = <4>; |
| 94 | }; |
| 95 | |
| 96 | awinic,blue { |
| 97 | awinic,name = "blue"; |
| 98 | awinic,id = <2>; |
| 99 | awinic,imax = <2>; |
| 100 | awinic,led-current = <3>; |
| 101 | awinic,max-brightness = <255>; |
| 102 | awinic,rise-time-ms = <6>; |
| 103 | awinic,hold-time-ms = <0>; |
| 104 | awinic,fall-time-ms = <6>; |
| 105 | awinic,off-time-ms = <4>; |
| 106 | }; |
| 107 | |
| 108 | }; |
| 109 | }; |
| 110 | |
| 111 | &bengal_snd { |
| 112 | qcom,model = "bengal-qrd-snd-card"; |
| 113 | qcom,msm-mi2s-master = <1>, <1>, <1>, <1>; |
| 114 | qcom,wcn-btfm = <1>; |
| 115 | qcom,ext-disp-audio-rx = <0>; |
| 116 | qcom,audio-routing = |
| 117 | "AMIC1", "MIC BIAS1", |
| 118 | "MIC BIAS1", "Analog Mic1", |
| 119 | "AMIC2", "MIC BIAS2", |
| 120 | "MIC BIAS2", "Analog Mic2", |
| 121 | "AMIC3", "MIC BIAS3", |
| 122 | "MIC BIAS3", "Analog Mic3", |
| 123 | "AMIC4", "MIC BIAS3", |
| 124 | "MIC BIAS3", "Analog Mic4", |
| 125 | "IN1_HPHL", "HPHL_OUT", |
| 126 | "IN2_HPHR", "HPHR_OUT", |
| 127 | "IN3_AUX", "AUX_OUT", |
| 128 | "SpkrMono WSA_IN", "AUX", |
| 129 | "TX SWR_MIC0", "ADC1_OUTPUT", |
| 130 | "TX SWR_MIC4", "ADC2_OUTPUT", |
| 131 | "TX SWR_MIC5", "ADC3_OUTPUT", |
| 132 | "TX SWR_MIC0", "VA_TX_SWR_CLK", |
| 133 | "TX SWR_MIC1", "VA_TX_SWR_CLK", |
| 134 | "TX SWR_MIC2", "VA_TX_SWR_CLK", |
| 135 | "TX SWR_MIC3", "VA_TX_SWR_CLK", |
| 136 | "TX SWR_MIC4", "VA_TX_SWR_CLK", |
| 137 | "TX SWR_MIC5", "VA_TX_SWR_CLK", |
| 138 | "TX SWR_MIC6", "VA_TX_SWR_CLK", |
| 139 | "TX SWR_MIC7", "VA_TX_SWR_CLK", |
| 140 | "TX SWR_MIC8", "VA_TX_SWR_CLK", |
| 141 | "TX SWR_MIC9", "VA_TX_SWR_CLK", |
| 142 | "TX SWR_MIC10", "VA_TX_SWR_CLK", |
| 143 | "TX SWR_MIC11", "VA_TX_SWR_CLK", |
| 144 | "RX_TX DEC0_INP", "TX DEC0 MUX", |
| 145 | "RX_TX DEC1_INP", "TX DEC1 MUX", |
| 146 | "RX_TX DEC2_INP", "TX DEC2 MUX", |
| 147 | "RX_TX DEC3_INP", "TX DEC3 MUX", |
| 148 | "TX_AIF1 CAP", "VA_TX_SWR_CLK", |
| 149 | "TX_AIF2 CAP", "VA_TX_SWR_CLK", |
| 150 | "TX_AIF3 CAP", "VA_TX_SWR_CLK", |
| 151 | "VA SWR_MIC0", "ADC1_OUTPUT", |
| 152 | "VA SWR_MIC4", "ADC2_OUTPUT", |
| 153 | "VA SWR_MIC5", "ADC3_OUTPUT"; |
| 154 | qcom,msm-mbhc-hphl-swh = <1>; |
| 155 | qcom,msm-mbhc-gnd-swh = <1>; |
| 156 | asoc-codec = <&stub_codec>, <&bolero>; |
| 157 | asoc-codec-names = "msm-stub-codec.1", "bolero_codec"; |
| 158 | qcom,wsa-max-devs = <1>; |
| 159 | qcom,wsa-devs = <&wsa881x_i2c_e>; |
| 160 | qcom,wsa-aux-dev-prefix = "SpkrMono"; |
| 161 | qcom,codec-max-aux-devs = <1>; |
| 162 | qcom,codec-aux-devs = <&wcd937x_codec>; |
| 163 | qcom,msm_audio_ssr_devs = <&audio_apr>, <&q6core>, <&bolero>, |
| 164 | <&lpi_tlmm>; |
| 165 | }; |
| 166 | |
| 167 | &qupv3_se1_i2c { |
| 168 | status = "ok"; |
| 169 | #address-cells = <1>; |
| 170 | #size-cells = <0>; |
| 171 | nq@28 { |
| 172 | compatible = "qcom,nq-nci"; |
| 173 | reg = <0x28>; |
| 174 | qcom,nq-irq = <&tlmm 70 0x00>; |
| 175 | qcom,nq-ven = <&tlmm 69 0x00>; |
| 176 | qcom,nq-firm = <&tlmm 31 0x00>; |
| 177 | qcom,nq-clkreq = <&tlmm 71 0x00>; |
| 178 | interrupt-parent = <&tlmm>; |
| 179 | interrupts = <70 0>; |
| 180 | interrupt-names = "nfc_irq"; |
| 181 | pinctrl-names = "nfc_active", "nfc_suspend"; |
| 182 | pinctrl-0 = <&nfc_int_active &nfc_enable_active |
| 183 | &nfc_clk_req_active>; |
| 184 | pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend |
| 185 | &nfc_clk_req_suspend>; |
| 186 | }; |
| 187 | }; |
| 188 | |
| 189 | &sdhc_1 { |
| 190 | vdd-supply = <&L24A>; |
| 191 | qcom,vdd-voltage-level = <2960000 2960000>; |
| 192 | qcom,vdd-current-level = <0 570000>; |
| 193 | |
| 194 | vdd-io-supply = <&L11A>; |
| 195 | qcom,vdd-io-always-on; |
| 196 | qcom,vdd-io-lpm-sup; |
| 197 | qcom,vdd-io-voltage-level = <1800000 1800000>; |
| 198 | qcom,vdd-io-current-level = <0 325000>; |
| 199 | |
| 200 | pinctrl-names = "active", "sleep"; |
| 201 | pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on |
| 202 | &sdc1_rclk_on>; |
| 203 | pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off |
| 204 | &sdc1_rclk_off>; |
| 205 | |
| 206 | status = "ok"; |
| 207 | }; |
| 208 | |
| 209 | &sdhc_2 { |
| 210 | vdd-supply = <&L22A>; |
| 211 | qcom,vdd-voltage-level = <2960000 2960000>; |
| 212 | qcom,vdd-current-level = <0 800000>; |
| 213 | |
| 214 | vdd-io-supply = <&L5A>; |
| 215 | qcom,vdd-io-voltage-level = <1800000 2960000>; |
| 216 | qcom,vdd-io-current-level = <0 22000>; |
| 217 | |
| 218 | vdd-io-bias-supply = <&L7A>; |
| 219 | qcom,vdd-io-bias-voltage-level = <1256000 1256000>; |
| 220 | qcom,vdd-io-bias-current-level = <0 6000>; |
| 221 | |
| 222 | pinctrl-names = "active", "sleep"; |
| 223 | pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>; |
| 224 | pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>; |
| 225 | |
| 226 | cd-gpios = <&tlmm 88 GPIO_ACTIVE_LOW>; |
| 227 | |
| 228 | status = "ok"; |
| 229 | }; |
| 230 | |
| 231 | &ufsphy_mem { |
| 232 | compatible = "qcom,ufs-phy-qmp-v4"; |
| 233 | |
| 234 | vdda-phy-supply = <&L4A>; /* 0.9v */ |
| 235 | vdda-pll-supply = <&L18A>; /* 1.8v */ |
| 236 | vdda-phy-max-microamp = <85700>; |
| 237 | vdda-pll-max-microamp = <18300>; |
| 238 | |
| 239 | status = "ok"; |
| 240 | }; |
| 241 | |
| 242 | &ufshc_mem { |
| 243 | vdd-hba-supply = <&gcc_ufs_phy_gdsc>; |
| 244 | vdd-hba-fixed-regulator; |
| 245 | vcc-supply = <&L24A>; |
| 246 | vcc-voltage-level = <2950000 2960000>; |
| 247 | vccq2-supply = <&L11A>; |
| 248 | vccq2-voltage-level = <1800000 1800000>; |
| 249 | vcc-max-microamp = <800000>; |
| 250 | vccq2-max-microamp = <800000>; |
| 251 | vccq2-pwr-collapse-sup; |
| 252 | |
| 253 | qcom,vddp-ref-clk-supply = <&L18A>; |
| 254 | qcom,vddp-ref-clk-max-microamp = <100>; |
| 255 | qcom,vddp-ref-clk-min-uV = <1232000>; |
| 256 | qcom,vddp-ref-clk-max-uV = <1232000>; |
| 257 | |
| 258 | status = "ok"; |
| 259 | }; |
| 260 | |
| 261 | &pm6125_pwm { |
| 262 | status = "ok"; |
| 263 | }; |
| 264 | |
| 265 | &dsi_td4330_truly_v2_video { |
| 266 | qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; |
| 267 | qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm"; |
| 268 | pwms = <&pm6125_pwm 0 0>; |
| 269 | qcom,bl-pmic-pwm-period-usecs = <100>; |
| 270 | qcom,mdss-dsi-bl-min-level = <1>; |
| 271 | qcom,mdss-dsi-bl-max-level = <4095>; |
| 272 | qcom,platform-reset-gpio = <&tlmm 82 0>; |
| 273 | }; |
| 274 | |
| 275 | &dsi_td4330_truly_v2_cmd { |
| 276 | qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; |
| 277 | qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm"; |
| 278 | pwms = <&pm6125_pwm 0 0>; |
| 279 | qcom,bl-pmic-pwm-period-usecs = <100>; |
| 280 | qcom,mdss-dsi-bl-min-level = <1>; |
| 281 | qcom,mdss-dsi-bl-max-level = <4095>; |
| 282 | qcom,platform-te-gpio = <&tlmm 81 0>; |
| 283 | qcom,platform-reset-gpio = <&tlmm 82 0>; |
| 284 | }; |
| 285 | |
| 286 | &dsi_sim_vid { |
| 287 | qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; |
| 288 | qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; |
| 289 | qcom,platform-reset-gpio = <&tlmm 82 0>; |
| 290 | }; |
| 291 | |
| 292 | &sde_dsi { |
| 293 | qcom,dsi-default-panel = <&dsi_td4330_truly_v2_video>; |
| 294 | }; |
| 295 | |
| 296 | &qupv3_se2_i2c { |
| 297 | status = "okay"; |
| 298 | qcom,i2c-touch-active="synaptics,tcm-i2c"; |
| 299 | |
| 300 | synaptics_tcm@20 { |
| 301 | compatible = "synaptics,tcm-i2c"; |
| 302 | reg = <0x20>; |
| 303 | interrupt-parent = <&tlmm>; |
| 304 | interrupts = <80 0x2008>; |
| 305 | pinctrl-names = "pmx_ts_active","pmx_ts_suspend", |
| 306 | "pmx_ts_release"; |
| 307 | pinctrl-0 = <&ts_int_active &ts_reset_active>; |
| 308 | pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>; |
| 309 | pinctrl-2 = <&ts_release>; |
| 310 | synaptics,irq-gpio = <&tlmm 80 0x2008>; |
| 311 | synaptics,irq-on-state = <0>; |
| 312 | synaptics,reset-gpio = <&tlmm 86 0x00>; |
| 313 | synaptics,reset-on-state = <0>; |
| 314 | synaptics,reset-active-ms = <20>; |
| 315 | synaptics,reset-delay-ms = <200>; |
| 316 | synaptics,power-delay-ms = <200>; |
| 317 | synaptics,ubl-i2c-addr = <0x20>; |
| 318 | synaptics,extend_report; |
| 319 | synaptics,firmware-name = "synaptics_firmware_k.img"; |
| 320 | |
| 321 | panel = <&dsi_td4330_truly_v2_video &dsi_td4330_truly_v2_cmd>; |
| 322 | }; |
| 323 | }; |
| 324 | |
| 325 | &thermal_zones { |
| 326 | quiet-thermal-step { |
| 327 | polling-delay-passive = <2000>; |
| 328 | polling-delay = <0>; |
| 329 | thermal-governor = "step_wise"; |
| 330 | thermal-sensors = <&pm6125_adc_tm ADC_AMUX_THM2_PU2>; |
| 331 | wake-capable-sensor; |
| 332 | |
| 333 | trips { |
| 334 | quiet_batt_trip0: batt-trip0 { |
| 335 | temperature = <41000>; |
| 336 | hysteresis = <2000>; |
| 337 | type = "passive"; |
| 338 | }; |
| 339 | |
| 340 | quiet_modem_trip0: modem-trip0 { |
| 341 | temperature = <42000>; |
| 342 | hysteresis = <2000>; |
| 343 | type = "passive"; |
| 344 | }; |
| 345 | |
| 346 | quiet_batt_trip1: batt-trip1 { |
| 347 | temperature = <43000>; |
| 348 | hysteresis = <2000>; |
| 349 | type = "passive"; |
| 350 | }; |
| 351 | |
| 352 | quiet_batt_trip2: batt-trip2 { |
| 353 | temperature = <45000>; |
| 354 | hysteresis = <2000>; |
| 355 | type = "passive"; |
| 356 | }; |
| 357 | |
| 358 | quiet_gold_trip: gold-trip { |
| 359 | temperature = <47000>; |
| 360 | hysteresis = <0>; |
| 361 | type = "passive"; |
| 362 | }; |
| 363 | |
| 364 | quiet_batt_trip3: batt-trip3 { |
| 365 | temperature = <47000>; |
| 366 | hysteresis = <2000>; |
| 367 | type = "passive"; |
| 368 | }; |
| 369 | |
| 370 | quiet_batt_trip4: batt-trip4 { |
| 371 | temperature = <48000>; |
| 372 | hysteresis = <1000>; |
| 373 | type = "passive"; |
| 374 | }; |
| 375 | |
| 376 | quiet_gpu_trip: gpu-trip { |
| 377 | temperature = <48000>; |
| 378 | hysteresis = <4000>; |
| 379 | type = "passive"; |
| 380 | }; |
| 381 | |
| 382 | quiet_silver_trip: silver-trip { |
| 383 | temperature = <50000>; |
| 384 | hysteresis = <0>; |
| 385 | type = "passive"; |
| 386 | }; |
| 387 | |
| 388 | quiet_hvx_trip: hvx-trip { |
| 389 | temperature = <52000>; |
| 390 | hysteresis = <4000>; |
| 391 | type = "passive"; |
| 392 | }; |
| 393 | |
| 394 | quiet_modem_trip1: modem-trip1 { |
| 395 | temperature = <60000>; |
| 396 | hysteresis = <4000>; |
| 397 | type = "passive"; |
| 398 | }; |
| 399 | }; |
| 400 | |
| 401 | cooling-maps { |
| 402 | gold_cdev { |
| 403 | trip = <&quiet_gold_trip>; |
| 404 | /* limit to 1766400khz */ |
| 405 | cooling-device = <&CPU4 THERMAL_NO_LIMIT |
| 406 | (THERMAL_MAX_LIMIT-4)>; |
| 407 | }; |
| 408 | |
| 409 | silver_cdev { |
| 410 | trip = <&quiet_silver_trip>; |
| 411 | /* limit to 1516800khz */ |
| 412 | cooling-device = <&CPU0 THERMAL_NO_LIMIT |
| 413 | (THERMAL_MAX_LIMIT-4)>; |
| 414 | }; |
| 415 | |
| 416 | gpu_cdev { |
| 417 | trip = <&quiet_gpu_trip>; |
| 418 | /* limit 785000000hz */ |
| 419 | cooling-device = <&msm_gpu THERMAL_NO_LIMIT |
| 420 | (THERMAL_MAX_LIMIT-3)>; |
| 421 | }; |
| 422 | |
| 423 | hvx_cdev { |
| 424 | trip = <&quiet_hvx_trip>; |
| 425 | cooling-device = <&cdsp_sw 4 4>; |
| 426 | }; |
| 427 | |
| 428 | mdm_cdev0 { |
| 429 | trip = <&quiet_modem_trip0>; |
| 430 | cooling-device = <&modem_proc 1 1>; |
| 431 | }; |
| 432 | |
| 433 | mdm_cdev1 { |
| 434 | trip = <&quiet_modem_trip1>; |
| 435 | cooling-device = <&modem_proc 3 3>; |
| 436 | }; |
| 437 | }; |
| 438 | }; |
| 439 | |
| 440 | pa-therm0-step { |
| 441 | polling-delay-passive = <0>; |
| 442 | polling-delay = <0>; |
| 443 | thermal-governor = "step_wise"; |
| 444 | thermal-sensors = <&pm6125_adc_tm ADC_AMUX_THM1_PU2>; |
| 445 | wake-capable-sensor; |
| 446 | |
| 447 | trips { |
| 448 | pa_therm0_trip0: pa-therm0-trip0 { |
| 449 | temperature = <52000>; |
| 450 | hysteresis = <2000>; |
| 451 | type = "passive"; |
| 452 | }; |
| 453 | |
| 454 | pa_therm0_trip1: pa-therm0-trip1 { |
| 455 | temperature = <54000>; |
| 456 | hysteresis = <2000>; |
| 457 | type = "passive"; |
| 458 | }; |
| 459 | |
| 460 | pa_therm0_trip2: pa-therm0-trip2 { |
| 461 | temperature = <60000>; |
| 462 | hysteresis = <4000>; |
| 463 | type = "passive"; |
| 464 | }; |
| 465 | }; |
| 466 | |
| 467 | cooling-maps { |
| 468 | modem_cdev0 { |
| 469 | trip = <&pa_therm0_trip0>; |
| 470 | cooling-device = <&modem_pa 1 1>; |
| 471 | }; |
| 472 | |
| 473 | modem_cdev1 { |
| 474 | trip = <&pa_therm0_trip1>; |
| 475 | cooling-device = <&modem_pa 2 2>; |
| 476 | }; |
| 477 | |
| 478 | modem_cdev2 { |
| 479 | trip = <&pa_therm0_trip2>; |
| 480 | cooling-device = <&modem_pa 3 3>; |
| 481 | }; |
| 482 | }; |
| 483 | }; |
| 484 | }; |
| 485 | |
| 486 | &tlmm { |
| 487 | fpc_reset_int: fpc_reset_int { |
| 488 | fpc_reset_low: reset_low { |
| 489 | mux { |
| 490 | pins = "gpio104"; |
| 491 | function = "gpio"; |
| 492 | }; |
| 493 | |
| 494 | config { |
| 495 | pins = "gpio104"; |
| 496 | drive-strength = <2>; |
| 497 | bias-disable; |
| 498 | output-low; |
| 499 | }; |
| 500 | }; |
| 501 | |
| 502 | fpc_reset_high: reset_high { |
| 503 | mux { |
| 504 | pins = "gpio104"; |
| 505 | function = "gpio"; |
| 506 | }; |
| 507 | |
| 508 | config { |
| 509 | pins = "gpio104"; |
| 510 | drive-strength = <2>; |
| 511 | bias-disable; |
| 512 | output-high; |
| 513 | }; |
| 514 | }; |
| 515 | |
| 516 | fpc_int_low: int_low { |
| 517 | mux { |
| 518 | pins = "gpio97"; |
| 519 | function = "gpio"; |
| 520 | }; |
| 521 | |
| 522 | config { |
| 523 | pins = "gpio97"; |
| 524 | drive-strength = <2>; |
| 525 | bias-pull-down; |
| 526 | input-enable; |
| 527 | }; |
| 528 | }; |
| 529 | }; |
| 530 | }; |
| 531 | |
| 532 | &soc { |
| 533 | fingerprint: fpc1020 { |
| 534 | compatible = "fpc,fpc1020"; |
| 535 | interrupt-parent = <&tlmm>; |
| 536 | interrupts = <97 0>; |
| 537 | fpc,gpio_rst = <&tlmm 104 0>; |
| 538 | fpc,gpio_irq = <&tlmm 97 0>; |
| 539 | fpc,enable-on-boot; |
| 540 | pinctrl-names = "fpc1020_reset_reset", |
| 541 | "fpc1020_reset_active", |
| 542 | "fpc1020_irq_active"; |
| 543 | pinctrl-0 = <&fpc_reset_low>; |
| 544 | pinctrl-1 = <&fpc_reset_high>; |
| 545 | pinctrl-2 = <&fpc_int_low>; |
| 546 | }; |
| 547 | }; |