Luca Weiss | 9b02244 | 2023-04-14 14:47:36 +0200 | [diff] [blame^] | 1 | &soc { |
| 2 | tlmm: pinctrl@500000 { |
| 3 | compatible = "qcom,scuba-pinctrl"; |
| 4 | reg = <0x500000 0x300000>; |
| 5 | interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; |
| 6 | gpio-controller; |
| 7 | #gpio-cells = <2>; |
| 8 | interrupt-controller; |
| 9 | #interrupt-cells = <2>; |
| 10 | wakeup-parent = <&wakegpio>; |
| 11 | irqdomain-map = <0 0 &wakegpio 84 0>, |
| 12 | <3 0 &wakegpio 75 0>, |
| 13 | <4 0 &wakegpio 16 0>, |
| 14 | <6 0 &wakegpio 59 0>, |
| 15 | <8 0 &wakegpio 63 0>, |
| 16 | <11 0 &wakegpio 17 0>, |
| 17 | <13 0 &wakegpio 18 0>, |
| 18 | <14 0 &wakegpio 51 0>, |
| 19 | <17 0 &wakegpio 20 0>, |
| 20 | <18 0 &wakegpio 52 0>, |
| 21 | <19 0 &wakegpio 53 0>, |
| 22 | <24 0 &wakegpio 6 0>, |
| 23 | <25 0 &wakegpio 71 0>, |
| 24 | <27 0 &wakegpio 73 0>, |
| 25 | <28 0 &wakegpio 41 0>, |
| 26 | <31 0 &wakegpio 27 0>, |
| 27 | <32 0 &wakegpio 54 0>, |
| 28 | <33 0 &wakegpio 55 0>, |
| 29 | <34 0 &wakegpio 56 0>, |
| 30 | <35 0 &wakegpio 57 0>, |
| 31 | <36 0 &wakegpio 58 0>, |
| 32 | <39 0 &wakegpio 28 0>, |
| 33 | <46 0 &wakegpio 29 0>, |
| 34 | <62 0 &wakegpio 60 0>, |
| 35 | <63 0 &wakegpio 61 0>, |
| 36 | <64 0 &wakegpio 62 0>, |
| 37 | <69 0 &wakegpio 33 0>, |
| 38 | <70 0 &wakegpio 34 0>, |
| 39 | <72 0 &wakegpio 72 0>, |
| 40 | <75 0 &wakegpio 35 0>, |
| 41 | <79 0 &wakegpio 36 0>, |
| 42 | <80 0 &wakegpio 21 0>, |
| 43 | <81 0 &wakegpio 38 0>, |
| 44 | <86 0 &wakegpio 19 0>, |
| 45 | <87 0 &wakegpio 42 0>, |
| 46 | <88 0 &wakegpio 43 0>, |
| 47 | <89 0 &wakegpio 45 0>, |
| 48 | <91 0 &wakegpio 74 0>, |
| 49 | <94 0 &wakegpio 47 0>, |
| 50 | <95 0 &wakegpio 48 0>, |
| 51 | <96 0 &wakegpio 49 0>, |
| 52 | <97 0 &wakegpio 50 0>; |
| 53 | irqdomain-map-pass-thru = <0 0xff>; |
| 54 | irqdomain-map-mask = <0xff 0>; |
| 55 | |
| 56 | qupv3_se4_2uart_pins: qupv3_se4_2uart_pins { |
| 57 | qupv3_se4_2uart_active: qupv3_se4_2uart_active { |
| 58 | mux { |
| 59 | pins = "gpio12", "gpio13"; |
| 60 | function = "qup4"; |
| 61 | }; |
| 62 | |
| 63 | config { |
| 64 | pins = "gpio12", "gpio13"; |
| 65 | drive-strength = <2>; |
| 66 | bias-disable; |
| 67 | }; |
| 68 | }; |
| 69 | |
| 70 | qupv3_se4_2uart_sleep: qupv3_se4_2uart_sleep { |
| 71 | mux { |
| 72 | pins = "gpio12", "gpio13"; |
| 73 | function = "gpio"; |
| 74 | }; |
| 75 | |
| 76 | config { |
| 77 | pins = "gpio12", "gpio13"; |
| 78 | drive-strength = <2>; |
| 79 | bias-pull-down; |
| 80 | }; |
| 81 | }; |
| 82 | }; |
| 83 | /* SDC pin type */ |
| 84 | sdc1_clk_on: sdc1_clk_on { |
| 85 | config { |
| 86 | pins = "sdc1_clk"; |
| 87 | bias-disable; /* NO pull */ |
| 88 | drive-strength = <16>; /* 16 MA */ |
| 89 | }; |
| 90 | }; |
| 91 | |
| 92 | sdc1_clk_off: sdc1_clk_off { |
| 93 | config { |
| 94 | pins = "sdc1_clk"; |
| 95 | bias-disable; /* NO pull */ |
| 96 | drive-strength = <2>; /* 2 MA */ |
| 97 | }; |
| 98 | }; |
| 99 | |
| 100 | sdc1_cmd_on: sdc1_cmd_on { |
| 101 | config { |
| 102 | pins = "sdc1_cmd"; |
| 103 | bias-pull-up; /* pull up */ |
| 104 | drive-strength = <10>; /* 10 MA */ |
| 105 | }; |
| 106 | }; |
| 107 | |
| 108 | sdc1_cmd_off: sdc1_cmd_off { |
| 109 | config { |
| 110 | pins = "sdc1_cmd"; |
| 111 | bias-pull-up; /* pull up */ |
| 112 | drive-strength = <2>; /* 2 MA */ |
| 113 | }; |
| 114 | }; |
| 115 | |
| 116 | sdc1_data_on: sdc1_data_on { |
| 117 | config { |
| 118 | pins = "sdc1_data"; |
| 119 | bias-pull-up; /* pull up */ |
| 120 | drive-strength = <10>; /* 10 MA */ |
| 121 | }; |
| 122 | }; |
| 123 | |
| 124 | sdc1_data_off: sdc1_data_off { |
| 125 | config { |
| 126 | pins = "sdc1_data"; |
| 127 | bias-pull-up; /* pull up */ |
| 128 | drive-strength = <2>; /* 2 MA */ |
| 129 | }; |
| 130 | }; |
| 131 | |
| 132 | sdc1_rclk_on: sdc1_rclk_on { |
| 133 | config { |
| 134 | pins = "sdc1_rclk"; |
| 135 | bias-pull-down; /* pull down */ |
| 136 | }; |
| 137 | }; |
| 138 | |
| 139 | sdc1_rclk_off: sdc1_rclk_off { |
| 140 | config { |
| 141 | pins = "sdc1_rclk"; |
| 142 | bias-pull-down; /* pull down */ |
| 143 | }; |
| 144 | }; |
| 145 | |
| 146 | sdc2_clk_on: sdc2_clk_on { |
| 147 | config { |
| 148 | pins = "sdc2_clk"; |
| 149 | bias-disable; /* NO pull */ |
| 150 | drive-strength = <16>; /* 16 MA */ |
| 151 | }; |
| 152 | }; |
| 153 | |
| 154 | sdc2_clk_off: sdc2_clk_off { |
| 155 | config { |
| 156 | pins = "sdc2_clk"; |
| 157 | bias-disable; /* NO pull */ |
| 158 | drive-strength = <2>; /* 2 MA */ |
| 159 | }; |
| 160 | }; |
| 161 | |
| 162 | sdc2_cmd_on: sdc2_cmd_on { |
| 163 | config { |
| 164 | pins = "sdc2_cmd"; |
| 165 | bias-pull-up; /* pull up */ |
| 166 | drive-strength = <10>; /* 10 MA */ |
| 167 | }; |
| 168 | }; |
| 169 | |
| 170 | sdc2_cmd_off: sdc2_cmd_off { |
| 171 | config { |
| 172 | pins = "sdc2_cmd"; |
| 173 | bias-pull-up; /* pull up */ |
| 174 | drive-strength = <2>; /* 2 MA */ |
| 175 | }; |
| 176 | }; |
| 177 | |
| 178 | sdc2_data_on: sdc2_data_on { |
| 179 | config { |
| 180 | pins = "sdc2_data"; |
| 181 | bias-pull-up; /* pull up */ |
| 182 | drive-strength = <10>; /* 10 MA */ |
| 183 | }; |
| 184 | }; |
| 185 | |
| 186 | sdc2_data_off: sdc2_data_off { |
| 187 | config { |
| 188 | pins = "sdc2_data"; |
| 189 | bias-pull-up; /* pull up */ |
| 190 | drive-strength = <2>; /* 2 MA */ |
| 191 | }; |
| 192 | }; |
| 193 | |
| 194 | sdc2_cd_on: cd_on { |
| 195 | mux { |
| 196 | pins = "gpio88"; |
| 197 | function = "gpio"; |
| 198 | }; |
| 199 | |
| 200 | config { |
| 201 | pins = "gpio88"; |
| 202 | drive-strength = <2>; |
| 203 | bias-pull-up; |
| 204 | }; |
| 205 | }; |
| 206 | |
| 207 | sdc2_cd_off: cd_off { |
| 208 | mux { |
| 209 | pins = "gpio88"; |
| 210 | function = "gpio"; |
| 211 | }; |
| 212 | |
| 213 | config { |
| 214 | pins = "gpio88"; |
| 215 | drive-strength = <2>; |
| 216 | bias-disable; |
| 217 | }; |
| 218 | }; |
| 219 | |
| 220 | /* WSA speaker reset pin1 */ |
| 221 | spkr_1_sd_n { |
| 222 | spkr_1_sd_n_sleep: spkr_1_sd_n_sleep { |
| 223 | mux { |
| 224 | pins = "gpio106"; |
| 225 | function = "gpio"; |
| 226 | }; |
| 227 | |
| 228 | config { |
| 229 | pins = "gpio106"; |
| 230 | drive-strength = <2>; /* 2 mA */ |
| 231 | bias-pull-down; |
| 232 | input-enable; |
| 233 | }; |
| 234 | }; |
| 235 | |
| 236 | spkr_1_sd_n_active: spkr_1_sd_n_active { |
| 237 | mux { |
| 238 | pins = "gpio106"; |
| 239 | function = "gpio"; |
| 240 | }; |
| 241 | |
| 242 | config { |
| 243 | pins = "gpio106"; |
| 244 | drive-strength = <16>; /* 16 mA */ |
| 245 | bias-disable; |
| 246 | output-high; |
| 247 | }; |
| 248 | }; |
| 249 | }; |
| 250 | |
| 251 | fsa_usbc_ana_en_n@102 { |
| 252 | fsa_usbc_ana_en: fsa_usbc_ana_en { |
| 253 | mux { |
| 254 | pins = "gpio102"; |
| 255 | function = "gpio"; |
| 256 | }; |
| 257 | |
| 258 | config { |
| 259 | pins = "gpio102"; |
| 260 | drive-strength = <2>; |
| 261 | bias-disable; |
| 262 | output-low; |
| 263 | }; |
| 264 | }; |
| 265 | }; |
| 266 | |
| 267 | qupv3_se0_i2c_pins: qupv3_se0_i2c_pins { |
| 268 | qupv3_se0_i2c_active: qupv3_se0_i2c_active { |
| 269 | mux { |
| 270 | pins = "gpio0", "gpio1"; |
| 271 | function = "qup0"; |
| 272 | }; |
| 273 | |
| 274 | config { |
| 275 | pins = "gpio0", "gpio1"; |
| 276 | drive-strength = <2>; |
| 277 | bias-pull-up; |
| 278 | }; |
| 279 | }; |
| 280 | |
| 281 | qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep { |
| 282 | mux { |
| 283 | pins = "gpio0", "gpio1"; |
| 284 | function = "gpio"; |
| 285 | }; |
| 286 | |
| 287 | config { |
| 288 | pins = "gpio0", "gpio1"; |
| 289 | drive-strength = <2>; |
| 290 | bias-disable; |
| 291 | }; |
| 292 | }; |
| 293 | }; |
| 294 | |
| 295 | qupv3_se0_spi_pins: qupv3_se0_spi_pins { |
| 296 | qupv3_se0_spi_active: qupv3_se0_spi_active { |
| 297 | mux { |
| 298 | pins = "gpio0", "gpio1", |
| 299 | "gpio2", "gpio3"; |
| 300 | function = "qup0"; |
| 301 | }; |
| 302 | |
| 303 | config { |
| 304 | pins = "gpio0", "gpio1", |
| 305 | "gpio2", "gpio3"; |
| 306 | drive-strength = <6>; |
| 307 | bias-disable; |
| 308 | }; |
| 309 | }; |
| 310 | |
| 311 | qupv3_se0_spi_sleep: qupv3_se0_spi_sleep { |
| 312 | mux { |
| 313 | pins = "gpio0", "gpio1", |
| 314 | "gpio2", "gpio3"; |
| 315 | function = "gpio"; |
| 316 | }; |
| 317 | |
| 318 | config { |
| 319 | pins = "gpio0", "gpio1", |
| 320 | "gpio2", "gpio3"; |
| 321 | drive-strength = <6>; |
| 322 | bias-disable; |
| 323 | }; |
| 324 | }; |
| 325 | }; |
| 326 | |
| 327 | qupv3_se1_i2c_pins: qupv3_se1_i2c_pins { |
| 328 | qupv3_se1_i2c_active: qupv3_se1_i2c_active { |
| 329 | mux { |
| 330 | pins = "gpio4", "gpio5"; |
| 331 | function = "qup1"; |
| 332 | }; |
| 333 | |
| 334 | config { |
| 335 | pins = "gpio4", "gpio5"; |
| 336 | drive-strength = <2>; |
| 337 | bias-pull-up; |
| 338 | }; |
| 339 | }; |
| 340 | |
| 341 | qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep { |
| 342 | mux { |
| 343 | pins = "gpio4", "gpio5"; |
| 344 | function = "gpio"; |
| 345 | }; |
| 346 | |
| 347 | config { |
| 348 | pins = "gpio4", "gpio5"; |
| 349 | drive-strength = <2>; |
| 350 | bias-disable; |
| 351 | }; |
| 352 | }; |
| 353 | }; |
| 354 | |
| 355 | nfc { |
| 356 | nfc_int_active: nfc_int_active { |
| 357 | /* active state */ |
| 358 | mux { |
| 359 | /* GPIO 70 NFC Read Interrupt */ |
| 360 | pins = "gpio70"; |
| 361 | function = "gpio"; |
| 362 | }; |
| 363 | |
| 364 | config { |
| 365 | pins = "gpio70"; |
| 366 | drive-strength = <2>; /* 2 MA */ |
| 367 | bias-pull-up; |
| 368 | }; |
| 369 | }; |
| 370 | |
| 371 | nfc_int_suspend: nfc_int_suspend { |
| 372 | /* sleep state */ |
| 373 | mux { |
| 374 | /* GPIO 70 NFC Read Interrupt */ |
| 375 | pins = "gpio70"; |
| 376 | function = "gpio"; |
| 377 | }; |
| 378 | |
| 379 | config { |
| 380 | pins = "gpio70"; |
| 381 | drive-strength = <2>; /* 2 MA */ |
| 382 | bias-pull-up; |
| 383 | }; |
| 384 | }; |
| 385 | |
| 386 | nfc_enable_active: nfc_enable_active { |
| 387 | /* active state */ |
| 388 | mux { |
| 389 | /* 69: Enable 31: Firmware */ |
| 390 | pins = "gpio69", "gpio31"; |
| 391 | function = "gpio"; |
| 392 | }; |
| 393 | |
| 394 | config { |
| 395 | pins = "gpio69", "gpio31"; |
| 396 | drive-strength = <2>; /* 2 MA */ |
| 397 | bias-pull-up; |
| 398 | }; |
| 399 | }; |
| 400 | |
| 401 | nfc_enable_suspend: nfc_enable_suspend { |
| 402 | /* sleep state */ |
| 403 | mux { |
| 404 | /* 69: Enable 31: Firmware */ |
| 405 | pins = "gpio69", "gpio31"; |
| 406 | function = "gpio"; |
| 407 | }; |
| 408 | |
| 409 | config { |
| 410 | pins = "gpio69", "gpio31"; |
| 411 | drive-strength = <2>; /* 2 MA */ |
| 412 | bias-disable; |
| 413 | }; |
| 414 | }; |
| 415 | |
| 416 | nfc_clk_req_active: nfc_clk_req_active { |
| 417 | /* active state */ |
| 418 | mux { |
| 419 | /* GPIO 86: NFC CLOCK REQUEST */ |
| 420 | pins = "gpio86"; |
| 421 | function = "gpio"; |
| 422 | }; |
| 423 | |
| 424 | config { |
| 425 | pins = "gpio86"; |
| 426 | drive-strength = <2>; /* 2 MA */ |
| 427 | bias-pull-up; |
| 428 | }; |
| 429 | }; |
| 430 | |
| 431 | nfc_clk_req_suspend: nfc_clk_req_suspend { |
| 432 | /* sleep state */ |
| 433 | mux { |
| 434 | /* GPIO 86: NFC CLOCK REQUEST */ |
| 435 | pins = "gpio86"; |
| 436 | function = "gpio"; |
| 437 | }; |
| 438 | |
| 439 | config { |
| 440 | pins = "gpio86"; |
| 441 | drive-strength = <2>; /* 2 MA */ |
| 442 | bias-disable; |
| 443 | }; |
| 444 | }; |
| 445 | }; |
| 446 | |
| 447 | qupv3_se1_spi_pins: qupv3_se1_spi_pins { |
| 448 | qupv3_se1_spi_active: qupv3_se1_spi_active { |
| 449 | mux { |
| 450 | pins = "gpio4", "gpio5", |
| 451 | "gpio69", "gpio70"; |
| 452 | function = "qup1"; |
| 453 | }; |
| 454 | |
| 455 | config { |
| 456 | pins = "gpio4", "gpio5", |
| 457 | "gpio69", "gpio70"; |
| 458 | drive-strength = <6>; |
| 459 | bias-disable; |
| 460 | }; |
| 461 | }; |
| 462 | |
| 463 | qupv3_se1_spi_sleep: qupv3_se1_spi_sleep { |
| 464 | mux { |
| 465 | pins = "gpio4", "gpio5", |
| 466 | "gpio69", "gpio70"; |
| 467 | function = "gpio"; |
| 468 | }; |
| 469 | |
| 470 | config { |
| 471 | pins = "gpio4", "gpio5", |
| 472 | "gpio69", "gpio70"; |
| 473 | drive-strength = <6>; |
| 474 | bias-disable; |
| 475 | }; |
| 476 | }; |
| 477 | }; |
| 478 | |
| 479 | qupv3_se2_i2c_pins: qupv3_se2_i2c_pins { |
| 480 | qupv3_se2_i2c_active: qupv3_se2_i2c_active { |
| 481 | mux { |
| 482 | pins = "gpio6", "gpio7"; |
| 483 | function = "qup2"; |
| 484 | }; |
| 485 | |
| 486 | config { |
| 487 | pins = "gpio6", "gpio7"; |
| 488 | drive-strength = <2>; |
| 489 | bias-pull-up; |
| 490 | }; |
| 491 | }; |
| 492 | |
| 493 | qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep { |
| 494 | mux { |
| 495 | pins = "gpio6", "gpio7"; |
| 496 | function = "gpio"; |
| 497 | }; |
| 498 | |
| 499 | config { |
| 500 | pins = "gpio6", "gpio7"; |
| 501 | drive-strength = <2>; |
| 502 | bias-disable; |
| 503 | }; |
| 504 | }; |
| 505 | }; |
| 506 | |
| 507 | qupv3_se2_spi_pins: qupv3_se2_spi_pins { |
| 508 | qupv3_se2_spi_active: qupv3_se2_spi_active { |
| 509 | mux { |
| 510 | pins = "gpio6", "gpio7", |
| 511 | "gpio71", "gpio80"; |
| 512 | function = "qup2"; |
| 513 | }; |
| 514 | |
| 515 | config { |
| 516 | pins = "gpio6", "gpio7", |
| 517 | "gpio71", "gpio80"; |
| 518 | drive-strength = <6>; |
| 519 | bias-disable; |
| 520 | }; |
| 521 | }; |
| 522 | |
| 523 | qupv3_se2_spi_sleep: qupv3_se2_spi_sleep { |
| 524 | mux { |
| 525 | pins = "gpio6", "gpio7", |
| 526 | "gpio71", "gpio80"; |
| 527 | function = "gpio"; |
| 528 | }; |
| 529 | |
| 530 | config { |
| 531 | pins = "gpio6", "gpio7", |
| 532 | "gpio71", "gpio80"; |
| 533 | drive-strength = <6>; |
| 534 | bias-disable; |
| 535 | }; |
| 536 | }; |
| 537 | }; |
| 538 | |
| 539 | qupv3_se3_4uart_pins: qupv3_se3_4uart_pins { |
| 540 | qupv3_se3_default_ctsrtsrx: |
| 541 | qupv3_se3_default_ctsrtsrx { |
| 542 | mux { |
| 543 | pins = "gpio8", "gpio9", "gpio11"; |
| 544 | function = "gpio"; |
| 545 | }; |
| 546 | |
| 547 | config { |
| 548 | pins = "gpio8", "gpio9", "gpio11"; |
| 549 | drive-strength = <2>; |
| 550 | bias-pull-down; |
| 551 | }; |
| 552 | }; |
| 553 | |
| 554 | qupv3_se3_default_tx: |
| 555 | qupv3_se3_default_tx { |
| 556 | mux { |
| 557 | pins = "gpio10"; |
| 558 | function = "gpio"; |
| 559 | }; |
| 560 | |
| 561 | config { |
| 562 | pins = "gpio10"; |
| 563 | drive-strength = <2>; |
| 564 | bias-pull-up; |
| 565 | }; |
| 566 | }; |
| 567 | |
| 568 | qupv3_se3_ctsrx: qupv3_se3_ctsrx { |
| 569 | mux { |
| 570 | pins = "gpio8", "gpio11"; |
| 571 | function = "qup3"; |
| 572 | }; |
| 573 | |
| 574 | config { |
| 575 | pins = "gpio8", "gpio11"; |
| 576 | drive-strength = <2>; |
| 577 | bias-disable; |
| 578 | }; |
| 579 | }; |
| 580 | |
| 581 | qupv3_se3_rts: qupv3_se3_rts { |
| 582 | mux { |
| 583 | pins = "gpio9"; |
| 584 | function = "qup3"; |
| 585 | }; |
| 586 | |
| 587 | config { |
| 588 | pins = "gpio9"; |
| 589 | drive-strength = <2>; |
| 590 | bias-pull-down; |
| 591 | }; |
| 592 | }; |
| 593 | |
| 594 | qupv3_se3_tx: qupv3_se3_tx { |
| 595 | mux { |
| 596 | pins = "gpio10"; |
| 597 | function = "qup3"; |
| 598 | }; |
| 599 | |
| 600 | config { |
| 601 | pins = "gpio10"; |
| 602 | drive-strength = <2>; |
| 603 | bias-pull-up; |
| 604 | }; |
| 605 | }; |
| 606 | }; |
| 607 | |
| 608 | qupv3_se5_i2c_pins: qupv3_se5_i2c_pins { |
| 609 | qupv3_se5_i2c_active: qupv3_se5_i2c_active { |
| 610 | mux { |
| 611 | pins = "gpio14", "gpio15"; |
| 612 | function = "qup5"; |
| 613 | }; |
| 614 | |
| 615 | config { |
| 616 | pins = "gpio14", "gpio15"; |
| 617 | drive-strength = <2>; |
| 618 | bias-pull-up; |
| 619 | }; |
| 620 | }; |
| 621 | |
| 622 | qupv3_se5_i2c_sleep: qupv3_se5_i2c_sleep { |
| 623 | mux { |
| 624 | pins = "gpio14", "gpio15"; |
| 625 | function = "gpio"; |
| 626 | }; |
| 627 | |
| 628 | config { |
| 629 | pins = "gpio14", "gpio15"; |
| 630 | drive-strength = <2>; |
| 631 | bias-disable; |
| 632 | }; |
| 633 | }; |
| 634 | }; |
| 635 | |
| 636 | qupv3_se5_spi_pins: qupv3_se5_spi_pins { |
| 637 | qupv3_se5_spi_active: qupv3_se5_spi_active { |
| 638 | mux { |
| 639 | pins = "gpio14", "gpio15", |
| 640 | "gpio16", "gpio17"; |
| 641 | function = "qup5"; |
| 642 | }; |
| 643 | |
| 644 | config { |
| 645 | pins = "gpio14", "gpio15", |
| 646 | "gpio16", "gpio17"; |
| 647 | drive-strength = <6>; |
| 648 | bias-disable; |
| 649 | }; |
| 650 | }; |
| 651 | |
| 652 | qupv3_se5_spi_sleep: qupv3_se5_spi_sleep { |
| 653 | mux { |
| 654 | pins = "gpio14", "gpio15", |
| 655 | "gpio16", "gpio17"; |
| 656 | function = "gpio"; |
| 657 | }; |
| 658 | |
| 659 | config { |
| 660 | pins = "gpio14", "gpio15", |
| 661 | "gpio16", "gpio17"; |
| 662 | drive-strength = <6>; |
| 663 | bias-disable; |
| 664 | }; |
| 665 | }; |
| 666 | }; |
| 667 | pmx_sde: pmx_sde { |
| 668 | sde_dsi_active: sde_dsi_active { |
| 669 | mux { |
| 670 | pins = "gpio82", "gpio105"; |
| 671 | function = "gpio"; |
| 672 | }; |
| 673 | |
| 674 | config { |
| 675 | pins = "gpio82", "gpio105"; |
| 676 | drive-strength = <8>; |
| 677 | bias-disable = <0>; |
| 678 | }; |
| 679 | }; |
| 680 | |
| 681 | sde_dsi_suspend: sde_dsi_suspend { |
| 682 | mux { |
| 683 | pins = "gpio82", "gpio105"; |
| 684 | function = "gpio"; |
| 685 | }; |
| 686 | |
| 687 | config { |
| 688 | pins = "gpio82", "gpio105"; |
| 689 | drive-strength = <2>; |
| 690 | bias-pull-down; |
| 691 | }; |
| 692 | }; |
| 693 | }; |
| 694 | |
| 695 | pmx_sde_te { |
| 696 | sde_te_active: sde_te_active { |
| 697 | mux { |
| 698 | pins = "gpio81"; |
| 699 | function = "mdp_vsync"; |
| 700 | }; |
| 701 | |
| 702 | config { |
| 703 | pins = "gpio81"; |
| 704 | drive-strength = <2>; |
| 705 | bias-pull-down; |
| 706 | }; |
| 707 | }; |
| 708 | |
| 709 | sde_te_suspend: sde_te_suspend { |
| 710 | mux { |
| 711 | pins = "gpio81"; |
| 712 | function = "mdp_vsync"; |
| 713 | }; |
| 714 | |
| 715 | config { |
| 716 | pins = "gpio81"; |
| 717 | drive-strength = <2>; |
| 718 | bias-pull-down; |
| 719 | }; |
| 720 | }; |
| 721 | }; |
| 722 | |
| 723 | pmx_ts_int_active { |
| 724 | ts_int_active: ts_int_active { |
| 725 | mux { |
| 726 | pins = "gpio80"; |
| 727 | function = "gpio"; |
| 728 | }; |
| 729 | |
| 730 | config { |
| 731 | pins = "gpio80"; |
| 732 | drive-strength = <8>; |
| 733 | bias-pull-up; |
| 734 | }; |
| 735 | }; |
| 736 | }; |
| 737 | |
| 738 | pmx_ts_int_suspend { |
| 739 | ts_int_suspend: ts_int_suspend { |
| 740 | mux { |
| 741 | pins = "gpio80"; |
| 742 | function = "gpio"; |
| 743 | }; |
| 744 | |
| 745 | config { |
| 746 | pins = "gpio80"; |
| 747 | drive-strength = <2>; |
| 748 | bias-pull-down; |
| 749 | }; |
| 750 | }; |
| 751 | }; |
| 752 | |
| 753 | pmx_ts_reset_active { |
| 754 | ts_reset_active: ts_reset_active { |
| 755 | mux { |
| 756 | pins = "gpio71"; |
| 757 | function = "gpio"; |
| 758 | }; |
| 759 | |
| 760 | config { |
| 761 | pins = "gpio71"; |
| 762 | drive-strength = <8>; |
| 763 | bias-pull-up; |
| 764 | }; |
| 765 | }; |
| 766 | }; |
| 767 | |
| 768 | pmx_ts_reset_suspend { |
| 769 | ts_reset_suspend: ts_reset_suspend { |
| 770 | mux { |
| 771 | pins = "gpio71"; |
| 772 | function = "gpio"; |
| 773 | }; |
| 774 | |
| 775 | config { |
| 776 | pins = "gpio71"; |
| 777 | drive-strength = <2>; |
| 778 | bias-pull-down; |
| 779 | }; |
| 780 | }; |
| 781 | }; |
| 782 | |
| 783 | pmx_ts_release { |
| 784 | ts_release: ts_release { |
| 785 | mux { |
| 786 | pins = "gpio80", "gpio71"; |
| 787 | function = "gpio"; |
| 788 | }; |
| 789 | |
| 790 | config { |
| 791 | pins = "gpio80", "gpio71"; |
| 792 | drive-strength = <2>; |
| 793 | bias-pull-down; |
| 794 | }; |
| 795 | }; |
| 796 | }; |
| 797 | |
| 798 | pm8008_interrupt: pm8008_interrupt { |
| 799 | mux { |
| 800 | pins = "gpio25"; |
| 801 | function = "gpio"; |
| 802 | }; |
| 803 | |
| 804 | config { |
| 805 | pins = "gpio25"; |
| 806 | bias-disable; |
| 807 | input-enable; |
| 808 | }; |
| 809 | }; |
| 810 | |
| 811 | pm8008_active: pm8008_active { |
| 812 | mux { |
| 813 | pins = "gpio26"; |
| 814 | function = "gpio"; |
| 815 | }; |
| 816 | |
| 817 | config { |
| 818 | pins = "gpio26"; |
| 819 | bias-pull-up; |
| 820 | output-high; |
| 821 | drive-strength = <2>; |
| 822 | }; |
| 823 | }; |
| 824 | |
| 825 | cci0_suspend: cci0_suspend { |
| 826 | mux { |
| 827 | /* CLK, DATA*/ |
| 828 | pins = "gpio23", "gpio22"; |
| 829 | function = "cci_i2c"; |
| 830 | }; |
| 831 | |
| 832 | config { |
| 833 | pins = "gpio23", "gpio22"; |
| 834 | bias-pull-down; /* PULL DOWN */ |
| 835 | drive-strength = <2>; /* 2 MA */ |
| 836 | }; |
| 837 | }; |
| 838 | |
| 839 | cci0_active: cci0_active { |
| 840 | mux { |
| 841 | /* CLK, DATA*/ |
| 842 | pins = "gpio23", "gpio22"; |
| 843 | function = "cci_i2c"; |
| 844 | }; |
| 845 | |
| 846 | config { |
| 847 | pins = "gpio23", "gpio22"; |
| 848 | bias-pull-up; /* PULL UP*/ |
| 849 | drive-strength = <2>; /* 2 MA */ |
| 850 | }; |
| 851 | }; |
| 852 | |
| 853 | cci1_suspend: cci1_suspend { |
| 854 | mux { |
| 855 | /* CLK, DATA*/ |
| 856 | pins = "gpio30", "gpio29"; |
| 857 | function = "cci_i2c"; |
| 858 | }; |
| 859 | |
| 860 | config { |
| 861 | pins = "gpio30", "gpio29"; |
| 862 | bias-pull-down; /* PULL DOWN */ |
| 863 | drive-strength = <2>; /* 2 MA */ |
| 864 | }; |
| 865 | }; |
| 866 | |
| 867 | cci1_active: cci1_active { |
| 868 | mux { |
| 869 | /* CLK, DATA*/ |
| 870 | pins = "gpio30", "gpio29"; |
| 871 | function = "cci_i2c"; |
| 872 | }; |
| 873 | |
| 874 | config { |
| 875 | pins = "gpio30", "gpio29"; |
| 876 | bias-pull-up; /* PULL UP*/ |
| 877 | drive-strength = <2>; /* 2 MA */ |
| 878 | }; |
| 879 | }; |
| 880 | |
| 881 | cam_sensor_mclk0_active: cam_sensor_mclk0_active { |
| 882 | /* MCLK 0*/ |
| 883 | mux { |
| 884 | pins = "gpio20"; |
| 885 | function = "cam_mclk"; |
| 886 | }; |
| 887 | |
| 888 | config { |
| 889 | pins = "gpio20"; |
| 890 | bias-disable; /* No PULL */ |
| 891 | drive-strength = <2>; /* 2 MA */ |
| 892 | }; |
| 893 | }; |
| 894 | |
| 895 | cam_sensor_mclk0_suspend: cam_sensor_mclk0_suspend { |
| 896 | /* MCLK 0*/ |
| 897 | mux { |
| 898 | pins = "gpio20"; |
| 899 | function = "cam_mclk"; |
| 900 | }; |
| 901 | |
| 902 | config { |
| 903 | pins = "gpio20"; |
| 904 | bias-pull-down; /* PULL DOWN */ |
| 905 | drive-strength = <2>; /* 2 MA */ |
| 906 | }; |
| 907 | }; |
| 908 | |
| 909 | cam_sensor_mclk1_active: cam_sensor_mclk1_active { |
| 910 | /* MCLK 1*/ |
| 911 | mux { |
| 912 | pins = "gpio21"; |
| 913 | function = "cam_mclk"; |
| 914 | }; |
| 915 | |
| 916 | config { |
| 917 | pins = "gpio21"; |
| 918 | bias-disable; /* No PULL */ |
| 919 | drive-strength = <2>; /* 2 MA */ |
| 920 | }; |
| 921 | }; |
| 922 | |
| 923 | cam_sensor_mclk1_suspend: cam_sensor_mclk1_suspend { |
| 924 | /* MCLK 1*/ |
| 925 | mux { |
| 926 | pins = "gpio21"; |
| 927 | function = "cam_mclk"; |
| 928 | }; |
| 929 | |
| 930 | config { |
| 931 | pins = "gpio21"; |
| 932 | bias-pull-down; /* PULL DOWN */ |
| 933 | drive-strength = <2>; /* 2 MA */ |
| 934 | }; |
| 935 | }; |
| 936 | |
| 937 | cam_sensor_mclk2_active: cam_sensor_mclk2_active { |
| 938 | /* MCLK 2*/ |
| 939 | mux { |
| 940 | pins = "gpio27"; |
| 941 | function = "cam_mclk"; |
| 942 | }; |
| 943 | |
| 944 | config { |
| 945 | pins = "gpio27"; |
| 946 | bias-disable; /* No PULL */ |
| 947 | drive-strength = <2>; /* 2 MA */ |
| 948 | }; |
| 949 | }; |
| 950 | |
| 951 | cam_sensor_mclk2_suspend: cam_sensor_mclk2_suspend { |
| 952 | /* MCLK 2*/ |
| 953 | mux { |
| 954 | pins = "gpio27"; |
| 955 | function = "cam_mclk"; |
| 956 | }; |
| 957 | |
| 958 | config { |
| 959 | pins = "gpio27"; |
| 960 | bias-pull-down; /* PULL DOWN */ |
| 961 | drive-strength = <2>; /* 2 MA */ |
| 962 | }; |
| 963 | }; |
| 964 | |
| 965 | cam_sensor_rear0_reset_active: cam_sensor_rear0_reset_active { |
| 966 | /* RESET0 */ |
| 967 | mux { |
| 968 | pins = "gpio18"; |
| 969 | function = "gpio"; |
| 970 | }; |
| 971 | |
| 972 | config { |
| 973 | pins = "gpio18"; |
| 974 | bias-disable; /* No PULL */ |
| 975 | drive-strength = <2>; /* 2 MA */ |
| 976 | }; |
| 977 | }; |
| 978 | |
| 979 | cam_sensor_rear0_reset_suspend: cam_sensor_rear0_reset_suspend { |
| 980 | /* RESET0 */ |
| 981 | mux { |
| 982 | pins = "gpio18"; |
| 983 | function = "gpio"; |
| 984 | }; |
| 985 | |
| 986 | config { |
| 987 | pins = "gpio18"; |
| 988 | bias-pull-down; /* PULL DOWN */ |
| 989 | drive-strength = <2>; /* 2 MA */ |
| 990 | output-low; |
| 991 | }; |
| 992 | }; |
| 993 | |
| 994 | cam_sensor_rear1_reset_active: cam_sensor_rear1_reset_active { |
| 995 | /* RESET1 */ |
| 996 | mux { |
| 997 | pins = "gpio19"; |
| 998 | function = "gpio"; |
| 999 | }; |
| 1000 | |
| 1001 | config { |
| 1002 | pins = "gpio19"; |
| 1003 | bias-disable; /* No PULL */ |
| 1004 | drive-strength = <2>; /* 2 MA */ |
| 1005 | }; |
| 1006 | }; |
| 1007 | |
| 1008 | cam_sensor_rear1_reset_suspend: cam_sensor_rear1_reset_suspend { |
| 1009 | /* RESET1 */ |
| 1010 | mux { |
| 1011 | pins = "gpio19"; |
| 1012 | function = "gpio"; |
| 1013 | }; |
| 1014 | |
| 1015 | config { |
| 1016 | pins = "gpio19"; |
| 1017 | bias-pull-down; /* PULL DOWN */ |
| 1018 | drive-strength = <2>; /* 2 MA */ |
| 1019 | output-low; |
| 1020 | }; |
| 1021 | }; |
| 1022 | |
| 1023 | |
| 1024 | cam_sensor_front0_reset_active: cam_sensor_front0_reset_active { |
| 1025 | /* RESET0 */ |
| 1026 | mux { |
| 1027 | pins = "gpio24"; |
| 1028 | function = "gpio"; |
| 1029 | }; |
| 1030 | |
| 1031 | config { |
| 1032 | pins = "gpio24"; |
| 1033 | bias-disable; /* No PULL */ |
| 1034 | drive-strength = <2>; /* 2 MA */ |
| 1035 | }; |
| 1036 | }; |
| 1037 | |
| 1038 | cam_sensor_front0_reset_suspend: cam_sensor_front0_reset_suspend { |
| 1039 | /* RESET0 */ |
| 1040 | mux { |
| 1041 | pins = "gpio24"; |
| 1042 | function = "gpio"; |
| 1043 | }; |
| 1044 | |
| 1045 | config { |
| 1046 | pins = "gpio24"; |
| 1047 | bias-pull-down; /* PULL DOWN */ |
| 1048 | drive-strength = <2>; /* 2 MA */ |
| 1049 | output-low; |
| 1050 | }; |
| 1051 | }; |
| 1052 | |
| 1053 | cam_sensor_csi_mux_oe_active: cam_sensor_csi_mux_oe_active { |
| 1054 | /*CSIMUX_OE*/ |
| 1055 | mux { |
| 1056 | pins = "gpio113"; |
| 1057 | function = "gpio"; |
| 1058 | }; |
| 1059 | |
| 1060 | config { |
| 1061 | pins = "gpio113"; |
| 1062 | bias-disable; /* No PULL */ |
| 1063 | drive-strength = <2>; /* 2 MA */ |
| 1064 | }; |
| 1065 | }; |
| 1066 | |
| 1067 | cam_sensor_csi_mux_oe_suspend: cam_sensor_csi_mux_oe_suspend { |
| 1068 | /* CSIMUX_OE */ |
| 1069 | mux { |
| 1070 | pins = "gpio113"; |
| 1071 | function = "gpio"; |
| 1072 | }; |
| 1073 | |
| 1074 | config { |
| 1075 | pins = "gpio113"; |
| 1076 | bias-pull-down; /* PULL DOWN */ |
| 1077 | drive-strength = <2>; /* 2 MA */ |
| 1078 | output-low; |
| 1079 | }; |
| 1080 | }; |
| 1081 | |
| 1082 | cam_sensor_csi_mux_sel_active: cam_sensor_csi_mux_sel_active { |
| 1083 | /*CSIMUX_SEL*/ |
| 1084 | mux { |
| 1085 | pins = "gpio114"; |
| 1086 | function = "gpio"; |
| 1087 | }; |
| 1088 | |
| 1089 | config { |
| 1090 | pins = "gpio114"; |
| 1091 | bias-disable; /* No PULL */ |
| 1092 | drive-strength = <2>; /* 2 MA */ |
| 1093 | }; |
| 1094 | }; |
| 1095 | |
| 1096 | cam_sensor_csi_mux_sel_suspend: cam_sensor_csi_mux_sel_suspend { |
| 1097 | /* CSIMUX_SEL */ |
| 1098 | mux { |
| 1099 | pins = "gpio114"; |
| 1100 | function = "gpio"; |
| 1101 | }; |
| 1102 | |
| 1103 | config { |
| 1104 | pins = "gpio114"; |
| 1105 | bias-pull-down; /* PULL DOWN */ |
| 1106 | drive-strength = <2>; /* 2 MA */ |
| 1107 | output-low; |
| 1108 | }; |
| 1109 | }; |
| 1110 | |
| 1111 | gpio_vol_up: gpio_vol_up { |
| 1112 | mux { |
| 1113 | pins = "gpio96"; |
| 1114 | function = "gpio"; |
| 1115 | }; |
| 1116 | |
| 1117 | config { |
| 1118 | pins = "gpio96"; |
| 1119 | drive-strength = <2>; |
| 1120 | bias-pull-up; |
| 1121 | input-enable; |
| 1122 | }; |
| 1123 | }; |
| 1124 | |
| 1125 | usb_id_interrupt: usb_id_interrupt { |
| 1126 | mux { |
| 1127 | pins = "gpio89"; |
| 1128 | function = "gpio"; |
| 1129 | }; |
| 1130 | |
| 1131 | config { |
| 1132 | pins = "gpio89"; |
| 1133 | bias-pull-up; |
| 1134 | input-enable; |
| 1135 | }; |
| 1136 | }; |
| 1137 | }; |
| 1138 | }; |