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R Sricharan6b5de092012-05-10 19:46:00 +05301/*
Sricharan Rfa63d032013-06-07 18:52:47 +05302 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
R Sricharan6b5de092012-05-10 19:46:00 +05303 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
Florian Vaussard98ef79572013-05-31 14:32:55 +020010#include "omap5.dtsi"
J Keerthye00c27e2013-06-13 10:00:11 +053011#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/interrupt-controller/arm-gic.h>
R Sricharan6b5de092012-05-10 19:46:00 +053013
14/ {
Sricharan Rfa63d032013-06-07 18:52:47 +053015 model = "TI OMAP5 uEVM board";
16 compatible = "ti,omap5-uevm", "ti,omap5";
R Sricharan6b5de092012-05-10 19:46:00 +053017
18 memory {
19 device_type = "memory";
Santosh Shilimkar03178c62013-01-18 11:43:16 +053020 reg = <0x80000000 0x7F000000>; /* 2032 MB */
R Sricharan6b5de092012-05-10 19:46:00 +053021 };
Balaji T K5dd18b02012-08-07 12:48:21 +053022
Tomi Valkeinen6ac732e2014-03-12 11:57:03 +020023 aliases {
24 display0 = &hdmi0;
25 };
26
Balaji T K5dd18b02012-08-07 12:48:21 +053027 vmmcsd_fixed: fixedregulator-mmcsd {
28 compatible = "regulator-fixed";
29 regulator-name = "vmmcsd_fixed";
30 regulator-min-microvolt = <3000000>;
31 regulator-max-microvolt = <3000000>;
32 };
Sourav Poddar5449fbc2012-07-25 11:03:27 +053033
Roger Quadrosed7f8e82013-06-07 18:52:48 +053034 /* HS USB Host PHY on PORT 2 */
35 hsusb2_phy: hsusb2_phy {
36 compatible = "usb-nop-xceiv";
Roger Quadros8ae9b592013-09-24 11:53:53 +030037 reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */
Roger Quadros2ecf8aa2014-02-27 16:18:29 +020038 clocks = <&auxclk1_ck>;
39 clock-names = "main_clk";
Roger Quadros153030c2013-06-18 19:04:46 +030040 clock-frequency = <19200000>;
Roger Quadrosed7f8e82013-06-07 18:52:48 +053041 };
42
Roger Quadrosed7f8e82013-06-07 18:52:48 +053043 /* HS USB Host PHY on PORT 3 */
44 hsusb3_phy: hsusb3_phy {
45 compatible = "usb-nop-xceiv";
Roger Quadros8ae9b592013-09-24 11:53:53 +030046 reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* gpio3_79 ETH_NRESET */
Roger Quadrosed7f8e82013-06-07 18:52:48 +053047 };
48
Dan Murphy66155302013-06-07 18:52:49 +053049 leds {
50 compatible = "gpio-leds";
51 led@1 {
52 label = "omap5:blue:usr1";
53 gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; /* gpio5_153 D1 LED */
54 linux,default-trigger = "heartbeat";
55 default-state = "off";
56 };
57 };
Tomi Valkeinen6ac732e2014-03-12 11:57:03 +020058
59 tpd12s015: encoder@0 {
60 compatible = "ti,tpd12s015";
61
62 pinctrl-names = "default";
63 pinctrl-0 = <&tpd12s015_pins>;
64
65 gpios = <&gpio9 0 GPIO_ACTIVE_HIGH>, /* TCA6424A P01, CT CP HPD */
66 <&gpio9 1 GPIO_ACTIVE_HIGH>, /* TCA6424A P00, LS OE */
67 <&gpio7 1 GPIO_ACTIVE_HIGH>; /* GPIO 193, HPD */
68
69 ports {
70 #address-cells = <1>;
71 #size-cells = <0>;
72
73 port@0 {
74 reg = <0>;
75
76 tpd12s015_in: endpoint@0 {
77 remote-endpoint = <&hdmi_out>;
78 };
79 };
80
81 port@1 {
82 reg = <1>;
83
84 tpd12s015_out: endpoint@0 {
85 remote-endpoint = <&hdmi_connector_in>;
86 };
87 };
88 };
89 };
90
91 hdmi0: connector@0 {
92 compatible = "hdmi-connector";
93 label = "hdmi";
94
95 type = "b";
96
97 port {
98 hdmi_connector_in: endpoint {
99 remote-endpoint = <&tpd12s015_out>;
100 };
101 };
102 };
Peter Ujfalusi3c9464e2014-07-10 14:24:03 +0300103
104 sound: sound {
105 compatible = "ti,abe-twl6040";
106 ti,model = "omap5-uevm";
107
108 ti,mclk-freq = <19200000>;
109
110 ti,mcpdm = <&mcpdm>;
111
112 ti,twl6040 = <&twl6040>;
113
114 /* Audio routing */
115 ti,audio-routing =
116 "Headset Stereophone", "HSOL",
117 "Headset Stereophone", "HSOR",
118 "Line Out", "AUXL",
119 "Line Out", "AUXR",
120 "HSMIC", "Headset Mic",
121 "Headset Mic", "Headset Mic Bias",
122 "AFML", "Line In",
123 "AFMR", "Line In";
124 };
Balaji T K5dd18b02012-08-07 12:48:21 +0530125};
126
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300127&omap5_pmx_core {
128 pinctrl-names = "default";
129 pinctrl-0 = <
Roger Quadrosed7f8e82013-06-07 18:52:48 +0530130 &usbhost_pins
Dan Murphy66155302013-06-07 18:52:49 +0530131 &led_gpio_pins
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300132 >;
133
134 twl6040_pins: pinmux_twl6040_pins {
135 pinctrl-single,pins = <
Peter Ujfalusi472e623d2013-10-23 12:32:19 +0300136 0x17e (PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_141 */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300137 >;
138 };
139
140 mcpdm_pins: pinmux_mcpdm_pins {
141 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200142 0x142 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */
143 0x15c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_ul_data.abemcpdm_ul_data */
144 0x15e (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_dl_data.abemcpdm_dl_data */
145 0x160 (PIN_INPUT_PULLUP | MUX_MODE0) /* abemcpdm_frame.abemcpdm_frame */
146 0x162 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_lb_clk.abemcpdm_lb_clk */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300147 >;
148 };
149
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300150 mcbsp1_pins: pinmux_mcbsp1_pins {
151 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200152 0x14c (PIN_INPUT | MUX_MODE1) /* abedmic_clk2.abemcbsp1_fsx */
153 0x14e (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* abedmic_clk3.abemcbsp1_dx */
154 0x150 (PIN_INPUT | MUX_MODE1) /* abeslimbus1_clock.abemcbsp1_clkx */
155 0x152 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* abeslimbus1_data.abemcbsp1_dr */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300156 >;
157 };
158
159 mcbsp2_pins: pinmux_mcbsp2_pins {
160 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200161 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dr.abemcbsp2_dr */
162 0x156 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dx.abemcbsp2_dx */
163 0x158 (PIN_INPUT | MUX_MODE0) /* abemcbsp2_fsx.abemcbsp2_fsx */
164 0x15a (PIN_INPUT | MUX_MODE0) /* abemcbsp2_clkx.abemcbsp2_clkx */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300165 >;
166 };
Sourav Poddar9be495c2013-02-13 14:58:22 +0530167
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200168 i2c1_pins: pinmux_i2c1_pins {
169 pinctrl-single,pins = <
170 0x1b2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
171 0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
172 >;
173 };
Sourav Poddar9be495c2013-02-13 14:58:22 +0530174
Sourav Poddar9be495c2013-02-13 14:58:22 +0530175 i2c5_pins: pinmux_i2c5_pins {
176 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200177 0x184 (PIN_INPUT | MUX_MODE0) /* i2c5_scl */
178 0x186 (PIN_INPUT | MUX_MODE0) /* i2c5_sda */
Sourav Poddar9be495c2013-02-13 14:58:22 +0530179 >;
180 };
Sourav Poddar392adaf2013-02-13 14:58:44 +0530181
182 mcspi2_pins: pinmux_mcspi2_pins {
183 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200184 0xbc (PIN_INPUT | MUX_MODE0) /* mcspi2_clk */
185 0xbe (PIN_INPUT | MUX_MODE0) /* mcspi2_simo */
186 0xc0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi2_somi */
Eric Witcher05bc85d2013-10-18 02:42:34 -0400187 0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs0 */
Sourav Poddar392adaf2013-02-13 14:58:44 +0530188 >;
189 };
190
191 mcspi3_pins: pinmux_mcspi3_pins {
192 pinctrl-single,pins = <
Eric Witcher05bc85d2013-10-18 02:42:34 -0400193 0x78 (PIN_INPUT | MUX_MODE1) /* mcspi3_somi */
194 0x7a (PIN_INPUT | MUX_MODE1) /* mcspi3_cs0 */
195 0x7c (PIN_INPUT | MUX_MODE1) /* mcspi3_simo */
196 0x7e (PIN_INPUT | MUX_MODE1) /* mcspi3_clk */
Sourav Poddar392adaf2013-02-13 14:58:44 +0530197 >;
198 };
199
200 mcspi4_pins: pinmux_mcspi4_pins {
201 pinctrl-single,pins = <
Eric Witcher05bc85d2013-10-18 02:42:34 -0400202 0x164 (PIN_INPUT | MUX_MODE1) /* mcspi4_clk */
203 0x168 (PIN_INPUT | MUX_MODE1) /* mcspi4_simo */
204 0x16a (PIN_INPUT | MUX_MODE1) /* mcspi4_somi */
205 0x16c (PIN_INPUT | MUX_MODE1) /* mcspi4_cs0 */
Sourav Poddar392adaf2013-02-13 14:58:44 +0530206 >;
207 };
Roger Quadrosed7f8e82013-06-07 18:52:48 +0530208
209 usbhost_pins: pinmux_usbhost_pins {
210 pinctrl-single,pins = <
211 0x84 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
212 0x86 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_data */
213
214 0x19e (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe */
215 0x1a0 (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data */
216
217 0x70 (PIN_OUTPUT | MUX_MODE6) /* gpio3_80 HUB_NRESET */
218 0x6e (PIN_OUTPUT | MUX_MODE6) /* gpio3_79 ETH_NRESET */
219 >;
220 };
Dan Murphy66155302013-06-07 18:52:49 +0530221
222 led_gpio_pins: pinmux_led_gpio_pins {
223 pinctrl-single,pins = <
224 0x196 (PIN_OUTPUT | MUX_MODE6) /* uart3_cts_rctx.gpio5_153 */
225 >;
226 };
Sourav Poddared22fee2013-06-07 18:52:50 +0530227
228 uart1_pins: pinmux_uart1_pins {
229 pinctrl-single,pins = <
230 0x60 (PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_cts */
231 0x62 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_tx.uart1_cts */
232 0x64 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rx.uart1_rts */
233 0x66 (PIN_OUTPUT | MUX_MODE0) /* uart1_rx.uart1_rts */
234 >;
235 };
236
237 uart3_pins: pinmux_uart3_pins {
238 pinctrl-single,pins = <
239 0x19a (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_irsd.uart3_tx_irtx */
240 0x19c (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_rx_irrx.uart3_usbb3_hsic */
241 >;
242 };
243
244 uart5_pins: pinmux_uart5_pins {
245 pinctrl-single,pins = <
246 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_rx.uart5_rx */
247 0x172 (PIN_OUTPUT | MUX_MODE0) /* uart5_tx.uart5_tx */
248 0x174 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_cts.uart5_rts */
249 0x176 (PIN_OUTPUT | MUX_MODE0) /* uart5_cts.uart5_rts */
250 >;
251 };
252
Tomi Valkeinen6ac732e2014-03-12 11:57:03 +0200253 dss_hdmi_pins: pinmux_dss_hdmi_pins {
254 pinctrl-single,pins = <
255 0x0fc (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */
256 0x100 (PIN_INPUT | MUX_MODE0) /* hdmi_ddc_scl.hdmi_ddc_scl */
257 0x102 (PIN_INPUT | MUX_MODE0) /* hdmi_ddc_sda.hdmi_ddc_sda */
258 >;
259 };
260
261 tpd12s015_pins: pinmux_tpd12s015_pins {
262 pinctrl-single,pins = <
263 0x0fe (PIN_INPUT_PULLDOWN | MUX_MODE6) /* hdmi_hpd.gpio7_193 */
264 >;
265 };
Roger Quadrosed7f8e82013-06-07 18:52:48 +0530266};
267
268&omap5_pmx_wkup {
269 pinctrl-names = "default";
270 pinctrl-0 = <
271 &usbhost_wkup_pins
272 >;
273
274 usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
275 pinctrl-single,pins = <
276 0x1A (PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
277 >;
278 };
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300279};
280
Balaji T K5dd18b02012-08-07 12:48:21 +0530281&mmc1 {
Nishanth Menone18235a2013-07-29 12:03:02 -0500282 vmmc-supply = <&ldo9_reg>;
Balaji T K5dd18b02012-08-07 12:48:21 +0530283 bus-width = <4>;
284};
285
286&mmc2 {
287 vmmc-supply = <&vmmcsd_fixed>;
288 bus-width = <8>;
289 ti,non-removable;
290};
291
292&mmc3 {
293 bus-width = <4>;
294 ti,non-removable;
295};
296
297&mmc4 {
298 status = "disabled";
299};
300
301&mmc5 {
302 status = "disabled";
R Sricharan6b5de092012-05-10 19:46:00 +0530303};
Sourav Poddar08f3e212012-07-25 11:02:43 +0530304
Sourav Poddar9be495c2013-02-13 14:58:22 +0530305&i2c1 {
306 pinctrl-names = "default";
307 pinctrl-0 = <&i2c1_pins>;
308
309 clock-frequency = <400000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530310
311 palmas: palmas@48 {
312 compatible = "ti,palmas";
313 interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
314 interrupt-parent = <&gic>;
315 reg = <0x48>;
316 interrupt-controller;
317 #interrupt-cells = <2>;
Nishanth Menon86583372013-09-19 14:11:36 -0500318 ti,system-power-controller;
J Keerthye00c27e2013-06-13 10:00:11 +0530319
Felipe Balbie3a412c2013-08-21 20:01:32 +0530320 extcon_usb3: palmas_usb {
321 compatible = "ti,palmas-usb-vid";
322 ti,enable-vbus-detection;
323 ti,enable-id-detection;
324 ti,wakeup;
325 };
326
Peter Ujfalusi55be2c52014-07-10 14:24:01 +0300327 clk32kgaudio: palmas_clk32k@1 {
328 compatible = "ti,palmas-clk32kgaudio";
329 #clock-cells = <0>;
330 };
331
J Keerthye00c27e2013-06-13 10:00:11 +0530332 palmas_pmic {
333 compatible = "ti,palmas-pmic";
334 interrupt-parent = <&palmas>;
335 interrupts = <14 IRQ_TYPE_NONE>;
336 interrupt-name = "short-irq";
337
338 ti,ldo6-vibrator;
339
340 regulators {
341 smps123_reg: smps123 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500342 /* VDD_OPP_MPU */
J Keerthye00c27e2013-06-13 10:00:11 +0530343 regulator-name = "smps123";
344 regulator-min-microvolt = < 600000>;
345 regulator-max-microvolt = <1500000>;
346 regulator-always-on;
347 regulator-boot-on;
348 };
349
350 smps45_reg: smps45 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500351 /* VDD_OPP_MM */
J Keerthye00c27e2013-06-13 10:00:11 +0530352 regulator-name = "smps45";
353 regulator-min-microvolt = < 600000>;
354 regulator-max-microvolt = <1310000>;
355 regulator-always-on;
356 regulator-boot-on;
357 };
358
359 smps6_reg: smps6 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500360 /* VDD_DDR3 - over VDD_SMPS6 */
J Keerthye00c27e2013-06-13 10:00:11 +0530361 regulator-name = "smps6";
362 regulator-min-microvolt = <1200000>;
363 regulator-max-microvolt = <1200000>;
364 regulator-always-on;
365 regulator-boot-on;
366 };
367
368 smps7_reg: smps7 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500369 /* VDDS_1v8_OMAP over VDDS_1v8_MAIN */
J Keerthye00c27e2013-06-13 10:00:11 +0530370 regulator-name = "smps7";
371 regulator-min-microvolt = <1800000>;
372 regulator-max-microvolt = <1800000>;
373 regulator-always-on;
374 regulator-boot-on;
375 };
376
377 smps8_reg: smps8 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500378 /* VDD_OPP_CORE */
J Keerthye00c27e2013-06-13 10:00:11 +0530379 regulator-name = "smps8";
380 regulator-min-microvolt = < 600000>;
381 regulator-max-microvolt = <1310000>;
382 regulator-always-on;
383 regulator-boot-on;
384 };
385
386 smps9_reg: smps9 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500387 /* VDDA_2v1_AUD over VDD_2v1 */
J Keerthye00c27e2013-06-13 10:00:11 +0530388 regulator-name = "smps9";
389 regulator-min-microvolt = <2100000>;
390 regulator-max-microvolt = <2100000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530391 ti,smps-range = <0x80>;
392 };
393
Kishon Vijay Abraham I94489962013-08-12 15:07:01 +0530394 smps10_out2_reg: smps10_out2 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500395 /* VBUS_5V_OTG */
Kishon Vijay Abraham I94489962013-08-12 15:07:01 +0530396 regulator-name = "smps10_out2";
397 regulator-min-microvolt = <5000000>;
398 regulator-max-microvolt = <5000000>;
399 regulator-always-on;
400 regulator-boot-on;
401 };
402
403 smps10_out1_reg: smps10_out1 {
404 /* VBUS_5V_OTG */
405 regulator-name = "smps10_out1";
J Keerthye00c27e2013-06-13 10:00:11 +0530406 regulator-min-microvolt = <5000000>;
407 regulator-max-microvolt = <5000000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530408 };
409
410 ldo1_reg: ldo1 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500411 /* VDDAPHY_CAM: vdda_csiport */
J Keerthye00c27e2013-06-13 10:00:11 +0530412 regulator-name = "ldo1";
Nishanth Menone18235a2013-07-29 12:03:02 -0500413 regulator-min-microvolt = <1500000>;
414 regulator-max-microvolt = <1800000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530415 };
416
417 ldo2_reg: ldo2 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500418 /* VCC_2V8_DISP: Does not go anywhere */
J Keerthye00c27e2013-06-13 10:00:11 +0530419 regulator-name = "ldo2";
Nishanth Menonbd3c5542013-07-29 12:03:03 -0500420 regulator-min-microvolt = <2800000>;
421 regulator-max-microvolt = <2800000>;
422 /* Unused */
423 status = "disabled";
J Keerthye00c27e2013-06-13 10:00:11 +0530424 };
425
426 ldo3_reg: ldo3 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500427 /* VDDAPHY_MDM: vdda_lli */
J Keerthye00c27e2013-06-13 10:00:11 +0530428 regulator-name = "ldo3";
Nishanth Menone18235a2013-07-29 12:03:02 -0500429 regulator-min-microvolt = <1500000>;
430 regulator-max-microvolt = <1500000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530431 regulator-boot-on;
Nishanth Menone18235a2013-07-29 12:03:02 -0500432 /* Only if Modem is used */
433 status = "disabled";
J Keerthye00c27e2013-06-13 10:00:11 +0530434 };
435
436 ldo4_reg: ldo4 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500437 /* VDDAPHY_DISP: vdda_dsiport/hdmi */
J Keerthye00c27e2013-06-13 10:00:11 +0530438 regulator-name = "ldo4";
Nishanth Menone18235a2013-07-29 12:03:02 -0500439 regulator-min-microvolt = <1500000>;
440 regulator-max-microvolt = <1800000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530441 };
442
443 ldo5_reg: ldo5 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500444 /* VDDA_1V8_PHY: usb/sata/hdmi.. */
J Keerthye00c27e2013-06-13 10:00:11 +0530445 regulator-name = "ldo5";
446 regulator-min-microvolt = <1800000>;
447 regulator-max-microvolt = <1800000>;
448 regulator-always-on;
449 regulator-boot-on;
450 };
451
452 ldo6_reg: ldo6 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500453 /* VDDS_1V2_WKUP: hsic/ldo_emu_wkup */
J Keerthye00c27e2013-06-13 10:00:11 +0530454 regulator-name = "ldo6";
Nishanth Menone18235a2013-07-29 12:03:02 -0500455 regulator-min-microvolt = <1200000>;
456 regulator-max-microvolt = <1200000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530457 regulator-always-on;
458 regulator-boot-on;
459 };
460
461 ldo7_reg: ldo7 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500462 /* VDD_VPP: vpp1 */
J Keerthye00c27e2013-06-13 10:00:11 +0530463 regulator-name = "ldo7";
Nishanth Menone18235a2013-07-29 12:03:02 -0500464 regulator-min-microvolt = <2000000>;
465 regulator-max-microvolt = <2000000>;
466 /* Only for efuse reprograming! */
467 status = "disabled";
J Keerthye00c27e2013-06-13 10:00:11 +0530468 };
469
470 ldo8_reg: ldo8 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500471 /* VDD_3v0: Does not go anywhere */
J Keerthye00c27e2013-06-13 10:00:11 +0530472 regulator-name = "ldo8";
Nishanth Menonbd3c5542013-07-29 12:03:03 -0500473 regulator-min-microvolt = <3000000>;
474 regulator-max-microvolt = <3000000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530475 regulator-boot-on;
Nishanth Menonbd3c5542013-07-29 12:03:03 -0500476 /* Unused */
477 status = "disabled";
J Keerthye00c27e2013-06-13 10:00:11 +0530478 };
479
480 ldo9_reg: ldo9 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500481 /* VCC_DV_SDIO: vdds_sdcard */
J Keerthye00c27e2013-06-13 10:00:11 +0530482 regulator-name = "ldo9";
483 regulator-min-microvolt = <1800000>;
Nishanth Menone18235a2013-07-29 12:03:02 -0500484 regulator-max-microvolt = <3000000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530485 regulator-boot-on;
486 };
487
488 ldoln_reg: ldoln {
Nishanth Menon3709d322013-07-29 12:03:01 -0500489 /* VDDA_1v8_REF: vdds_osc/mm_l4per.. */
J Keerthye00c27e2013-06-13 10:00:11 +0530490 regulator-name = "ldoln";
491 regulator-min-microvolt = <1800000>;
492 regulator-max-microvolt = <1800000>;
493 regulator-always-on;
494 regulator-boot-on;
495 };
496
497 ldousb_reg: ldousb {
Nishanth Menon3709d322013-07-29 12:03:01 -0500498 /* VDDA_3V_USB: VDDA_USBHS33 */
J Keerthye00c27e2013-06-13 10:00:11 +0530499 regulator-name = "ldousb";
500 regulator-min-microvolt = <3250000>;
501 regulator-max-microvolt = <3250000>;
502 regulator-always-on;
503 regulator-boot-on;
504 };
Nishanth Menone18235a2013-07-29 12:03:02 -0500505
506 regen3_reg: regen3 {
507 /* REGEN3 controls LDO9 supply to card */
508 regulator-name = "regen3";
509 regulator-always-on;
510 regulator-boot-on;
511 };
J Keerthye00c27e2013-06-13 10:00:11 +0530512 };
513 };
514 };
Peter Ujfalusi4b54a2c2014-07-10 14:24:02 +0300515
516 twl6040: twl@4b {
517 compatible = "ti,twl6040";
518 reg = <0x4b>;
519
520 pinctrl-names = "default";
521 pinctrl-0 = <&twl6040_pins>;
522
523 interrupts = <GIC_SPI 119 IRQ_TYPE_NONE>; /* IRQ_SYS_2N cascaded to gic */
524 interrupt-parent = <&gic>;
525 ti,audpwron-gpio = <&gpio5 13 0>; /* gpio line 141 */
526
527 vio-supply = <&smps7_reg>;
528 v2v1-supply = <&smps9_reg>;
529 enable-active-high;
530
531 clocks = <&clk32kgaudio>;
532 clock-names = "clk32k";
533 };
Sourav Poddar9be495c2013-02-13 14:58:22 +0530534};
535
Sourav Poddar9be495c2013-02-13 14:58:22 +0530536&i2c5 {
537 pinctrl-names = "default";
538 pinctrl-0 = <&i2c5_pins>;
539
540 clock-frequency = <400000>;
Tomi Valkeinen6f0ab9a2014-03-12 11:53:26 +0200541
542 gpio9: gpio@22 {
543 compatible = "ti,tca6424";
544 reg = <0x22>;
545 gpio-controller;
546 #gpio-cells = <2>;
547 };
Sourav Poddar9be495c2013-02-13 14:58:22 +0530548};
549
Peter Ujfalusi3c9464e2014-07-10 14:24:03 +0300550&mcpdm {
551 pinctrl-names = "default";
552 pinctrl-0 = <&mcpdm_pins>;
553 status = "okay";
554};
555
556&mcbsp1 {
557 pinctrl-names = "default";
558 pinctrl-0 = <&mcbsp1_pins>;
559 status = "okay";
560};
561
562&mcbsp2 {
563 pinctrl-names = "default";
564 pinctrl-0 = <&mcbsp2_pins>;
565 status = "okay";
Peter Ujfalusi42601d52012-10-04 14:57:24 +0300566};
Lokesh Vutla4d2750f2012-11-05 18:22:52 +0530567
Roger Quadrosed7f8e82013-06-07 18:52:48 +0530568&usbhshost {
569 port2-mode = "ehci-hsic";
570 port3-mode = "ehci-hsic";
571};
572
573&usbhsehci {
574 phys = <0 &hsusb2_phy &hsusb3_phy>;
575};
576
Felipe Balbie3a412c2013-08-21 20:01:32 +0530577&usb3 {
578 extcon = <&extcon_usb3>;
579 vbus-supply = <&smps10_out1_reg>;
580};
581
Sourav Poddar392adaf2013-02-13 14:58:44 +0530582&mcspi1 {
583
584};
585
586&mcspi2 {
587 pinctrl-names = "default";
588 pinctrl-0 = <&mcspi2_pins>;
589};
590
591&mcspi3 {
592 pinctrl-names = "default";
593 pinctrl-0 = <&mcspi3_pins>;
594};
595
596&mcspi4 {
597 pinctrl-names = "default";
598 pinctrl-0 = <&mcspi4_pins>;
599};
Sourav Poddared22fee2013-06-07 18:52:50 +0530600
601&uart1 {
602 pinctrl-names = "default";
603 pinctrl-0 = <&uart1_pins>;
604};
605
606&uart3 {
607 pinctrl-names = "default";
608 pinctrl-0 = <&uart3_pins>;
609};
610
611&uart5 {
612 pinctrl-names = "default";
613 pinctrl-0 = <&uart5_pins>;
614};
Nishanth Menonb8981d72013-10-16 10:39:04 -0500615
616&cpu0 {
617 cpu0-supply = <&smps123_reg>;
618};
Tomi Valkeinen6ac732e2014-03-12 11:57:03 +0200619
620&dss {
621 status = "ok";
622};
623
624&hdmi {
625 status = "ok";
626 vdda-supply = <&ldo4_reg>;
627
628 pinctrl-names = "default";
629 pinctrl-0 = <&dss_hdmi_pins>;
630
631 port {
632 hdmi_out: endpoint {
633 remote-endpoint = <&tpd12s015_in>;
634 };
635 };
636};