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Takashi Iwaief5fa1a2007-07-27 16:52:46 +02001#ifndef __SOUND_HDSPM_H
Takashi Iwai763f3562005-06-03 11:25:34 +02002#define __SOUND_HDSPM_H
3/*
4 * Copyright (C) 2003 Winfried Ritsch (IEM)
5 * based on hdsp.h from Thomas Charbonnel (thomas@undata.org)
Adrian Knoth0dca1792011-01-26 19:32:14 +01006 *
7 *
Takashi Iwai763f3562005-06-03 11:25:34 +02008 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
Mikko Rapeli76a3aea2015-02-17 00:05:27 +010023#include <linux/types.h>
Mikko Rapeli76a3aea2015-02-17 00:05:27 +010024
Takashi Iwai763f3562005-06-03 11:25:34 +020025/* Maximum channels is 64 even on 56Mode you have 64playbacks to matrix */
26#define HDSPM_MAX_CHANNELS 64
27
Adrian Knoth0dca1792011-01-26 19:32:14 +010028enum hdspm_io_type {
29 MADI,
30 MADIface,
31 AIO,
32 AES32,
33 RayDAT
34};
35
36enum hdspm_speed {
37 ss,
38 ds,
39 qs
40};
41
Takashi Iwai763f3562005-06-03 11:25:34 +020042/* -------------------- IOCTL Peak/RMS Meters -------------------- */
43
Takashi Iwai98274f02005-11-17 14:52:34 +010044struct hdspm_peak_rms {
Mikko Rapeliffc287c2015-10-15 07:56:06 +020045 __u32 input_peaks[64];
46 __u32 playback_peaks[64];
47 __u32 output_peaks[64];
Takashi Iwai763f3562005-06-03 11:25:34 +020048
Mikko Rapeliffc287c2015-10-15 07:56:06 +020049 __u64 input_rms[64];
50 __u64 playback_rms[64];
51 __u64 output_rms[64];
Takashi Iwai763f3562005-06-03 11:25:34 +020052
Mikko Rapeliffc287c2015-10-15 07:56:06 +020053 __u8 speed; /* enum {ss, ds, qs} */
Adrian Knoth0dca1792011-01-26 19:32:14 +010054 int status2;
Takashi Iwai763f3562005-06-03 11:25:34 +020055};
56
Takashi Iwaief5fa1a2007-07-27 16:52:46 +020057#define SNDRV_HDSPM_IOCTL_GET_PEAK_RMS \
Adrian Knoth0dca1792011-01-26 19:32:14 +010058 _IOR('H', 0x42, struct hdspm_peak_rms)
Takashi Iwai763f3562005-06-03 11:25:34 +020059
60/* ------------ CONFIG block IOCTL ---------------------- */
61
Adrian Knoth0dca1792011-01-26 19:32:14 +010062struct hdspm_config {
Takashi Iwai763f3562005-06-03 11:25:34 +020063 unsigned char pref_sync_ref;
64 unsigned char wordclock_sync_check;
65 unsigned char madi_sync_check;
66 unsigned int system_sample_rate;
67 unsigned int autosync_sample_rate;
68 unsigned char system_clock_mode;
69 unsigned char clock_source;
70 unsigned char autosync_ref;
71 unsigned char line_out;
72 unsigned int passthru;
73 unsigned int analog_out;
74};
75
Adrian Knoth0dca1792011-01-26 19:32:14 +010076#define SNDRV_HDSPM_IOCTL_GET_CONFIG \
77 _IOR('H', 0x41, struct hdspm_config)
Takashi Iwai763f3562005-06-03 11:25:34 +020078
Takashi Iwaiddcecf62014-11-10 17:24:26 +010079/*
Adrian Knoth0dca1792011-01-26 19:32:14 +010080 * If there's a TCO (TimeCode Option) board installed,
81 * there are further options and status data available.
82 * The hdspm_ltc structure contains the current SMPTE
83 * timecode and some status information and can be
84 * obtained via SNDRV_HDSPM_IOCTL_GET_LTC or in the
85 * hdspm_status struct.
Takashi Iwaiddcecf62014-11-10 17:24:26 +010086 */
Takashi Iwai763f3562005-06-03 11:25:34 +020087
Adrian Knoth0dca1792011-01-26 19:32:14 +010088enum hdspm_ltc_format {
89 format_invalid,
90 fps_24,
91 fps_25,
92 fps_2997,
93 fps_30
Takashi Iwai763f3562005-06-03 11:25:34 +020094};
95
Adrian Knoth0dca1792011-01-26 19:32:14 +010096enum hdspm_ltc_frame {
97 frame_invalid,
98 drop_frame,
99 full_frame
100};
Takashi Iwai763f3562005-06-03 11:25:34 +0200101
Adrian Knoth0dca1792011-01-26 19:32:14 +0100102enum hdspm_ltc_input_format {
103 ntsc,
104 pal,
105 no_video
106};
107
108struct hdspm_ltc {
109 unsigned int ltc;
110
111 enum hdspm_ltc_format format;
112 enum hdspm_ltc_frame frame;
113 enum hdspm_ltc_input_format input_format;
114};
115
Adrian Knothb43dd412013-08-19 17:20:32 +0200116#define SNDRV_HDSPM_IOCTL_GET_LTC _IOR('H', 0x46, struct hdspm_ltc)
Adrian Knoth0dca1792011-01-26 19:32:14 +0100117
Takashi Iwaiddcecf62014-11-10 17:24:26 +0100118/*
Adrian Knoth0dca1792011-01-26 19:32:14 +0100119 * The status data reflects the device's current state
120 * as determined by the card's configuration and
121 * connection status.
Takashi Iwaiddcecf62014-11-10 17:24:26 +0100122 */
Adrian Knoth0dca1792011-01-26 19:32:14 +0100123
124enum hdspm_sync {
125 hdspm_sync_no_lock = 0,
126 hdspm_sync_lock = 1,
127 hdspm_sync_sync = 2
128};
129
130enum hdspm_madi_input {
131 hdspm_input_optical = 0,
132 hdspm_input_coax = 1
133};
134
135enum hdspm_madi_channel_format {
136 hdspm_format_ch_64 = 0,
137 hdspm_format_ch_56 = 1
138};
139
140enum hdspm_madi_frame_format {
141 hdspm_frame_48 = 0,
142 hdspm_frame_96 = 1
143};
144
145enum hdspm_syncsource {
146 syncsource_wc = 0,
147 syncsource_madi = 1,
148 syncsource_tco = 2,
149 syncsource_sync = 3,
150 syncsource_none = 4
151};
152
153struct hdspm_status {
Mikko Rapeliffc287c2015-10-15 07:56:06 +0200154 __u8 card_type; /* enum hdspm_io_type */
Adrian Knoth0dca1792011-01-26 19:32:14 +0100155 enum hdspm_syncsource autosync_source;
156
Mikko Rapeliffc287c2015-10-15 07:56:06 +0200157 __u64 card_clock;
158 __u32 master_period;
Adrian Knoth0dca1792011-01-26 19:32:14 +0100159
160 union {
161 struct {
Mikko Rapeliffc287c2015-10-15 07:56:06 +0200162 __u8 sync_wc; /* enum hdspm_sync */
163 __u8 sync_madi; /* enum hdspm_sync */
164 __u8 sync_tco; /* enum hdspm_sync */
165 __u8 sync_in; /* enum hdspm_sync */
166 __u8 madi_input; /* enum hdspm_madi_input */
167 __u8 channel_format; /* enum hdspm_madi_channel_format */
168 __u8 frame_format; /* enum hdspm_madi_frame_format */
Adrian Knoth0dca1792011-01-26 19:32:14 +0100169 } madi;
170 } card_specific;
171};
172
173#define SNDRV_HDSPM_IOCTL_GET_STATUS \
174 _IOR('H', 0x47, struct hdspm_status)
175
Takashi Iwaiddcecf62014-11-10 17:24:26 +0100176/*
Adrian Knoth0dca1792011-01-26 19:32:14 +0100177 * Get information about the card and its add-ons.
Takashi Iwaiddcecf62014-11-10 17:24:26 +0100178 */
Adrian Knoth0dca1792011-01-26 19:32:14 +0100179
180#define HDSPM_ADDON_TCO 1
181
182struct hdspm_version {
Mikko Rapeliffc287c2015-10-15 07:56:06 +0200183 __u8 card_type; /* enum hdspm_io_type */
Adrian Knoth0dca1792011-01-26 19:32:14 +0100184 char cardname[20];
185 unsigned int serial;
186 unsigned short firmware_rev;
187 int addons;
188};
189
190#define SNDRV_HDSPM_IOCTL_GET_VERSION _IOR('H', 0x48, struct hdspm_version)
Takashi Iwai763f3562005-06-03 11:25:34 +0200191
192/* ------------- get Matrix Mixer IOCTL --------------- */
193
Takashi Iwaief5fa1a2007-07-27 16:52:46 +0200194/* MADI mixer: 64inputs+64playback in 64outputs = 8192 => *4Byte =
195 * 32768 Bytes
196 */
Takashi Iwai763f3562005-06-03 11:25:34 +0200197
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300198/* organisation is 64 channelfader in a continuous memory block */
Takashi Iwaief5fa1a2007-07-27 16:52:46 +0200199/* equivalent to hardware definition, maybe for future feature of mmap of
200 * them
201 */
Adrian Knoth0dca1792011-01-26 19:32:14 +0100202/* each of 64 outputs has 64 infader and 64 outfader:
Takashi Iwai763f3562005-06-03 11:25:34 +0200203 Ins to Outs mixer[out].in[in], Outstreams to Outs mixer[out].pb[pb] */
204
205#define HDSPM_MIXER_CHANNELS HDSPM_MAX_CHANNELS
206
Takashi Iwai98274f02005-11-17 14:52:34 +0100207struct hdspm_channelfader {
Takashi Iwai763f3562005-06-03 11:25:34 +0200208 unsigned int in[HDSPM_MIXER_CHANNELS];
209 unsigned int pb[HDSPM_MIXER_CHANNELS];
210};
211
Takashi Iwai98274f02005-11-17 14:52:34 +0100212struct hdspm_mixer {
213 struct hdspm_channelfader ch[HDSPM_MIXER_CHANNELS];
Takashi Iwai763f3562005-06-03 11:25:34 +0200214};
215
Takashi Iwai98274f02005-11-17 14:52:34 +0100216struct hdspm_mixer_ioctl {
217 struct hdspm_mixer *mixer;
Takashi Iwai763f3562005-06-03 11:25:34 +0200218};
219
220/* use indirect access due to the limit of ioctl bit size */
Takashi Iwai98274f02005-11-17 14:52:34 +0100221#define SNDRV_HDSPM_IOCTL_GET_MIXER _IOR('H', 0x44, struct hdspm_mixer_ioctl)
222
223/* typedefs for compatibility to user-space */
224typedef struct hdspm_peak_rms hdspm_peak_rms_t;
225typedef struct hdspm_config_info hdspm_config_info_t;
226typedef struct hdspm_version hdspm_version_t;
227typedef struct hdspm_channelfader snd_hdspm_channelfader_t;
228typedef struct hdspm_mixer hdspm_mixer_t;
Takashi Iwai763f3562005-06-03 11:25:34 +0200229
Adrian Knoth0dca1792011-01-26 19:32:14 +0100230
231#endif