Jesper Nilsson | 035e111 | 2007-11-29 17:11:23 +0100 | [diff] [blame] | 1 | #include <linux/init.h> |
| 2 | #include <linux/module.h> |
| 3 | #include <linux/cpufreq.h> |
| 4 | #include <hwregs/reg_map.h> |
| 5 | #include <hwregs/reg_rdwr.h> |
| 6 | #include <hwregs/clkgen_defs.h> |
| 7 | #include <hwregs/ddr2_defs.h> |
| 8 | |
| 9 | static int |
| 10 | cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val, |
| 11 | void *data); |
| 12 | |
| 13 | static struct notifier_block cris_sdram_freq_notifier_block = { |
| 14 | .notifier_call = cris_sdram_freq_notifier |
| 15 | }; |
| 16 | |
| 17 | static struct cpufreq_frequency_table cris_freq_table[] = { |
| 18 | {0x01, 6000}, |
| 19 | {0x02, 200000}, |
| 20 | {0, CPUFREQ_TABLE_END}, |
| 21 | }; |
| 22 | |
| 23 | static unsigned int cris_freq_get_cpu_frequency(unsigned int cpu) |
| 24 | { |
| 25 | reg_clkgen_rw_clk_ctrl clk_ctrl; |
| 26 | clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl); |
| 27 | return clk_ctrl.pll ? 200000 : 6000; |
| 28 | } |
| 29 | |
Viresh Kumar | 9c0ebcf | 2013-10-25 19:45:48 +0530 | [diff] [blame^] | 30 | static int cris_freq_target(struct cpufreq_policy *policy, unsigned int state) |
Jesper Nilsson | 035e111 | 2007-11-29 17:11:23 +0100 | [diff] [blame] | 31 | { |
Jesper Nilsson | 035e111 | 2007-11-29 17:11:23 +0100 | [diff] [blame] | 32 | struct cpufreq_freqs freqs; |
| 33 | reg_clkgen_rw_clk_ctrl clk_ctrl; |
| 34 | clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl); |
| 35 | |
Viresh Kumar | b43a7ff | 2013-03-24 11:56:43 +0530 | [diff] [blame] | 36 | freqs.old = cris_freq_get_cpu_frequency(policy->cpu); |
| 37 | freqs.new = cris_freq_table[state].frequency; |
Jesper Nilsson | 035e111 | 2007-11-29 17:11:23 +0100 | [diff] [blame] | 38 | |
Viresh Kumar | b43a7ff | 2013-03-24 11:56:43 +0530 | [diff] [blame] | 39 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); |
Jesper Nilsson | 035e111 | 2007-11-29 17:11:23 +0100 | [diff] [blame] | 40 | |
| 41 | local_irq_disable(); |
| 42 | |
| 43 | /* Even though we may be SMP they will share the same clock |
| 44 | * so all settings are made on CPU0. */ |
| 45 | if (cris_freq_table[state].frequency == 200000) |
| 46 | clk_ctrl.pll = 1; |
| 47 | else |
| 48 | clk_ctrl.pll = 0; |
| 49 | REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl); |
| 50 | |
| 51 | local_irq_enable(); |
| 52 | |
Viresh Kumar | b43a7ff | 2013-03-24 11:56:43 +0530 | [diff] [blame] | 53 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); |
Jesper Nilsson | 035e111 | 2007-11-29 17:11:23 +0100 | [diff] [blame] | 54 | |
| 55 | return 0; |
| 56 | } |
| 57 | |
| 58 | static int cris_freq_cpu_init(struct cpufreq_policy *policy) |
| 59 | { |
Viresh Kumar | 1870e11 | 2013-10-03 20:29:10 +0530 | [diff] [blame] | 60 | return cpufreq_generic_init(policy, cris_freq_table, 1000000); |
Jesper Nilsson | 035e111 | 2007-11-29 17:11:23 +0100 | [diff] [blame] | 61 | } |
| 62 | |
Jesper Nilsson | 035e111 | 2007-11-29 17:11:23 +0100 | [diff] [blame] | 63 | static struct cpufreq_driver cris_freq_driver = { |
| 64 | .get = cris_freq_get_cpu_frequency, |
Viresh Kumar | 361db10 | 2013-10-03 20:28:01 +0530 | [diff] [blame] | 65 | .verify = cpufreq_generic_frequency_table_verify, |
Viresh Kumar | 9c0ebcf | 2013-10-25 19:45:48 +0530 | [diff] [blame^] | 66 | .target_index = cris_freq_target, |
Jesper Nilsson | 035e111 | 2007-11-29 17:11:23 +0100 | [diff] [blame] | 67 | .init = cris_freq_cpu_init, |
Viresh Kumar | 361db10 | 2013-10-03 20:28:01 +0530 | [diff] [blame] | 68 | .exit = cpufreq_generic_exit, |
Jesper Nilsson | 035e111 | 2007-11-29 17:11:23 +0100 | [diff] [blame] | 69 | .name = "cris_freq", |
Viresh Kumar | 361db10 | 2013-10-03 20:28:01 +0530 | [diff] [blame] | 70 | .attr = cpufreq_generic_attr, |
Jesper Nilsson | 035e111 | 2007-11-29 17:11:23 +0100 | [diff] [blame] | 71 | }; |
| 72 | |
| 73 | static int __init cris_freq_init(void) |
| 74 | { |
| 75 | int ret; |
| 76 | ret = cpufreq_register_driver(&cris_freq_driver); |
| 77 | cpufreq_register_notifier(&cris_sdram_freq_notifier_block, |
| 78 | CPUFREQ_TRANSITION_NOTIFIER); |
| 79 | return ret; |
| 80 | } |
| 81 | |
| 82 | static int |
| 83 | cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val, |
| 84 | void *data) |
| 85 | { |
| 86 | int i; |
| 87 | struct cpufreq_freqs *freqs = data; |
| 88 | if (val == CPUFREQ_PRECHANGE) { |
| 89 | reg_ddr2_rw_cfg cfg = |
| 90 | REG_RD(ddr2, regi_ddr2_ctrl, rw_cfg); |
| 91 | cfg.ref_interval = (freqs->new == 200000 ? 1560 : 46); |
| 92 | |
| 93 | if (freqs->new == 200000) |
| 94 | for (i = 0; i < 50000; i++); |
| 95 | REG_WR(bif_core, regi_bif_core, rw_sdram_timing, timing); |
| 96 | } |
| 97 | return 0; |
| 98 | } |
| 99 | |
| 100 | |
| 101 | module_init(cris_freq_init); |