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Laurent Pinchart334bc112013-12-06 10:59:53 +01001* Renesas SH-Mobile Serial Communication Interface
2
3Required properties:
4
Geert Uytterhoeven598604f2015-12-11 12:48:15 +01005 - compatible: Must contain one or more of the following:
Laurent Pinchart334bc112013-12-06 10:59:53 +01006
Geert Uytterhoeven681b05f2014-11-14 16:59:32 +01007 - "renesas,scif-r7s72100" for R7S72100 (RZ/A1H) SCIF compatible UART.
Simon Horman34c4eda2014-07-11 11:11:08 +02008 - "renesas,scifa-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFA compatible UART.
9 - "renesas,scifb-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFB compatible UART.
10 - "renesas,scifa-r8a7740" for R8A7740 (R-Mobile A1) SCIFA compatible UART.
11 - "renesas,scifb-r8a7740" for R8A7740 (R-Mobile A1) SCIFB compatible UART.
Sergei Shtylyovc03e1b82016-10-21 23:00:43 +030012 - "renesas,scif-r8a7743" for R8A7743 (RZ/G1M) SCIF compatible UART.
13 - "renesas,scifa-r8a7743" for R8A7743 (RZ/G1M) SCIFA compatible UART.
14 - "renesas,scifb-r8a7743" for R8A7743 (RZ/G1M) SCIFB compatible UART.
15 - "renesas,hscif-r8a7743" for R8A7743 (RZ/G1M) HSCIF compatible UART.
16 - "renesas,scif-r8a7745" for R8A7745 (RZ/G1E) SCIF compatible UART.
17 - "renesas,scifa-r8a7745" for R8A7745 (RZ/G1E) SCIFA compatible UART.
18 - "renesas,scifb-r8a7745" for R8A7745 (RZ/G1E) SCIFB compatible UART.
19 - "renesas,hscif-r8a7745" for R8A7745 (RZ/G1E) HSCIF compatible UART.
Simon Horman34c4eda2014-07-11 11:11:08 +020020 - "renesas,scif-r8a7778" for R8A7778 (R-Car M1) SCIF compatible UART.
Simon Horman81bd1eb2014-05-15 20:00:58 +090021 - "renesas,scif-r8a7779" for R8A7779 (R-Car H1) SCIF compatible UART.
Laurent Pinchart334bc112013-12-06 10:59:53 +010022 - "renesas,scif-r8a7790" for R8A7790 (R-Car H2) SCIF compatible UART.
23 - "renesas,scifa-r8a7790" for R8A7790 (R-Car H2) SCIFA compatible UART.
24 - "renesas,scifb-r8a7790" for R8A7790 (R-Car H2) SCIFB compatible UART.
25 - "renesas,hscif-r8a7790" for R8A7790 (R-Car H2) HSCIF compatible UART.
Ulrich Hecht456ad4a2015-10-19 14:31:49 +020026 - "renesas,scif-r8a7791" for R8A7791 (R-Car M2-W) SCIF compatible UART.
27 - "renesas,scifa-r8a7791" for R8A7791 (R-Car M2-W) SCIFA compatible UART.
28 - "renesas,scifb-r8a7791" for R8A7791 (R-Car M2-W) SCIFB compatible UART.
29 - "renesas,hscif-r8a7791" for R8A7791 (R-Car M2-W) HSCIF compatible UART.
Simon Horman02064172016-01-11 10:39:20 +090030 - "renesas,scif-r8a7792" for R8A7792 (R-Car V2H) SCIF compatible UART.
31 - "renesas,hscif-r8a7792" for R8A7792 (R-Car V2H) HSCIF compatible UART.
Ulrich Hecht456ad4a2015-10-19 14:31:49 +020032 - "renesas,scif-r8a7793" for R8A7793 (R-Car M2-N) SCIF compatible UART.
33 - "renesas,scifa-r8a7793" for R8A7793 (R-Car M2-N) SCIFA compatible UART.
34 - "renesas,scifb-r8a7793" for R8A7793 (R-Car M2-N) SCIFB compatible UART.
35 - "renesas,hscif-r8a7793" for R8A7793 (R-Car M2-N) HSCIF compatible UART.
Ulrich Hechtc5565222014-11-14 16:59:31 +010036 - "renesas,scif-r8a7794" for R8A7794 (R-Car E2) SCIF compatible UART.
37 - "renesas,scifa-r8a7794" for R8A7794 (R-Car E2) SCIFA compatible UART.
38 - "renesas,scifb-r8a7794" for R8A7794 (R-Car E2) SCIFB compatible UART.
39 - "renesas,hscif-r8a7794" for R8A7794 (R-Car E2) HSCIF compatible UART.
Kuninori Morimoto3575b852015-09-30 11:57:33 +020040 - "renesas,scif-r8a7795" for R8A7795 (R-Car H3) SCIF compatible UART.
41 - "renesas,hscif-r8a7795" for R8A7795 (R-Car H3) HSCIF compatible UART.
Hiromitsu Yamasakiac8305c2016-05-12 15:33:58 +090042 - "renesas,scif-r8a7796" for R8A7796 (R-Car M3-W) SCIF compatible UART.
43 - "renesas,hscif-r8a7796" for R8A7796 (R-Car M3-W) HSCIF compatible UART.
Sergei Shtylyov432219f2017-09-02 01:15:13 +030044 - "renesas,scif-r8a77970" for R8A77970 (R-Car V3M) SCIF compatible UART.
45 - "renesas,hscif-r8a77970" for R8A77970 (R-Car V3M) HSCIF compatible UART.
Sergei Shtylyov890fb162018-02-01 22:36:20 +030046 - "renesas,scif-r8a77980" for R8A77980 (R-Car V3H) SCIF compatible UART.
47 - "renesas,hscif-r8a77980" for R8A77980 (R-Car V3H) HSCIF compatible UART.
Geert Uytterhoevendde68262017-08-17 13:16:28 +020048 - "renesas,scif-r8a77995" for R8A77995 (R-Car D3) SCIF compatible UART.
49 - "renesas,hscif-r8a77995" for R8A77995 (R-Car D3) HSCIF compatible UART.
Geert Uytterhoeven681b05f2014-11-14 16:59:32 +010050 - "renesas,scifa-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFA compatible UART.
51 - "renesas,scifb-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFB compatible UART.
Geert Uytterhoeven598604f2015-12-11 12:48:15 +010052 - "renesas,rcar-gen1-scif" for R-Car Gen1 SCIF compatible UART,
53 - "renesas,rcar-gen2-scif" for R-Car Gen2 SCIF compatible UART,
54 - "renesas,rcar-gen3-scif" for R-Car Gen3 SCIF compatible UART,
55 - "renesas,rcar-gen2-scifa" for R-Car Gen2 SCIFA compatible UART,
56 - "renesas,rcar-gen2-scifb" for R-Car Gen2 SCIFB compatible UART,
57 - "renesas,rcar-gen1-hscif" for R-Car Gen1 HSCIF compatible UART,
58 - "renesas,rcar-gen2-hscif" for R-Car Gen2 HSCIF compatible UART,
59 - "renesas,rcar-gen3-hscif" for R-Car Gen3 HSCIF compatible UART,
Laurent Pinchart334bc112013-12-06 10:59:53 +010060 - "renesas,scif" for generic SCIF compatible UART.
61 - "renesas,scifa" for generic SCIFA compatible UART.
62 - "renesas,scifb" for generic SCIFB compatible UART.
63 - "renesas,hscif" for generic HSCIF compatible UART.
Yoshinori Satoe1d0be62015-01-28 02:53:55 +090064 - "renesas,sci" for generic SCI compatible UART.
Laurent Pinchart334bc112013-12-06 10:59:53 +010065
66 When compatible with the generic version, nodes must list the
Geert Uytterhoeven598604f2015-12-11 12:48:15 +010067 SoC-specific version corresponding to the platform first, followed by the
68 family-specific and/or generic versions.
Laurent Pinchart334bc112013-12-06 10:59:53 +010069
70 - reg: Base address and length of the I/O registers used by the UART.
71 - interrupts: Must contain an interrupt-specifier for the SCIx interrupt.
72
73 - clocks: Must contain a phandle and clock-specifier pair for each entry
74 in clock-names.
Laurent Pincharta9ec81f2015-09-14 15:14:23 +030075 - clock-names: Must contain "fck" for the SCIx UART functional clock.
Geert Uytterhoeven9a040c92015-11-12 13:44:29 +010076 Apart from the divided functional clock, there may be other possible
77 sources for the sampling clock, depending on SCIx variant.
78 On (H)SCI(F) and some SCIFA, an additional clock may be specified:
79 - "hsck" for the optional external clock input (on HSCIF),
80 - "sck" for the optional external clock input (on other variants).
Geert Uytterhoeven176ae5f2015-10-26 09:43:22 +010081 On UARTs equipped with a Baud Rate Generator for External Clock (BRG)
82 (some SCIF and HSCIF), additional clocks may be specified:
83 - "brg_int" for the optional internal clock source for the frequency
84 divider (typically the (AXI or SHwy) bus clock),
85 - "scif_clk" for the optional external clock source for the frequency
86 divider (SCIF_CLK).
Laurent Pinchart334bc112013-12-06 10:59:53 +010087
88Note: Each enabled SCIx UART should have an alias correctly numbered in the
89"aliases" node.
90
Geert Uytterhoeven3c991212015-05-20 19:46:24 +020091Optional properties:
92 - dmas: Must contain a list of two references to DMA specifiers, one for
93 transmission, and one for reception.
94 - dma-names: Must contain a list of two DMA names, "tx" and "rx".
Geert Uytterhoeven0c529b32016-06-03 12:00:01 +020095 - {cts,dsr,dcd,rng,rts,dtr}-gpios: Specify GPIOs for modem lines, cfr. the
96 generic serial DT bindings in serial.txt.
Geert Uytterhoevenb0405dc2016-06-03 12:00:02 +020097 - uart-has-rtscts: Indicates dedicated lines for RTS/CTS hardware flow
98 control, cfr. the generic serial DT bindings in serial.txt.
Geert Uytterhoeven3c991212015-05-20 19:46:24 +020099
Laurent Pinchart334bc112013-12-06 10:59:53 +0100100Example:
101 aliases {
102 serial0 = &scifa0;
103 };
104
105 scifa0: serial@e6c40000 {
Geert Uytterhoeven598604f2015-12-11 12:48:15 +0100106 compatible = "renesas,scifa-r8a7790",
107 "renesas,rcar-gen2-scifa", "renesas,scifa";
Laurent Pinchart334bc112013-12-06 10:59:53 +0100108 reg = <0 0xe6c40000 0 64>;
109 interrupt-parent = <&gic>;
110 interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
111 clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>;
Laurent Pincharta9ec81f2015-09-14 15:14:23 +0300112 clock-names = "fck";
Geert Uytterhoeven3c991212015-05-20 19:46:24 +0200113 dmas = <&dmac0 0x21>, <&dmac0 0x22>;
114 dma-names = "tx", "rx";
Laurent Pinchart334bc112013-12-06 10:59:53 +0100115 };