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Andrew Victor62c16602006-11-30 12:27:38 +01001/*
Andrew Victor9d041262007-02-05 11:42:07 +01002 * arch/arm/mach-at91/at91sam9260.c
Andrew Victor62c16602006-11-30 12:27:38 +01003 *
4 * Copyright (C) 2006 SAN People
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12
13#include <linux/module.h>
14
15#include <asm/mach/arch.h>
16#include <asm/mach/map.h>
17#include <asm/arch/at91sam9260.h>
18#include <asm/arch/at91_pmc.h>
Andrew Victore9d10a12007-01-09 12:47:51 +010019#include <asm/arch/at91_rstc.h>
Andrew Victor62c16602006-11-30 12:27:38 +010020
21#include "generic.h"
22#include "clock.h"
23
24static struct map_desc at91sam9260_io_desc[] __initdata = {
25 {
26 .virtual = AT91_VA_BASE_SYS,
27 .pfn = __phys_to_pfn(AT91_BASE_SYS),
28 .length = SZ_16K,
29 .type = MT_DEVICE,
30 }, {
31 .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE,
32 .pfn = __phys_to_pfn(AT91SAM9260_SRAM0_BASE),
33 .length = AT91SAM9260_SRAM0_SIZE,
34 .type = MT_DEVICE,
35 }, {
36 .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE - AT91SAM9260_SRAM1_SIZE,
37 .pfn = __phys_to_pfn(AT91SAM9260_SRAM1_BASE),
38 .length = AT91SAM9260_SRAM1_SIZE,
39 .type = MT_DEVICE,
40 },
41};
42
43/* --------------------------------------------------------------------
44 * Clocks
45 * -------------------------------------------------------------------- */
46
47/*
48 * The peripheral clocks.
49 */
50static struct clk pioA_clk = {
51 .name = "pioA_clk",
52 .pmc_mask = 1 << AT91SAM9260_ID_PIOA,
53 .type = CLK_TYPE_PERIPHERAL,
54};
55static struct clk pioB_clk = {
56 .name = "pioB_clk",
57 .pmc_mask = 1 << AT91SAM9260_ID_PIOB,
58 .type = CLK_TYPE_PERIPHERAL,
59};
60static struct clk pioC_clk = {
61 .name = "pioC_clk",
62 .pmc_mask = 1 << AT91SAM9260_ID_PIOC,
63 .type = CLK_TYPE_PERIPHERAL,
64};
65static struct clk adc_clk = {
66 .name = "adc_clk",
67 .pmc_mask = 1 << AT91SAM9260_ID_ADC,
68 .type = CLK_TYPE_PERIPHERAL,
69};
70static struct clk usart0_clk = {
71 .name = "usart0_clk",
72 .pmc_mask = 1 << AT91SAM9260_ID_US0,
73 .type = CLK_TYPE_PERIPHERAL,
74};
75static struct clk usart1_clk = {
76 .name = "usart1_clk",
77 .pmc_mask = 1 << AT91SAM9260_ID_US1,
78 .type = CLK_TYPE_PERIPHERAL,
79};
80static struct clk usart2_clk = {
81 .name = "usart2_clk",
82 .pmc_mask = 1 << AT91SAM9260_ID_US2,
83 .type = CLK_TYPE_PERIPHERAL,
84};
85static struct clk mmc_clk = {
86 .name = "mci_clk",
87 .pmc_mask = 1 << AT91SAM9260_ID_MCI,
88 .type = CLK_TYPE_PERIPHERAL,
89};
90static struct clk udc_clk = {
91 .name = "udc_clk",
92 .pmc_mask = 1 << AT91SAM9260_ID_UDP,
93 .type = CLK_TYPE_PERIPHERAL,
94};
95static struct clk twi_clk = {
96 .name = "twi_clk",
97 .pmc_mask = 1 << AT91SAM9260_ID_TWI,
98 .type = CLK_TYPE_PERIPHERAL,
99};
100static struct clk spi0_clk = {
101 .name = "spi0_clk",
102 .pmc_mask = 1 << AT91SAM9260_ID_SPI0,
103 .type = CLK_TYPE_PERIPHERAL,
104};
105static struct clk spi1_clk = {
106 .name = "spi1_clk",
107 .pmc_mask = 1 << AT91SAM9260_ID_SPI1,
108 .type = CLK_TYPE_PERIPHERAL,
109};
110static struct clk ohci_clk = {
111 .name = "ohci_clk",
112 .pmc_mask = 1 << AT91SAM9260_ID_UHP,
113 .type = CLK_TYPE_PERIPHERAL,
114};
115static struct clk ether_clk = {
116 .name = "ether_clk",
117 .pmc_mask = 1 << AT91SAM9260_ID_EMAC,
118 .type = CLK_TYPE_PERIPHERAL,
119};
120static struct clk isi_clk = {
121 .name = "isi_clk",
122 .pmc_mask = 1 << AT91SAM9260_ID_ISI,
123 .type = CLK_TYPE_PERIPHERAL,
124};
125static struct clk usart3_clk = {
126 .name = "usart3_clk",
127 .pmc_mask = 1 << AT91SAM9260_ID_US3,
128 .type = CLK_TYPE_PERIPHERAL,
129};
130static struct clk usart4_clk = {
131 .name = "usart4_clk",
132 .pmc_mask = 1 << AT91SAM9260_ID_US4,
133 .type = CLK_TYPE_PERIPHERAL,
134};
135static struct clk usart5_clk = {
136 .name = "usart5_clk",
137 .pmc_mask = 1 << AT91SAM9260_ID_US5,
138 .type = CLK_TYPE_PERIPHERAL,
139};
140
141static struct clk *periph_clocks[] __initdata = {
142 &pioA_clk,
143 &pioB_clk,
144 &pioC_clk,
145 &adc_clk,
146 &usart0_clk,
147 &usart1_clk,
148 &usart2_clk,
149 &mmc_clk,
150 &udc_clk,
151 &twi_clk,
152 &spi0_clk,
153 &spi1_clk,
154 // ssc
155 // tc0 .. tc2
156 &ohci_clk,
157 &ether_clk,
158 &isi_clk,
159 &usart3_clk,
160 &usart4_clk,
161 &usart5_clk,
162 // tc3 .. tc5
163 // irq0 .. irq2
164};
165
166/*
167 * The two programmable clocks.
168 * You must configure pin multiplexing to bring these signals out.
169 */
170static struct clk pck0 = {
171 .name = "pck0",
172 .pmc_mask = AT91_PMC_PCK0,
173 .type = CLK_TYPE_PROGRAMMABLE,
174 .id = 0,
175};
176static struct clk pck1 = {
177 .name = "pck1",
178 .pmc_mask = AT91_PMC_PCK1,
179 .type = CLK_TYPE_PROGRAMMABLE,
180 .id = 1,
181};
182
183static void __init at91sam9260_register_clocks(void)
184{
185 int i;
186
187 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
188 clk_register(periph_clocks[i]);
189
190 clk_register(&pck0);
191 clk_register(&pck1);
192}
193
194/* --------------------------------------------------------------------
195 * GPIO
196 * -------------------------------------------------------------------- */
197
198static struct at91_gpio_bank at91sam9260_gpio[] = {
199 {
200 .id = AT91SAM9260_ID_PIOA,
201 .offset = AT91_PIOA,
202 .clock = &pioA_clk,
203 }, {
204 .id = AT91SAM9260_ID_PIOB,
205 .offset = AT91_PIOB,
206 .clock = &pioB_clk,
207 }, {
208 .id = AT91SAM9260_ID_PIOC,
209 .offset = AT91_PIOC,
210 .clock = &pioC_clk,
211 }
212};
213
214static void at91sam9260_reset(void)
215{
Andrew Victore9d10a12007-01-09 12:47:51 +0100216 at91_sys_write(AT91_RSTC_CR, (0xA5 << 24) | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
Andrew Victor62c16602006-11-30 12:27:38 +0100217}
218
219
220/* --------------------------------------------------------------------
221 * AT91SAM9260 processor initialization
222 * -------------------------------------------------------------------- */
223
224void __init at91sam9260_initialize(unsigned long main_clock)
225{
226 /* Map peripherals */
227 iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc));
228
229 at91_arch_reset = at91sam9260_reset;
230 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
231 | (1 << AT91SAM9260_ID_IRQ2);
232
233 /* Init clock subsystem */
234 at91_clock_init(main_clock);
235
236 /* Register the processor-specific clocks */
237 at91sam9260_register_clocks();
238
239 /* Register GPIO subsystem */
240 at91_gpio_init(at91sam9260_gpio, 3);
241}
242
243/* --------------------------------------------------------------------
244 * Interrupt initialization
245 * -------------------------------------------------------------------- */
246
247/*
248 * The default interrupt priority levels (0 = lowest, 7 = highest).
249 */
250static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
251 7, /* Advanced Interrupt Controller */
252 7, /* System Peripherals */
253 0, /* Parallel IO Controller A */
254 0, /* Parallel IO Controller B */
255 0, /* Parallel IO Controller C */
256 0, /* Analog-to-Digital Converter */
257 6, /* USART 0 */
258 6, /* USART 1 */
259 6, /* USART 2 */
260 0, /* Multimedia Card Interface */
261 4, /* USB Device Port */
262 0, /* Two-Wire Interface */
263 6, /* Serial Peripheral Interface 0 */
264 6, /* Serial Peripheral Interface 1 */
265 5, /* Serial Synchronous Controller */
266 0,
267 0,
268 0, /* Timer Counter 0 */
269 0, /* Timer Counter 1 */
270 0, /* Timer Counter 2 */
271 3, /* USB Host port */
272 3, /* Ethernet */
273 0, /* Image Sensor Interface */
274 6, /* USART 3 */
275 6, /* USART 4 */
276 6, /* USART 5 */
277 0, /* Timer Counter 3 */
278 0, /* Timer Counter 4 */
279 0, /* Timer Counter 5 */
280 0, /* Advanced Interrupt Controller */
281 0, /* Advanced Interrupt Controller */
282 0, /* Advanced Interrupt Controller */
283};
284
285void __init at91sam9260_init_interrupts(unsigned int priority[NR_AIC_IRQS])
286{
287 if (!priority)
288 priority = at91sam9260_default_irq_priority;
289
290 /* Initialize the AIC interrupt controller */
291 at91_aic_init(priority);
292
293 /* Enable GPIO interrupts */
294 at91_gpio_irq_setup();
295}