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Thomas Petazzonif3b42b72012-09-13 17:41:48 +02001/*
2 * Device Tree Include file for Marvell Armada XP family SoC
3 *
4 * Copyright (C) 2012 Marvell
5 *
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 *
12 * Contains definitions specific to the Armada XP MV78260 SoC that are not
13 * common to all Armada XP SoCs.
14 */
15
16/include/ "armada-xp.dtsi"
17
18/ {
19 model = "Marvell Armada XP MV78260 SoC";
20 compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
21
Thomas Petazzoni397d59f2012-09-19 22:53:01 +020022 aliases {
23 gpio0 = &gpio0;
24 gpio1 = &gpio1;
25 gpio2 = &gpio2;
26 };
27
Gregory CLEMENT9d202782012-11-17 15:22:24 +010028 cpus {
29 #address-cells = <1>;
30 #size-cells = <0>;
31
32 cpu@0 {
33 device_type = "cpu";
34 compatible = "marvell,sheeva-v7";
35 reg = <0>;
36 clocks = <&cpuclk 0>;
37 };
38
39 cpu@1 {
40 device_type = "cpu";
41 compatible = "marvell,sheeva-v7";
42 reg = <1>;
43 clocks = <&cpuclk 1>;
44 };
45 };
46
Thomas Petazzonif3b42b72012-09-13 17:41:48 +020047 soc {
48 pinctrl {
49 compatible = "marvell,mv78260-pinctrl";
50 reg = <0xd0018000 0x38>;
51 };
Thomas Petazzoni397d59f2012-09-19 22:53:01 +020052
53 gpio0: gpio@d0018100 {
54 compatible = "marvell,armadaxp-gpio";
55 reg = <0xd0018100 0x40>,
56 <0xd0018800 0x30>;
57 ngpios = <32>;
58 gpio-controller;
59 #gpio-cells = <2>;
60 interrupt-controller;
61 #interrupts-cells = <2>;
62 interrupts = <16>, <17>, <18>, <19>;
63 };
64
65 gpio1: gpio@d0018140 {
66 compatible = "marvell,armadaxp-gpio";
67 reg = <0xd0018140 0x40>,
68 <0xd0018840 0x30>;
69 ngpios = <32>;
70 gpio-controller;
71 #gpio-cells = <2>;
72 interrupt-controller;
73 #interrupts-cells = <2>;
74 interrupts = <20>, <21>, <22>, <23>;
75 };
76
77 gpio2: gpio@d0018180 {
78 compatible = "marvell,armadaxp-gpio";
79 reg = <0xd0018180 0x40>,
80 <0xd0018870 0x30>;
81 ngpios = <3>;
82 gpio-controller;
83 #gpio-cells = <2>;
84 interrupt-controller;
85 #interrupts-cells = <2>;
86 interrupts = <24>;
87 };
Thomas Petazzonif3b42b72012-09-13 17:41:48 +020088 };
89};