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Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +00001/*
2 * MPC512x PSC in SPI mode driver.
3 *
4 * Copyright (C) 2007,2008 Freescale Semiconductor Inc.
5 * Original port from 52xx driver:
6 * Hongjun Chen <hong-jun.chen@freescale.com>
7 *
8 * Fork of mpc52xx_psc_spi.c:
9 * Copyright (C) 2006 TOPTICA Photonics AG., Dragos Carp
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16
17#include <linux/module.h>
18#include <linux/kernel.h>
19#include <linux/init.h>
20#include <linux/errno.h>
21#include <linux/interrupt.h>
Grant Likely22ae7822010-07-29 11:49:01 -060022#include <linux/of_address.h>
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +000023#include <linux/of_platform.h>
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +000024#include <linux/completion.h>
25#include <linux/io.h>
26#include <linux/delay.h>
27#include <linux/clk.h>
28#include <linux/spi/spi.h>
29#include <linux/fsl_devices.h>
Anatolij Gustschin86e98742013-04-01 17:29:21 +020030#include <linux/gpio.h>
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +000031#include <asm/mpc52xx_psc.h>
32
33struct mpc512x_psc_spi {
34 void (*cs_control)(struct spi_device *spi, bool on);
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +000035
36 /* driver internal data */
37 struct mpc52xx_psc __iomem *psc;
38 struct mpc512x_psc_fifo __iomem *fifo;
39 unsigned int irq;
40 u8 bits_per_word;
Gerhard Sittiga81a5092013-08-06 22:43:41 +020041 struct clk *clk_mclk;
42 u32 mclk_rate;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +000043
Gerhard Sittigc36e93a2013-06-03 14:03:49 +020044 struct completion txisrdone;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +000045};
46
47/* controller state */
48struct mpc512x_psc_spi_cs {
49 int bits_per_word;
50 int speed_hz;
51};
52
53/* set clock freq, clock ramp, bits per work
54 * if t is NULL then reset the values to the default values
55 */
56static int mpc512x_psc_spi_transfer_setup(struct spi_device *spi,
57 struct spi_transfer *t)
58{
59 struct mpc512x_psc_spi_cs *cs = spi->controller_state;
60
61 cs->speed_hz = (t && t->speed_hz)
62 ? t->speed_hz : spi->max_speed_hz;
63 cs->bits_per_word = (t && t->bits_per_word)
64 ? t->bits_per_word : spi->bits_per_word;
65 cs->bits_per_word = ((cs->bits_per_word + 7) / 8) * 8;
66 return 0;
67}
68
69static void mpc512x_psc_spi_activate_cs(struct spi_device *spi)
70{
71 struct mpc512x_psc_spi_cs *cs = spi->controller_state;
72 struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master);
73 struct mpc52xx_psc __iomem *psc = mps->psc;
74 u32 sicr;
75 u32 ccr;
Gerhard Sittiga81a5092013-08-06 22:43:41 +020076 int speed;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +000077 u16 bclkdiv;
78
79 sicr = in_be32(&psc->sicr);
80
81 /* Set clock phase and polarity */
82 if (spi->mode & SPI_CPHA)
83 sicr |= 0x00001000;
84 else
85 sicr &= ~0x00001000;
86
87 if (spi->mode & SPI_CPOL)
88 sicr |= 0x00002000;
89 else
90 sicr &= ~0x00002000;
91
92 if (spi->mode & SPI_LSB_FIRST)
93 sicr |= 0x10000000;
94 else
95 sicr &= ~0x10000000;
96 out_be32(&psc->sicr, sicr);
97
98 ccr = in_be32(&psc->ccr);
99 ccr &= 0xFF000000;
Gerhard Sittiga81a5092013-08-06 22:43:41 +0200100 speed = cs->speed_hz;
101 if (!speed)
102 speed = 1000000; /* default 1MHz */
103 bclkdiv = (mps->mclk_rate / speed) - 1;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000104
105 ccr |= (((bclkdiv & 0xff) << 16) | (((bclkdiv >> 8) & 0xff) << 8));
106 out_be32(&psc->ccr, ccr);
107 mps->bits_per_word = cs->bits_per_word;
108
Anatolij Gustschin86e98742013-04-01 17:29:21 +0200109 if (mps->cs_control && gpio_is_valid(spi->cs_gpio))
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000110 mps->cs_control(spi, (spi->mode & SPI_CS_HIGH) ? 1 : 0);
111}
112
113static void mpc512x_psc_spi_deactivate_cs(struct spi_device *spi)
114{
115 struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master);
116
Anatolij Gustschin86e98742013-04-01 17:29:21 +0200117 if (mps->cs_control && gpio_is_valid(spi->cs_gpio))
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000118 mps->cs_control(spi, (spi->mode & SPI_CS_HIGH) ? 0 : 1);
119
120}
121
122/* extract and scale size field in txsz or rxsz */
123#define MPC512x_PSC_FIFO_SZ(sz) ((sz & 0x7ff) << 2);
124
125#define EOFBYTE 1
126
127static int mpc512x_psc_spi_transfer_rxtx(struct spi_device *spi,
128 struct spi_transfer *t)
129{
130 struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master);
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000131 struct mpc512x_psc_fifo __iomem *fifo = mps->fifo;
Gerhard Sittigc36e93a2013-06-03 14:03:49 +0200132 size_t tx_len = t->len;
Gerhard Sittig5df24ea2013-06-03 14:03:50 +0200133 size_t rx_len = t->len;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000134 u8 *tx_buf = (u8 *)t->tx_buf;
135 u8 *rx_buf = (u8 *)t->rx_buf;
136
137 if (!tx_buf && !rx_buf && t->len)
138 return -EINVAL;
139
Gerhard Sittig5df24ea2013-06-03 14:03:50 +0200140 while (rx_len || tx_len) {
Gerhard Sittigc36e93a2013-06-03 14:03:49 +0200141 size_t txcount;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000142 u8 data;
143 size_t fifosz;
Gerhard Sittigc36e93a2013-06-03 14:03:49 +0200144 size_t rxcount;
Gerhard Sittig5df24ea2013-06-03 14:03:50 +0200145 int rxtries;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000146
147 /*
Gerhard Sittig5df24ea2013-06-03 14:03:50 +0200148 * send the TX bytes in as large a chunk as possible
149 * but neither exceed the TX nor the RX FIFOs
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000150 */
151 fifosz = MPC512x_PSC_FIFO_SZ(in_be32(&fifo->txsz));
Gerhard Sittigc36e93a2013-06-03 14:03:49 +0200152 txcount = min(fifosz, tx_len);
Gerhard Sittig5df24ea2013-06-03 14:03:50 +0200153 fifosz = MPC512x_PSC_FIFO_SZ(in_be32(&fifo->rxsz));
154 fifosz -= in_be32(&fifo->rxcnt) + 1;
155 txcount = min(fifosz, txcount);
156 if (txcount) {
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000157
Gerhard Sittig5df24ea2013-06-03 14:03:50 +0200158 /* fill the TX FIFO */
159 while (txcount-- > 0) {
160 data = tx_buf ? *tx_buf++ : 0;
161 if (tx_len == EOFBYTE && t->cs_change)
162 setbits32(&fifo->txcmd,
163 MPC512x_PSC_FIFO_EOF);
164 out_8(&fifo->txdata_8, data);
165 tx_len--;
166 }
167
168 /* have the ISR trigger when the TX FIFO is empty */
169 INIT_COMPLETION(mps->txisrdone);
170 out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY);
171 out_be32(&fifo->tximr, MPC512x_PSC_FIFO_EMPTY);
172 wait_for_completion(&mps->txisrdone);
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000173 }
174
Gerhard Sittig5df24ea2013-06-03 14:03:50 +0200175 /*
176 * consume as much RX data as the FIFO holds, while we
177 * iterate over the transfer's TX data length
178 *
179 * only insist in draining all the remaining RX bytes
180 * when the TX bytes were exhausted (that's at the very
181 * end of this transfer, not when still iterating over
182 * the transfer's chunks)
183 */
184 rxtries = 50;
185 do {
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000186
Gerhard Sittig5df24ea2013-06-03 14:03:50 +0200187 /*
188 * grab whatever was in the FIFO when we started
189 * looking, don't bother fetching what was added to
190 * the FIFO while we read from it -- we'll return
191 * here eventually and prefer sending out remaining
192 * TX data
193 */
194 fifosz = in_be32(&fifo->rxcnt);
195 rxcount = min(fifosz, rx_len);
196 while (rxcount-- > 0) {
197 data = in_8(&fifo->rxdata_8);
198 if (rx_buf)
199 *rx_buf++ = data;
200 rx_len--;
201 }
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000202
Gerhard Sittig5df24ea2013-06-03 14:03:50 +0200203 /*
204 * come back later if there still is TX data to send,
205 * bail out of the RX drain loop if all of the TX data
206 * was sent and all of the RX data was received (i.e.
207 * when the transmission has completed)
208 */
209 if (tx_len)
210 break;
211 if (!rx_len)
212 break;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000213
Gerhard Sittig5df24ea2013-06-03 14:03:50 +0200214 /*
215 * TX data transmission has completed while RX data
216 * is still pending -- that's a transient situation
217 * which depends on wire speed and specific
218 * hardware implementation details (buffering) yet
219 * should resolve very quickly
220 *
221 * just yield for a moment to not hog the CPU for
222 * too long when running SPI at low speed
223 *
224 * the timeout range is rather arbitrary and tries
225 * to balance throughput against system load; the
226 * chosen values result in a minimal timeout of 50
227 * times 10us and thus work at speeds as low as
228 * some 20kbps, while the maximum timeout at the
229 * transfer's end could be 5ms _if_ nothing else
230 * ticks in the system _and_ RX data still wasn't
231 * received, which only occurs in situations that
232 * are exceptional; removing the unpredictability
233 * of the timeout either decreases throughput
234 * (longer timeouts), or puts more load on the
235 * system (fixed short timeouts) or requires the
236 * use of a timeout API instead of a counter and an
237 * unknown inner delay
238 */
239 usleep_range(10, 100);
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000240
Gerhard Sittig5df24ea2013-06-03 14:03:50 +0200241 } while (--rxtries > 0);
242 if (!tx_len && rx_len && !rxtries) {
243 /*
244 * not enough RX bytes even after several retries
245 * and the resulting rather long timeout?
246 */
247 rxcount = in_be32(&fifo->rxcnt);
248 dev_warn(&spi->dev,
249 "short xfer, missing %zd RX bytes, FIFO level %zd\n",
250 rx_len, rxcount);
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000251 }
252
Gerhard Sittig5df24ea2013-06-03 14:03:50 +0200253 /*
254 * drain and drop RX data which "should not be there" in
255 * the first place, for undisturbed transmission this turns
256 * into a NOP (except for the FIFO level fetch)
257 */
258 if (!tx_len && !rx_len) {
259 while (in_be32(&fifo->rxcnt))
260 in_8(&fifo->rxdata_8);
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000261 }
Gerhard Sittig5df24ea2013-06-03 14:03:50 +0200262
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000263 }
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000264 return 0;
265}
266
Gerhard Sittig85085892013-06-03 14:03:51 +0200267static int mpc512x_psc_spi_msg_xfer(struct spi_master *master,
268 struct spi_message *m)
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000269{
Gerhard Sittig85085892013-06-03 14:03:51 +0200270 struct spi_device *spi;
271 unsigned cs_change;
272 int status;
273 struct spi_transfer *t;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000274
Gerhard Sittig85085892013-06-03 14:03:51 +0200275 spi = m->spi;
276 cs_change = 1;
277 status = 0;
278 list_for_each_entry(t, &m->transfers, transfer_list) {
279 if (t->bits_per_word || t->speed_hz) {
280 status = mpc512x_psc_spi_transfer_setup(spi, t);
281 if (status < 0)
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000282 break;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000283 }
284
Gerhard Sittig85085892013-06-03 14:03:51 +0200285 if (cs_change)
286 mpc512x_psc_spi_activate_cs(spi);
287 cs_change = t->cs_change;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000288
Gerhard Sittig85085892013-06-03 14:03:51 +0200289 status = mpc512x_psc_spi_transfer_rxtx(spi, t);
290 if (status)
291 break;
292 m->actual_length += t->len;
293
294 if (t->delay_usecs)
295 udelay(t->delay_usecs);
296
297 if (cs_change)
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000298 mpc512x_psc_spi_deactivate_cs(spi);
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000299 }
Gerhard Sittig85085892013-06-03 14:03:51 +0200300
301 m->status = status;
302 m->complete(m->context);
303
304 if (status || !cs_change)
305 mpc512x_psc_spi_deactivate_cs(spi);
306
307 mpc512x_psc_spi_transfer_setup(spi, NULL);
308
309 spi_finalize_current_message(master);
310 return status;
311}
312
313static int mpc512x_psc_spi_prep_xfer_hw(struct spi_master *master)
314{
315 struct mpc512x_psc_spi *mps = spi_master_get_devdata(master);
316 struct mpc52xx_psc __iomem *psc = mps->psc;
317
318 dev_dbg(&master->dev, "%s()\n", __func__);
319
320 /* Zero MR2 */
321 in_8(&psc->mode);
322 out_8(&psc->mode, 0x0);
323
324 /* enable transmitter/receiver */
325 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
326
327 return 0;
328}
329
330static int mpc512x_psc_spi_unprep_xfer_hw(struct spi_master *master)
331{
332 struct mpc512x_psc_spi *mps = spi_master_get_devdata(master);
333 struct mpc52xx_psc __iomem *psc = mps->psc;
334 struct mpc512x_psc_fifo __iomem *fifo = mps->fifo;
335
336 dev_dbg(&master->dev, "%s()\n", __func__);
337
338 /* disable transmitter/receiver and fifo interrupt */
339 out_8(&psc->command, MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE);
340 out_be32(&fifo->tximr, 0);
341
342 return 0;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000343}
344
345static int mpc512x_psc_spi_setup(struct spi_device *spi)
346{
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000347 struct mpc512x_psc_spi_cs *cs = spi->controller_state;
Anatolij Gustschin86e98742013-04-01 17:29:21 +0200348 int ret;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000349
350 if (spi->bits_per_word % 8)
351 return -EINVAL;
352
353 if (!cs) {
354 cs = kzalloc(sizeof *cs, GFP_KERNEL);
355 if (!cs)
356 return -ENOMEM;
Anatolij Gustschin86e98742013-04-01 17:29:21 +0200357
358 if (gpio_is_valid(spi->cs_gpio)) {
359 ret = gpio_request(spi->cs_gpio, dev_name(&spi->dev));
360 if (ret) {
361 dev_err(&spi->dev, "can't get CS gpio: %d\n",
362 ret);
363 kfree(cs);
364 return ret;
365 }
366 gpio_direction_output(spi->cs_gpio,
367 spi->mode & SPI_CS_HIGH ? 0 : 1);
368 }
369
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000370 spi->controller_state = cs;
371 }
372
373 cs->bits_per_word = spi->bits_per_word;
374 cs->speed_hz = spi->max_speed_hz;
375
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000376 return 0;
377}
378
379static void mpc512x_psc_spi_cleanup(struct spi_device *spi)
380{
Anatolij Gustschin86e98742013-04-01 17:29:21 +0200381 if (gpio_is_valid(spi->cs_gpio))
382 gpio_free(spi->cs_gpio);
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000383 kfree(spi->controller_state);
384}
385
386static int mpc512x_psc_spi_port_config(struct spi_master *master,
387 struct mpc512x_psc_spi *mps)
388{
389 struct mpc52xx_psc __iomem *psc = mps->psc;
390 struct mpc512x_psc_fifo __iomem *fifo = mps->fifo;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000391 u32 sicr;
392 u32 ccr;
Gerhard Sittiga81a5092013-08-06 22:43:41 +0200393 int speed;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000394 u16 bclkdiv;
395
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000396 /* Reset the PSC into a known state */
397 out_8(&psc->command, MPC52xx_PSC_RST_RX);
398 out_8(&psc->command, MPC52xx_PSC_RST_TX);
399 out_8(&psc->command, MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE);
400
401 /* Disable psc interrupts all useful interrupts are in fifo */
402 out_be16(&psc->isr_imr.imr, 0);
403
404 /* Disable fifo interrupts, will be enabled later */
405 out_be32(&fifo->tximr, 0);
406 out_be32(&fifo->rximr, 0);
407
408 /* Setup fifo slice address and size */
409 /*out_be32(&fifo->txsz, 0x0fe00004);*/
410 /*out_be32(&fifo->rxsz, 0x0ff00004);*/
411
412 sicr = 0x01000000 | /* SIM = 0001 -- 8 bit */
413 0x00800000 | /* GenClk = 1 -- internal clk */
414 0x00008000 | /* SPI = 1 */
415 0x00004000 | /* MSTR = 1 -- SPI master */
416 0x00000800; /* UseEOF = 1 -- SS low until EOF */
417
418 out_be32(&psc->sicr, sicr);
419
420 ccr = in_be32(&psc->ccr);
421 ccr &= 0xFF000000;
Gerhard Sittiga81a5092013-08-06 22:43:41 +0200422 speed = 1000000; /* default 1MHz */
423 bclkdiv = (mps->mclk_rate / speed) - 1;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000424 ccr |= (((bclkdiv & 0xff) << 16) | (((bclkdiv >> 8) & 0xff) << 8));
425 out_be32(&psc->ccr, ccr);
426
427 /* Set 2ms DTL delay */
428 out_8(&psc->ctur, 0x00);
429 out_8(&psc->ctlr, 0x82);
430
431 /* we don't use the alarms */
432 out_be32(&fifo->rxalarm, 0xfff);
433 out_be32(&fifo->txalarm, 0);
434
435 /* Enable FIFO slices for Rx/Tx */
436 out_be32(&fifo->rxcmd,
437 MPC512x_PSC_FIFO_ENABLE_SLICE | MPC512x_PSC_FIFO_ENABLE_DMA);
438 out_be32(&fifo->txcmd,
439 MPC512x_PSC_FIFO_ENABLE_SLICE | MPC512x_PSC_FIFO_ENABLE_DMA);
440
441 mps->bits_per_word = 8;
442
Gerhard Sittiga81a5092013-08-06 22:43:41 +0200443 return 0;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000444}
445
446static irqreturn_t mpc512x_psc_spi_isr(int irq, void *dev_id)
447{
448 struct mpc512x_psc_spi *mps = (struct mpc512x_psc_spi *)dev_id;
449 struct mpc512x_psc_fifo __iomem *fifo = mps->fifo;
450
Gerhard Sittig85085892013-06-03 14:03:51 +0200451 /* clear interrupt and wake up the rx/tx routine */
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000452 if (in_be32(&fifo->txisr) &
453 in_be32(&fifo->tximr) & MPC512x_PSC_FIFO_EMPTY) {
454 out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY);
455 out_be32(&fifo->tximr, 0);
Gerhard Sittigc36e93a2013-06-03 14:03:49 +0200456 complete(&mps->txisrdone);
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000457 return IRQ_HANDLED;
458 }
459 return IRQ_NONE;
460}
461
Anatolij Gustschin86e98742013-04-01 17:29:21 +0200462static void mpc512x_spi_cs_control(struct spi_device *spi, bool onoff)
463{
464 gpio_set_value(spi->cs_gpio, onoff);
465}
466
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000467/* bus_num is used only for the case dev->platform_data == NULL */
Grant Likelyfd4a3192012-12-07 16:57:14 +0000468static int mpc512x_psc_spi_do_probe(struct device *dev, u32 regaddr,
Anatolij Gustschincf40f082010-07-05 12:17:51 +0200469 u32 size, unsigned int irq,
470 s16 bus_num)
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000471{
Jingoo Han8074cf02013-07-30 16:58:59 +0900472 struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000473 struct mpc512x_psc_spi *mps;
474 struct spi_master *master;
475 int ret;
476 void *tempp;
Gerhard Sittiga81a5092013-08-06 22:43:41 +0200477 int psc_num;
478 char clk_name[16];
479 struct clk *clk;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000480
481 master = spi_alloc_master(dev, sizeof *mps);
482 if (master == NULL)
483 return -ENOMEM;
484
485 dev_set_drvdata(dev, master);
486 mps = spi_master_get_devdata(master);
487 mps->irq = irq;
488
489 if (pdata == NULL) {
Anatolij Gustschin86e98742013-04-01 17:29:21 +0200490 mps->cs_control = mpc512x_spi_cs_control;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000491 master->bus_num = bus_num;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000492 } else {
493 mps->cs_control = pdata->cs_control;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000494 master->bus_num = pdata->bus_num;
495 master->num_chipselect = pdata->max_chipselect;
496 }
497
Anatolij Gustschinc88dd342013-01-14 21:27:00 +0100498 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000499 master->setup = mpc512x_psc_spi_setup;
Gerhard Sittig85085892013-06-03 14:03:51 +0200500 master->prepare_transfer_hardware = mpc512x_psc_spi_prep_xfer_hw;
501 master->transfer_one_message = mpc512x_psc_spi_msg_xfer;
502 master->unprepare_transfer_hardware = mpc512x_psc_spi_unprep_xfer_hw;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000503 master->cleanup = mpc512x_psc_spi_cleanup;
Anatolij Gustschin12b15e82010-07-27 22:35:58 +0200504 master->dev.of_node = dev->of_node;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000505
506 tempp = ioremap(regaddr, size);
507 if (!tempp) {
508 dev_err(dev, "could not ioremap I/O port range\n");
509 ret = -EFAULT;
510 goto free_master;
511 }
512 mps->psc = tempp;
513 mps->fifo =
514 (struct mpc512x_psc_fifo *)(tempp + sizeof(struct mpc52xx_psc));
515
516 ret = request_irq(mps->irq, mpc512x_psc_spi_isr, IRQF_SHARED,
517 "mpc512x-psc-spi", mps);
518 if (ret)
519 goto free_master;
Gerhard Sittig85085892013-06-03 14:03:51 +0200520 init_completion(&mps->txisrdone);
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000521
Gerhard Sittiga81a5092013-08-06 22:43:41 +0200522 psc_num = master->bus_num;
523 snprintf(clk_name, sizeof(clk_name), "psc%d_mclk", psc_num);
524 clk = devm_clk_get(dev, clk_name);
525 if (IS_ERR(clk))
526 goto free_irq;
527 ret = clk_prepare_enable(clk);
528 if (ret)
529 goto free_irq;
530 mps->clk_mclk = clk;
531 mps->mclk_rate = clk_get_rate(clk);
532
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000533 ret = mpc512x_psc_spi_port_config(master, mps);
534 if (ret < 0)
Gerhard Sittiga81a5092013-08-06 22:43:41 +0200535 goto free_clock;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000536
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000537 ret = spi_register_master(master);
538 if (ret < 0)
Gerhard Sittiga81a5092013-08-06 22:43:41 +0200539 goto free_clock;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000540
541 return ret;
542
Gerhard Sittiga81a5092013-08-06 22:43:41 +0200543free_clock:
544 clk_disable_unprepare(mps->clk_mclk);
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000545free_irq:
546 free_irq(mps->irq, mps);
547free_master:
548 if (mps->psc)
549 iounmap(mps->psc);
550 spi_master_put(master);
551
552 return ret;
553}
554
Grant Likelyfd4a3192012-12-07 16:57:14 +0000555static int mpc512x_psc_spi_do_remove(struct device *dev)
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000556{
Guenter Roeck21879212012-08-18 09:29:24 -0700557 struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000558 struct mpc512x_psc_spi *mps = spi_master_get_devdata(master);
559
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000560 spi_unregister_master(master);
Gerhard Sittiga81a5092013-08-06 22:43:41 +0200561 clk_disable_unprepare(mps->clk_mclk);
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000562 free_irq(mps->irq, mps);
563 if (mps->psc)
564 iounmap(mps->psc);
Guenter Roeck21879212012-08-18 09:29:24 -0700565 spi_master_put(master);
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000566
567 return 0;
568}
569
Grant Likelyfd4a3192012-12-07 16:57:14 +0000570static int mpc512x_psc_spi_of_probe(struct platform_device *op)
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000571{
572 const u32 *regaddr_p;
573 u64 regaddr64, size64;
574 s16 id = -1;
575
Anatolij Gustschinef7f2e82010-05-31 18:34:54 +0200576 regaddr_p = of_get_address(op->dev.of_node, 0, &size64, NULL);
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000577 if (!regaddr_p) {
578 dev_err(&op->dev, "Invalid PSC address\n");
579 return -EINVAL;
580 }
Anatolij Gustschinef7f2e82010-05-31 18:34:54 +0200581 regaddr64 = of_translate_address(op->dev.of_node, regaddr_p);
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000582
583 /* get PSC id (0..11, used by port_config) */
Anatolij Gustschin9d15a3b2013-01-11 01:05:48 +0100584 id = of_alias_get_id(op->dev.of_node, "spi");
585 if (id < 0) {
586 dev_err(&op->dev, "no alias id for %s\n",
587 op->dev.of_node->full_name);
588 return id;
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000589 }
590
591 return mpc512x_psc_spi_do_probe(&op->dev, (u32) regaddr64, (u32) size64,
Anatolij Gustschinef7f2e82010-05-31 18:34:54 +0200592 irq_of_parse_and_map(op->dev.of_node, 0), id);
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000593}
594
Grant Likelyfd4a3192012-12-07 16:57:14 +0000595static int mpc512x_psc_spi_of_remove(struct platform_device *op)
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000596{
597 return mpc512x_psc_spi_do_remove(&op->dev);
598}
599
600static struct of_device_id mpc512x_psc_spi_of_match[] = {
601 { .compatible = "fsl,mpc5121-psc-spi", },
602 {},
603};
604
605MODULE_DEVICE_TABLE(of, mpc512x_psc_spi_of_match);
606
Grant Likely18d306d2011-02-22 21:02:43 -0700607static struct platform_driver mpc512x_psc_spi_of_driver = {
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000608 .probe = mpc512x_psc_spi_of_probe,
Grant Likelyfd4a3192012-12-07 16:57:14 +0000609 .remove = mpc512x_psc_spi_of_remove,
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000610 .driver = {
611 .name = "mpc512x-psc-spi",
612 .owner = THIS_MODULE,
Anatolij Gustschinef7f2e82010-05-31 18:34:54 +0200613 .of_match_table = mpc512x_psc_spi_of_match,
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000614 },
615};
Grant Likely940ab882011-10-05 11:29:49 -0600616module_platform_driver(mpc512x_psc_spi_of_driver);
Anatolij Gustschin6e27388f1b2010-04-30 13:21:27 +0000617
618MODULE_AUTHOR("John Rigby");
619MODULE_DESCRIPTION("MPC512x PSC SPI Driver");
620MODULE_LICENSE("GPL");