blob: 432dea7552203949e9ef1ef5f3e4e0e0b35be331 [file] [log] [blame]
Stefan Agnere1bf86a2014-11-02 21:36:47 +01001/*
2 * Copyright 2014 Toradex AG
3 *
Stefan Agner9f3440d2015-12-07 13:51:14 -08004 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * Or, alternatively
19 *
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
27 * conditions:
28 *
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
31 *
32 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
Stefan Agnere1bf86a2014-11-02 21:36:47 +010040 */
41
42/ {
43 bl: backlight {
44 compatible = "pwm-backlight";
Bhuvanchandra DVb2e42442016-01-09 12:29:53 +053045 pinctrl-names = "default";
46 pinctrl-0 = <&pinctrl_gpio_bl_on>;
Stefan Agnere1bf86a2014-11-02 21:36:47 +010047 pwms = <&pwm0 0 5000000 0>;
Bhuvanchandra DVb2e42442016-01-09 12:29:53 +053048 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
Stefan Agnere1bf86a2014-11-02 21:36:47 +010049 status = "disabled";
50 };
51};
52
53&adc0 {
54 status = "okay";
55};
56
57&adc1 {
58 status = "okay";
59};
60
Stefan Agner2afa06c2015-12-02 14:11:47 -080061&can0 {
62 pinctrl-names = "default";
63 pinctrl-0 = <&pinctrl_flexcan0>;
64 status = "disabled";
65};
66
67&can1 {
68 pinctrl-names = "default";
69 pinctrl-0 = <&pinctrl_flexcan1>;
70 status = "disabled";
71};
72
Bhuvanchandra DV9fca0152015-01-29 21:57:45 +053073&dspi1 {
74 bus-num = <1>;
75 pinctrl-names = "default";
76 pinctrl-0 = <&pinctrl_dspi1>;
77};
78
Stefan Agnere1bf86a2014-11-02 21:36:47 +010079&edma0 {
80 status = "okay";
81};
82
83&esdhc1 {
84 pinctrl-names = "default";
85 pinctrl-0 = <&pinctrl_esdhc1>;
86 bus-width = <4>;
Stefan Agner76713952015-01-16 18:06:15 +010087 cd-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
Stefan Agnere1bf86a2014-11-02 21:36:47 +010088};
89
90&fec1 {
91 phy-mode = "rmii";
92 pinctrl-names = "default";
93 pinctrl-0 = <&pinctrl_fec1>;
94};
95
Bhuvanchandra DV1ddeb482014-11-13 10:05:31 +053096&i2c0 {
97 clock-frequency = <400000>;
98 pinctrl-names = "default";
99 pinctrl-0 = <&pinctrl_i2c0>;
100};
101
Stefan Agner65425262015-10-07 16:58:36 -0700102&nfc {
103 assigned-clocks = <&clks VF610_CLK_NFC>;
104 assigned-clock-rates = <33000000>;
105 pinctrl-names = "default";
106 pinctrl-0 = <&pinctrl_nfc>;
107 status = "okay";
108
109 nand@0 {
110 compatible = "fsl,vf610-nfc-nandcs";
111 reg = <0>;
112 #address-cells = <1>;
113 #size-cells = <1>;
114 nand-bus-width = <8>;
115 nand-ecc-mode = "hw";
116 nand-ecc-strength = <32>;
117 nand-ecc-step-size = <2048>;
118 nand-on-flash-bbt;
119 };
120};
121
Stefan Agnere1bf86a2014-11-02 21:36:47 +0100122&pwm0 {
123 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_pwm0>;
125};
126
127&pwm1 {
128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_pwm1>;
130};
131
132&uart0 {
133 pinctrl-names = "default";
134 pinctrl-0 = <&pinctrl_uart0>;
135};
136
137&uart1 {
138 pinctrl-names = "default";
139 pinctrl-0 = <&pinctrl_uart1>;
140};
141
142&uart2 {
143 pinctrl-names = "default";
144 pinctrl-0 = <&pinctrl_uart2>;
145};
146
147&usbdev0 {
148 disable-over-current;
149 status = "okay";
150};
151
152&usbh1 {
153 disable-over-current;
154 status = "okay";
155};
156
Stefan Agnerac039cd2014-11-04 14:07:09 +0100157&usbmisc0 {
158 status = "okay";
159};
160
161&usbmisc1 {
162 status = "okay";
163};
164
165&usbphy0 {
166 status = "okay";
167};
168
169&usbphy1 {
170 status = "okay";
171};
172
Stefan Agnere1bf86a2014-11-02 21:36:47 +0100173&iomuxc {
174 vf610-colibri {
Stefan Agner2afa06c2015-12-02 14:11:47 -0800175 pinctrl_flexcan0: can0grp {
176 fsl,pins = <
177 VF610_PAD_PTB14__CAN0_RX 0x31F1
178 VF610_PAD_PTB15__CAN0_TX 0x31F2
179 >;
180 };
181
182 pinctrl_flexcan1: can1grp {
183 fsl,pins = <
184 VF610_PAD_PTB16__CAN1_RX 0x31F1
185 VF610_PAD_PTB17__CAN1_TX 0x31F2
186 >;
187 };
188
Stefan Agner2b36bda2014-11-04 14:07:08 +0100189 pinctrl_gpio_ext: gpio_ext {
190 fsl,pins = <
191 VF610_PAD_PTD10__GPIO_89 0x22ed /* EXT_IO_0 */
192 VF610_PAD_PTD9__GPIO_88 0x22ed /* EXT_IO_1 */
193 VF610_PAD_PTD26__GPIO_68 0x22ed /* EXT_IO_2 */
194 >;
195 };
196
Bhuvanchandra DV9fca0152015-01-29 21:57:45 +0530197 pinctrl_dspi1: dspi1grp {
198 fsl,pins = <
199 VF610_PAD_PTD5__DSPI1_CS0 0x33e2
200 VF610_PAD_PTD6__DSPI1_SIN 0x33e1
201 VF610_PAD_PTD7__DSPI1_SOUT 0x33e2
202 VF610_PAD_PTD8__DSPI1_SCK 0x33e2
203 >;
204 };
205
Stefan Agnere1bf86a2014-11-02 21:36:47 +0100206 pinctrl_esdhc1: esdhc1grp {
207 fsl,pins = <
208 VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
209 VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
210 VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
211 VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
212 VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
213 VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
214 VF610_PAD_PTB20__GPIO_42 0x219d
215 >;
216 };
217
218 pinctrl_fec1: fec1grp {
219 fsl,pins = <
Stefan Agnereddb00f2014-11-28 00:40:06 +0100220 VF610_PAD_PTA6__RMII_CLKOUT 0x30d2
Stefan Agnere1bf86a2014-11-02 21:36:47 +0100221 VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2
222 VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3
223 VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1
Cory Tusaraa5fec22015-05-13 23:11:38 -0400224 VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1
Stefan Agnere1bf86a2014-11-02 21:36:47 +0100225 VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1
226 VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1
227 VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2
228 VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2
229 VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2
230 >;
231 };
232
Bhuvanchandra DVb2e42442016-01-09 12:29:53 +0530233 pinctrl_gpio_bl_on: gpio_bl_on {
234 fsl,pins = <
235 VF610_PAD_PTC0__GPIO_45 0x22ef
236 >;
237 };
238
Bhuvanchandra DV1ddeb482014-11-13 10:05:31 +0530239 pinctrl_i2c0: i2c0grp {
240 fsl,pins = <
241 VF610_PAD_PTB14__I2C0_SCL 0x37ff
242 VF610_PAD_PTB15__I2C0_SDA 0x37ff
243 >;
244 };
245
Stefan Agner65425262015-10-07 16:58:36 -0700246 pinctrl_nfc: nfcgrp {
247 fsl,pins = <
248 VF610_PAD_PTD23__NF_IO7 0x28df
249 VF610_PAD_PTD22__NF_IO6 0x28df
250 VF610_PAD_PTD21__NF_IO5 0x28df
251 VF610_PAD_PTD20__NF_IO4 0x28df
252 VF610_PAD_PTD19__NF_IO3 0x28df
253 VF610_PAD_PTD18__NF_IO2 0x28df
254 VF610_PAD_PTD17__NF_IO1 0x28df
255 VF610_PAD_PTD16__NF_IO0 0x28df
256 VF610_PAD_PTB24__NF_WE_B 0x28c2
257 VF610_PAD_PTB25__NF_CE0_B 0x28c2
258 VF610_PAD_PTB27__NF_RE_B 0x28c2
259 VF610_PAD_PTC26__NF_RB_B 0x283d
260 VF610_PAD_PTC27__NF_ALE 0x28c2
261 VF610_PAD_PTC28__NF_CLE 0x28c2
262 >;
263 };
264
Stefan Agnere1bf86a2014-11-02 21:36:47 +0100265 pinctrl_pwm0: pwm0grp {
266 fsl,pins = <
267 VF610_PAD_PTB0__FTM0_CH0 0x1182
268 VF610_PAD_PTB1__FTM0_CH1 0x1182
269 >;
270 };
271
272 pinctrl_pwm1: pwm1grp {
273 fsl,pins = <
274 VF610_PAD_PTB8__FTM1_CH0 0x1182
275 VF610_PAD_PTB9__FTM1_CH1 0x1182
276 >;
277 };
278
279 pinctrl_uart0: uart0grp {
280 fsl,pins = <
281 VF610_PAD_PTB10__UART0_TX 0x21a2
282 VF610_PAD_PTB11__UART0_RX 0x21a1
283 >;
284 };
285
286 pinctrl_uart1: uart1grp {
287 fsl,pins = <
288 VF610_PAD_PTB4__UART1_TX 0x21a2
289 VF610_PAD_PTB5__UART1_RX 0x21a1
290 >;
291 };
292
293 pinctrl_uart2: uart2grp {
294 fsl,pins = <
295 VF610_PAD_PTD0__UART2_TX 0x21a2
296 VF610_PAD_PTD1__UART2_RX 0x21a1
297 VF610_PAD_PTD2__UART2_RTS 0x21a2
298 VF610_PAD_PTD3__UART2_CTS 0x21a1
299 >;
300 };
Stefan Agner505251e2014-11-16 19:00:28 +0100301
302 pinctrl_usbh1_reg: gpio_usb_vbus {
303 fsl,pins = <
304 VF610_PAD_PTD4__GPIO_83 0x22ed
305 >;
306 };
Stefan Agnere1bf86a2014-11-02 21:36:47 +0100307 };
308};