Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 1 | /* |
| 2 | * xHCI host controller driver |
| 3 | * |
| 4 | * Copyright (C) 2008 Intel Corp. |
| 5 | * |
| 6 | * Author: Sarah Sharp |
| 7 | * Some code borrowed from the Linux EHCI driver. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, but |
| 14 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| 15 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 16 | * for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software Foundation, |
| 20 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 21 | */ |
| 22 | |
| 23 | #include <linux/usb.h> |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 24 | #include <linux/pci.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 25 | #include <linux/slab.h> |
Sarah Sharp | 527c6d7 | 2009-04-29 19:06:56 -0700 | [diff] [blame] | 26 | #include <linux/dmapool.h> |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 27 | |
| 28 | #include "xhci.h" |
| 29 | |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 30 | /* |
| 31 | * Allocates a generic ring segment from the ring pool, sets the dma address, |
| 32 | * initializes the segment to zero, and sets the private next pointer to NULL. |
| 33 | * |
| 34 | * Section 4.11.1.1: |
| 35 | * "All components of all Command and Transfer TRBs shall be initialized to '0'" |
| 36 | */ |
| 37 | static struct xhci_segment *xhci_segment_alloc(struct xhci_hcd *xhci, gfp_t flags) |
| 38 | { |
| 39 | struct xhci_segment *seg; |
| 40 | dma_addr_t dma; |
| 41 | |
| 42 | seg = kzalloc(sizeof *seg, flags); |
| 43 | if (!seg) |
Randy Dunlap | 326b481 | 2010-04-19 08:53:50 -0700 | [diff] [blame] | 44 | return NULL; |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 45 | xhci_dbg(xhci, "Allocating priv segment structure at %p\n", seg); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 46 | |
| 47 | seg->trbs = dma_pool_alloc(xhci->segment_pool, flags, &dma); |
| 48 | if (!seg->trbs) { |
| 49 | kfree(seg); |
Randy Dunlap | 326b481 | 2010-04-19 08:53:50 -0700 | [diff] [blame] | 50 | return NULL; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 51 | } |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 52 | xhci_dbg(xhci, "// Allocating segment at %p (virtual) 0x%llx (DMA)\n", |
| 53 | seg->trbs, (unsigned long long)dma); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 54 | |
| 55 | memset(seg->trbs, 0, SEGMENT_SIZE); |
| 56 | seg->dma = dma; |
| 57 | seg->next = NULL; |
| 58 | |
| 59 | return seg; |
| 60 | } |
| 61 | |
| 62 | static void xhci_segment_free(struct xhci_hcd *xhci, struct xhci_segment *seg) |
| 63 | { |
| 64 | if (!seg) |
| 65 | return; |
| 66 | if (seg->trbs) { |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 67 | xhci_dbg(xhci, "Freeing DMA segment at %p (virtual) 0x%llx (DMA)\n", |
| 68 | seg->trbs, (unsigned long long)seg->dma); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 69 | dma_pool_free(xhci->segment_pool, seg->trbs, seg->dma); |
| 70 | seg->trbs = NULL; |
| 71 | } |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 72 | xhci_dbg(xhci, "Freeing priv segment structure at %p\n", seg); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 73 | kfree(seg); |
| 74 | } |
| 75 | |
| 76 | /* |
| 77 | * Make the prev segment point to the next segment. |
| 78 | * |
| 79 | * Change the last TRB in the prev segment to be a Link TRB which points to the |
| 80 | * DMA address of the next segment. The caller needs to set any Link TRB |
| 81 | * related flags, such as End TRB, Toggle Cycle, and no snoop. |
| 82 | */ |
| 83 | static void xhci_link_segments(struct xhci_hcd *xhci, struct xhci_segment *prev, |
| 84 | struct xhci_segment *next, bool link_trbs) |
| 85 | { |
| 86 | u32 val; |
| 87 | |
| 88 | if (!prev || !next) |
| 89 | return; |
| 90 | prev->next = next; |
| 91 | if (link_trbs) { |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 92 | prev->trbs[TRBS_PER_SEGMENT-1].link.segment_ptr = next->dma; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 93 | |
| 94 | /* Set the last TRB in the segment to have a TRB type ID of Link TRB */ |
| 95 | val = prev->trbs[TRBS_PER_SEGMENT-1].link.control; |
| 96 | val &= ~TRB_TYPE_BITMASK; |
| 97 | val |= TRB_TYPE(TRB_LINK); |
Sarah Sharp | b0567b3 | 2009-08-07 14:04:36 -0700 | [diff] [blame] | 98 | /* Always set the chain bit with 0.95 hardware */ |
| 99 | if (xhci_link_trb_quirk(xhci)) |
| 100 | val |= TRB_CHAIN; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 101 | prev->trbs[TRBS_PER_SEGMENT-1].link.control = val; |
| 102 | } |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 103 | xhci_dbg(xhci, "Linking segment 0x%llx to segment 0x%llx (DMA)\n", |
| 104 | (unsigned long long)prev->dma, |
| 105 | (unsigned long long)next->dma); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 106 | } |
| 107 | |
| 108 | /* XXX: Do we need the hcd structure in all these functions? */ |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 109 | void xhci_ring_free(struct xhci_hcd *xhci, struct xhci_ring *ring) |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 110 | { |
| 111 | struct xhci_segment *seg; |
| 112 | struct xhci_segment *first_seg; |
| 113 | |
| 114 | if (!ring || !ring->first_seg) |
| 115 | return; |
| 116 | first_seg = ring->first_seg; |
| 117 | seg = first_seg->next; |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 118 | xhci_dbg(xhci, "Freeing ring at %p\n", ring); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 119 | while (seg != first_seg) { |
| 120 | struct xhci_segment *next = seg->next; |
| 121 | xhci_segment_free(xhci, seg); |
| 122 | seg = next; |
| 123 | } |
| 124 | xhci_segment_free(xhci, first_seg); |
| 125 | ring->first_seg = NULL; |
| 126 | kfree(ring); |
| 127 | } |
| 128 | |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 129 | static void xhci_initialize_ring_info(struct xhci_ring *ring) |
| 130 | { |
| 131 | /* The ring is empty, so the enqueue pointer == dequeue pointer */ |
| 132 | ring->enqueue = ring->first_seg->trbs; |
| 133 | ring->enq_seg = ring->first_seg; |
| 134 | ring->dequeue = ring->enqueue; |
| 135 | ring->deq_seg = ring->first_seg; |
| 136 | /* The ring is initialized to 0. The producer must write 1 to the cycle |
| 137 | * bit to handover ownership of the TRB, so PCS = 1. The consumer must |
| 138 | * compare CCS to the cycle bit to check ownership, so CCS = 1. |
| 139 | */ |
| 140 | ring->cycle_state = 1; |
| 141 | /* Not necessary for new rings, but needed for re-initialized rings */ |
| 142 | ring->enq_updates = 0; |
| 143 | ring->deq_updates = 0; |
| 144 | } |
| 145 | |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 146 | /** |
| 147 | * Create a new ring with zero or more segments. |
| 148 | * |
| 149 | * Link each segment together into a ring. |
| 150 | * Set the end flag and the cycle toggle bit on the last segment. |
| 151 | * See section 4.9.1 and figures 15 and 16. |
| 152 | */ |
| 153 | static struct xhci_ring *xhci_ring_alloc(struct xhci_hcd *xhci, |
| 154 | unsigned int num_segs, bool link_trbs, gfp_t flags) |
| 155 | { |
| 156 | struct xhci_ring *ring; |
| 157 | struct xhci_segment *prev; |
| 158 | |
| 159 | ring = kzalloc(sizeof *(ring), flags); |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 160 | xhci_dbg(xhci, "Allocating ring at %p\n", ring); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 161 | if (!ring) |
Randy Dunlap | 326b481 | 2010-04-19 08:53:50 -0700 | [diff] [blame] | 162 | return NULL; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 163 | |
Sarah Sharp | d0e96f5 | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 164 | INIT_LIST_HEAD(&ring->td_list); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 165 | if (num_segs == 0) |
| 166 | return ring; |
| 167 | |
| 168 | ring->first_seg = xhci_segment_alloc(xhci, flags); |
| 169 | if (!ring->first_seg) |
| 170 | goto fail; |
| 171 | num_segs--; |
| 172 | |
| 173 | prev = ring->first_seg; |
| 174 | while (num_segs > 0) { |
| 175 | struct xhci_segment *next; |
| 176 | |
| 177 | next = xhci_segment_alloc(xhci, flags); |
| 178 | if (!next) |
| 179 | goto fail; |
| 180 | xhci_link_segments(xhci, prev, next, link_trbs); |
| 181 | |
| 182 | prev = next; |
| 183 | num_segs--; |
| 184 | } |
| 185 | xhci_link_segments(xhci, prev, ring->first_seg, link_trbs); |
| 186 | |
| 187 | if (link_trbs) { |
| 188 | /* See section 4.9.2.1 and 6.4.4.1 */ |
| 189 | prev->trbs[TRBS_PER_SEGMENT-1].link.control |= (LINK_TOGGLE); |
| 190 | xhci_dbg(xhci, "Wrote link toggle flag to" |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 191 | " segment %p (virtual), 0x%llx (DMA)\n", |
| 192 | prev, (unsigned long long)prev->dma); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 193 | } |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 194 | xhci_initialize_ring_info(ring); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 195 | return ring; |
| 196 | |
| 197 | fail: |
| 198 | xhci_ring_free(xhci, ring); |
Randy Dunlap | 326b481 | 2010-04-19 08:53:50 -0700 | [diff] [blame] | 199 | return NULL; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 200 | } |
| 201 | |
Sarah Sharp | 412566b | 2009-12-09 15:59:01 -0800 | [diff] [blame] | 202 | void xhci_free_or_cache_endpoint_ring(struct xhci_hcd *xhci, |
| 203 | struct xhci_virt_device *virt_dev, |
| 204 | unsigned int ep_index) |
| 205 | { |
| 206 | int rings_cached; |
| 207 | |
| 208 | rings_cached = virt_dev->num_rings_cached; |
| 209 | if (rings_cached < XHCI_MAX_RINGS_CACHED) { |
| 210 | virt_dev->num_rings_cached++; |
| 211 | rings_cached = virt_dev->num_rings_cached; |
| 212 | virt_dev->ring_cache[rings_cached] = |
| 213 | virt_dev->eps[ep_index].ring; |
| 214 | xhci_dbg(xhci, "Cached old ring, " |
| 215 | "%d ring%s cached\n", |
| 216 | rings_cached, |
| 217 | (rings_cached > 1) ? "s" : ""); |
| 218 | } else { |
| 219 | xhci_ring_free(xhci, virt_dev->eps[ep_index].ring); |
| 220 | xhci_dbg(xhci, "Ring cache full (%d rings), " |
| 221 | "freeing ring\n", |
| 222 | virt_dev->num_rings_cached); |
| 223 | } |
| 224 | virt_dev->eps[ep_index].ring = NULL; |
| 225 | } |
| 226 | |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 227 | /* Zero an endpoint ring (except for link TRBs) and move the enqueue and dequeue |
| 228 | * pointers to the beginning of the ring. |
| 229 | */ |
| 230 | static void xhci_reinit_cached_ring(struct xhci_hcd *xhci, |
| 231 | struct xhci_ring *ring) |
| 232 | { |
| 233 | struct xhci_segment *seg = ring->first_seg; |
| 234 | do { |
| 235 | memset(seg->trbs, 0, |
| 236 | sizeof(union xhci_trb)*TRBS_PER_SEGMENT); |
| 237 | /* All endpoint rings have link TRBs */ |
| 238 | xhci_link_segments(xhci, seg, seg->next, 1); |
| 239 | seg = seg->next; |
| 240 | } while (seg != ring->first_seg); |
| 241 | xhci_initialize_ring_info(ring); |
| 242 | /* td list should be empty since all URBs have been cancelled, |
| 243 | * but just in case... |
| 244 | */ |
| 245 | INIT_LIST_HEAD(&ring->td_list); |
| 246 | } |
| 247 | |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 248 | #define CTX_SIZE(_hcc) (HCC_64BYTE_CONTEXT(_hcc) ? 64 : 32) |
| 249 | |
Randy Dunlap | 326b481 | 2010-04-19 08:53:50 -0700 | [diff] [blame] | 250 | static struct xhci_container_ctx *xhci_alloc_container_ctx(struct xhci_hcd *xhci, |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 251 | int type, gfp_t flags) |
| 252 | { |
| 253 | struct xhci_container_ctx *ctx = kzalloc(sizeof(*ctx), flags); |
| 254 | if (!ctx) |
| 255 | return NULL; |
| 256 | |
| 257 | BUG_ON((type != XHCI_CTX_TYPE_DEVICE) && (type != XHCI_CTX_TYPE_INPUT)); |
| 258 | ctx->type = type; |
| 259 | ctx->size = HCC_64BYTE_CONTEXT(xhci->hcc_params) ? 2048 : 1024; |
| 260 | if (type == XHCI_CTX_TYPE_INPUT) |
| 261 | ctx->size += CTX_SIZE(xhci->hcc_params); |
| 262 | |
| 263 | ctx->bytes = dma_pool_alloc(xhci->device_pool, flags, &ctx->dma); |
| 264 | memset(ctx->bytes, 0, ctx->size); |
| 265 | return ctx; |
| 266 | } |
| 267 | |
Randy Dunlap | 326b481 | 2010-04-19 08:53:50 -0700 | [diff] [blame] | 268 | static void xhci_free_container_ctx(struct xhci_hcd *xhci, |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 269 | struct xhci_container_ctx *ctx) |
| 270 | { |
Sarah Sharp | a1d78c1 | 2009-12-09 15:59:03 -0800 | [diff] [blame] | 271 | if (!ctx) |
| 272 | return; |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 273 | dma_pool_free(xhci->device_pool, ctx->bytes, ctx->dma); |
| 274 | kfree(ctx); |
| 275 | } |
| 276 | |
| 277 | struct xhci_input_control_ctx *xhci_get_input_control_ctx(struct xhci_hcd *xhci, |
| 278 | struct xhci_container_ctx *ctx) |
| 279 | { |
| 280 | BUG_ON(ctx->type != XHCI_CTX_TYPE_INPUT); |
| 281 | return (struct xhci_input_control_ctx *)ctx->bytes; |
| 282 | } |
| 283 | |
| 284 | struct xhci_slot_ctx *xhci_get_slot_ctx(struct xhci_hcd *xhci, |
| 285 | struct xhci_container_ctx *ctx) |
| 286 | { |
| 287 | if (ctx->type == XHCI_CTX_TYPE_DEVICE) |
| 288 | return (struct xhci_slot_ctx *)ctx->bytes; |
| 289 | |
| 290 | return (struct xhci_slot_ctx *) |
| 291 | (ctx->bytes + CTX_SIZE(xhci->hcc_params)); |
| 292 | } |
| 293 | |
| 294 | struct xhci_ep_ctx *xhci_get_ep_ctx(struct xhci_hcd *xhci, |
| 295 | struct xhci_container_ctx *ctx, |
| 296 | unsigned int ep_index) |
| 297 | { |
| 298 | /* increment ep index by offset of start of ep ctx array */ |
| 299 | ep_index++; |
| 300 | if (ctx->type == XHCI_CTX_TYPE_INPUT) |
| 301 | ep_index++; |
| 302 | |
| 303 | return (struct xhci_ep_ctx *) |
| 304 | (ctx->bytes + (ep_index * CTX_SIZE(xhci->hcc_params))); |
| 305 | } |
| 306 | |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 307 | |
| 308 | /***************** Streams structures manipulation *************************/ |
| 309 | |
| 310 | void xhci_free_stream_ctx(struct xhci_hcd *xhci, |
| 311 | unsigned int num_stream_ctxs, |
| 312 | struct xhci_stream_ctx *stream_ctx, dma_addr_t dma) |
| 313 | { |
| 314 | struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller); |
| 315 | |
| 316 | if (num_stream_ctxs > MEDIUM_STREAM_ARRAY_SIZE) |
| 317 | pci_free_consistent(pdev, |
| 318 | sizeof(struct xhci_stream_ctx)*num_stream_ctxs, |
| 319 | stream_ctx, dma); |
| 320 | else if (num_stream_ctxs <= SMALL_STREAM_ARRAY_SIZE) |
| 321 | return dma_pool_free(xhci->small_streams_pool, |
| 322 | stream_ctx, dma); |
| 323 | else |
| 324 | return dma_pool_free(xhci->medium_streams_pool, |
| 325 | stream_ctx, dma); |
| 326 | } |
| 327 | |
| 328 | /* |
| 329 | * The stream context array for each endpoint with bulk streams enabled can |
| 330 | * vary in size, based on: |
| 331 | * - how many streams the endpoint supports, |
| 332 | * - the maximum primary stream array size the host controller supports, |
| 333 | * - and how many streams the device driver asks for. |
| 334 | * |
| 335 | * The stream context array must be a power of 2, and can be as small as |
| 336 | * 64 bytes or as large as 1MB. |
| 337 | */ |
| 338 | struct xhci_stream_ctx *xhci_alloc_stream_ctx(struct xhci_hcd *xhci, |
| 339 | unsigned int num_stream_ctxs, dma_addr_t *dma, |
| 340 | gfp_t mem_flags) |
| 341 | { |
| 342 | struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller); |
| 343 | |
| 344 | if (num_stream_ctxs > MEDIUM_STREAM_ARRAY_SIZE) |
| 345 | return pci_alloc_consistent(pdev, |
| 346 | sizeof(struct xhci_stream_ctx)*num_stream_ctxs, |
| 347 | dma); |
| 348 | else if (num_stream_ctxs <= SMALL_STREAM_ARRAY_SIZE) |
| 349 | return dma_pool_alloc(xhci->small_streams_pool, |
| 350 | mem_flags, dma); |
| 351 | else |
| 352 | return dma_pool_alloc(xhci->medium_streams_pool, |
| 353 | mem_flags, dma); |
| 354 | } |
| 355 | |
Sarah Sharp | e9df17e | 2010-04-02 15:34:43 -0700 | [diff] [blame] | 356 | struct xhci_ring *xhci_dma_to_transfer_ring( |
| 357 | struct xhci_virt_ep *ep, |
| 358 | u64 address) |
| 359 | { |
| 360 | if (ep->ep_state & EP_HAS_STREAMS) |
| 361 | return radix_tree_lookup(&ep->stream_info->trb_address_map, |
| 362 | address >> SEGMENT_SHIFT); |
| 363 | return ep->ring; |
| 364 | } |
| 365 | |
| 366 | /* Only use this when you know stream_info is valid */ |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 367 | #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING |
Sarah Sharp | e9df17e | 2010-04-02 15:34:43 -0700 | [diff] [blame] | 368 | static struct xhci_ring *dma_to_stream_ring( |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 369 | struct xhci_stream_info *stream_info, |
| 370 | u64 address) |
| 371 | { |
| 372 | return radix_tree_lookup(&stream_info->trb_address_map, |
| 373 | address >> SEGMENT_SHIFT); |
| 374 | } |
| 375 | #endif /* CONFIG_USB_XHCI_HCD_DEBUGGING */ |
| 376 | |
Sarah Sharp | e9df17e | 2010-04-02 15:34:43 -0700 | [diff] [blame] | 377 | struct xhci_ring *xhci_stream_id_to_ring( |
| 378 | struct xhci_virt_device *dev, |
| 379 | unsigned int ep_index, |
| 380 | unsigned int stream_id) |
| 381 | { |
| 382 | struct xhci_virt_ep *ep = &dev->eps[ep_index]; |
| 383 | |
| 384 | if (stream_id == 0) |
| 385 | return ep->ring; |
| 386 | if (!ep->stream_info) |
| 387 | return NULL; |
| 388 | |
| 389 | if (stream_id > ep->stream_info->num_streams) |
| 390 | return NULL; |
| 391 | return ep->stream_info->stream_rings[stream_id]; |
| 392 | } |
| 393 | |
| 394 | struct xhci_ring *xhci_triad_to_transfer_ring(struct xhci_hcd *xhci, |
| 395 | unsigned int slot_id, unsigned int ep_index, |
| 396 | unsigned int stream_id) |
| 397 | { |
| 398 | struct xhci_virt_ep *ep; |
| 399 | |
| 400 | ep = &xhci->devs[slot_id]->eps[ep_index]; |
| 401 | /* Common case: no streams */ |
| 402 | if (!(ep->ep_state & EP_HAS_STREAMS)) |
| 403 | return ep->ring; |
| 404 | |
| 405 | if (stream_id == 0) { |
| 406 | xhci_warn(xhci, |
| 407 | "WARN: Slot ID %u, ep index %u has streams, " |
| 408 | "but URB has no stream ID.\n", |
| 409 | slot_id, ep_index); |
| 410 | return NULL; |
| 411 | } |
| 412 | |
| 413 | if (stream_id < ep->stream_info->num_streams) |
| 414 | return ep->stream_info->stream_rings[stream_id]; |
| 415 | |
| 416 | xhci_warn(xhci, |
| 417 | "WARN: Slot ID %u, ep index %u has " |
| 418 | "stream IDs 1 to %u allocated, " |
| 419 | "but stream ID %u is requested.\n", |
| 420 | slot_id, ep_index, |
| 421 | ep->stream_info->num_streams - 1, |
| 422 | stream_id); |
| 423 | return NULL; |
| 424 | } |
| 425 | |
| 426 | /* Get the right ring for the given URB. |
| 427 | * If the endpoint supports streams, boundary check the URB's stream ID. |
| 428 | * If the endpoint doesn't support streams, return the singular endpoint ring. |
| 429 | */ |
| 430 | struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci, |
| 431 | struct urb *urb) |
| 432 | { |
| 433 | return xhci_triad_to_transfer_ring(xhci, urb->dev->slot_id, |
| 434 | xhci_get_endpoint_index(&urb->ep->desc), urb->stream_id); |
| 435 | } |
| 436 | |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 437 | #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING |
| 438 | static int xhci_test_radix_tree(struct xhci_hcd *xhci, |
| 439 | unsigned int num_streams, |
| 440 | struct xhci_stream_info *stream_info) |
| 441 | { |
| 442 | u32 cur_stream; |
| 443 | struct xhci_ring *cur_ring; |
| 444 | u64 addr; |
| 445 | |
| 446 | for (cur_stream = 1; cur_stream < num_streams; cur_stream++) { |
| 447 | struct xhci_ring *mapped_ring; |
| 448 | int trb_size = sizeof(union xhci_trb); |
| 449 | |
| 450 | cur_ring = stream_info->stream_rings[cur_stream]; |
| 451 | for (addr = cur_ring->first_seg->dma; |
| 452 | addr < cur_ring->first_seg->dma + SEGMENT_SIZE; |
| 453 | addr += trb_size) { |
| 454 | mapped_ring = dma_to_stream_ring(stream_info, addr); |
| 455 | if (cur_ring != mapped_ring) { |
| 456 | xhci_warn(xhci, "WARN: DMA address 0x%08llx " |
| 457 | "didn't map to stream ID %u; " |
| 458 | "mapped to ring %p\n", |
| 459 | (unsigned long long) addr, |
| 460 | cur_stream, |
| 461 | mapped_ring); |
| 462 | return -EINVAL; |
| 463 | } |
| 464 | } |
| 465 | /* One TRB after the end of the ring segment shouldn't return a |
| 466 | * pointer to the current ring (although it may be a part of a |
| 467 | * different ring). |
| 468 | */ |
| 469 | mapped_ring = dma_to_stream_ring(stream_info, addr); |
| 470 | if (mapped_ring != cur_ring) { |
| 471 | /* One TRB before should also fail */ |
| 472 | addr = cur_ring->first_seg->dma - trb_size; |
| 473 | mapped_ring = dma_to_stream_ring(stream_info, addr); |
| 474 | } |
| 475 | if (mapped_ring == cur_ring) { |
| 476 | xhci_warn(xhci, "WARN: Bad DMA address 0x%08llx " |
| 477 | "mapped to valid stream ID %u; " |
| 478 | "mapped ring = %p\n", |
| 479 | (unsigned long long) addr, |
| 480 | cur_stream, |
| 481 | mapped_ring); |
| 482 | return -EINVAL; |
| 483 | } |
| 484 | } |
| 485 | return 0; |
| 486 | } |
| 487 | #endif /* CONFIG_USB_XHCI_HCD_DEBUGGING */ |
| 488 | |
| 489 | /* |
| 490 | * Change an endpoint's internal structure so it supports stream IDs. The |
| 491 | * number of requested streams includes stream 0, which cannot be used by device |
| 492 | * drivers. |
| 493 | * |
| 494 | * The number of stream contexts in the stream context array may be bigger than |
| 495 | * the number of streams the driver wants to use. This is because the number of |
| 496 | * stream context array entries must be a power of two. |
| 497 | * |
| 498 | * We need a radix tree for mapping physical addresses of TRBs to which stream |
| 499 | * ID they belong to. We need to do this because the host controller won't tell |
| 500 | * us which stream ring the TRB came from. We could store the stream ID in an |
| 501 | * event data TRB, but that doesn't help us for the cancellation case, since the |
| 502 | * endpoint may stop before it reaches that event data TRB. |
| 503 | * |
| 504 | * The radix tree maps the upper portion of the TRB DMA address to a ring |
| 505 | * segment that has the same upper portion of DMA addresses. For example, say I |
| 506 | * have segments of size 1KB, that are always 64-byte aligned. A segment may |
| 507 | * start at 0x10c91000 and end at 0x10c913f0. If I use the upper 10 bits, the |
| 508 | * key to the stream ID is 0x43244. I can use the DMA address of the TRB to |
| 509 | * pass the radix tree a key to get the right stream ID: |
| 510 | * |
| 511 | * 0x10c90fff >> 10 = 0x43243 |
| 512 | * 0x10c912c0 >> 10 = 0x43244 |
| 513 | * 0x10c91400 >> 10 = 0x43245 |
| 514 | * |
| 515 | * Obviously, only those TRBs with DMA addresses that are within the segment |
| 516 | * will make the radix tree return the stream ID for that ring. |
| 517 | * |
| 518 | * Caveats for the radix tree: |
| 519 | * |
| 520 | * The radix tree uses an unsigned long as a key pair. On 32-bit systems, an |
| 521 | * unsigned long will be 32-bits; on a 64-bit system an unsigned long will be |
| 522 | * 64-bits. Since we only request 32-bit DMA addresses, we can use that as the |
| 523 | * key on 32-bit or 64-bit systems (it would also be fine if we asked for 64-bit |
| 524 | * PCI DMA addresses on a 64-bit system). There might be a problem on 32-bit |
| 525 | * extended systems (where the DMA address can be bigger than 32-bits), |
| 526 | * if we allow the PCI dma mask to be bigger than 32-bits. So don't do that. |
| 527 | */ |
| 528 | struct xhci_stream_info *xhci_alloc_stream_info(struct xhci_hcd *xhci, |
| 529 | unsigned int num_stream_ctxs, |
| 530 | unsigned int num_streams, gfp_t mem_flags) |
| 531 | { |
| 532 | struct xhci_stream_info *stream_info; |
| 533 | u32 cur_stream; |
| 534 | struct xhci_ring *cur_ring; |
| 535 | unsigned long key; |
| 536 | u64 addr; |
| 537 | int ret; |
| 538 | |
| 539 | xhci_dbg(xhci, "Allocating %u streams and %u " |
| 540 | "stream context array entries.\n", |
| 541 | num_streams, num_stream_ctxs); |
| 542 | if (xhci->cmd_ring_reserved_trbs == MAX_RSVD_CMD_TRBS) { |
| 543 | xhci_dbg(xhci, "Command ring has no reserved TRBs available\n"); |
| 544 | return NULL; |
| 545 | } |
| 546 | xhci->cmd_ring_reserved_trbs++; |
| 547 | |
| 548 | stream_info = kzalloc(sizeof(struct xhci_stream_info), mem_flags); |
| 549 | if (!stream_info) |
| 550 | goto cleanup_trbs; |
| 551 | |
| 552 | stream_info->num_streams = num_streams; |
| 553 | stream_info->num_stream_ctxs = num_stream_ctxs; |
| 554 | |
| 555 | /* Initialize the array of virtual pointers to stream rings. */ |
| 556 | stream_info->stream_rings = kzalloc( |
| 557 | sizeof(struct xhci_ring *)*num_streams, |
| 558 | mem_flags); |
| 559 | if (!stream_info->stream_rings) |
| 560 | goto cleanup_info; |
| 561 | |
| 562 | /* Initialize the array of DMA addresses for stream rings for the HW. */ |
| 563 | stream_info->stream_ctx_array = xhci_alloc_stream_ctx(xhci, |
| 564 | num_stream_ctxs, &stream_info->ctx_array_dma, |
| 565 | mem_flags); |
| 566 | if (!stream_info->stream_ctx_array) |
| 567 | goto cleanup_ctx; |
| 568 | memset(stream_info->stream_ctx_array, 0, |
| 569 | sizeof(struct xhci_stream_ctx)*num_stream_ctxs); |
| 570 | |
| 571 | /* Allocate everything needed to free the stream rings later */ |
| 572 | stream_info->free_streams_command = |
| 573 | xhci_alloc_command(xhci, true, true, mem_flags); |
| 574 | if (!stream_info->free_streams_command) |
| 575 | goto cleanup_ctx; |
| 576 | |
| 577 | INIT_RADIX_TREE(&stream_info->trb_address_map, GFP_ATOMIC); |
| 578 | |
| 579 | /* Allocate rings for all the streams that the driver will use, |
| 580 | * and add their segment DMA addresses to the radix tree. |
| 581 | * Stream 0 is reserved. |
| 582 | */ |
| 583 | for (cur_stream = 1; cur_stream < num_streams; cur_stream++) { |
| 584 | stream_info->stream_rings[cur_stream] = |
| 585 | xhci_ring_alloc(xhci, 1, true, mem_flags); |
| 586 | cur_ring = stream_info->stream_rings[cur_stream]; |
| 587 | if (!cur_ring) |
| 588 | goto cleanup_rings; |
Sarah Sharp | e9df17e | 2010-04-02 15:34:43 -0700 | [diff] [blame] | 589 | cur_ring->stream_id = cur_stream; |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 590 | /* Set deq ptr, cycle bit, and stream context type */ |
| 591 | addr = cur_ring->first_seg->dma | |
| 592 | SCT_FOR_CTX(SCT_PRI_TR) | |
| 593 | cur_ring->cycle_state; |
| 594 | stream_info->stream_ctx_array[cur_stream].stream_ring = addr; |
| 595 | xhci_dbg(xhci, "Setting stream %d ring ptr to 0x%08llx\n", |
| 596 | cur_stream, (unsigned long long) addr); |
| 597 | |
| 598 | key = (unsigned long) |
| 599 | (cur_ring->first_seg->dma >> SEGMENT_SHIFT); |
| 600 | ret = radix_tree_insert(&stream_info->trb_address_map, |
| 601 | key, cur_ring); |
| 602 | if (ret) { |
| 603 | xhci_ring_free(xhci, cur_ring); |
| 604 | stream_info->stream_rings[cur_stream] = NULL; |
| 605 | goto cleanup_rings; |
| 606 | } |
| 607 | } |
| 608 | /* Leave the other unused stream ring pointers in the stream context |
| 609 | * array initialized to zero. This will cause the xHC to give us an |
| 610 | * error if the device asks for a stream ID we don't have setup (if it |
| 611 | * was any other way, the host controller would assume the ring is |
| 612 | * "empty" and wait forever for data to be queued to that stream ID). |
| 613 | */ |
| 614 | #if XHCI_DEBUG |
| 615 | /* Do a little test on the radix tree to make sure it returns the |
| 616 | * correct values. |
| 617 | */ |
| 618 | if (xhci_test_radix_tree(xhci, num_streams, stream_info)) |
| 619 | goto cleanup_rings; |
| 620 | #endif |
| 621 | |
| 622 | return stream_info; |
| 623 | |
| 624 | cleanup_rings: |
| 625 | for (cur_stream = 1; cur_stream < num_streams; cur_stream++) { |
| 626 | cur_ring = stream_info->stream_rings[cur_stream]; |
| 627 | if (cur_ring) { |
| 628 | addr = cur_ring->first_seg->dma; |
| 629 | radix_tree_delete(&stream_info->trb_address_map, |
| 630 | addr >> SEGMENT_SHIFT); |
| 631 | xhci_ring_free(xhci, cur_ring); |
| 632 | stream_info->stream_rings[cur_stream] = NULL; |
| 633 | } |
| 634 | } |
| 635 | xhci_free_command(xhci, stream_info->free_streams_command); |
| 636 | cleanup_ctx: |
| 637 | kfree(stream_info->stream_rings); |
| 638 | cleanup_info: |
| 639 | kfree(stream_info); |
| 640 | cleanup_trbs: |
| 641 | xhci->cmd_ring_reserved_trbs--; |
| 642 | return NULL; |
| 643 | } |
| 644 | /* |
| 645 | * Sets the MaxPStreams field and the Linear Stream Array field. |
| 646 | * Sets the dequeue pointer to the stream context array. |
| 647 | */ |
| 648 | void xhci_setup_streams_ep_input_ctx(struct xhci_hcd *xhci, |
| 649 | struct xhci_ep_ctx *ep_ctx, |
| 650 | struct xhci_stream_info *stream_info) |
| 651 | { |
| 652 | u32 max_primary_streams; |
| 653 | /* MaxPStreams is the number of stream context array entries, not the |
| 654 | * number we're actually using. Must be in 2^(MaxPstreams + 1) format. |
| 655 | * fls(0) = 0, fls(0x1) = 1, fls(0x10) = 2, fls(0x100) = 3, etc. |
| 656 | */ |
| 657 | max_primary_streams = fls(stream_info->num_stream_ctxs) - 2; |
| 658 | xhci_dbg(xhci, "Setting number of stream ctx array entries to %u\n", |
| 659 | 1 << (max_primary_streams + 1)); |
| 660 | ep_ctx->ep_info &= ~EP_MAXPSTREAMS_MASK; |
| 661 | ep_ctx->ep_info |= EP_MAXPSTREAMS(max_primary_streams); |
| 662 | ep_ctx->ep_info |= EP_HAS_LSA; |
| 663 | ep_ctx->deq = stream_info->ctx_array_dma; |
| 664 | } |
| 665 | |
| 666 | /* |
| 667 | * Sets the MaxPStreams field and the Linear Stream Array field to 0. |
| 668 | * Reinstalls the "normal" endpoint ring (at its previous dequeue mark, |
| 669 | * not at the beginning of the ring). |
| 670 | */ |
| 671 | void xhci_setup_no_streams_ep_input_ctx(struct xhci_hcd *xhci, |
| 672 | struct xhci_ep_ctx *ep_ctx, |
| 673 | struct xhci_virt_ep *ep) |
| 674 | { |
| 675 | dma_addr_t addr; |
| 676 | ep_ctx->ep_info &= ~EP_MAXPSTREAMS_MASK; |
| 677 | ep_ctx->ep_info &= ~EP_HAS_LSA; |
| 678 | addr = xhci_trb_virt_to_dma(ep->ring->deq_seg, ep->ring->dequeue); |
| 679 | ep_ctx->deq = addr | ep->ring->cycle_state; |
| 680 | } |
| 681 | |
| 682 | /* Frees all stream contexts associated with the endpoint, |
| 683 | * |
| 684 | * Caller should fix the endpoint context streams fields. |
| 685 | */ |
| 686 | void xhci_free_stream_info(struct xhci_hcd *xhci, |
| 687 | struct xhci_stream_info *stream_info) |
| 688 | { |
| 689 | int cur_stream; |
| 690 | struct xhci_ring *cur_ring; |
| 691 | dma_addr_t addr; |
| 692 | |
| 693 | if (!stream_info) |
| 694 | return; |
| 695 | |
| 696 | for (cur_stream = 1; cur_stream < stream_info->num_streams; |
| 697 | cur_stream++) { |
| 698 | cur_ring = stream_info->stream_rings[cur_stream]; |
| 699 | if (cur_ring) { |
| 700 | addr = cur_ring->first_seg->dma; |
| 701 | radix_tree_delete(&stream_info->trb_address_map, |
| 702 | addr >> SEGMENT_SHIFT); |
| 703 | xhci_ring_free(xhci, cur_ring); |
| 704 | stream_info->stream_rings[cur_stream] = NULL; |
| 705 | } |
| 706 | } |
| 707 | xhci_free_command(xhci, stream_info->free_streams_command); |
| 708 | xhci->cmd_ring_reserved_trbs--; |
| 709 | if (stream_info->stream_ctx_array) |
| 710 | xhci_free_stream_ctx(xhci, |
| 711 | stream_info->num_stream_ctxs, |
| 712 | stream_info->stream_ctx_array, |
| 713 | stream_info->ctx_array_dma); |
| 714 | |
| 715 | if (stream_info) |
| 716 | kfree(stream_info->stream_rings); |
| 717 | kfree(stream_info); |
| 718 | } |
| 719 | |
| 720 | |
| 721 | /***************** Device context manipulation *************************/ |
| 722 | |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 723 | static void xhci_init_endpoint_timer(struct xhci_hcd *xhci, |
| 724 | struct xhci_virt_ep *ep) |
| 725 | { |
| 726 | init_timer(&ep->stop_cmd_timer); |
| 727 | ep->stop_cmd_timer.data = (unsigned long) ep; |
| 728 | ep->stop_cmd_timer.function = xhci_stop_endpoint_command_watchdog; |
| 729 | ep->xhci = xhci; |
| 730 | } |
| 731 | |
Sarah Sharp | d0e96f5 | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 732 | /* All the xhci_tds in the ring's TD list should be freed at this point */ |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 733 | void xhci_free_virt_device(struct xhci_hcd *xhci, int slot_id) |
| 734 | { |
| 735 | struct xhci_virt_device *dev; |
| 736 | int i; |
| 737 | |
| 738 | /* Slot ID 0 is reserved */ |
| 739 | if (slot_id == 0 || !xhci->devs[slot_id]) |
| 740 | return; |
| 741 | |
| 742 | dev = xhci->devs[slot_id]; |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 743 | xhci->dcbaa->dev_context_ptrs[slot_id] = 0; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 744 | if (!dev) |
| 745 | return; |
| 746 | |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 747 | for (i = 0; i < 31; ++i) { |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 748 | if (dev->eps[i].ring) |
| 749 | xhci_ring_free(xhci, dev->eps[i].ring); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 750 | if (dev->eps[i].stream_info) |
| 751 | xhci_free_stream_info(xhci, |
| 752 | dev->eps[i].stream_info); |
| 753 | } |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 754 | |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 755 | if (dev->ring_cache) { |
| 756 | for (i = 0; i < dev->num_rings_cached; i++) |
| 757 | xhci_ring_free(xhci, dev->ring_cache[i]); |
| 758 | kfree(dev->ring_cache); |
| 759 | } |
| 760 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 761 | if (dev->in_ctx) |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 762 | xhci_free_container_ctx(xhci, dev->in_ctx); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 763 | if (dev->out_ctx) |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 764 | xhci_free_container_ctx(xhci, dev->out_ctx); |
| 765 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 766 | kfree(xhci->devs[slot_id]); |
Randy Dunlap | 326b481 | 2010-04-19 08:53:50 -0700 | [diff] [blame] | 767 | xhci->devs[slot_id] = NULL; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 768 | } |
| 769 | |
| 770 | int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id, |
| 771 | struct usb_device *udev, gfp_t flags) |
| 772 | { |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 773 | struct xhci_virt_device *dev; |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 774 | int i; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 775 | |
| 776 | /* Slot ID 0 is reserved */ |
| 777 | if (slot_id == 0 || xhci->devs[slot_id]) { |
| 778 | xhci_warn(xhci, "Bad Slot ID %d\n", slot_id); |
| 779 | return 0; |
| 780 | } |
| 781 | |
| 782 | xhci->devs[slot_id] = kzalloc(sizeof(*xhci->devs[slot_id]), flags); |
| 783 | if (!xhci->devs[slot_id]) |
| 784 | return 0; |
| 785 | dev = xhci->devs[slot_id]; |
| 786 | |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 787 | /* Allocate the (output) device context that will be used in the HC. */ |
| 788 | dev->out_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_DEVICE, flags); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 789 | if (!dev->out_ctx) |
| 790 | goto fail; |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 791 | |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 792 | xhci_dbg(xhci, "Slot %d output ctx = 0x%llx (dma)\n", slot_id, |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 793 | (unsigned long long)dev->out_ctx->dma); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 794 | |
| 795 | /* Allocate the (input) device context for address device command */ |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 796 | dev->in_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_INPUT, flags); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 797 | if (!dev->in_ctx) |
| 798 | goto fail; |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 799 | |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 800 | xhci_dbg(xhci, "Slot %d input ctx = 0x%llx (dma)\n", slot_id, |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 801 | (unsigned long long)dev->in_ctx->dma); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 802 | |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 803 | /* Initialize the cancellation list and watchdog timers for each ep */ |
| 804 | for (i = 0; i < 31; i++) { |
| 805 | xhci_init_endpoint_timer(xhci, &dev->eps[i]); |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 806 | INIT_LIST_HEAD(&dev->eps[i].cancelled_td_list); |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 807 | } |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 808 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 809 | /* Allocate endpoint 0 ring */ |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 810 | dev->eps[0].ring = xhci_ring_alloc(xhci, 1, true, flags); |
| 811 | if (!dev->eps[0].ring) |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 812 | goto fail; |
| 813 | |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 814 | /* Allocate pointers to the ring cache */ |
| 815 | dev->ring_cache = kzalloc( |
| 816 | sizeof(struct xhci_ring *)*XHCI_MAX_RINGS_CACHED, |
| 817 | flags); |
| 818 | if (!dev->ring_cache) |
| 819 | goto fail; |
| 820 | dev->num_rings_cached = 0; |
| 821 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 822 | init_completion(&dev->cmd_completion); |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 823 | INIT_LIST_HEAD(&dev->cmd_list); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 824 | |
Sarah Sharp | 28c2d2e | 2009-07-27 12:05:08 -0700 | [diff] [blame] | 825 | /* Point to output device context in dcbaa. */ |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 826 | xhci->dcbaa->dev_context_ptrs[slot_id] = dev->out_ctx->dma; |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 827 | xhci_dbg(xhci, "Set slot id %d dcbaa entry %p to 0x%llx\n", |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 828 | slot_id, |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 829 | &xhci->dcbaa->dev_context_ptrs[slot_id], |
Sarah Sharp | 28c2d2e | 2009-07-27 12:05:08 -0700 | [diff] [blame] | 830 | (unsigned long long) xhci->dcbaa->dev_context_ptrs[slot_id]); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 831 | |
| 832 | return 1; |
| 833 | fail: |
| 834 | xhci_free_virt_device(xhci, slot_id); |
| 835 | return 0; |
| 836 | } |
| 837 | |
Sarah Sharp | 2d1ee59 | 2010-07-09 17:08:54 +0200 | [diff] [blame] | 838 | void xhci_copy_ep0_dequeue_into_input_ctx(struct xhci_hcd *xhci, |
| 839 | struct usb_device *udev) |
| 840 | { |
| 841 | struct xhci_virt_device *virt_dev; |
| 842 | struct xhci_ep_ctx *ep0_ctx; |
| 843 | struct xhci_ring *ep_ring; |
| 844 | |
| 845 | virt_dev = xhci->devs[udev->slot_id]; |
| 846 | ep0_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, 0); |
| 847 | ep_ring = virt_dev->eps[0].ring; |
| 848 | /* |
| 849 | * FIXME we don't keep track of the dequeue pointer very well after a |
| 850 | * Set TR dequeue pointer, so we're setting the dequeue pointer of the |
| 851 | * host to our enqueue pointer. This should only be called after a |
| 852 | * configured device has reset, so all control transfers should have |
| 853 | * been completed or cancelled before the reset. |
| 854 | */ |
| 855 | ep0_ctx->deq = xhci_trb_virt_to_dma(ep_ring->enq_seg, ep_ring->enqueue); |
| 856 | ep0_ctx->deq |= ep_ring->cycle_state; |
| 857 | } |
| 858 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 859 | /* Setup an xHCI virtual device for a Set Address command */ |
| 860 | int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *udev) |
| 861 | { |
| 862 | struct xhci_virt_device *dev; |
| 863 | struct xhci_ep_ctx *ep0_ctx; |
| 864 | struct usb_device *top_dev; |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 865 | struct xhci_slot_ctx *slot_ctx; |
| 866 | struct xhci_input_control_ctx *ctrl_ctx; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 867 | |
| 868 | dev = xhci->devs[udev->slot_id]; |
| 869 | /* Slot ID 0 is reserved */ |
| 870 | if (udev->slot_id == 0 || !dev) { |
| 871 | xhci_warn(xhci, "Slot ID %d is not assigned to this device\n", |
| 872 | udev->slot_id); |
| 873 | return -EINVAL; |
| 874 | } |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 875 | ep0_ctx = xhci_get_ep_ctx(xhci, dev->in_ctx, 0); |
| 876 | ctrl_ctx = xhci_get_input_control_ctx(xhci, dev->in_ctx); |
| 877 | slot_ctx = xhci_get_slot_ctx(xhci, dev->in_ctx); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 878 | |
| 879 | /* 2) New slot context and endpoint 0 context are valid*/ |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 880 | ctrl_ctx->add_flags = SLOT_FLAG | EP0_FLAG; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 881 | |
| 882 | /* 3) Only the control endpoint is valid - one endpoint context */ |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 883 | slot_ctx->dev_info |= LAST_CTX(1); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 884 | |
Sarah Sharp | 4a0cd96 | 2009-09-04 10:53:17 -0700 | [diff] [blame] | 885 | slot_ctx->dev_info |= (u32) udev->route; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 886 | switch (udev->speed) { |
| 887 | case USB_SPEED_SUPER: |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 888 | slot_ctx->dev_info |= (u32) SLOT_SPEED_SS; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 889 | break; |
| 890 | case USB_SPEED_HIGH: |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 891 | slot_ctx->dev_info |= (u32) SLOT_SPEED_HS; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 892 | break; |
| 893 | case USB_SPEED_FULL: |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 894 | slot_ctx->dev_info |= (u32) SLOT_SPEED_FS; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 895 | break; |
| 896 | case USB_SPEED_LOW: |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 897 | slot_ctx->dev_info |= (u32) SLOT_SPEED_LS; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 898 | break; |
Greg Kroah-Hartman | 551cdbb | 2010-01-14 11:08:04 -0800 | [diff] [blame] | 899 | case USB_SPEED_WIRELESS: |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 900 | xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n"); |
| 901 | return -EINVAL; |
| 902 | break; |
| 903 | default: |
| 904 | /* Speed was set earlier, this shouldn't happen. */ |
| 905 | BUG(); |
| 906 | } |
| 907 | /* Find the root hub port this device is under */ |
| 908 | for (top_dev = udev; top_dev->parent && top_dev->parent->parent; |
| 909 | top_dev = top_dev->parent) |
| 910 | /* Found device below root hub */; |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 911 | slot_ctx->dev_info2 |= (u32) ROOT_HUB_PORT(top_dev->portnum); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 912 | xhci_dbg(xhci, "Set root hub portnum to %d\n", top_dev->portnum); |
| 913 | |
| 914 | /* Is this a LS/FS device under a HS hub? */ |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 915 | if ((udev->speed == USB_SPEED_LOW || udev->speed == USB_SPEED_FULL) && |
| 916 | udev->tt) { |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 917 | slot_ctx->tt_info = udev->tt->hub->slot_id; |
| 918 | slot_ctx->tt_info |= udev->ttport << 8; |
Sarah Sharp | 07b6de1 | 2009-09-04 10:53:19 -0700 | [diff] [blame] | 919 | if (udev->tt->multi) |
| 920 | slot_ctx->dev_info |= DEV_MTT; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 921 | } |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 922 | xhci_dbg(xhci, "udev->tt = %p\n", udev->tt); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 923 | xhci_dbg(xhci, "udev->ttport = 0x%x\n", udev->ttport); |
| 924 | |
| 925 | /* Step 4 - ring already allocated */ |
| 926 | /* Step 5 */ |
| 927 | ep0_ctx->ep_info2 = EP_TYPE(CTRL_EP); |
| 928 | /* |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 929 | * XXX: Not sure about wireless USB devices. |
| 930 | */ |
Sarah Sharp | 47aded8 | 2009-08-07 14:04:46 -0700 | [diff] [blame] | 931 | switch (udev->speed) { |
| 932 | case USB_SPEED_SUPER: |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 933 | ep0_ctx->ep_info2 |= MAX_PACKET(512); |
Sarah Sharp | 47aded8 | 2009-08-07 14:04:46 -0700 | [diff] [blame] | 934 | break; |
| 935 | case USB_SPEED_HIGH: |
| 936 | /* USB core guesses at a 64-byte max packet first for FS devices */ |
| 937 | case USB_SPEED_FULL: |
| 938 | ep0_ctx->ep_info2 |= MAX_PACKET(64); |
| 939 | break; |
| 940 | case USB_SPEED_LOW: |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 941 | ep0_ctx->ep_info2 |= MAX_PACKET(8); |
Sarah Sharp | 47aded8 | 2009-08-07 14:04:46 -0700 | [diff] [blame] | 942 | break; |
Greg Kroah-Hartman | 551cdbb | 2010-01-14 11:08:04 -0800 | [diff] [blame] | 943 | case USB_SPEED_WIRELESS: |
Sarah Sharp | 47aded8 | 2009-08-07 14:04:46 -0700 | [diff] [blame] | 944 | xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n"); |
| 945 | return -EINVAL; |
| 946 | break; |
| 947 | default: |
| 948 | /* New speed? */ |
| 949 | BUG(); |
| 950 | } |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 951 | /* EP 0 can handle "burst" sizes of 1, so Max Burst Size field is 0 */ |
| 952 | ep0_ctx->ep_info2 |= MAX_BURST(0); |
| 953 | ep0_ctx->ep_info2 |= ERROR_COUNT(3); |
| 954 | |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 955 | ep0_ctx->deq = |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 956 | dev->eps[0].ring->first_seg->dma; |
| 957 | ep0_ctx->deq |= dev->eps[0].ring->cycle_state; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 958 | |
| 959 | /* Steps 7 and 8 were done in xhci_alloc_virt_device() */ |
| 960 | |
| 961 | return 0; |
| 962 | } |
| 963 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 964 | /* Return the polling or NAK interval. |
| 965 | * |
| 966 | * The polling interval is expressed in "microframes". If xHCI's Interval field |
| 967 | * is set to N, it will service the endpoint every 2^(Interval)*125us. |
| 968 | * |
| 969 | * The NAK interval is one NAK per 1 to 255 microframes, or no NAKs if interval |
| 970 | * is set to 0. |
| 971 | */ |
| 972 | static inline unsigned int xhci_get_endpoint_interval(struct usb_device *udev, |
| 973 | struct usb_host_endpoint *ep) |
| 974 | { |
| 975 | unsigned int interval = 0; |
| 976 | |
| 977 | switch (udev->speed) { |
| 978 | case USB_SPEED_HIGH: |
| 979 | /* Max NAK rate */ |
| 980 | if (usb_endpoint_xfer_control(&ep->desc) || |
| 981 | usb_endpoint_xfer_bulk(&ep->desc)) |
| 982 | interval = ep->desc.bInterval; |
| 983 | /* Fall through - SS and HS isoc/int have same decoding */ |
| 984 | case USB_SPEED_SUPER: |
| 985 | if (usb_endpoint_xfer_int(&ep->desc) || |
| 986 | usb_endpoint_xfer_isoc(&ep->desc)) { |
| 987 | if (ep->desc.bInterval == 0) |
| 988 | interval = 0; |
| 989 | else |
| 990 | interval = ep->desc.bInterval - 1; |
| 991 | if (interval > 15) |
| 992 | interval = 15; |
| 993 | if (interval != ep->desc.bInterval + 1) |
| 994 | dev_warn(&udev->dev, "ep %#x - rounding interval to %d microframes\n", |
| 995 | ep->desc.bEndpointAddress, 1 << interval); |
| 996 | } |
| 997 | break; |
| 998 | /* Convert bInterval (in 1-255 frames) to microframes and round down to |
| 999 | * nearest power of 2. |
| 1000 | */ |
| 1001 | case USB_SPEED_FULL: |
| 1002 | case USB_SPEED_LOW: |
| 1003 | if (usb_endpoint_xfer_int(&ep->desc) || |
| 1004 | usb_endpoint_xfer_isoc(&ep->desc)) { |
| 1005 | interval = fls(8*ep->desc.bInterval) - 1; |
| 1006 | if (interval > 10) |
| 1007 | interval = 10; |
| 1008 | if (interval < 3) |
| 1009 | interval = 3; |
| 1010 | if ((1 << interval) != 8*ep->desc.bInterval) |
Sarah Sharp | 9ce669a | 2010-03-16 12:59:24 -0700 | [diff] [blame] | 1011 | dev_warn(&udev->dev, |
| 1012 | "ep %#x - rounding interval" |
| 1013 | " to %d microframes, " |
| 1014 | "ep desc says %d microframes\n", |
| 1015 | ep->desc.bEndpointAddress, |
| 1016 | 1 << interval, |
| 1017 | 8*ep->desc.bInterval); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1018 | } |
| 1019 | break; |
| 1020 | default: |
| 1021 | BUG(); |
| 1022 | } |
| 1023 | return EP_INTERVAL(interval); |
| 1024 | } |
| 1025 | |
Sarah Sharp | c30c791 | 2010-07-10 15:48:01 +0200 | [diff] [blame] | 1026 | /* The "Mult" field in the endpoint context is only set for SuperSpeed isoc eps. |
Sarah Sharp | 1cf6224 | 2010-04-16 08:07:04 -0700 | [diff] [blame] | 1027 | * High speed endpoint descriptors can define "the number of additional |
| 1028 | * transaction opportunities per microframe", but that goes in the Max Burst |
| 1029 | * endpoint context field. |
| 1030 | */ |
| 1031 | static inline u32 xhci_get_endpoint_mult(struct usb_device *udev, |
| 1032 | struct usb_host_endpoint *ep) |
| 1033 | { |
Sarah Sharp | c30c791 | 2010-07-10 15:48:01 +0200 | [diff] [blame] | 1034 | if (udev->speed != USB_SPEED_SUPER || |
| 1035 | !usb_endpoint_xfer_isoc(&ep->desc)) |
Sarah Sharp | 1cf6224 | 2010-04-16 08:07:04 -0700 | [diff] [blame] | 1036 | return 0; |
Alan Stern | 842f169 | 2010-04-30 12:44:46 -0400 | [diff] [blame] | 1037 | return ep->ss_ep_comp.bmAttributes; |
Sarah Sharp | 1cf6224 | 2010-04-16 08:07:04 -0700 | [diff] [blame] | 1038 | } |
| 1039 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1040 | static inline u32 xhci_get_endpoint_type(struct usb_device *udev, |
| 1041 | struct usb_host_endpoint *ep) |
| 1042 | { |
| 1043 | int in; |
| 1044 | u32 type; |
| 1045 | |
| 1046 | in = usb_endpoint_dir_in(&ep->desc); |
| 1047 | if (usb_endpoint_xfer_control(&ep->desc)) { |
| 1048 | type = EP_TYPE(CTRL_EP); |
| 1049 | } else if (usb_endpoint_xfer_bulk(&ep->desc)) { |
| 1050 | if (in) |
| 1051 | type = EP_TYPE(BULK_IN_EP); |
| 1052 | else |
| 1053 | type = EP_TYPE(BULK_OUT_EP); |
| 1054 | } else if (usb_endpoint_xfer_isoc(&ep->desc)) { |
| 1055 | if (in) |
| 1056 | type = EP_TYPE(ISOC_IN_EP); |
| 1057 | else |
| 1058 | type = EP_TYPE(ISOC_OUT_EP); |
| 1059 | } else if (usb_endpoint_xfer_int(&ep->desc)) { |
| 1060 | if (in) |
| 1061 | type = EP_TYPE(INT_IN_EP); |
| 1062 | else |
| 1063 | type = EP_TYPE(INT_OUT_EP); |
| 1064 | } else { |
| 1065 | BUG(); |
| 1066 | } |
| 1067 | return type; |
| 1068 | } |
| 1069 | |
Sarah Sharp | 9238f25 | 2010-04-16 08:07:27 -0700 | [diff] [blame] | 1070 | /* Return the maximum endpoint service interval time (ESIT) payload. |
| 1071 | * Basically, this is the maxpacket size, multiplied by the burst size |
| 1072 | * and mult size. |
| 1073 | */ |
| 1074 | static inline u32 xhci_get_max_esit_payload(struct xhci_hcd *xhci, |
| 1075 | struct usb_device *udev, |
| 1076 | struct usb_host_endpoint *ep) |
| 1077 | { |
| 1078 | int max_burst; |
| 1079 | int max_packet; |
| 1080 | |
| 1081 | /* Only applies for interrupt or isochronous endpoints */ |
| 1082 | if (usb_endpoint_xfer_control(&ep->desc) || |
| 1083 | usb_endpoint_xfer_bulk(&ep->desc)) |
| 1084 | return 0; |
| 1085 | |
Alan Stern | 842f169 | 2010-04-30 12:44:46 -0400 | [diff] [blame] | 1086 | if (udev->speed == USB_SPEED_SUPER) |
| 1087 | return ep->ss_ep_comp.wBytesPerInterval; |
Sarah Sharp | 9238f25 | 2010-04-16 08:07:27 -0700 | [diff] [blame] | 1088 | |
| 1089 | max_packet = ep->desc.wMaxPacketSize & 0x3ff; |
| 1090 | max_burst = (ep->desc.wMaxPacketSize & 0x1800) >> 11; |
| 1091 | /* A 0 in max burst means 1 transfer per ESIT */ |
| 1092 | return max_packet * (max_burst + 1); |
| 1093 | } |
| 1094 | |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 1095 | /* Set up an endpoint with one ring segment. Do not allocate stream rings. |
| 1096 | * Drivers will have to call usb_alloc_streams() to do that. |
| 1097 | */ |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1098 | int xhci_endpoint_init(struct xhci_hcd *xhci, |
| 1099 | struct xhci_virt_device *virt_dev, |
| 1100 | struct usb_device *udev, |
Sarah Sharp | f88ba78 | 2009-05-14 11:44:22 -0700 | [diff] [blame] | 1101 | struct usb_host_endpoint *ep, |
| 1102 | gfp_t mem_flags) |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1103 | { |
| 1104 | unsigned int ep_index; |
| 1105 | struct xhci_ep_ctx *ep_ctx; |
| 1106 | struct xhci_ring *ep_ring; |
| 1107 | unsigned int max_packet; |
| 1108 | unsigned int max_burst; |
Sarah Sharp | 9238f25 | 2010-04-16 08:07:27 -0700 | [diff] [blame] | 1109 | u32 max_esit_payload; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1110 | |
| 1111 | ep_index = xhci_get_endpoint_index(&ep->desc); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1112 | ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1113 | |
| 1114 | /* Set up the endpoint ring */ |
Andiry Xu | a061a5a | 2010-07-22 15:23:47 -0700 | [diff] [blame^] | 1115 | /* |
| 1116 | * Isochronous endpoint ring needs bigger size because one isoc URB |
| 1117 | * carries multiple packets and it will insert multiple tds to the |
| 1118 | * ring. |
| 1119 | * This should be replaced with dynamic ring resizing in the future. |
| 1120 | */ |
| 1121 | if (usb_endpoint_xfer_isoc(&ep->desc)) |
| 1122 | virt_dev->eps[ep_index].new_ring = |
| 1123 | xhci_ring_alloc(xhci, 8, true, mem_flags); |
| 1124 | else |
| 1125 | virt_dev->eps[ep_index].new_ring = |
| 1126 | xhci_ring_alloc(xhci, 1, true, mem_flags); |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 1127 | if (!virt_dev->eps[ep_index].new_ring) { |
| 1128 | /* Attempt to use the ring cache */ |
| 1129 | if (virt_dev->num_rings_cached == 0) |
| 1130 | return -ENOMEM; |
| 1131 | virt_dev->eps[ep_index].new_ring = |
| 1132 | virt_dev->ring_cache[virt_dev->num_rings_cached]; |
| 1133 | virt_dev->ring_cache[virt_dev->num_rings_cached] = NULL; |
| 1134 | virt_dev->num_rings_cached--; |
| 1135 | xhci_reinit_cached_ring(xhci, virt_dev->eps[ep_index].new_ring); |
| 1136 | } |
Andiry Xu | d18240d | 2010-07-22 15:23:25 -0700 | [diff] [blame] | 1137 | virt_dev->eps[ep_index].skip = false; |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 1138 | ep_ring = virt_dev->eps[ep_index].new_ring; |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 1139 | ep_ctx->deq = ep_ring->first_seg->dma | ep_ring->cycle_state; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1140 | |
| 1141 | ep_ctx->ep_info = xhci_get_endpoint_interval(udev, ep); |
Sarah Sharp | 1cf6224 | 2010-04-16 08:07:04 -0700 | [diff] [blame] | 1142 | ep_ctx->ep_info |= EP_MULT(xhci_get_endpoint_mult(udev, ep)); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1143 | |
| 1144 | /* FIXME dig Mult and streams info out of ep companion desc */ |
| 1145 | |
Sarah Sharp | 47692d1 | 2009-07-27 12:04:27 -0700 | [diff] [blame] | 1146 | /* Allow 3 retries for everything but isoc; |
| 1147 | * error count = 0 means infinite retries. |
| 1148 | */ |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1149 | if (!usb_endpoint_xfer_isoc(&ep->desc)) |
| 1150 | ep_ctx->ep_info2 = ERROR_COUNT(3); |
| 1151 | else |
Sarah Sharp | 47692d1 | 2009-07-27 12:04:27 -0700 | [diff] [blame] | 1152 | ep_ctx->ep_info2 = ERROR_COUNT(1); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1153 | |
| 1154 | ep_ctx->ep_info2 |= xhci_get_endpoint_type(udev, ep); |
| 1155 | |
| 1156 | /* Set the max packet size and max burst */ |
| 1157 | switch (udev->speed) { |
| 1158 | case USB_SPEED_SUPER: |
| 1159 | max_packet = ep->desc.wMaxPacketSize; |
| 1160 | ep_ctx->ep_info2 |= MAX_PACKET(max_packet); |
Sarah Sharp | b10de14 | 2009-04-27 19:58:50 -0700 | [diff] [blame] | 1161 | /* dig out max burst from ep companion desc */ |
Alan Stern | 842f169 | 2010-04-30 12:44:46 -0400 | [diff] [blame] | 1162 | max_packet = ep->ss_ep_comp.bMaxBurst; |
| 1163 | if (!max_packet) |
| 1164 | xhci_warn(xhci, "WARN no SS endpoint bMaxBurst\n"); |
Sarah Sharp | b10de14 | 2009-04-27 19:58:50 -0700 | [diff] [blame] | 1165 | ep_ctx->ep_info2 |= MAX_BURST(max_packet); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1166 | break; |
| 1167 | case USB_SPEED_HIGH: |
| 1168 | /* bits 11:12 specify the number of additional transaction |
| 1169 | * opportunities per microframe (USB 2.0, section 9.6.6) |
| 1170 | */ |
| 1171 | if (usb_endpoint_xfer_isoc(&ep->desc) || |
| 1172 | usb_endpoint_xfer_int(&ep->desc)) { |
| 1173 | max_burst = (ep->desc.wMaxPacketSize & 0x1800) >> 11; |
| 1174 | ep_ctx->ep_info2 |= MAX_BURST(max_burst); |
| 1175 | } |
| 1176 | /* Fall through */ |
| 1177 | case USB_SPEED_FULL: |
| 1178 | case USB_SPEED_LOW: |
| 1179 | max_packet = ep->desc.wMaxPacketSize & 0x3ff; |
| 1180 | ep_ctx->ep_info2 |= MAX_PACKET(max_packet); |
| 1181 | break; |
| 1182 | default: |
| 1183 | BUG(); |
| 1184 | } |
Sarah Sharp | 9238f25 | 2010-04-16 08:07:27 -0700 | [diff] [blame] | 1185 | max_esit_payload = xhci_get_max_esit_payload(xhci, udev, ep); |
| 1186 | ep_ctx->tx_info = MAX_ESIT_PAYLOAD_FOR_EP(max_esit_payload); |
| 1187 | |
| 1188 | /* |
| 1189 | * XXX no idea how to calculate the average TRB buffer length for bulk |
| 1190 | * endpoints, as the driver gives us no clue how big each scatter gather |
| 1191 | * list entry (or buffer) is going to be. |
| 1192 | * |
| 1193 | * For isochronous and interrupt endpoints, we set it to the max |
| 1194 | * available, until we have new API in the USB core to allow drivers to |
| 1195 | * declare how much bandwidth they actually need. |
| 1196 | * |
| 1197 | * Normally, it would be calculated by taking the total of the buffer |
| 1198 | * lengths in the TD and then dividing by the number of TRBs in a TD, |
| 1199 | * including link TRBs, No-op TRBs, and Event data TRBs. Since we don't |
| 1200 | * use Event Data TRBs, and we don't chain in a link TRB on short |
| 1201 | * transfers, we're basically dividing by 1. |
| 1202 | */ |
| 1203 | ep_ctx->tx_info |= AVG_TRB_LENGTH_FOR_EP(max_esit_payload); |
| 1204 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1205 | /* FIXME Debug endpoint context */ |
| 1206 | return 0; |
| 1207 | } |
| 1208 | |
| 1209 | void xhci_endpoint_zero(struct xhci_hcd *xhci, |
| 1210 | struct xhci_virt_device *virt_dev, |
| 1211 | struct usb_host_endpoint *ep) |
| 1212 | { |
| 1213 | unsigned int ep_index; |
| 1214 | struct xhci_ep_ctx *ep_ctx; |
| 1215 | |
| 1216 | ep_index = xhci_get_endpoint_index(&ep->desc); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1217 | ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1218 | |
| 1219 | ep_ctx->ep_info = 0; |
| 1220 | ep_ctx->ep_info2 = 0; |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 1221 | ep_ctx->deq = 0; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1222 | ep_ctx->tx_info = 0; |
| 1223 | /* Don't free the endpoint ring until the set interface or configuration |
| 1224 | * request succeeds. |
| 1225 | */ |
| 1226 | } |
| 1227 | |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1228 | /* Copy output xhci_ep_ctx to the input xhci_ep_ctx copy. |
| 1229 | * Useful when you want to change one particular aspect of the endpoint and then |
| 1230 | * issue a configure endpoint command. |
| 1231 | */ |
| 1232 | void xhci_endpoint_copy(struct xhci_hcd *xhci, |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1233 | struct xhci_container_ctx *in_ctx, |
| 1234 | struct xhci_container_ctx *out_ctx, |
| 1235 | unsigned int ep_index) |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1236 | { |
| 1237 | struct xhci_ep_ctx *out_ep_ctx; |
| 1238 | struct xhci_ep_ctx *in_ep_ctx; |
| 1239 | |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1240 | out_ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index); |
| 1241 | in_ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index); |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1242 | |
| 1243 | in_ep_ctx->ep_info = out_ep_ctx->ep_info; |
| 1244 | in_ep_ctx->ep_info2 = out_ep_ctx->ep_info2; |
| 1245 | in_ep_ctx->deq = out_ep_ctx->deq; |
| 1246 | in_ep_ctx->tx_info = out_ep_ctx->tx_info; |
| 1247 | } |
| 1248 | |
| 1249 | /* Copy output xhci_slot_ctx to the input xhci_slot_ctx. |
| 1250 | * Useful when you want to change one particular aspect of the endpoint and then |
| 1251 | * issue a configure endpoint command. Only the context entries field matters, |
| 1252 | * but we'll copy the whole thing anyway. |
| 1253 | */ |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1254 | void xhci_slot_copy(struct xhci_hcd *xhci, |
| 1255 | struct xhci_container_ctx *in_ctx, |
| 1256 | struct xhci_container_ctx *out_ctx) |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1257 | { |
| 1258 | struct xhci_slot_ctx *in_slot_ctx; |
| 1259 | struct xhci_slot_ctx *out_slot_ctx; |
| 1260 | |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1261 | in_slot_ctx = xhci_get_slot_ctx(xhci, in_ctx); |
| 1262 | out_slot_ctx = xhci_get_slot_ctx(xhci, out_ctx); |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1263 | |
| 1264 | in_slot_ctx->dev_info = out_slot_ctx->dev_info; |
| 1265 | in_slot_ctx->dev_info2 = out_slot_ctx->dev_info2; |
| 1266 | in_slot_ctx->tt_info = out_slot_ctx->tt_info; |
| 1267 | in_slot_ctx->dev_state = out_slot_ctx->dev_state; |
| 1268 | } |
| 1269 | |
John Youn | 254c80a | 2009-07-27 12:05:03 -0700 | [diff] [blame] | 1270 | /* Set up the scratchpad buffer array and scratchpad buffers, if needed. */ |
| 1271 | static int scratchpad_alloc(struct xhci_hcd *xhci, gfp_t flags) |
| 1272 | { |
| 1273 | int i; |
| 1274 | struct device *dev = xhci_to_hcd(xhci)->self.controller; |
| 1275 | int num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2); |
| 1276 | |
| 1277 | xhci_dbg(xhci, "Allocating %d scratchpad buffers\n", num_sp); |
| 1278 | |
| 1279 | if (!num_sp) |
| 1280 | return 0; |
| 1281 | |
| 1282 | xhci->scratchpad = kzalloc(sizeof(*xhci->scratchpad), flags); |
| 1283 | if (!xhci->scratchpad) |
| 1284 | goto fail_sp; |
| 1285 | |
| 1286 | xhci->scratchpad->sp_array = |
| 1287 | pci_alloc_consistent(to_pci_dev(dev), |
| 1288 | num_sp * sizeof(u64), |
| 1289 | &xhci->scratchpad->sp_dma); |
| 1290 | if (!xhci->scratchpad->sp_array) |
| 1291 | goto fail_sp2; |
| 1292 | |
| 1293 | xhci->scratchpad->sp_buffers = kzalloc(sizeof(void *) * num_sp, flags); |
| 1294 | if (!xhci->scratchpad->sp_buffers) |
| 1295 | goto fail_sp3; |
| 1296 | |
| 1297 | xhci->scratchpad->sp_dma_buffers = |
| 1298 | kzalloc(sizeof(dma_addr_t) * num_sp, flags); |
| 1299 | |
| 1300 | if (!xhci->scratchpad->sp_dma_buffers) |
| 1301 | goto fail_sp4; |
| 1302 | |
| 1303 | xhci->dcbaa->dev_context_ptrs[0] = xhci->scratchpad->sp_dma; |
| 1304 | for (i = 0; i < num_sp; i++) { |
| 1305 | dma_addr_t dma; |
| 1306 | void *buf = pci_alloc_consistent(to_pci_dev(dev), |
| 1307 | xhci->page_size, &dma); |
| 1308 | if (!buf) |
| 1309 | goto fail_sp5; |
| 1310 | |
| 1311 | xhci->scratchpad->sp_array[i] = dma; |
| 1312 | xhci->scratchpad->sp_buffers[i] = buf; |
| 1313 | xhci->scratchpad->sp_dma_buffers[i] = dma; |
| 1314 | } |
| 1315 | |
| 1316 | return 0; |
| 1317 | |
| 1318 | fail_sp5: |
| 1319 | for (i = i - 1; i >= 0; i--) { |
| 1320 | pci_free_consistent(to_pci_dev(dev), xhci->page_size, |
| 1321 | xhci->scratchpad->sp_buffers[i], |
| 1322 | xhci->scratchpad->sp_dma_buffers[i]); |
| 1323 | } |
| 1324 | kfree(xhci->scratchpad->sp_dma_buffers); |
| 1325 | |
| 1326 | fail_sp4: |
| 1327 | kfree(xhci->scratchpad->sp_buffers); |
| 1328 | |
| 1329 | fail_sp3: |
| 1330 | pci_free_consistent(to_pci_dev(dev), num_sp * sizeof(u64), |
| 1331 | xhci->scratchpad->sp_array, |
| 1332 | xhci->scratchpad->sp_dma); |
| 1333 | |
| 1334 | fail_sp2: |
| 1335 | kfree(xhci->scratchpad); |
| 1336 | xhci->scratchpad = NULL; |
| 1337 | |
| 1338 | fail_sp: |
| 1339 | return -ENOMEM; |
| 1340 | } |
| 1341 | |
| 1342 | static void scratchpad_free(struct xhci_hcd *xhci) |
| 1343 | { |
| 1344 | int num_sp; |
| 1345 | int i; |
| 1346 | struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller); |
| 1347 | |
| 1348 | if (!xhci->scratchpad) |
| 1349 | return; |
| 1350 | |
| 1351 | num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2); |
| 1352 | |
| 1353 | for (i = 0; i < num_sp; i++) { |
| 1354 | pci_free_consistent(pdev, xhci->page_size, |
| 1355 | xhci->scratchpad->sp_buffers[i], |
| 1356 | xhci->scratchpad->sp_dma_buffers[i]); |
| 1357 | } |
| 1358 | kfree(xhci->scratchpad->sp_dma_buffers); |
| 1359 | kfree(xhci->scratchpad->sp_buffers); |
| 1360 | pci_free_consistent(pdev, num_sp * sizeof(u64), |
| 1361 | xhci->scratchpad->sp_array, |
| 1362 | xhci->scratchpad->sp_dma); |
| 1363 | kfree(xhci->scratchpad); |
| 1364 | xhci->scratchpad = NULL; |
| 1365 | } |
| 1366 | |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1367 | struct xhci_command *xhci_alloc_command(struct xhci_hcd *xhci, |
Sarah Sharp | a1d78c1 | 2009-12-09 15:59:03 -0800 | [diff] [blame] | 1368 | bool allocate_in_ctx, bool allocate_completion, |
| 1369 | gfp_t mem_flags) |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1370 | { |
| 1371 | struct xhci_command *command; |
| 1372 | |
| 1373 | command = kzalloc(sizeof(*command), mem_flags); |
| 1374 | if (!command) |
| 1375 | return NULL; |
| 1376 | |
Sarah Sharp | a1d78c1 | 2009-12-09 15:59:03 -0800 | [diff] [blame] | 1377 | if (allocate_in_ctx) { |
| 1378 | command->in_ctx = |
| 1379 | xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_INPUT, |
| 1380 | mem_flags); |
| 1381 | if (!command->in_ctx) { |
| 1382 | kfree(command); |
| 1383 | return NULL; |
| 1384 | } |
Julia Lawall | 06e1829 | 2009-11-21 12:51:47 +0100 | [diff] [blame] | 1385 | } |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1386 | |
| 1387 | if (allocate_completion) { |
| 1388 | command->completion = |
| 1389 | kzalloc(sizeof(struct completion), mem_flags); |
| 1390 | if (!command->completion) { |
| 1391 | xhci_free_container_ctx(xhci, command->in_ctx); |
Julia Lawall | 06e1829 | 2009-11-21 12:51:47 +0100 | [diff] [blame] | 1392 | kfree(command); |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1393 | return NULL; |
| 1394 | } |
| 1395 | init_completion(command->completion); |
| 1396 | } |
| 1397 | |
| 1398 | command->status = 0; |
| 1399 | INIT_LIST_HEAD(&command->cmd_list); |
| 1400 | return command; |
| 1401 | } |
| 1402 | |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1403 | void xhci_urb_free_priv(struct xhci_hcd *xhci, struct urb_priv *urb_priv) |
| 1404 | { |
| 1405 | int last; |
| 1406 | |
| 1407 | if (!urb_priv) |
| 1408 | return; |
| 1409 | |
| 1410 | last = urb_priv->length - 1; |
| 1411 | if (last >= 0) { |
| 1412 | int i; |
| 1413 | for (i = 0; i <= last; i++) |
| 1414 | kfree(urb_priv->td[i]); |
| 1415 | } |
| 1416 | kfree(urb_priv); |
| 1417 | } |
| 1418 | |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1419 | void xhci_free_command(struct xhci_hcd *xhci, |
| 1420 | struct xhci_command *command) |
| 1421 | { |
| 1422 | xhci_free_container_ctx(xhci, |
| 1423 | command->in_ctx); |
| 1424 | kfree(command->completion); |
| 1425 | kfree(command); |
| 1426 | } |
| 1427 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 1428 | void xhci_mem_cleanup(struct xhci_hcd *xhci) |
| 1429 | { |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1430 | struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller); |
| 1431 | int size; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1432 | int i; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1433 | |
| 1434 | /* Free the Event Ring Segment Table and the actual Event Ring */ |
Sarah Sharp | d94c05e | 2009-11-03 22:02:22 -0800 | [diff] [blame] | 1435 | if (xhci->ir_set) { |
| 1436 | xhci_writel(xhci, 0, &xhci->ir_set->erst_size); |
| 1437 | xhci_write_64(xhci, 0, &xhci->ir_set->erst_base); |
| 1438 | xhci_write_64(xhci, 0, &xhci->ir_set->erst_dequeue); |
| 1439 | } |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1440 | size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries); |
| 1441 | if (xhci->erst.entries) |
| 1442 | pci_free_consistent(pdev, size, |
| 1443 | xhci->erst.entries, xhci->erst.erst_dma_addr); |
| 1444 | xhci->erst.entries = NULL; |
| 1445 | xhci_dbg(xhci, "Freed ERST\n"); |
| 1446 | if (xhci->event_ring) |
| 1447 | xhci_ring_free(xhci, xhci->event_ring); |
| 1448 | xhci->event_ring = NULL; |
| 1449 | xhci_dbg(xhci, "Freed event ring\n"); |
| 1450 | |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 1451 | xhci_write_64(xhci, 0, &xhci->op_regs->cmd_ring); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1452 | if (xhci->cmd_ring) |
| 1453 | xhci_ring_free(xhci, xhci->cmd_ring); |
| 1454 | xhci->cmd_ring = NULL; |
| 1455 | xhci_dbg(xhci, "Freed command ring\n"); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1456 | |
| 1457 | for (i = 1; i < MAX_HC_SLOTS; ++i) |
| 1458 | xhci_free_virt_device(xhci, i); |
| 1459 | |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1460 | if (xhci->segment_pool) |
| 1461 | dma_pool_destroy(xhci->segment_pool); |
| 1462 | xhci->segment_pool = NULL; |
| 1463 | xhci_dbg(xhci, "Freed segment pool\n"); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1464 | |
| 1465 | if (xhci->device_pool) |
| 1466 | dma_pool_destroy(xhci->device_pool); |
| 1467 | xhci->device_pool = NULL; |
| 1468 | xhci_dbg(xhci, "Freed device context pool\n"); |
| 1469 | |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 1470 | if (xhci->small_streams_pool) |
| 1471 | dma_pool_destroy(xhci->small_streams_pool); |
| 1472 | xhci->small_streams_pool = NULL; |
| 1473 | xhci_dbg(xhci, "Freed small stream array pool\n"); |
| 1474 | |
| 1475 | if (xhci->medium_streams_pool) |
| 1476 | dma_pool_destroy(xhci->medium_streams_pool); |
| 1477 | xhci->medium_streams_pool = NULL; |
| 1478 | xhci_dbg(xhci, "Freed medium stream array pool\n"); |
| 1479 | |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 1480 | xhci_write_64(xhci, 0, &xhci->op_regs->dcbaa_ptr); |
Sarah Sharp | a74588f | 2009-04-27 19:53:42 -0700 | [diff] [blame] | 1481 | if (xhci->dcbaa) |
| 1482 | pci_free_consistent(pdev, sizeof(*xhci->dcbaa), |
| 1483 | xhci->dcbaa, xhci->dcbaa->dma); |
| 1484 | xhci->dcbaa = NULL; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1485 | |
Sarah Sharp | 5294bea | 2009-11-04 11:22:19 -0800 | [diff] [blame] | 1486 | scratchpad_free(xhci); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 1487 | xhci->page_size = 0; |
| 1488 | xhci->page_shift = 0; |
| 1489 | } |
| 1490 | |
Sarah Sharp | 6648f29 | 2009-11-09 13:35:23 -0800 | [diff] [blame] | 1491 | static int xhci_test_trb_in_td(struct xhci_hcd *xhci, |
| 1492 | struct xhci_segment *input_seg, |
| 1493 | union xhci_trb *start_trb, |
| 1494 | union xhci_trb *end_trb, |
| 1495 | dma_addr_t input_dma, |
| 1496 | struct xhci_segment *result_seg, |
| 1497 | char *test_name, int test_number) |
| 1498 | { |
| 1499 | unsigned long long start_dma; |
| 1500 | unsigned long long end_dma; |
| 1501 | struct xhci_segment *seg; |
| 1502 | |
| 1503 | start_dma = xhci_trb_virt_to_dma(input_seg, start_trb); |
| 1504 | end_dma = xhci_trb_virt_to_dma(input_seg, end_trb); |
| 1505 | |
| 1506 | seg = trb_in_td(input_seg, start_trb, end_trb, input_dma); |
| 1507 | if (seg != result_seg) { |
| 1508 | xhci_warn(xhci, "WARN: %s TRB math test %d failed!\n", |
| 1509 | test_name, test_number); |
| 1510 | xhci_warn(xhci, "Tested TRB math w/ seg %p and " |
| 1511 | "input DMA 0x%llx\n", |
| 1512 | input_seg, |
| 1513 | (unsigned long long) input_dma); |
| 1514 | xhci_warn(xhci, "starting TRB %p (0x%llx DMA), " |
| 1515 | "ending TRB %p (0x%llx DMA)\n", |
| 1516 | start_trb, start_dma, |
| 1517 | end_trb, end_dma); |
| 1518 | xhci_warn(xhci, "Expected seg %p, got seg %p\n", |
| 1519 | result_seg, seg); |
| 1520 | return -1; |
| 1521 | } |
| 1522 | return 0; |
| 1523 | } |
| 1524 | |
| 1525 | /* TRB math checks for xhci_trb_in_td(), using the command and event rings. */ |
| 1526 | static int xhci_check_trb_in_td_math(struct xhci_hcd *xhci, gfp_t mem_flags) |
| 1527 | { |
| 1528 | struct { |
| 1529 | dma_addr_t input_dma; |
| 1530 | struct xhci_segment *result_seg; |
| 1531 | } simple_test_vector [] = { |
| 1532 | /* A zeroed DMA field should fail */ |
| 1533 | { 0, NULL }, |
| 1534 | /* One TRB before the ring start should fail */ |
| 1535 | { xhci->event_ring->first_seg->dma - 16, NULL }, |
| 1536 | /* One byte before the ring start should fail */ |
| 1537 | { xhci->event_ring->first_seg->dma - 1, NULL }, |
| 1538 | /* Starting TRB should succeed */ |
| 1539 | { xhci->event_ring->first_seg->dma, xhci->event_ring->first_seg }, |
| 1540 | /* Ending TRB should succeed */ |
| 1541 | { xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT - 1)*16, |
| 1542 | xhci->event_ring->first_seg }, |
| 1543 | /* One byte after the ring end should fail */ |
| 1544 | { xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT - 1)*16 + 1, NULL }, |
| 1545 | /* One TRB after the ring end should fail */ |
| 1546 | { xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT)*16, NULL }, |
| 1547 | /* An address of all ones should fail */ |
| 1548 | { (dma_addr_t) (~0), NULL }, |
| 1549 | }; |
| 1550 | struct { |
| 1551 | struct xhci_segment *input_seg; |
| 1552 | union xhci_trb *start_trb; |
| 1553 | union xhci_trb *end_trb; |
| 1554 | dma_addr_t input_dma; |
| 1555 | struct xhci_segment *result_seg; |
| 1556 | } complex_test_vector [] = { |
| 1557 | /* Test feeding a valid DMA address from a different ring */ |
| 1558 | { .input_seg = xhci->event_ring->first_seg, |
| 1559 | .start_trb = xhci->event_ring->first_seg->trbs, |
| 1560 | .end_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1], |
| 1561 | .input_dma = xhci->cmd_ring->first_seg->dma, |
| 1562 | .result_seg = NULL, |
| 1563 | }, |
| 1564 | /* Test feeding a valid end TRB from a different ring */ |
| 1565 | { .input_seg = xhci->event_ring->first_seg, |
| 1566 | .start_trb = xhci->event_ring->first_seg->trbs, |
| 1567 | .end_trb = &xhci->cmd_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1], |
| 1568 | .input_dma = xhci->cmd_ring->first_seg->dma, |
| 1569 | .result_seg = NULL, |
| 1570 | }, |
| 1571 | /* Test feeding a valid start and end TRB from a different ring */ |
| 1572 | { .input_seg = xhci->event_ring->first_seg, |
| 1573 | .start_trb = xhci->cmd_ring->first_seg->trbs, |
| 1574 | .end_trb = &xhci->cmd_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1], |
| 1575 | .input_dma = xhci->cmd_ring->first_seg->dma, |
| 1576 | .result_seg = NULL, |
| 1577 | }, |
| 1578 | /* TRB in this ring, but after this TD */ |
| 1579 | { .input_seg = xhci->event_ring->first_seg, |
| 1580 | .start_trb = &xhci->event_ring->first_seg->trbs[0], |
| 1581 | .end_trb = &xhci->event_ring->first_seg->trbs[3], |
| 1582 | .input_dma = xhci->event_ring->first_seg->dma + 4*16, |
| 1583 | .result_seg = NULL, |
| 1584 | }, |
| 1585 | /* TRB in this ring, but before this TD */ |
| 1586 | { .input_seg = xhci->event_ring->first_seg, |
| 1587 | .start_trb = &xhci->event_ring->first_seg->trbs[3], |
| 1588 | .end_trb = &xhci->event_ring->first_seg->trbs[6], |
| 1589 | .input_dma = xhci->event_ring->first_seg->dma + 2*16, |
| 1590 | .result_seg = NULL, |
| 1591 | }, |
| 1592 | /* TRB in this ring, but after this wrapped TD */ |
| 1593 | { .input_seg = xhci->event_ring->first_seg, |
| 1594 | .start_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 3], |
| 1595 | .end_trb = &xhci->event_ring->first_seg->trbs[1], |
| 1596 | .input_dma = xhci->event_ring->first_seg->dma + 2*16, |
| 1597 | .result_seg = NULL, |
| 1598 | }, |
| 1599 | /* TRB in this ring, but before this wrapped TD */ |
| 1600 | { .input_seg = xhci->event_ring->first_seg, |
| 1601 | .start_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 3], |
| 1602 | .end_trb = &xhci->event_ring->first_seg->trbs[1], |
| 1603 | .input_dma = xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT - 4)*16, |
| 1604 | .result_seg = NULL, |
| 1605 | }, |
| 1606 | /* TRB not in this ring, and we have a wrapped TD */ |
| 1607 | { .input_seg = xhci->event_ring->first_seg, |
| 1608 | .start_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 3], |
| 1609 | .end_trb = &xhci->event_ring->first_seg->trbs[1], |
| 1610 | .input_dma = xhci->cmd_ring->first_seg->dma + 2*16, |
| 1611 | .result_seg = NULL, |
| 1612 | }, |
| 1613 | }; |
| 1614 | |
| 1615 | unsigned int num_tests; |
| 1616 | int i, ret; |
| 1617 | |
Kulikov Vasiliy | e10fa47 | 2010-06-28 15:55:46 +0400 | [diff] [blame] | 1618 | num_tests = ARRAY_SIZE(simple_test_vector); |
Sarah Sharp | 6648f29 | 2009-11-09 13:35:23 -0800 | [diff] [blame] | 1619 | for (i = 0; i < num_tests; i++) { |
| 1620 | ret = xhci_test_trb_in_td(xhci, |
| 1621 | xhci->event_ring->first_seg, |
| 1622 | xhci->event_ring->first_seg->trbs, |
| 1623 | &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1], |
| 1624 | simple_test_vector[i].input_dma, |
| 1625 | simple_test_vector[i].result_seg, |
| 1626 | "Simple", i); |
| 1627 | if (ret < 0) |
| 1628 | return ret; |
| 1629 | } |
| 1630 | |
Kulikov Vasiliy | e10fa47 | 2010-06-28 15:55:46 +0400 | [diff] [blame] | 1631 | num_tests = ARRAY_SIZE(complex_test_vector); |
Sarah Sharp | 6648f29 | 2009-11-09 13:35:23 -0800 | [diff] [blame] | 1632 | for (i = 0; i < num_tests; i++) { |
| 1633 | ret = xhci_test_trb_in_td(xhci, |
| 1634 | complex_test_vector[i].input_seg, |
| 1635 | complex_test_vector[i].start_trb, |
| 1636 | complex_test_vector[i].end_trb, |
| 1637 | complex_test_vector[i].input_dma, |
| 1638 | complex_test_vector[i].result_seg, |
| 1639 | "Complex", i); |
| 1640 | if (ret < 0) |
| 1641 | return ret; |
| 1642 | } |
| 1643 | xhci_dbg(xhci, "TRB math tests passed.\n"); |
| 1644 | return 0; |
| 1645 | } |
| 1646 | |
| 1647 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 1648 | int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) |
| 1649 | { |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1650 | dma_addr_t dma; |
| 1651 | struct device *dev = xhci_to_hcd(xhci)->self.controller; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 1652 | unsigned int val, val2; |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 1653 | u64 val_64; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1654 | struct xhci_segment *seg; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 1655 | u32 page_size; |
| 1656 | int i; |
| 1657 | |
| 1658 | page_size = xhci_readl(xhci, &xhci->op_regs->page_size); |
| 1659 | xhci_dbg(xhci, "Supported page size register = 0x%x\n", page_size); |
| 1660 | for (i = 0; i < 16; i++) { |
| 1661 | if ((0x1 & page_size) != 0) |
| 1662 | break; |
| 1663 | page_size = page_size >> 1; |
| 1664 | } |
| 1665 | if (i < 16) |
| 1666 | xhci_dbg(xhci, "Supported page size of %iK\n", (1 << (i+12)) / 1024); |
| 1667 | else |
| 1668 | xhci_warn(xhci, "WARN: no supported page size\n"); |
| 1669 | /* Use 4K pages, since that's common and the minimum the HC supports */ |
| 1670 | xhci->page_shift = 12; |
| 1671 | xhci->page_size = 1 << xhci->page_shift; |
| 1672 | xhci_dbg(xhci, "HCD page size set to %iK\n", xhci->page_size / 1024); |
| 1673 | |
| 1674 | /* |
| 1675 | * Program the Number of Device Slots Enabled field in the CONFIG |
| 1676 | * register with the max value of slots the HC can handle. |
| 1677 | */ |
| 1678 | val = HCS_MAX_SLOTS(xhci_readl(xhci, &xhci->cap_regs->hcs_params1)); |
| 1679 | xhci_dbg(xhci, "// xHC can handle at most %d device slots.\n", |
| 1680 | (unsigned int) val); |
| 1681 | val2 = xhci_readl(xhci, &xhci->op_regs->config_reg); |
| 1682 | val |= (val2 & ~HCS_SLOTS_MASK); |
| 1683 | xhci_dbg(xhci, "// Setting Max device slots reg = 0x%x.\n", |
| 1684 | (unsigned int) val); |
| 1685 | xhci_writel(xhci, val, &xhci->op_regs->config_reg); |
| 1686 | |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1687 | /* |
Sarah Sharp | a74588f | 2009-04-27 19:53:42 -0700 | [diff] [blame] | 1688 | * Section 5.4.8 - doorbell array must be |
| 1689 | * "physically contiguous and 64-byte (cache line) aligned". |
| 1690 | */ |
| 1691 | xhci->dcbaa = pci_alloc_consistent(to_pci_dev(dev), |
| 1692 | sizeof(*xhci->dcbaa), &dma); |
| 1693 | if (!xhci->dcbaa) |
| 1694 | goto fail; |
| 1695 | memset(xhci->dcbaa, 0, sizeof *(xhci->dcbaa)); |
| 1696 | xhci->dcbaa->dma = dma; |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 1697 | xhci_dbg(xhci, "// Device context base array address = 0x%llx (DMA), %p (virt)\n", |
| 1698 | (unsigned long long)xhci->dcbaa->dma, xhci->dcbaa); |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 1699 | xhci_write_64(xhci, dma, &xhci->op_regs->dcbaa_ptr); |
Sarah Sharp | a74588f | 2009-04-27 19:53:42 -0700 | [diff] [blame] | 1700 | |
| 1701 | /* |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1702 | * Initialize the ring segment pool. The ring must be a contiguous |
| 1703 | * structure comprised of TRBs. The TRBs must be 16 byte aligned, |
| 1704 | * however, the command ring segment needs 64-byte aligned segments, |
| 1705 | * so we pick the greater alignment need. |
| 1706 | */ |
| 1707 | xhci->segment_pool = dma_pool_create("xHCI ring segments", dev, |
| 1708 | SEGMENT_SIZE, 64, xhci->page_size); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1709 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1710 | /* See Table 46 and Note on Figure 55 */ |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1711 | xhci->device_pool = dma_pool_create("xHCI input/output contexts", dev, |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1712 | 2112, 64, xhci->page_size); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1713 | if (!xhci->segment_pool || !xhci->device_pool) |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1714 | goto fail; |
| 1715 | |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 1716 | /* Linear stream context arrays don't have any boundary restrictions, |
| 1717 | * and only need to be 16-byte aligned. |
| 1718 | */ |
| 1719 | xhci->small_streams_pool = |
| 1720 | dma_pool_create("xHCI 256 byte stream ctx arrays", |
| 1721 | dev, SMALL_STREAM_ARRAY_SIZE, 16, 0); |
| 1722 | xhci->medium_streams_pool = |
| 1723 | dma_pool_create("xHCI 1KB stream ctx arrays", |
| 1724 | dev, MEDIUM_STREAM_ARRAY_SIZE, 16, 0); |
| 1725 | /* Any stream context array bigger than MEDIUM_STREAM_ARRAY_SIZE |
| 1726 | * will be allocated with pci_alloc_consistent() |
| 1727 | */ |
| 1728 | |
| 1729 | if (!xhci->small_streams_pool || !xhci->medium_streams_pool) |
| 1730 | goto fail; |
| 1731 | |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1732 | /* Set up the command ring to have one segments for now. */ |
| 1733 | xhci->cmd_ring = xhci_ring_alloc(xhci, 1, true, flags); |
| 1734 | if (!xhci->cmd_ring) |
| 1735 | goto fail; |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 1736 | xhci_dbg(xhci, "Allocated command ring at %p\n", xhci->cmd_ring); |
| 1737 | xhci_dbg(xhci, "First segment DMA is 0x%llx\n", |
| 1738 | (unsigned long long)xhci->cmd_ring->first_seg->dma); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1739 | |
| 1740 | /* Set the address in the Command Ring Control register */ |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 1741 | val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring); |
| 1742 | val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) | |
| 1743 | (xhci->cmd_ring->first_seg->dma & (u64) ~CMD_RING_RSVD_BITS) | |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1744 | xhci->cmd_ring->cycle_state; |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 1745 | xhci_dbg(xhci, "// Setting command ring address to 0x%x\n", val); |
| 1746 | xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1747 | xhci_dbg_cmd_ptrs(xhci); |
| 1748 | |
| 1749 | val = xhci_readl(xhci, &xhci->cap_regs->db_off); |
| 1750 | val &= DBOFF_MASK; |
| 1751 | xhci_dbg(xhci, "// Doorbell array is located at offset 0x%x" |
| 1752 | " from cap regs base addr\n", val); |
| 1753 | xhci->dba = (void *) xhci->cap_regs + val; |
| 1754 | xhci_dbg_regs(xhci); |
| 1755 | xhci_print_run_regs(xhci); |
| 1756 | /* Set ir_set to interrupt register set 0 */ |
| 1757 | xhci->ir_set = (void *) xhci->run_regs->ir_set; |
| 1758 | |
| 1759 | /* |
| 1760 | * Event ring setup: Allocate a normal ring, but also setup |
| 1761 | * the event ring segment table (ERST). Section 4.9.3. |
| 1762 | */ |
| 1763 | xhci_dbg(xhci, "// Allocating event ring\n"); |
| 1764 | xhci->event_ring = xhci_ring_alloc(xhci, ERST_NUM_SEGS, false, flags); |
| 1765 | if (!xhci->event_ring) |
| 1766 | goto fail; |
Sarah Sharp | 6648f29 | 2009-11-09 13:35:23 -0800 | [diff] [blame] | 1767 | if (xhci_check_trb_in_td_math(xhci, flags) < 0) |
| 1768 | goto fail; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1769 | |
| 1770 | xhci->erst.entries = pci_alloc_consistent(to_pci_dev(dev), |
| 1771 | sizeof(struct xhci_erst_entry)*ERST_NUM_SEGS, &dma); |
| 1772 | if (!xhci->erst.entries) |
| 1773 | goto fail; |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 1774 | xhci_dbg(xhci, "// Allocated event ring segment table at 0x%llx\n", |
| 1775 | (unsigned long long)dma); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1776 | |
| 1777 | memset(xhci->erst.entries, 0, sizeof(struct xhci_erst_entry)*ERST_NUM_SEGS); |
| 1778 | xhci->erst.num_entries = ERST_NUM_SEGS; |
| 1779 | xhci->erst.erst_dma_addr = dma; |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 1780 | xhci_dbg(xhci, "Set ERST to 0; private num segs = %i, virt addr = %p, dma addr = 0x%llx\n", |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1781 | xhci->erst.num_entries, |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 1782 | xhci->erst.entries, |
| 1783 | (unsigned long long)xhci->erst.erst_dma_addr); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1784 | |
| 1785 | /* set ring base address and size for each segment table entry */ |
| 1786 | for (val = 0, seg = xhci->event_ring->first_seg; val < ERST_NUM_SEGS; val++) { |
| 1787 | struct xhci_erst_entry *entry = &xhci->erst.entries[val]; |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 1788 | entry->seg_addr = seg->dma; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1789 | entry->seg_size = TRBS_PER_SEGMENT; |
| 1790 | entry->rsvd = 0; |
| 1791 | seg = seg->next; |
| 1792 | } |
| 1793 | |
| 1794 | /* set ERST count with the number of entries in the segment table */ |
| 1795 | val = xhci_readl(xhci, &xhci->ir_set->erst_size); |
| 1796 | val &= ERST_SIZE_MASK; |
| 1797 | val |= ERST_NUM_SEGS; |
| 1798 | xhci_dbg(xhci, "// Write ERST size = %i to ir_set 0 (some bits preserved)\n", |
| 1799 | val); |
| 1800 | xhci_writel(xhci, val, &xhci->ir_set->erst_size); |
| 1801 | |
| 1802 | xhci_dbg(xhci, "// Set ERST entries to point to event ring.\n"); |
| 1803 | /* set the segment table base address */ |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 1804 | xhci_dbg(xhci, "// Set ERST base address for ir_set 0 = 0x%llx\n", |
| 1805 | (unsigned long long)xhci->erst.erst_dma_addr); |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 1806 | val_64 = xhci_read_64(xhci, &xhci->ir_set->erst_base); |
| 1807 | val_64 &= ERST_PTR_MASK; |
| 1808 | val_64 |= (xhci->erst.erst_dma_addr & (u64) ~ERST_PTR_MASK); |
| 1809 | xhci_write_64(xhci, val_64, &xhci->ir_set->erst_base); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1810 | |
| 1811 | /* Set the event ring dequeue address */ |
Sarah Sharp | 23e3be1 | 2009-04-29 19:05:20 -0700 | [diff] [blame] | 1812 | xhci_set_hc_event_deq(xhci); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1813 | xhci_dbg(xhci, "Wrote ERST address to ir_set 0.\n"); |
| 1814 | xhci_print_ir_set(xhci, xhci->ir_set, 0); |
| 1815 | |
| 1816 | /* |
| 1817 | * XXX: Might need to set the Interrupter Moderation Register to |
| 1818 | * something other than the default (~1ms minimum between interrupts). |
| 1819 | * See section 5.5.1.2. |
| 1820 | */ |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1821 | init_completion(&xhci->addr_dev); |
| 1822 | for (i = 0; i < MAX_HC_SLOTS; ++i) |
Randy Dunlap | 326b481 | 2010-04-19 08:53:50 -0700 | [diff] [blame] | 1823 | xhci->devs[i] = NULL; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 1824 | |
John Youn | 254c80a | 2009-07-27 12:05:03 -0700 | [diff] [blame] | 1825 | if (scratchpad_alloc(xhci, flags)) |
| 1826 | goto fail; |
| 1827 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 1828 | return 0; |
John Youn | 254c80a | 2009-07-27 12:05:03 -0700 | [diff] [blame] | 1829 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 1830 | fail: |
| 1831 | xhci_warn(xhci, "Couldn't initialize memory\n"); |
| 1832 | xhci_mem_cleanup(xhci); |
| 1833 | return -ENOMEM; |
| 1834 | } |