Songjun Wu | e0a25b6 | 2015-10-08 18:13:31 +0800 | [diff] [blame] | 1 | /* Atmel ALSA SoC Audio Class D Amplifier (CLASSD) driver |
| 2 | * |
| 3 | * Copyright (C) 2015 Atmel |
| 4 | * |
| 5 | * Author: Songjun Wu <songjun.wu@atmel.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 or later |
| 9 | * as published by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/of.h> |
| 13 | #include <linux/clk.h> |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/platform_device.h> |
| 16 | #include <linux/regmap.h> |
| 17 | #include <sound/core.h> |
| 18 | #include <sound/dmaengine_pcm.h> |
| 19 | #include <sound/pcm_params.h> |
| 20 | #include <sound/tlv.h> |
| 21 | #include "atmel-classd.h" |
| 22 | |
| 23 | struct atmel_classd_pdata { |
| 24 | bool non_overlap_enable; |
| 25 | int non_overlap_time; |
| 26 | int pwm_type; |
| 27 | const char *card_name; |
| 28 | }; |
| 29 | |
| 30 | struct atmel_classd { |
| 31 | dma_addr_t phy_base; |
| 32 | struct regmap *regmap; |
| 33 | struct clk *pclk; |
| 34 | struct clk *gclk; |
| 35 | struct clk *aclk; |
| 36 | int irq; |
| 37 | const struct atmel_classd_pdata *pdata; |
| 38 | }; |
| 39 | |
| 40 | #ifdef CONFIG_OF |
| 41 | static const struct of_device_id atmel_classd_of_match[] = { |
| 42 | { |
| 43 | .compatible = "atmel,sama5d2-classd", |
| 44 | }, { |
| 45 | /* sentinel */ |
| 46 | } |
| 47 | }; |
| 48 | MODULE_DEVICE_TABLE(of, atmel_classd_of_match); |
| 49 | |
| 50 | static struct atmel_classd_pdata *atmel_classd_dt_init(struct device *dev) |
| 51 | { |
| 52 | struct device_node *np = dev->of_node; |
| 53 | struct atmel_classd_pdata *pdata; |
| 54 | const char *pwm_type; |
| 55 | int ret; |
| 56 | |
| 57 | if (!np) { |
| 58 | dev_err(dev, "device node not found\n"); |
| 59 | return ERR_PTR(-EINVAL); |
| 60 | } |
| 61 | |
| 62 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); |
| 63 | if (!pdata) |
| 64 | return ERR_PTR(-ENOMEM); |
| 65 | |
| 66 | ret = of_property_read_string(np, "atmel,pwm-type", &pwm_type); |
| 67 | if ((ret == 0) && (strcmp(pwm_type, "diff") == 0)) |
| 68 | pdata->pwm_type = CLASSD_MR_PWMTYP_DIFF; |
| 69 | else |
| 70 | pdata->pwm_type = CLASSD_MR_PWMTYP_SINGLE; |
| 71 | |
| 72 | ret = of_property_read_u32(np, |
| 73 | "atmel,non-overlap-time", &pdata->non_overlap_time); |
| 74 | if (ret) |
| 75 | pdata->non_overlap_enable = false; |
| 76 | else |
| 77 | pdata->non_overlap_enable = true; |
| 78 | |
| 79 | ret = of_property_read_string(np, "atmel,model", &pdata->card_name); |
| 80 | if (ret) |
| 81 | pdata->card_name = "CLASSD"; |
| 82 | |
| 83 | return pdata; |
| 84 | } |
| 85 | #else |
| 86 | static inline struct atmel_classd_pdata * |
| 87 | atmel_classd_dt_init(struct device *dev) |
| 88 | { |
| 89 | return ERR_PTR(-EINVAL); |
| 90 | } |
| 91 | #endif |
| 92 | |
| 93 | #define ATMEL_CLASSD_RATES (SNDRV_PCM_RATE_8000 \ |
| 94 | | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 \ |
| 95 | | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 \ |
| 96 | | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 \ |
| 97 | | SNDRV_PCM_RATE_96000) |
| 98 | |
| 99 | static const struct snd_pcm_hardware atmel_classd_hw = { |
| 100 | .info = SNDRV_PCM_INFO_MMAP |
| 101 | | SNDRV_PCM_INFO_MMAP_VALID |
| 102 | | SNDRV_PCM_INFO_INTERLEAVED |
| 103 | | SNDRV_PCM_INFO_RESUME |
| 104 | | SNDRV_PCM_INFO_PAUSE, |
| 105 | .formats = (SNDRV_PCM_FMTBIT_S16_LE), |
| 106 | .rates = ATMEL_CLASSD_RATES, |
| 107 | .rate_min = 8000, |
| 108 | .rate_max = 96000, |
Songjun Wu | 07c55d3 | 2015-11-19 11:45:32 +0800 | [diff] [blame] | 109 | .channels_min = 1, |
Songjun Wu | e0a25b6 | 2015-10-08 18:13:31 +0800 | [diff] [blame] | 110 | .channels_max = 2, |
| 111 | .buffer_bytes_max = 64 * 1024, |
| 112 | .period_bytes_min = 256, |
| 113 | .period_bytes_max = 32 * 1024, |
| 114 | .periods_min = 2, |
| 115 | .periods_max = 256, |
| 116 | }; |
| 117 | |
| 118 | #define ATMEL_CLASSD_PREALLOC_BUF_SIZE (64 * 1024) |
| 119 | |
| 120 | /* cpu dai component */ |
| 121 | static int atmel_classd_cpu_dai_startup(struct snd_pcm_substream *substream, |
| 122 | struct snd_soc_dai *cpu_dai) |
| 123 | { |
| 124 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 125 | struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); |
| 126 | |
| 127 | regmap_write(dd->regmap, CLASSD_THR, 0x0); |
| 128 | |
| 129 | return clk_prepare_enable(dd->pclk); |
| 130 | } |
| 131 | |
| 132 | static void atmel_classd_cpu_dai_shutdown(struct snd_pcm_substream *substream, |
| 133 | struct snd_soc_dai *cpu_dai) |
| 134 | { |
| 135 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 136 | struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); |
| 137 | |
| 138 | clk_disable_unprepare(dd->pclk); |
| 139 | } |
| 140 | |
| 141 | static const struct snd_soc_dai_ops atmel_classd_cpu_dai_ops = { |
| 142 | .startup = atmel_classd_cpu_dai_startup, |
| 143 | .shutdown = atmel_classd_cpu_dai_shutdown, |
| 144 | }; |
| 145 | |
| 146 | static struct snd_soc_dai_driver atmel_classd_cpu_dai = { |
| 147 | .playback = { |
Songjun Wu | 07c55d3 | 2015-11-19 11:45:32 +0800 | [diff] [blame] | 148 | .channels_min = 1, |
Songjun Wu | e0a25b6 | 2015-10-08 18:13:31 +0800 | [diff] [blame] | 149 | .channels_max = 2, |
| 150 | .rates = ATMEL_CLASSD_RATES, |
| 151 | .formats = SNDRV_PCM_FMTBIT_S16_LE,}, |
| 152 | .ops = &atmel_classd_cpu_dai_ops, |
| 153 | }; |
| 154 | |
| 155 | static const struct snd_soc_component_driver atmel_classd_cpu_dai_component = { |
| 156 | .name = "atmel-classd", |
| 157 | }; |
| 158 | |
| 159 | /* platform */ |
| 160 | static int |
| 161 | atmel_classd_platform_configure_dma(struct snd_pcm_substream *substream, |
| 162 | struct snd_pcm_hw_params *params, |
| 163 | struct dma_slave_config *slave_config) |
| 164 | { |
| 165 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 166 | struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); |
| 167 | |
| 168 | if (params_physical_width(params) != 16) { |
| 169 | dev_err(rtd->platform->dev, |
| 170 | "only supports 16-bit audio data\n"); |
| 171 | return -EINVAL; |
| 172 | } |
| 173 | |
Songjun Wu | 07c55d3 | 2015-11-19 11:45:32 +0800 | [diff] [blame] | 174 | if (params_channels(params) == 1) |
| 175 | slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; |
| 176 | else |
| 177 | slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; |
| 178 | |
Songjun Wu | e0a25b6 | 2015-10-08 18:13:31 +0800 | [diff] [blame] | 179 | slave_config->direction = DMA_MEM_TO_DEV; |
| 180 | slave_config->dst_addr = dd->phy_base + CLASSD_THR; |
Songjun Wu | e0a25b6 | 2015-10-08 18:13:31 +0800 | [diff] [blame] | 181 | slave_config->dst_maxburst = 1; |
| 182 | slave_config->src_maxburst = 1; |
| 183 | slave_config->device_fc = false; |
| 184 | |
| 185 | return 0; |
| 186 | } |
| 187 | |
| 188 | static const struct snd_dmaengine_pcm_config |
| 189 | atmel_classd_dmaengine_pcm_config = { |
| 190 | .prepare_slave_config = atmel_classd_platform_configure_dma, |
| 191 | .pcm_hardware = &atmel_classd_hw, |
| 192 | .prealloc_buffer_size = ATMEL_CLASSD_PREALLOC_BUF_SIZE, |
| 193 | }; |
| 194 | |
| 195 | /* codec */ |
| 196 | static const char * const mono_mode_text[] = { |
| 197 | "mix", "sat", "left", "right" |
| 198 | }; |
| 199 | |
| 200 | static SOC_ENUM_SINGLE_DECL(classd_mono_mode_enum, |
| 201 | CLASSD_INTPMR, CLASSD_INTPMR_MONO_MODE_SHIFT, |
| 202 | mono_mode_text); |
| 203 | |
| 204 | static const char * const eqcfg_text[] = { |
| 205 | "Treble-12dB", "Treble-6dB", |
| 206 | "Medium-8dB", "Medium-3dB", |
| 207 | "Bass-12dB", "Bass-6dB", |
| 208 | "0 dB", |
| 209 | "Bass+6dB", "Bass+12dB", |
| 210 | "Medium+3dB", "Medium+8dB", |
| 211 | "Treble+6dB", "Treble+12dB", |
| 212 | }; |
| 213 | |
| 214 | static const unsigned int eqcfg_value[] = { |
| 215 | CLASSD_INTPMR_EQCFG_T_CUT_12, CLASSD_INTPMR_EQCFG_T_CUT_6, |
| 216 | CLASSD_INTPMR_EQCFG_M_CUT_8, CLASSD_INTPMR_EQCFG_M_CUT_3, |
| 217 | CLASSD_INTPMR_EQCFG_B_CUT_12, CLASSD_INTPMR_EQCFG_B_CUT_6, |
| 218 | CLASSD_INTPMR_EQCFG_FLAT, |
| 219 | CLASSD_INTPMR_EQCFG_B_BOOST_6, CLASSD_INTPMR_EQCFG_B_BOOST_12, |
| 220 | CLASSD_INTPMR_EQCFG_M_BOOST_3, CLASSD_INTPMR_EQCFG_M_BOOST_8, |
| 221 | CLASSD_INTPMR_EQCFG_T_BOOST_6, CLASSD_INTPMR_EQCFG_T_BOOST_12, |
| 222 | }; |
| 223 | |
| 224 | static SOC_VALUE_ENUM_SINGLE_DECL(classd_eqcfg_enum, |
| 225 | CLASSD_INTPMR, CLASSD_INTPMR_EQCFG_SHIFT, 0xf, |
| 226 | eqcfg_text, eqcfg_value); |
| 227 | |
| 228 | static const DECLARE_TLV_DB_SCALE(classd_digital_tlv, -7800, 100, 1); |
| 229 | |
| 230 | static const struct snd_kcontrol_new atmel_classd_snd_controls[] = { |
| 231 | SOC_DOUBLE_TLV("Playback Volume", CLASSD_INTPMR, |
| 232 | CLASSD_INTPMR_ATTL_SHIFT, CLASSD_INTPMR_ATTR_SHIFT, |
| 233 | 78, 1, classd_digital_tlv), |
| 234 | |
| 235 | SOC_SINGLE("Deemphasis Switch", CLASSD_INTPMR, |
| 236 | CLASSD_INTPMR_DEEMP_SHIFT, 1, 0), |
| 237 | |
| 238 | SOC_SINGLE("Mono Switch", CLASSD_INTPMR, CLASSD_INTPMR_MONO_SHIFT, 1, 0), |
| 239 | |
| 240 | SOC_SINGLE("Swap Switch", CLASSD_INTPMR, CLASSD_INTPMR_SWAP_SHIFT, 1, 0), |
| 241 | |
| 242 | SOC_ENUM("Mono Mode", classd_mono_mode_enum), |
| 243 | |
| 244 | SOC_ENUM("EQ", classd_eqcfg_enum), |
| 245 | }; |
| 246 | |
| 247 | static const char * const pwm_type[] = { |
| 248 | "Single ended", "Differential" |
| 249 | }; |
| 250 | |
| 251 | static int atmel_classd_codec_probe(struct snd_soc_codec *codec) |
| 252 | { |
| 253 | struct snd_soc_card *card = snd_soc_codec_get_drvdata(codec); |
| 254 | struct atmel_classd *dd = snd_soc_card_get_drvdata(card); |
| 255 | const struct atmel_classd_pdata *pdata = dd->pdata; |
| 256 | u32 mask, val; |
| 257 | |
| 258 | mask = CLASSD_MR_PWMTYP_MASK; |
| 259 | val = pdata->pwm_type << CLASSD_MR_PWMTYP_SHIFT; |
| 260 | |
| 261 | mask |= CLASSD_MR_NON_OVERLAP_MASK; |
| 262 | if (pdata->non_overlap_enable) { |
| 263 | val |= (CLASSD_MR_NON_OVERLAP_EN |
| 264 | << CLASSD_MR_NON_OVERLAP_SHIFT); |
| 265 | |
| 266 | mask |= CLASSD_MR_NOVR_VAL_MASK; |
| 267 | switch (pdata->non_overlap_time) { |
| 268 | case 5: |
| 269 | val |= (CLASSD_MR_NOVR_VAL_5NS |
| 270 | << CLASSD_MR_NOVR_VAL_SHIFT); |
| 271 | break; |
| 272 | case 10: |
| 273 | val |= (CLASSD_MR_NOVR_VAL_10NS |
| 274 | << CLASSD_MR_NOVR_VAL_SHIFT); |
| 275 | break; |
| 276 | case 15: |
| 277 | val |= (CLASSD_MR_NOVR_VAL_15NS |
| 278 | << CLASSD_MR_NOVR_VAL_SHIFT); |
| 279 | break; |
| 280 | case 20: |
| 281 | val |= (CLASSD_MR_NOVR_VAL_20NS |
| 282 | << CLASSD_MR_NOVR_VAL_SHIFT); |
| 283 | break; |
| 284 | default: |
| 285 | val |= (CLASSD_MR_NOVR_VAL_10NS |
| 286 | << CLASSD_MR_NOVR_VAL_SHIFT); |
| 287 | dev_warn(codec->dev, |
| 288 | "non-overlapping value %d is invalid, the default value 10 is specified\n", |
| 289 | pdata->non_overlap_time); |
| 290 | break; |
| 291 | } |
| 292 | } |
| 293 | |
| 294 | snd_soc_update_bits(codec, CLASSD_MR, mask, val); |
| 295 | |
| 296 | dev_info(codec->dev, |
| 297 | "PWM modulation type is %s, non-overlapping is %s\n", |
| 298 | pwm_type[pdata->pwm_type], |
| 299 | pdata->non_overlap_enable?"enabled":"disabled"); |
| 300 | |
| 301 | return 0; |
| 302 | } |
| 303 | |
| 304 | static struct regmap *atmel_classd_codec_get_remap(struct device *dev) |
| 305 | { |
| 306 | return dev_get_regmap(dev, NULL); |
| 307 | } |
| 308 | |
| 309 | static struct snd_soc_codec_driver soc_codec_dev_classd = { |
| 310 | .probe = atmel_classd_codec_probe, |
Songjun Wu | e0a25b6 | 2015-10-08 18:13:31 +0800 | [diff] [blame] | 311 | .get_regmap = atmel_classd_codec_get_remap, |
Kuninori Morimoto | 69295df | 2016-08-08 09:10:21 +0000 | [diff] [blame] | 312 | .component_driver = { |
| 313 | .controls = atmel_classd_snd_controls, |
| 314 | .num_controls = ARRAY_SIZE(atmel_classd_snd_controls), |
| 315 | }, |
Songjun Wu | e0a25b6 | 2015-10-08 18:13:31 +0800 | [diff] [blame] | 316 | }; |
| 317 | |
| 318 | /* codec dai component */ |
| 319 | static int atmel_classd_codec_dai_startup(struct snd_pcm_substream *substream, |
| 320 | struct snd_soc_dai *codec_dai) |
| 321 | { |
| 322 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 323 | struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); |
| 324 | int ret; |
| 325 | |
| 326 | ret = clk_prepare_enable(dd->aclk); |
| 327 | if (ret) |
| 328 | return ret; |
| 329 | |
| 330 | return clk_prepare_enable(dd->gclk); |
| 331 | } |
| 332 | |
| 333 | static int atmel_classd_codec_dai_digital_mute(struct snd_soc_dai *codec_dai, |
| 334 | int mute) |
| 335 | { |
| 336 | struct snd_soc_codec *codec = codec_dai->codec; |
| 337 | u32 mask, val; |
| 338 | |
| 339 | mask = CLASSD_MR_LMUTE_MASK | CLASSD_MR_RMUTE_MASK; |
| 340 | |
| 341 | if (mute) |
| 342 | val = mask; |
| 343 | else |
| 344 | val = 0; |
| 345 | |
| 346 | snd_soc_update_bits(codec, CLASSD_MR, mask, val); |
| 347 | |
| 348 | return 0; |
| 349 | } |
| 350 | |
| 351 | #define CLASSD_ACLK_RATE_11M2896_MPY_8 (112896 * 100 * 8) |
Songjun Wu | cd3ac9a | 2017-02-24 15:10:43 +0800 | [diff] [blame] | 352 | #define CLASSD_ACLK_RATE_12M288_MPY_8 (12288 * 1000 * 8) |
Songjun Wu | e0a25b6 | 2015-10-08 18:13:31 +0800 | [diff] [blame] | 353 | |
| 354 | static struct { |
| 355 | int rate; |
| 356 | int sample_rate; |
| 357 | int dsp_clk; |
| 358 | unsigned long aclk_rate; |
| 359 | } const sample_rates[] = { |
| 360 | { 8000, CLASSD_INTPMR_FRAME_8K, |
| 361 | CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 }, |
| 362 | { 16000, CLASSD_INTPMR_FRAME_16K, |
| 363 | CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 }, |
| 364 | { 32000, CLASSD_INTPMR_FRAME_32K, |
| 365 | CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 }, |
| 366 | { 48000, CLASSD_INTPMR_FRAME_48K, |
| 367 | CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 }, |
| 368 | { 96000, CLASSD_INTPMR_FRAME_96K, |
| 369 | CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 }, |
| 370 | { 22050, CLASSD_INTPMR_FRAME_22K, |
| 371 | CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_ACLK_RATE_11M2896_MPY_8 }, |
| 372 | { 44100, CLASSD_INTPMR_FRAME_44K, |
| 373 | CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_ACLK_RATE_11M2896_MPY_8 }, |
| 374 | { 88200, CLASSD_INTPMR_FRAME_88K, |
| 375 | CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_ACLK_RATE_11M2896_MPY_8 }, |
| 376 | }; |
| 377 | |
| 378 | static int |
| 379 | atmel_classd_codec_dai_hw_params(struct snd_pcm_substream *substream, |
| 380 | struct snd_pcm_hw_params *params, |
| 381 | struct snd_soc_dai *codec_dai) |
| 382 | { |
| 383 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 384 | struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); |
| 385 | struct snd_soc_codec *codec = codec_dai->codec; |
| 386 | int fs; |
| 387 | int i, best, best_val, cur_val, ret; |
| 388 | u32 mask, val; |
| 389 | |
| 390 | fs = params_rate(params); |
| 391 | |
| 392 | best = 0; |
| 393 | best_val = abs(fs - sample_rates[0].rate); |
| 394 | for (i = 1; i < ARRAY_SIZE(sample_rates); i++) { |
| 395 | /* Closest match */ |
| 396 | cur_val = abs(fs - sample_rates[i].rate); |
| 397 | if (cur_val < best_val) { |
| 398 | best = i; |
| 399 | best_val = cur_val; |
| 400 | } |
| 401 | } |
| 402 | |
| 403 | dev_dbg(codec->dev, |
| 404 | "Selected SAMPLE_RATE of %dHz, ACLK_RATE of %ldHz\n", |
| 405 | sample_rates[best].rate, sample_rates[best].aclk_rate); |
| 406 | |
| 407 | clk_disable_unprepare(dd->gclk); |
| 408 | clk_disable_unprepare(dd->aclk); |
| 409 | |
| 410 | ret = clk_set_rate(dd->aclk, sample_rates[best].aclk_rate); |
| 411 | if (ret) |
| 412 | return ret; |
| 413 | |
| 414 | mask = CLASSD_INTPMR_DSP_CLK_FREQ_MASK | CLASSD_INTPMR_FRAME_MASK; |
| 415 | val = (sample_rates[best].dsp_clk << CLASSD_INTPMR_DSP_CLK_FREQ_SHIFT) |
| 416 | | (sample_rates[best].sample_rate << CLASSD_INTPMR_FRAME_SHIFT); |
| 417 | |
| 418 | snd_soc_update_bits(codec, CLASSD_INTPMR, mask, val); |
| 419 | |
| 420 | ret = clk_prepare_enable(dd->aclk); |
| 421 | if (ret) |
| 422 | return ret; |
| 423 | |
| 424 | return clk_prepare_enable(dd->gclk); |
| 425 | } |
| 426 | |
| 427 | static void |
| 428 | atmel_classd_codec_dai_shutdown(struct snd_pcm_substream *substream, |
| 429 | struct snd_soc_dai *codec_dai) |
| 430 | { |
| 431 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 432 | struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); |
| 433 | |
| 434 | clk_disable_unprepare(dd->gclk); |
| 435 | clk_disable_unprepare(dd->aclk); |
| 436 | } |
| 437 | |
| 438 | static int atmel_classd_codec_dai_prepare(struct snd_pcm_substream *substream, |
| 439 | struct snd_soc_dai *codec_dai) |
| 440 | { |
| 441 | struct snd_soc_codec *codec = codec_dai->codec; |
| 442 | |
| 443 | snd_soc_update_bits(codec, CLASSD_MR, |
| 444 | CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK, |
| 445 | (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT) |
| 446 | |(CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT)); |
| 447 | |
| 448 | return 0; |
| 449 | } |
| 450 | |
| 451 | static int atmel_classd_codec_dai_trigger(struct snd_pcm_substream *substream, |
| 452 | int cmd, struct snd_soc_dai *codec_dai) |
| 453 | { |
| 454 | struct snd_soc_codec *codec = codec_dai->codec; |
| 455 | u32 mask, val; |
| 456 | |
| 457 | mask = CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK; |
| 458 | |
| 459 | switch (cmd) { |
| 460 | case SNDRV_PCM_TRIGGER_START: |
| 461 | case SNDRV_PCM_TRIGGER_RESUME: |
| 462 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
| 463 | val = mask; |
| 464 | break; |
| 465 | case SNDRV_PCM_TRIGGER_STOP: |
| 466 | case SNDRV_PCM_TRIGGER_SUSPEND: |
| 467 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
| 468 | val = (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT) |
| 469 | | (CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT); |
| 470 | break; |
| 471 | default: |
| 472 | return -EINVAL; |
| 473 | } |
| 474 | |
| 475 | snd_soc_update_bits(codec, CLASSD_MR, mask, val); |
| 476 | |
| 477 | return 0; |
| 478 | } |
| 479 | |
| 480 | static const struct snd_soc_dai_ops atmel_classd_codec_dai_ops = { |
| 481 | .digital_mute = atmel_classd_codec_dai_digital_mute, |
| 482 | .startup = atmel_classd_codec_dai_startup, |
| 483 | .shutdown = atmel_classd_codec_dai_shutdown, |
| 484 | .hw_params = atmel_classd_codec_dai_hw_params, |
| 485 | .prepare = atmel_classd_codec_dai_prepare, |
| 486 | .trigger = atmel_classd_codec_dai_trigger, |
| 487 | }; |
| 488 | |
| 489 | #define ATMEL_CLASSD_CODEC_DAI_NAME "atmel-classd-hifi" |
| 490 | |
| 491 | static struct snd_soc_dai_driver atmel_classd_codec_dai = { |
| 492 | .name = ATMEL_CLASSD_CODEC_DAI_NAME, |
| 493 | .playback = { |
| 494 | .stream_name = "Playback", |
Songjun Wu | 07c55d3 | 2015-11-19 11:45:32 +0800 | [diff] [blame] | 495 | .channels_min = 1, |
Songjun Wu | e0a25b6 | 2015-10-08 18:13:31 +0800 | [diff] [blame] | 496 | .channels_max = 2, |
| 497 | .rates = ATMEL_CLASSD_RATES, |
| 498 | .formats = SNDRV_PCM_FMTBIT_S16_LE, |
| 499 | }, |
| 500 | .ops = &atmel_classd_codec_dai_ops, |
| 501 | }; |
| 502 | |
| 503 | /* ASoC sound card */ |
| 504 | static int atmel_classd_asoc_card_init(struct device *dev, |
| 505 | struct snd_soc_card *card) |
| 506 | { |
| 507 | struct snd_soc_dai_link *dai_link; |
| 508 | struct atmel_classd *dd = snd_soc_card_get_drvdata(card); |
| 509 | |
| 510 | dai_link = devm_kzalloc(dev, sizeof(*dai_link), GFP_KERNEL); |
| 511 | if (!dai_link) |
| 512 | return -ENOMEM; |
| 513 | |
| 514 | dai_link->name = "CLASSD"; |
| 515 | dai_link->stream_name = "CLASSD PCM"; |
| 516 | dai_link->codec_dai_name = ATMEL_CLASSD_CODEC_DAI_NAME; |
| 517 | dai_link->cpu_dai_name = dev_name(dev); |
| 518 | dai_link->codec_name = dev_name(dev); |
| 519 | dai_link->platform_name = dev_name(dev); |
| 520 | |
| 521 | card->dai_link = dai_link; |
| 522 | card->num_links = 1; |
| 523 | card->name = dd->pdata->card_name; |
| 524 | card->dev = dev; |
| 525 | |
| 526 | return 0; |
| 527 | }; |
| 528 | |
| 529 | /* regmap configuration */ |
| 530 | static const struct reg_default atmel_classd_reg_defaults[] = { |
| 531 | { CLASSD_INTPMR, 0x00301212 }, |
| 532 | }; |
| 533 | |
| 534 | #define ATMEL_CLASSD_REG_MAX 0xE4 |
| 535 | static const struct regmap_config atmel_classd_regmap_config = { |
| 536 | .reg_bits = 32, |
| 537 | .reg_stride = 4, |
| 538 | .val_bits = 32, |
| 539 | .max_register = ATMEL_CLASSD_REG_MAX, |
| 540 | |
| 541 | .cache_type = REGCACHE_FLAT, |
| 542 | .reg_defaults = atmel_classd_reg_defaults, |
| 543 | .num_reg_defaults = ARRAY_SIZE(atmel_classd_reg_defaults), |
| 544 | }; |
| 545 | |
| 546 | static int atmel_classd_probe(struct platform_device *pdev) |
| 547 | { |
| 548 | struct device *dev = &pdev->dev; |
| 549 | struct atmel_classd *dd; |
| 550 | struct resource *res; |
| 551 | void __iomem *io_base; |
| 552 | const struct atmel_classd_pdata *pdata; |
| 553 | struct snd_soc_card *card; |
| 554 | int ret; |
| 555 | |
| 556 | pdata = dev_get_platdata(dev); |
| 557 | if (!pdata) { |
| 558 | pdata = atmel_classd_dt_init(dev); |
| 559 | if (IS_ERR(pdata)) |
| 560 | return PTR_ERR(pdata); |
| 561 | } |
| 562 | |
| 563 | dd = devm_kzalloc(dev, sizeof(*dd), GFP_KERNEL); |
| 564 | if (!dd) |
| 565 | return -ENOMEM; |
| 566 | |
| 567 | dd->pdata = pdata; |
| 568 | |
| 569 | dd->irq = platform_get_irq(pdev, 0); |
| 570 | if (dd->irq < 0) { |
| 571 | ret = dd->irq; |
| 572 | dev_err(dev, "failed to could not get irq: %d\n", ret); |
| 573 | return ret; |
| 574 | } |
| 575 | |
| 576 | dd->pclk = devm_clk_get(dev, "pclk"); |
| 577 | if (IS_ERR(dd->pclk)) { |
| 578 | ret = PTR_ERR(dd->pclk); |
| 579 | dev_err(dev, "failed to get peripheral clock: %d\n", ret); |
| 580 | return ret; |
| 581 | } |
| 582 | |
| 583 | dd->gclk = devm_clk_get(dev, "gclk"); |
| 584 | if (IS_ERR(dd->gclk)) { |
| 585 | ret = PTR_ERR(dd->gclk); |
| 586 | dev_err(dev, "failed to get GCK clock: %d\n", ret); |
| 587 | return ret; |
| 588 | } |
| 589 | |
| 590 | dd->aclk = devm_clk_get(dev, "aclk"); |
| 591 | if (IS_ERR(dd->aclk)) { |
| 592 | ret = PTR_ERR(dd->aclk); |
| 593 | dev_err(dev, "failed to get audio clock: %d\n", ret); |
| 594 | return ret; |
| 595 | } |
| 596 | |
| 597 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
Songjun Wu | e0a25b6 | 2015-10-08 18:13:31 +0800 | [diff] [blame] | 598 | io_base = devm_ioremap_resource(dev, res); |
| 599 | if (IS_ERR(io_base)) { |
| 600 | ret = PTR_ERR(io_base); |
| 601 | dev_err(dev, "failed to remap register memory: %d\n", ret); |
| 602 | return ret; |
| 603 | } |
| 604 | |
| 605 | dd->phy_base = res->start; |
| 606 | |
| 607 | dd->regmap = devm_regmap_init_mmio(dev, io_base, |
| 608 | &atmel_classd_regmap_config); |
| 609 | if (IS_ERR(dd->regmap)) { |
| 610 | ret = PTR_ERR(dd->regmap); |
| 611 | dev_err(dev, "failed to init register map: %d\n", ret); |
| 612 | return ret; |
| 613 | } |
| 614 | |
| 615 | ret = devm_snd_soc_register_component(dev, |
| 616 | &atmel_classd_cpu_dai_component, |
| 617 | &atmel_classd_cpu_dai, 1); |
| 618 | if (ret) { |
| 619 | dev_err(dev, "could not register CPU DAI: %d\n", ret); |
| 620 | return ret; |
| 621 | } |
| 622 | |
| 623 | ret = devm_snd_dmaengine_pcm_register(dev, |
| 624 | &atmel_classd_dmaengine_pcm_config, |
| 625 | 0); |
| 626 | if (ret) { |
| 627 | dev_err(dev, "could not register platform: %d\n", ret); |
| 628 | return ret; |
| 629 | } |
| 630 | |
| 631 | ret = snd_soc_register_codec(dev, &soc_codec_dev_classd, |
| 632 | &atmel_classd_codec_dai, 1); |
| 633 | if (ret) { |
| 634 | dev_err(dev, "could not register codec: %d\n", ret); |
| 635 | return ret; |
| 636 | } |
| 637 | |
| 638 | /* register sound card */ |
| 639 | card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL); |
Songjun Wu | 32e69ba | 2015-12-11 11:07:37 +0800 | [diff] [blame] | 640 | if (!card) { |
| 641 | ret = -ENOMEM; |
| 642 | goto unregister_codec; |
| 643 | } |
Songjun Wu | e0a25b6 | 2015-10-08 18:13:31 +0800 | [diff] [blame] | 644 | |
| 645 | snd_soc_card_set_drvdata(card, dd); |
| 646 | platform_set_drvdata(pdev, card); |
| 647 | |
| 648 | ret = atmel_classd_asoc_card_init(dev, card); |
| 649 | if (ret) { |
| 650 | dev_err(dev, "failed to init sound card\n"); |
Songjun Wu | 32e69ba | 2015-12-11 11:07:37 +0800 | [diff] [blame] | 651 | goto unregister_codec; |
Songjun Wu | e0a25b6 | 2015-10-08 18:13:31 +0800 | [diff] [blame] | 652 | } |
| 653 | |
| 654 | ret = devm_snd_soc_register_card(dev, card); |
| 655 | if (ret) { |
| 656 | dev_err(dev, "failed to register sound card: %d\n", ret); |
Songjun Wu | 32e69ba | 2015-12-11 11:07:37 +0800 | [diff] [blame] | 657 | goto unregister_codec; |
Songjun Wu | e0a25b6 | 2015-10-08 18:13:31 +0800 | [diff] [blame] | 658 | } |
| 659 | |
| 660 | return 0; |
Songjun Wu | 32e69ba | 2015-12-11 11:07:37 +0800 | [diff] [blame] | 661 | |
| 662 | unregister_codec: |
| 663 | snd_soc_unregister_codec(dev); |
| 664 | return ret; |
Songjun Wu | e0a25b6 | 2015-10-08 18:13:31 +0800 | [diff] [blame] | 665 | } |
| 666 | |
| 667 | static int atmel_classd_remove(struct platform_device *pdev) |
| 668 | { |
| 669 | snd_soc_unregister_codec(&pdev->dev); |
| 670 | return 0; |
| 671 | } |
| 672 | |
| 673 | static struct platform_driver atmel_classd_driver = { |
| 674 | .driver = { |
| 675 | .name = "atmel-classd", |
| 676 | .of_match_table = of_match_ptr(atmel_classd_of_match), |
| 677 | .pm = &snd_soc_pm_ops, |
| 678 | }, |
| 679 | .probe = atmel_classd_probe, |
| 680 | .remove = atmel_classd_remove, |
| 681 | }; |
| 682 | module_platform_driver(atmel_classd_driver); |
| 683 | |
| 684 | MODULE_DESCRIPTION("Atmel ClassD driver under ALSA SoC architecture"); |
| 685 | MODULE_AUTHOR("Songjun Wu <songjun.wu@atmel.com>"); |
| 686 | MODULE_LICENSE("GPL"); |