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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* starfire.c: Linux device driver for the Adaptec Starfire network adapter. */
2/*
3 Written 1998-2000 by Donald Becker.
4
Jeff Garzikfdecea62005-05-12 20:16:24 -04005 Current maintainer is Ion Badulescu <ionut ta badula tod org>. Please
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 send all bug reports to me, and not to Donald Becker, as this code
7 has been heavily modified from Donald's original version.
8
9 This software may be used and distributed according to the terms of
10 the GNU General Public License (GPL), incorporated herein by reference.
11 Drivers based on or derived from this code fall under the GPL and must
12 retain the authorship, copyright and license notice. This file is not
13 a complete program and may only be used when the entire operating
14 system is licensed under the GPL.
15
16 The information below comes from Donald Becker's original driver:
17
18 The author may be reached as becker@scyld.com, or C/O
19 Scyld Computing Corporation
20 410 Severn Ave., Suite 210
21 Annapolis MD 21403
22
23 Support and updates available at
24 http://www.scyld.com/network/starfire.html
25
26 -----------------------------------------------------------
27
28 Linux kernel-specific changes:
29
30 LK1.1.1 (jgarzik):
31 - Use PCI driver interface
32 - Fix MOD_xxx races
33 - softnet fixups
34
35 LK1.1.2 (jgarzik):
36 - Merge Becker version 0.15
37
38 LK1.1.3 (Andrew Morton)
39 - Timer cleanups
40
41 LK1.1.4 (jgarzik):
42 - Merge Becker version 1.03
43
44 LK1.2.1 (Ion Badulescu <ionut@cs.columbia.edu>)
45 - Support hardware Rx/Tx checksumming
46 - Use the GFP firmware taken from Adaptec's Netware driver
47
48 LK1.2.2 (Ion Badulescu)
49 - Backported to 2.2.x
50
51 LK1.2.3 (Ion Badulescu)
52 - Fix the flaky mdio interface
53 - More compat clean-ups
54
55 LK1.2.4 (Ion Badulescu)
56 - More 2.2.x initialization fixes
57
58 LK1.2.5 (Ion Badulescu)
59 - Several fixes from Manfred Spraul
60
61 LK1.2.6 (Ion Badulescu)
62 - Fixed ifup/ifdown/ifup problem in 2.4.x
63
64 LK1.2.7 (Ion Badulescu)
65 - Removed unused code
66 - Made more functions static and __init
67
68 LK1.2.8 (Ion Badulescu)
69 - Quell bogus error messages, inform about the Tx threshold
70 - Removed #ifdef CONFIG_PCI, this driver is PCI only
71
72 LK1.2.9 (Ion Badulescu)
73 - Merged Jeff Garzik's changes from 2.4.4-pre5
74 - Added 2.2.x compatibility stuff required by the above changes
75
76 LK1.2.9a (Ion Badulescu)
77 - More updates from Jeff Garzik
78
79 LK1.3.0 (Ion Badulescu)
80 - Merged zerocopy support
81
82 LK1.3.1 (Ion Badulescu)
83 - Added ethtool support
84 - Added GPIO (media change) interrupt support
85
86 LK1.3.2 (Ion Badulescu)
87 - Fixed 2.2.x compatibility issues introduced in 1.3.1
88 - Fixed ethtool ioctl returning uninitialized memory
89
90 LK1.3.3 (Ion Badulescu)
91 - Initialize the TxMode register properly
92 - Don't dereference dev->priv after freeing it
93
94 LK1.3.4 (Ion Badulescu)
95 - Fixed initialization timing problems
96 - Fixed interrupt mask definitions
97
98 LK1.3.5 (jgarzik)
99 - ethtool NWAY_RST, GLINK, [GS]MSGLVL support
100
101 LK1.3.6:
102 - Sparc64 support and fixes (Ion Badulescu)
103 - Better stats and error handling (Ion Badulescu)
104 - Use new pci_set_mwi() PCI API function (jgarzik)
105
106 LK1.3.7 (Ion Badulescu)
107 - minimal implementation of tx_timeout()
108 - correctly shutdown the Rx/Tx engines in netdev_close()
109 - added calls to netif_carrier_on/off
110 (patch from Stefan Rompf <srompf@isg.de>)
111 - VLAN support
112
113 LK1.3.8 (Ion Badulescu)
114 - adjust DMA burst size on sparc64
115 - 64-bit support
116 - reworked zerocopy support for 64-bit buffers
117 - working and usable interrupt mitigation/latency
118 - reduced Tx interrupt frequency for lower interrupt overhead
119
120 LK1.3.9 (Ion Badulescu)
121 - bugfix for mcast filter
122 - enable the right kind of Tx interrupts (TxDMADone, not TxDone)
123
124 LK1.4.0 (Ion Badulescu)
125 - NAPI support
126
127 LK1.4.1 (Ion Badulescu)
128 - flush PCI posting buffers after disabling Rx interrupts
129 - put the chip to a D3 slumber on driver unload
130 - added config option to enable/disable NAPI
131
Jeff Garzikfdecea62005-05-12 20:16:24 -0400132 LK1.4.2 (Ion Badulescu)
133 - finally added firmware (GPL'ed by Adaptec)
134 - removed compatibility code for 2.2.x
135
136TODO: - fix forced speed/duplexing code (broken a long time ago, when
137 somebody converted the driver to use the generic MII code)
138 - fix VLAN support
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139*/
140
141#define DRV_NAME "starfire"
Jeff Garzikfdecea62005-05-12 20:16:24 -0400142#define DRV_VERSION "1.03+LK1.4.2"
143#define DRV_RELDATE "January 19, 2005"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144
145#include <linux/config.h>
146#include <linux/version.h>
147#include <linux/module.h>
148#include <linux/kernel.h>
149#include <linux/pci.h>
150#include <linux/netdevice.h>
151#include <linux/etherdevice.h>
152#include <linux/init.h>
153#include <linux/delay.h>
Jeff Garzikfdecea62005-05-12 20:16:24 -0400154#include <linux/crc32.h>
155#include <linux/ethtool.h>
156#include <linux/mii.h>
157#include <linux/if_vlan.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -0700158#include <asm/processor.h> /* Processor type for cache alignment. */
159#include <asm/uaccess.h>
160#include <asm/io.h>
161
Jeff Garzikfdecea62005-05-12 20:16:24 -0400162#include "starfire_firmware.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700163/*
164 * The current frame processor firmware fails to checksum a fragment
165 * of length 1. If and when this is fixed, the #define below can be removed.
166 */
167#define HAS_BROKEN_FIRMWARE
168/*
169 * Define this if using the driver with the zero-copy patch
170 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700171#define ZEROCOPY
Linus Torvalds1da177e2005-04-16 15:20:36 -0700172
173#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
174#define VLAN_SUPPORT
175#endif
176
177#ifndef CONFIG_ADAPTEC_STARFIRE_NAPI
178#undef HAVE_NETDEV_POLL
179#endif
180
181/* The user-configurable values.
182 These may be modified when a driver module is loaded.*/
183
184/* Used for tuning interrupt latency vs. overhead. */
185static int intr_latency;
186static int small_frames;
187
188static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
189static int max_interrupt_work = 20;
190static int mtu;
191/* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
192 The Starfire has a 512 element hash table based on the Ethernet CRC. */
193static int multicast_filter_limit = 512;
194/* Whether to do TCP/UDP checksums in hardware */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700195static int enable_hw_cksum = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700196
197#define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
198/*
199 * Set the copy breakpoint for the copy-only-tiny-frames scheme.
200 * Setting to > 1518 effectively disables this feature.
201 *
202 * NOTE:
203 * The ia64 doesn't allow for unaligned loads even of integers being
204 * misaligned on a 2 byte boundary. Thus always force copying of
205 * packets as the starfire doesn't allow for misaligned DMAs ;-(
206 * 23/10/2000 - Jes
207 *
208 * The Alpha and the Sparc don't like unaligned loads, either. On Sparc64,
209 * at least, having unaligned frames leads to a rather serious performance
210 * penalty. -Ion
211 */
212#if defined(__ia64__) || defined(__alpha__) || defined(__sparc__)
213static int rx_copybreak = PKT_BUF_SZ;
214#else
215static int rx_copybreak /* = 0 */;
216#endif
217
218/* PCI DMA burst size -- on sparc64 we want to force it to 64 bytes, on the others the default of 128 is fine. */
219#ifdef __sparc__
220#define DMA_BURST_SIZE 64
221#else
222#define DMA_BURST_SIZE 128
223#endif
224
225/* Used to pass the media type, etc.
226 Both 'options[]' and 'full_duplex[]' exist for driver interoperability.
227 The media type is usually passed in 'options[]'.
228 These variables are deprecated, use ethtool instead. -Ion
229*/
230#define MAX_UNITS 8 /* More are supported, limit only on options */
231static int options[MAX_UNITS] = {0, };
232static int full_duplex[MAX_UNITS] = {0, };
233
234/* Operational parameters that are set at compile time. */
235
236/* The "native" ring sizes are either 256 or 2048.
237 However in some modes a descriptor may be marked to wrap the ring earlier.
238*/
239#define RX_RING_SIZE 256
240#define TX_RING_SIZE 32
241/* The completion queues are fixed at 1024 entries i.e. 4K or 8KB. */
242#define DONE_Q_SIZE 1024
243/* All queues must be aligned on a 256-byte boundary */
244#define QUEUE_ALIGN 256
245
246#if RX_RING_SIZE > 256
247#define RX_Q_ENTRIES Rx2048QEntries
248#else
249#define RX_Q_ENTRIES Rx256QEntries
250#endif
251
252/* Operational parameters that usually are not changed. */
253/* Time in jiffies before concluding the transmitter is hung. */
254#define TX_TIMEOUT (2 * HZ)
255
256/*
257 * This SUCKS.
258 * We need a much better method to determine if dma_addr_t is 64-bit.
259 */
260#if (defined(__i386__) && defined(CONFIG_HIGHMEM) && (LINUX_VERSION_CODE > 0x20500 || defined(CONFIG_HIGHMEM64G))) || defined(__x86_64__) || defined (__ia64__) || defined(__mips64__) || (defined(__mips__) && defined(CONFIG_HIGHMEM) && defined(CONFIG_64BIT_PHYS_ADDR))
261/* 64-bit dma_addr_t */
262#define ADDR_64BITS /* This chip uses 64 bit addresses. */
263#define cpu_to_dma(x) cpu_to_le64(x)
264#define dma_to_cpu(x) le64_to_cpu(x)
265#define RX_DESC_Q_ADDR_SIZE RxDescQAddr64bit
266#define TX_DESC_Q_ADDR_SIZE TxDescQAddr64bit
267#define RX_COMPL_Q_ADDR_SIZE RxComplQAddr64bit
268#define TX_COMPL_Q_ADDR_SIZE TxComplQAddr64bit
269#define RX_DESC_ADDR_SIZE RxDescAddr64bit
270#else /* 32-bit dma_addr_t */
271#define cpu_to_dma(x) cpu_to_le32(x)
272#define dma_to_cpu(x) le32_to_cpu(x)
273#define RX_DESC_Q_ADDR_SIZE RxDescQAddr32bit
274#define TX_DESC_Q_ADDR_SIZE TxDescQAddr32bit
275#define RX_COMPL_Q_ADDR_SIZE RxComplQAddr32bit
276#define TX_COMPL_Q_ADDR_SIZE TxComplQAddr32bit
277#define RX_DESC_ADDR_SIZE RxDescAddr32bit
278#endif
279
Linus Torvalds1da177e2005-04-16 15:20:36 -0700280#define skb_first_frag_len(skb) skb_headlen(skb)
281#define skb_num_frags(skb) (skb_shinfo(skb)->nr_frags + 1)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700282
283#ifdef HAVE_NETDEV_POLL
284#define init_poll(dev) \
Jeff Garzikfdecea62005-05-12 20:16:24 -0400285do { \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700286 dev->poll = &netdev_poll; \
Jeff Garzikfdecea62005-05-12 20:16:24 -0400287 dev->weight = max_interrupt_work; \
288} while (0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700289#define netdev_rx(dev, ioaddr) \
290do { \
291 u32 intr_enable; \
292 if (netif_rx_schedule_prep(dev)) { \
293 __netif_rx_schedule(dev); \
294 intr_enable = readl(ioaddr + IntrEnable); \
295 intr_enable &= ~(IntrRxDone | IntrRxEmpty); \
296 writel(intr_enable, ioaddr + IntrEnable); \
297 readl(ioaddr + IntrEnable); /* flush PCI posting buffers */ \
298 } else { \
299 /* Paranoia check */ \
300 intr_enable = readl(ioaddr + IntrEnable); \
301 if (intr_enable & (IntrRxDone | IntrRxEmpty)) { \
Jeff Garzikfdecea62005-05-12 20:16:24 -0400302 printk(KERN_INFO "%s: interrupt while in polling mode!\n", dev->name); \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700303 intr_enable &= ~(IntrRxDone | IntrRxEmpty); \
304 writel(intr_enable, ioaddr + IntrEnable); \
305 } \
306 } \
307} while (0)
308#define netdev_receive_skb(skb) netif_receive_skb(skb)
309#define vlan_netdev_receive_skb(skb, vlgrp, vlid) vlan_hwaccel_receive_skb(skb, vlgrp, vlid)
310static int netdev_poll(struct net_device *dev, int *budget);
311#else /* not HAVE_NETDEV_POLL */
312#define init_poll(dev)
313#define netdev_receive_skb(skb) netif_rx(skb)
314#define vlan_netdev_receive_skb(skb, vlgrp, vlid) vlan_hwaccel_rx(skb, vlgrp, vlid)
315#define netdev_rx(dev, ioaddr) \
316do { \
317 int quota = np->dirty_rx + RX_RING_SIZE - np->cur_rx; \
318 __netdev_rx(dev, &quota);\
319} while (0)
320#endif /* not HAVE_NETDEV_POLL */
321/* end of compatibility code */
322
323
324/* These identify the driver base version and may not be removed. */
325static char version[] __devinitdata =
326KERN_INFO "starfire.c:v1.03 7/26/2000 Written by Donald Becker <becker@scyld.com>\n"
327KERN_INFO " (unofficial 2.2/2.4 kernel port, version " DRV_VERSION ", " DRV_RELDATE ")\n";
328
329MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
330MODULE_DESCRIPTION("Adaptec Starfire Ethernet driver");
331MODULE_LICENSE("GPL");
Jeff Garzikfdecea62005-05-12 20:16:24 -0400332MODULE_VERSION(DRV_VERSION);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700333
334module_param(max_interrupt_work, int, 0);
335module_param(mtu, int, 0);
336module_param(debug, int, 0);
337module_param(rx_copybreak, int, 0);
338module_param(intr_latency, int, 0);
339module_param(small_frames, int, 0);
340module_param_array(options, int, NULL, 0);
341module_param_array(full_duplex, int, NULL, 0);
342module_param(enable_hw_cksum, int, 0);
343MODULE_PARM_DESC(max_interrupt_work, "Maximum events handled per interrupt");
344MODULE_PARM_DESC(mtu, "MTU (all boards)");
345MODULE_PARM_DESC(debug, "Debug level (0-6)");
346MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
347MODULE_PARM_DESC(intr_latency, "Maximum interrupt latency, in microseconds");
348MODULE_PARM_DESC(small_frames, "Maximum size of receive frames that bypass interrupt latency (0,64,128,256,512)");
349MODULE_PARM_DESC(options, "Deprecated: Bits 0-3: media type, bit 17: full duplex");
350MODULE_PARM_DESC(full_duplex, "Deprecated: Forced full-duplex setting (0/1)");
351MODULE_PARM_DESC(enable_hw_cksum, "Enable/disable hardware cksum support (0/1)");
352
353/*
354 Theory of Operation
355
356I. Board Compatibility
357
358This driver is for the Adaptec 6915 "Starfire" 64 bit PCI Ethernet adapter.
359
360II. Board-specific settings
361
362III. Driver operation
363
364IIIa. Ring buffers
365
366The Starfire hardware uses multiple fixed-size descriptor queues/rings. The
367ring sizes are set fixed by the hardware, but may optionally be wrapped
368earlier by the END bit in the descriptor.
369This driver uses that hardware queue size for the Rx ring, where a large
370number of entries has no ill effect beyond increases the potential backlog.
371The Tx ring is wrapped with the END bit, since a large hardware Tx queue
372disables the queue layer priority ordering and we have no mechanism to
373utilize the hardware two-level priority queue. When modifying the
374RX/TX_RING_SIZE pay close attention to page sizes and the ring-empty warning
375levels.
376
377IIIb/c. Transmit/Receive Structure
378
379See the Adaptec manual for the many possible structures, and options for
380each structure. There are far too many to document all of them here.
381
382For transmit this driver uses type 0/1 transmit descriptors (depending
383on the 32/64 bitness of the architecture), and relies on automatic
384minimum-length padding. It does not use the completion queue
385consumer index, but instead checks for non-zero status entries.
386
Jeff Garzikfdecea62005-05-12 20:16:24 -0400387For receive this driver uses type 2/3 receive descriptors. The driver
Linus Torvalds1da177e2005-04-16 15:20:36 -0700388allocates full frame size skbuffs for the Rx ring buffers, so all frames
389should fit in a single descriptor. The driver does not use the completion
390queue consumer index, but instead checks for non-zero status entries.
391
392When an incoming frame is less than RX_COPYBREAK bytes long, a fresh skbuff
393is allocated and the frame is copied to the new skbuff. When the incoming
394frame is larger, the skbuff is passed directly up the protocol stack.
395Buffers consumed this way are replaced by newly allocated skbuffs in a later
396phase of receive.
397
398A notable aspect of operation is that unaligned buffers are not permitted by
399the Starfire hardware. Thus the IP header at offset 14 in an ethernet frame
400isn't longword aligned, which may cause problems on some machine
401e.g. Alphas and IA64. For these architectures, the driver is forced to copy
402the frame into a new skbuff unconditionally. Copied frames are put into the
403skbuff at an offset of "+2", thus 16-byte aligning the IP header.
404
405IIId. Synchronization
406
407The driver runs as two independent, single-threaded flows of control. One
408is the send-packet routine, which enforces single-threaded use by the
409dev->tbusy flag. The other thread is the interrupt handler, which is single
410threaded by the hardware and interrupt handling software.
411
412The send packet thread has partial control over the Tx ring and the netif_queue
413status. If the number of free Tx slots in the ring falls below a certain number
414(currently hardcoded to 4), it signals the upper layer to stop the queue.
415
416The interrupt handler has exclusive control over the Rx ring and records stats
417from the Tx ring. After reaping the stats, it marks the Tx queue entry as
418empty by incrementing the dirty_tx mark. Iff the netif_queue is stopped and the
419number of free Tx slow is above the threshold, it signals the upper layer to
420restart the queue.
421
422IV. Notes
423
424IVb. References
425
426The Adaptec Starfire manuals, available only from Adaptec.
427http://www.scyld.com/expert/100mbps.html
428http://www.scyld.com/expert/NWay.html
429
430IVc. Errata
431
432- StopOnPerr is broken, don't enable
433- Hardware ethernet padding exposes random data, perform software padding
434 instead (unverified -- works correctly for all the hardware I have)
435
436*/
437
Jeff Garzikfdecea62005-05-12 20:16:24 -0400438
Linus Torvalds1da177e2005-04-16 15:20:36 -0700439
440enum chip_capability_flags {CanHaveMII=1, };
441
442enum chipset {
443 CH_6915 = 0,
444};
445
446static struct pci_device_id starfire_pci_tbl[] = {
447 { 0x9004, 0x6915, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_6915 },
448 { 0, }
449};
450MODULE_DEVICE_TABLE(pci, starfire_pci_tbl);
451
452/* A chip capabilities table, matching the CH_xxx entries in xxx_pci_tbl[] above. */
453static struct chip_info {
454 const char *name;
455 int drv_flags;
456} netdrv_tbl[] __devinitdata = {
457 { "Adaptec Starfire 6915", CanHaveMII },
458};
459
460
461/* Offsets to the device registers.
462 Unlike software-only systems, device drivers interact with complex hardware.
463 It's not useful to define symbolic names for every register bit in the
464 device. The name can only partially document the semantics and make
465 the driver longer and more difficult to read.
466 In general, only the important configuration values or bits changed
467 multiple times should be defined symbolically.
468*/
469enum register_offsets {
470 PCIDeviceConfig=0x50040, GenCtrl=0x50070, IntrTimerCtrl=0x50074,
471 IntrClear=0x50080, IntrStatus=0x50084, IntrEnable=0x50088,
472 MIICtrl=0x52000, TxStationAddr=0x50120, EEPROMCtrl=0x51000,
473 GPIOCtrl=0x5008C, TxDescCtrl=0x50090,
474 TxRingPtr=0x50098, HiPriTxRingPtr=0x50094, /* Low and High priority. */
475 TxRingHiAddr=0x5009C, /* 64 bit address extension. */
476 TxProducerIdx=0x500A0, TxConsumerIdx=0x500A4,
477 TxThreshold=0x500B0,
478 CompletionHiAddr=0x500B4, TxCompletionAddr=0x500B8,
479 RxCompletionAddr=0x500BC, RxCompletionQ2Addr=0x500C0,
480 CompletionQConsumerIdx=0x500C4, RxDMACtrl=0x500D0,
481 RxDescQCtrl=0x500D4, RxDescQHiAddr=0x500DC, RxDescQAddr=0x500E0,
482 RxDescQIdx=0x500E8, RxDMAStatus=0x500F0, RxFilterMode=0x500F4,
483 TxMode=0x55000, VlanType=0x55064,
484 PerfFilterTable=0x56000, HashTable=0x56100,
485 TxGfpMem=0x58000, RxGfpMem=0x5a000,
486};
487
488/*
489 * Bits in the interrupt status/mask registers.
490 * Warning: setting Intr[Ab]NormalSummary in the IntrEnable register
491 * enables all the interrupt sources that are or'ed into those status bits.
492 */
493enum intr_status_bits {
494 IntrLinkChange=0xf0000000, IntrStatsMax=0x08000000,
495 IntrAbnormalSummary=0x02000000, IntrGeneralTimer=0x01000000,
496 IntrSoftware=0x800000, IntrRxComplQ1Low=0x400000,
497 IntrTxComplQLow=0x200000, IntrPCI=0x100000,
498 IntrDMAErr=0x080000, IntrTxDataLow=0x040000,
499 IntrRxComplQ2Low=0x020000, IntrRxDescQ1Low=0x010000,
500 IntrNormalSummary=0x8000, IntrTxDone=0x4000,
501 IntrTxDMADone=0x2000, IntrTxEmpty=0x1000,
502 IntrEarlyRxQ2=0x0800, IntrEarlyRxQ1=0x0400,
503 IntrRxQ2Done=0x0200, IntrRxQ1Done=0x0100,
504 IntrRxGFPDead=0x80, IntrRxDescQ2Low=0x40,
505 IntrNoTxCsum=0x20, IntrTxBadID=0x10,
506 IntrHiPriTxBadID=0x08, IntrRxGfp=0x04,
507 IntrTxGfp=0x02, IntrPCIPad=0x01,
508 /* not quite bits */
509 IntrRxDone=IntrRxQ2Done | IntrRxQ1Done,
510 IntrRxEmpty=IntrRxDescQ1Low | IntrRxDescQ2Low,
511 IntrNormalMask=0xff00, IntrAbnormalMask=0x3ff00fe,
512};
513
514/* Bits in the RxFilterMode register. */
515enum rx_mode_bits {
516 AcceptBroadcast=0x04, AcceptAllMulticast=0x02, AcceptAll=0x01,
517 AcceptMulticast=0x10, PerfectFilter=0x40, HashFilter=0x30,
518 PerfectFilterVlan=0x80, MinVLANPrio=0xE000, VlanMode=0x0200,
519 WakeupOnGFP=0x0800,
520};
521
522/* Bits in the TxMode register */
523enum tx_mode_bits {
524 MiiSoftReset=0x8000, MIILoopback=0x4000,
525 TxFlowEnable=0x0800, RxFlowEnable=0x0400,
526 PadEnable=0x04, FullDuplex=0x02, HugeFrame=0x01,
527};
528
529/* Bits in the TxDescCtrl register. */
530enum tx_ctrl_bits {
531 TxDescSpaceUnlim=0x00, TxDescSpace32=0x10, TxDescSpace64=0x20,
532 TxDescSpace128=0x30, TxDescSpace256=0x40,
533 TxDescType0=0x00, TxDescType1=0x01, TxDescType2=0x02,
534 TxDescType3=0x03, TxDescType4=0x04,
535 TxNoDMACompletion=0x08,
536 TxDescQAddr64bit=0x80, TxDescQAddr32bit=0,
537 TxHiPriFIFOThreshShift=24, TxPadLenShift=16,
538 TxDMABurstSizeShift=8,
539};
540
541/* Bits in the RxDescQCtrl register. */
542enum rx_ctrl_bits {
543 RxBufferLenShift=16, RxMinDescrThreshShift=0,
544 RxPrefetchMode=0x8000, RxVariableQ=0x2000,
545 Rx2048QEntries=0x4000, Rx256QEntries=0,
546 RxDescAddr64bit=0x1000, RxDescAddr32bit=0,
547 RxDescQAddr64bit=0x0100, RxDescQAddr32bit=0,
548 RxDescSpace4=0x000, RxDescSpace8=0x100,
549 RxDescSpace16=0x200, RxDescSpace32=0x300,
550 RxDescSpace64=0x400, RxDescSpace128=0x500,
551 RxConsumerWrEn=0x80,
552};
553
554/* Bits in the RxDMACtrl register. */
555enum rx_dmactrl_bits {
556 RxReportBadFrames=0x80000000, RxDMAShortFrames=0x40000000,
557 RxDMABadFrames=0x20000000, RxDMACrcErrorFrames=0x10000000,
558 RxDMAControlFrame=0x08000000, RxDMAPauseFrame=0x04000000,
559 RxChecksumIgnore=0, RxChecksumRejectTCPUDP=0x02000000,
560 RxChecksumRejectTCPOnly=0x01000000,
561 RxCompletionQ2Enable=0x800000,
562 RxDMAQ2Disable=0, RxDMAQ2FPOnly=0x100000,
563 RxDMAQ2SmallPkt=0x200000, RxDMAQ2HighPrio=0x300000,
564 RxDMAQ2NonIP=0x400000,
565 RxUseBackupQueue=0x080000, RxDMACRC=0x040000,
566 RxEarlyIntThreshShift=12, RxHighPrioThreshShift=8,
567 RxBurstSizeShift=0,
568};
569
570/* Bits in the RxCompletionAddr register */
571enum rx_compl_bits {
572 RxComplQAddr64bit=0x80, RxComplQAddr32bit=0,
573 RxComplProducerWrEn=0x40,
574 RxComplType0=0x00, RxComplType1=0x10,
575 RxComplType2=0x20, RxComplType3=0x30,
576 RxComplThreshShift=0,
577};
578
579/* Bits in the TxCompletionAddr register */
580enum tx_compl_bits {
581 TxComplQAddr64bit=0x80, TxComplQAddr32bit=0,
582 TxComplProducerWrEn=0x40,
583 TxComplIntrStatus=0x20,
584 CommonQueueMode=0x10,
585 TxComplThreshShift=0,
586};
587
588/* Bits in the GenCtrl register */
589enum gen_ctrl_bits {
590 RxEnable=0x05, TxEnable=0x0a,
591 RxGFPEnable=0x10, TxGFPEnable=0x20,
592};
593
594/* Bits in the IntrTimerCtrl register */
595enum intr_ctrl_bits {
596 Timer10X=0x800, EnableIntrMasking=0x60, SmallFrameBypass=0x100,
597 SmallFrame64=0, SmallFrame128=0x200, SmallFrame256=0x400, SmallFrame512=0x600,
598 IntrLatencyMask=0x1f,
599};
600
601/* The Rx and Tx buffer descriptors. */
602struct starfire_rx_desc {
603 dma_addr_t rxaddr;
604};
605enum rx_desc_bits {
606 RxDescValid=1, RxDescEndRing=2,
607};
608
609/* Completion queue entry. */
610struct short_rx_done_desc {
611 u32 status; /* Low 16 bits is length. */
612};
613struct basic_rx_done_desc {
614 u32 status; /* Low 16 bits is length. */
615 u16 vlanid;
616 u16 status2;
617};
618struct csum_rx_done_desc {
619 u32 status; /* Low 16 bits is length. */
620 u16 csum; /* Partial checksum */
621 u16 status2;
622};
623struct full_rx_done_desc {
624 u32 status; /* Low 16 bits is length. */
625 u16 status3;
626 u16 status2;
627 u16 vlanid;
628 u16 csum; /* partial checksum */
629 u32 timestamp;
630};
631/* XXX: this is ugly and I'm not sure it's worth the trouble -Ion */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700632#ifdef VLAN_SUPPORT
633typedef struct full_rx_done_desc rx_done_desc;
634#define RxComplType RxComplType3
635#else /* not VLAN_SUPPORT */
636typedef struct csum_rx_done_desc rx_done_desc;
637#define RxComplType RxComplType2
638#endif /* not VLAN_SUPPORT */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700639
640enum rx_done_bits {
641 RxOK=0x20000000, RxFIFOErr=0x10000000, RxBufQ2=0x08000000,
642};
643
644/* Type 1 Tx descriptor. */
645struct starfire_tx_desc_1 {
646 u32 status; /* Upper bits are status, lower 16 length. */
647 u32 addr;
648};
649
650/* Type 2 Tx descriptor. */
651struct starfire_tx_desc_2 {
652 u32 status; /* Upper bits are status, lower 16 length. */
653 u32 reserved;
654 u64 addr;
655};
656
657#ifdef ADDR_64BITS
658typedef struct starfire_tx_desc_2 starfire_tx_desc;
659#define TX_DESC_TYPE TxDescType2
660#else /* not ADDR_64BITS */
661typedef struct starfire_tx_desc_1 starfire_tx_desc;
662#define TX_DESC_TYPE TxDescType1
663#endif /* not ADDR_64BITS */
664#define TX_DESC_SPACING TxDescSpaceUnlim
665
666enum tx_desc_bits {
667 TxDescID=0xB0000000,
668 TxCRCEn=0x01000000, TxDescIntr=0x08000000,
669 TxRingWrap=0x04000000, TxCalTCP=0x02000000,
670};
671struct tx_done_desc {
672 u32 status; /* timestamp, index. */
673#if 0
674 u32 intrstatus; /* interrupt status */
675#endif
676};
677
678struct rx_ring_info {
679 struct sk_buff *skb;
680 dma_addr_t mapping;
681};
682struct tx_ring_info {
683 struct sk_buff *skb;
684 dma_addr_t mapping;
685 unsigned int used_slots;
686};
687
688#define PHY_CNT 2
689struct netdev_private {
690 /* Descriptor rings first for alignment. */
691 struct starfire_rx_desc *rx_ring;
692 starfire_tx_desc *tx_ring;
693 dma_addr_t rx_ring_dma;
694 dma_addr_t tx_ring_dma;
695 /* The addresses of rx/tx-in-place skbuffs. */
696 struct rx_ring_info rx_info[RX_RING_SIZE];
697 struct tx_ring_info tx_info[TX_RING_SIZE];
698 /* Pointers to completion queues (full pages). */
699 rx_done_desc *rx_done_q;
700 dma_addr_t rx_done_q_dma;
701 unsigned int rx_done;
702 struct tx_done_desc *tx_done_q;
703 dma_addr_t tx_done_q_dma;
704 unsigned int tx_done;
705 struct net_device_stats stats;
706 struct pci_dev *pci_dev;
707#ifdef VLAN_SUPPORT
708 struct vlan_group *vlgrp;
709#endif
710 void *queue_mem;
711 dma_addr_t queue_mem_dma;
712 size_t queue_mem_size;
713
714 /* Frequently used values: keep some adjacent for cache effect. */
715 spinlock_t lock;
716 unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
717 unsigned int cur_tx, dirty_tx, reap_tx;
718 unsigned int rx_buf_sz; /* Based on MTU+slack. */
719 /* These values keep track of the transceiver/media in use. */
720 int speed100; /* Set if speed == 100MBit. */
721 u32 tx_mode;
722 u32 intr_timer_ctrl;
723 u8 tx_threshold;
724 /* MII transceiver section. */
725 struct mii_if_info mii_if; /* MII lib hooks/info */
726 int phy_cnt; /* MII device addresses. */
727 unsigned char phys[PHY_CNT]; /* MII device addresses. */
728 void __iomem *base;
729};
730
731
732static int mdio_read(struct net_device *dev, int phy_id, int location);
733static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
734static int netdev_open(struct net_device *dev);
735static void check_duplex(struct net_device *dev);
736static void tx_timeout(struct net_device *dev);
737static void init_ring(struct net_device *dev);
738static int start_tx(struct sk_buff *skb, struct net_device *dev);
739static irqreturn_t intr_handler(int irq, void *dev_instance, struct pt_regs *regs);
740static void netdev_error(struct net_device *dev, int intr_status);
741static int __netdev_rx(struct net_device *dev, int *quota);
742static void refill_rx_ring(struct net_device *dev);
743static void netdev_error(struct net_device *dev, int intr_status);
744static void set_rx_mode(struct net_device *dev);
745static struct net_device_stats *get_stats(struct net_device *dev);
746static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
747static int netdev_close(struct net_device *dev);
748static void netdev_media_change(struct net_device *dev);
749static struct ethtool_ops ethtool_ops;
750
751
752#ifdef VLAN_SUPPORT
753static void netdev_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
754{
755 struct netdev_private *np = netdev_priv(dev);
756
757 spin_lock(&np->lock);
758 if (debug > 2)
759 printk("%s: Setting vlgrp to %p\n", dev->name, grp);
760 np->vlgrp = grp;
761 set_rx_mode(dev);
762 spin_unlock(&np->lock);
763}
764
765static void netdev_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
766{
767 struct netdev_private *np = netdev_priv(dev);
768
769 spin_lock(&np->lock);
770 if (debug > 1)
771 printk("%s: Adding vlanid %d to vlan filter\n", dev->name, vid);
772 set_rx_mode(dev);
773 spin_unlock(&np->lock);
774}
775
776static void netdev_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
777{
778 struct netdev_private *np = netdev_priv(dev);
779
780 spin_lock(&np->lock);
781 if (debug > 1)
782 printk("%s: removing vlanid %d from vlan filter\n", dev->name, vid);
783 if (np->vlgrp)
784 np->vlgrp->vlan_devices[vid] = NULL;
785 set_rx_mode(dev);
786 spin_unlock(&np->lock);
787}
788#endif /* VLAN_SUPPORT */
789
790
791static int __devinit starfire_init_one(struct pci_dev *pdev,
792 const struct pci_device_id *ent)
793{
794 struct netdev_private *np;
795 int i, irq, option, chip_idx = ent->driver_data;
796 struct net_device *dev;
797 static int card_idx = -1;
798 long ioaddr;
799 void __iomem *base;
800 int drv_flags, io_size;
801 int boguscnt;
802
803/* when built into the kernel, we only print version if device is found */
804#ifndef MODULE
805 static int printed_version;
806 if (!printed_version++)
807 printk(version);
808#endif
809
810 card_idx++;
811
812 if (pci_enable_device (pdev))
813 return -EIO;
814
815 ioaddr = pci_resource_start(pdev, 0);
816 io_size = pci_resource_len(pdev, 0);
817 if (!ioaddr || ((pci_resource_flags(pdev, 0) & IORESOURCE_MEM) == 0)) {
818 printk(KERN_ERR DRV_NAME " %d: no PCI MEM resources, aborting\n", card_idx);
819 return -ENODEV;
820 }
821
822 dev = alloc_etherdev(sizeof(*np));
823 if (!dev) {
824 printk(KERN_ERR DRV_NAME " %d: cannot alloc etherdev, aborting\n", card_idx);
825 return -ENOMEM;
826 }
827 SET_MODULE_OWNER(dev);
828 SET_NETDEV_DEV(dev, &pdev->dev);
829
830 irq = pdev->irq;
831
832 if (pci_request_regions (pdev, DRV_NAME)) {
833 printk(KERN_ERR DRV_NAME " %d: cannot reserve PCI resources, aborting\n", card_idx);
834 goto err_out_free_netdev;
835 }
836
837 /* ioremap is borken in Linux-2.2.x/sparc64 */
838 base = ioremap(ioaddr, io_size);
839 if (!base) {
840 printk(KERN_ERR DRV_NAME " %d: cannot remap %#x @ %#lx, aborting\n",
841 card_idx, io_size, ioaddr);
842 goto err_out_free_res;
843 }
844
845 pci_set_master(pdev);
846
847 /* enable MWI -- it vastly improves Rx performance on sparc64 */
848 pci_set_mwi(pdev);
849
Linus Torvalds1da177e2005-04-16 15:20:36 -0700850#ifdef ZEROCOPY
851 /* Starfire can do TCP/UDP checksumming */
852 if (enable_hw_cksum)
Jeff Garzikfdecea62005-05-12 20:16:24 -0400853 dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700854#endif /* ZEROCOPY */
855#ifdef VLAN_SUPPORT
856 dev->features |= NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER;
857 dev->vlan_rx_register = netdev_vlan_rx_register;
858 dev->vlan_rx_add_vid = netdev_vlan_rx_add_vid;
859 dev->vlan_rx_kill_vid = netdev_vlan_rx_kill_vid;
860#endif /* VLAN_RX_KILL_VID */
861#ifdef ADDR_64BITS
862 dev->features |= NETIF_F_HIGHDMA;
863#endif /* ADDR_64BITS */
864
865 /* Serial EEPROM reads are hidden by the hardware. */
866 for (i = 0; i < 6; i++)
867 dev->dev_addr[i] = readb(base + EEPROMCtrl + 20 - i);
868
869#if ! defined(final_version) /* Dump the EEPROM contents during development. */
870 if (debug > 4)
871 for (i = 0; i < 0x20; i++)
872 printk("%2.2x%s",
873 (unsigned int)readb(base + EEPROMCtrl + i),
874 i % 16 != 15 ? " " : "\n");
875#endif
876
877 /* Issue soft reset */
878 writel(MiiSoftReset, base + TxMode);
879 udelay(1000);
880 writel(0, base + TxMode);
881
882 /* Reset the chip to erase previous misconfiguration. */
883 writel(1, base + PCIDeviceConfig);
884 boguscnt = 1000;
885 while (--boguscnt > 0) {
886 udelay(10);
887 if ((readl(base + PCIDeviceConfig) & 1) == 0)
888 break;
889 }
890 if (boguscnt == 0)
891 printk("%s: chipset reset never completed!\n", dev->name);
892 /* wait a little longer */
893 udelay(1000);
894
895 dev->base_addr = (unsigned long)base;
896 dev->irq = irq;
897
898 np = netdev_priv(dev);
899 np->base = base;
900 spin_lock_init(&np->lock);
901 pci_set_drvdata(pdev, dev);
902
903 np->pci_dev = pdev;
904
905 np->mii_if.dev = dev;
906 np->mii_if.mdio_read = mdio_read;
907 np->mii_if.mdio_write = mdio_write;
908 np->mii_if.phy_id_mask = 0x1f;
909 np->mii_if.reg_num_mask = 0x1f;
910
911 drv_flags = netdrv_tbl[chip_idx].drv_flags;
912
913 option = card_idx < MAX_UNITS ? options[card_idx] : 0;
914 if (dev->mem_start)
915 option = dev->mem_start;
916
917 /* The lower four bits are the media type. */
918 if (option & 0x200)
919 np->mii_if.full_duplex = 1;
920
921 if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0)
922 np->mii_if.full_duplex = 1;
923
924 if (np->mii_if.full_duplex)
925 np->mii_if.force_media = 1;
926 else
927 np->mii_if.force_media = 0;
928 np->speed100 = 1;
929
930 /* timer resolution is 128 * 0.8us */
931 np->intr_timer_ctrl = (((intr_latency * 10) / 1024) & IntrLatencyMask) |
932 Timer10X | EnableIntrMasking;
933
934 if (small_frames > 0) {
935 np->intr_timer_ctrl |= SmallFrameBypass;
936 switch (small_frames) {
937 case 1 ... 64:
938 np->intr_timer_ctrl |= SmallFrame64;
939 break;
940 case 65 ... 128:
941 np->intr_timer_ctrl |= SmallFrame128;
942 break;
943 case 129 ... 256:
944 np->intr_timer_ctrl |= SmallFrame256;
945 break;
946 default:
947 np->intr_timer_ctrl |= SmallFrame512;
948 if (small_frames > 512)
949 printk("Adjusting small_frames down to 512\n");
950 break;
951 }
952 }
953
954 /* The chip-specific entries in the device structure. */
955 dev->open = &netdev_open;
956 dev->hard_start_xmit = &start_tx;
Jeff Garzikfdecea62005-05-12 20:16:24 -0400957 dev->tx_timeout = tx_timeout;
958 dev->watchdog_timeo = TX_TIMEOUT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700959 init_poll(dev);
960 dev->stop = &netdev_close;
961 dev->get_stats = &get_stats;
962 dev->set_multicast_list = &set_rx_mode;
963 dev->do_ioctl = &netdev_ioctl;
964 SET_ETHTOOL_OPS(dev, &ethtool_ops);
965
966 if (mtu)
967 dev->mtu = mtu;
968
969 if (register_netdev(dev))
970 goto err_out_cleardev;
971
972 printk(KERN_INFO "%s: %s at %p, ",
973 dev->name, netdrv_tbl[chip_idx].name, base);
974 for (i = 0; i < 5; i++)
975 printk("%2.2x:", dev->dev_addr[i]);
976 printk("%2.2x, IRQ %d.\n", dev->dev_addr[i], irq);
977
978 if (drv_flags & CanHaveMII) {
979 int phy, phy_idx = 0;
980 int mii_status;
981 for (phy = 0; phy < 32 && phy_idx < PHY_CNT; phy++) {
982 mdio_write(dev, phy, MII_BMCR, BMCR_RESET);
983 mdelay(100);
984 boguscnt = 1000;
985 while (--boguscnt > 0)
986 if ((mdio_read(dev, phy, MII_BMCR) & BMCR_RESET) == 0)
987 break;
988 if (boguscnt == 0) {
Jeff Garzikfdecea62005-05-12 20:16:24 -0400989 printk("%s: PHY#%d reset never completed!\n", dev->name, phy);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700990 continue;
991 }
992 mii_status = mdio_read(dev, phy, MII_BMSR);
993 if (mii_status != 0) {
994 np->phys[phy_idx++] = phy;
995 np->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
996 printk(KERN_INFO "%s: MII PHY found at address %d, status "
997 "%#4.4x advertising %#4.4x.\n",
998 dev->name, phy, mii_status, np->mii_if.advertising);
999 /* there can be only one PHY on-board */
1000 break;
1001 }
1002 }
1003 np->phy_cnt = phy_idx;
1004 if (np->phy_cnt > 0)
1005 np->mii_if.phy_id = np->phys[0];
1006 else
1007 memset(&np->mii_if, 0, sizeof(np->mii_if));
1008 }
1009
1010 printk(KERN_INFO "%s: scatter-gather and hardware TCP cksumming %s.\n",
1011 dev->name, enable_hw_cksum ? "enabled" : "disabled");
1012 return 0;
1013
1014err_out_cleardev:
1015 pci_set_drvdata(pdev, NULL);
1016 iounmap(base);
1017err_out_free_res:
1018 pci_release_regions (pdev);
1019err_out_free_netdev:
1020 free_netdev(dev);
1021 return -ENODEV;
1022}
1023
1024
1025/* Read the MII Management Data I/O (MDIO) interfaces. */
1026static int mdio_read(struct net_device *dev, int phy_id, int location)
1027{
1028 struct netdev_private *np = netdev_priv(dev);
1029 void __iomem *mdio_addr = np->base + MIICtrl + (phy_id<<7) + (location<<2);
1030 int result, boguscnt=1000;
1031 /* ??? Should we add a busy-wait here? */
1032 do
1033 result = readl(mdio_addr);
1034 while ((result & 0xC0000000) != 0x80000000 && --boguscnt > 0);
1035 if (boguscnt == 0)
1036 return 0;
1037 if ((result & 0xffff) == 0xffff)
1038 return 0;
1039 return result & 0xffff;
1040}
1041
1042
1043static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
1044{
1045 struct netdev_private *np = netdev_priv(dev);
1046 void __iomem *mdio_addr = np->base + MIICtrl + (phy_id<<7) + (location<<2);
1047 writel(value, mdio_addr);
1048 /* The busy-wait will occur before a read. */
1049}
1050
1051
1052static int netdev_open(struct net_device *dev)
1053{
1054 struct netdev_private *np = netdev_priv(dev);
1055 void __iomem *ioaddr = np->base;
1056 int i, retval;
1057 size_t tx_done_q_size, rx_done_q_size, tx_ring_size, rx_ring_size;
1058
1059 /* Do we ever need to reset the chip??? */
Jeff Garzikfdecea62005-05-12 20:16:24 -04001060
Linus Torvalds1da177e2005-04-16 15:20:36 -07001061 retval = request_irq(dev->irq, &intr_handler, SA_SHIRQ, dev->name, dev);
1062 if (retval)
1063 return retval;
1064
1065 /* Disable the Rx and Tx, and reset the chip. */
1066 writel(0, ioaddr + GenCtrl);
1067 writel(1, ioaddr + PCIDeviceConfig);
1068 if (debug > 1)
1069 printk(KERN_DEBUG "%s: netdev_open() irq %d.\n",
1070 dev->name, dev->irq);
1071
1072 /* Allocate the various queues. */
1073 if (np->queue_mem == 0) {
1074 tx_done_q_size = ((sizeof(struct tx_done_desc) * DONE_Q_SIZE + QUEUE_ALIGN - 1) / QUEUE_ALIGN) * QUEUE_ALIGN;
1075 rx_done_q_size = ((sizeof(rx_done_desc) * DONE_Q_SIZE + QUEUE_ALIGN - 1) / QUEUE_ALIGN) * QUEUE_ALIGN;
1076 tx_ring_size = ((sizeof(starfire_tx_desc) * TX_RING_SIZE + QUEUE_ALIGN - 1) / QUEUE_ALIGN) * QUEUE_ALIGN;
1077 rx_ring_size = sizeof(struct starfire_rx_desc) * RX_RING_SIZE;
1078 np->queue_mem_size = tx_done_q_size + rx_done_q_size + tx_ring_size + rx_ring_size;
1079 np->queue_mem = pci_alloc_consistent(np->pci_dev, np->queue_mem_size, &np->queue_mem_dma);
1080 if (np->queue_mem == 0)
1081 return -ENOMEM;
1082
1083 np->tx_done_q = np->queue_mem;
1084 np->tx_done_q_dma = np->queue_mem_dma;
1085 np->rx_done_q = (void *) np->tx_done_q + tx_done_q_size;
1086 np->rx_done_q_dma = np->tx_done_q_dma + tx_done_q_size;
1087 np->tx_ring = (void *) np->rx_done_q + rx_done_q_size;
1088 np->tx_ring_dma = np->rx_done_q_dma + rx_done_q_size;
1089 np->rx_ring = (void *) np->tx_ring + tx_ring_size;
1090 np->rx_ring_dma = np->tx_ring_dma + tx_ring_size;
1091 }
1092
1093 /* Start with no carrier, it gets adjusted later */
1094 netif_carrier_off(dev);
1095 init_ring(dev);
1096 /* Set the size of the Rx buffers. */
1097 writel((np->rx_buf_sz << RxBufferLenShift) |
1098 (0 << RxMinDescrThreshShift) |
1099 RxPrefetchMode | RxVariableQ |
1100 RX_Q_ENTRIES |
1101 RX_DESC_Q_ADDR_SIZE | RX_DESC_ADDR_SIZE |
1102 RxDescSpace4,
1103 ioaddr + RxDescQCtrl);
1104
1105 /* Set up the Rx DMA controller. */
1106 writel(RxChecksumIgnore |
1107 (0 << RxEarlyIntThreshShift) |
1108 (6 << RxHighPrioThreshShift) |
1109 ((DMA_BURST_SIZE / 32) << RxBurstSizeShift),
1110 ioaddr + RxDMACtrl);
1111
1112 /* Set Tx descriptor */
1113 writel((2 << TxHiPriFIFOThreshShift) |
1114 (0 << TxPadLenShift) |
1115 ((DMA_BURST_SIZE / 32) << TxDMABurstSizeShift) |
1116 TX_DESC_Q_ADDR_SIZE |
1117 TX_DESC_SPACING | TX_DESC_TYPE,
1118 ioaddr + TxDescCtrl);
1119
1120 writel( (np->queue_mem_dma >> 16) >> 16, ioaddr + RxDescQHiAddr);
1121 writel( (np->queue_mem_dma >> 16) >> 16, ioaddr + TxRingHiAddr);
1122 writel( (np->queue_mem_dma >> 16) >> 16, ioaddr + CompletionHiAddr);
1123 writel(np->rx_ring_dma, ioaddr + RxDescQAddr);
1124 writel(np->tx_ring_dma, ioaddr + TxRingPtr);
1125
1126 writel(np->tx_done_q_dma, ioaddr + TxCompletionAddr);
1127 writel(np->rx_done_q_dma |
1128 RxComplType |
1129 (0 << RxComplThreshShift),
1130 ioaddr + RxCompletionAddr);
1131
1132 if (debug > 1)
1133 printk(KERN_DEBUG "%s: Filling in the station address.\n", dev->name);
1134
1135 /* Fill both the Tx SA register and the Rx perfect filter. */
1136 for (i = 0; i < 6; i++)
1137 writeb(dev->dev_addr[i], ioaddr + TxStationAddr + 5 - i);
1138 /* The first entry is special because it bypasses the VLAN filter.
1139 Don't use it. */
1140 writew(0, ioaddr + PerfFilterTable);
1141 writew(0, ioaddr + PerfFilterTable + 4);
1142 writew(0, ioaddr + PerfFilterTable + 8);
1143 for (i = 1; i < 16; i++) {
1144 u16 *eaddrs = (u16 *)dev->dev_addr;
1145 void __iomem *setup_frm = ioaddr + PerfFilterTable + i * 16;
1146 writew(cpu_to_be16(eaddrs[2]), setup_frm); setup_frm += 4;
1147 writew(cpu_to_be16(eaddrs[1]), setup_frm); setup_frm += 4;
1148 writew(cpu_to_be16(eaddrs[0]), setup_frm); setup_frm += 8;
1149 }
1150
1151 /* Initialize other registers. */
1152 /* Configure the PCI bus bursts and FIFO thresholds. */
1153 np->tx_mode = TxFlowEnable|RxFlowEnable|PadEnable; /* modified when link is up. */
1154 writel(MiiSoftReset | np->tx_mode, ioaddr + TxMode);
1155 udelay(1000);
1156 writel(np->tx_mode, ioaddr + TxMode);
1157 np->tx_threshold = 4;
1158 writel(np->tx_threshold, ioaddr + TxThreshold);
1159
1160 writel(np->intr_timer_ctrl, ioaddr + IntrTimerCtrl);
1161
Linus Torvalds1da177e2005-04-16 15:20:36 -07001162 netif_start_queue(dev);
1163
1164 if (debug > 1)
1165 printk(KERN_DEBUG "%s: Setting the Rx and Tx modes.\n", dev->name);
1166 set_rx_mode(dev);
1167
1168 np->mii_if.advertising = mdio_read(dev, np->phys[0], MII_ADVERTISE);
1169 check_duplex(dev);
1170
1171 /* Enable GPIO interrupts on link change */
1172 writel(0x0f00ff00, ioaddr + GPIOCtrl);
1173
1174 /* Set the interrupt mask */
1175 writel(IntrRxDone | IntrRxEmpty | IntrDMAErr |
1176 IntrTxDMADone | IntrStatsMax | IntrLinkChange |
1177 IntrRxGFPDead | IntrNoTxCsum | IntrTxBadID,
1178 ioaddr + IntrEnable);
1179 /* Enable PCI interrupts. */
1180 writel(0x00800000 | readl(ioaddr + PCIDeviceConfig),
1181 ioaddr + PCIDeviceConfig);
1182
1183#ifdef VLAN_SUPPORT
1184 /* Set VLAN type to 802.1q */
1185 writel(ETH_P_8021Q, ioaddr + VlanType);
1186#endif /* VLAN_SUPPORT */
1187
Linus Torvalds1da177e2005-04-16 15:20:36 -07001188 /* Load Rx/Tx firmware into the frame processors */
1189 for (i = 0; i < FIRMWARE_RX_SIZE * 2; i++)
1190 writel(firmware_rx[i], ioaddr + RxGfpMem + i * 4);
1191 for (i = 0; i < FIRMWARE_TX_SIZE * 2; i++)
1192 writel(firmware_tx[i], ioaddr + TxGfpMem + i * 4);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001193 if (enable_hw_cksum)
1194 /* Enable the Rx and Tx units, and the Rx/Tx frame processors. */
1195 writel(TxEnable|TxGFPEnable|RxEnable|RxGFPEnable, ioaddr + GenCtrl);
1196 else
1197 /* Enable the Rx and Tx units only. */
1198 writel(TxEnable|RxEnable, ioaddr + GenCtrl);
1199
1200 if (debug > 1)
1201 printk(KERN_DEBUG "%s: Done netdev_open().\n",
1202 dev->name);
1203
1204 return 0;
1205}
1206
1207
1208static void check_duplex(struct net_device *dev)
1209{
1210 struct netdev_private *np = netdev_priv(dev);
1211 u16 reg0;
1212 int silly_count = 1000;
1213
1214 mdio_write(dev, np->phys[0], MII_ADVERTISE, np->mii_if.advertising);
1215 mdio_write(dev, np->phys[0], MII_BMCR, BMCR_RESET);
1216 udelay(500);
1217 while (--silly_count && mdio_read(dev, np->phys[0], MII_BMCR) & BMCR_RESET)
1218 /* do nothing */;
1219 if (!silly_count) {
1220 printk("%s: MII reset failed!\n", dev->name);
1221 return;
1222 }
1223
1224 reg0 = mdio_read(dev, np->phys[0], MII_BMCR);
1225
1226 if (!np->mii_if.force_media) {
1227 reg0 |= BMCR_ANENABLE | BMCR_ANRESTART;
1228 } else {
1229 reg0 &= ~(BMCR_ANENABLE | BMCR_ANRESTART);
1230 if (np->speed100)
1231 reg0 |= BMCR_SPEED100;
1232 if (np->mii_if.full_duplex)
1233 reg0 |= BMCR_FULLDPLX;
1234 printk(KERN_DEBUG "%s: Link forced to %sMbit %s-duplex\n",
1235 dev->name,
1236 np->speed100 ? "100" : "10",
1237 np->mii_if.full_duplex ? "full" : "half");
1238 }
1239 mdio_write(dev, np->phys[0], MII_BMCR, reg0);
1240}
1241
1242
1243static void tx_timeout(struct net_device *dev)
1244{
1245 struct netdev_private *np = netdev_priv(dev);
1246 void __iomem *ioaddr = np->base;
1247 int old_debug;
1248
1249 printk(KERN_WARNING "%s: Transmit timed out, status %#8.8x, "
1250 "resetting...\n", dev->name, (int) readl(ioaddr + IntrStatus));
1251
1252 /* Perhaps we should reinitialize the hardware here. */
1253
1254 /*
1255 * Stop and restart the interface.
1256 * Cheat and increase the debug level temporarily.
1257 */
1258 old_debug = debug;
1259 debug = 2;
1260 netdev_close(dev);
1261 netdev_open(dev);
1262 debug = old_debug;
1263
1264 /* Trigger an immediate transmit demand. */
1265
1266 dev->trans_start = jiffies;
1267 np->stats.tx_errors++;
1268 netif_wake_queue(dev);
1269}
1270
1271
1272/* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1273static void init_ring(struct net_device *dev)
1274{
1275 struct netdev_private *np = netdev_priv(dev);
1276 int i;
1277
1278 np->cur_rx = np->cur_tx = np->reap_tx = 0;
1279 np->dirty_rx = np->dirty_tx = np->rx_done = np->tx_done = 0;
1280
1281 np->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
1282
1283 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1284 for (i = 0; i < RX_RING_SIZE; i++) {
1285 struct sk_buff *skb = dev_alloc_skb(np->rx_buf_sz);
1286 np->rx_info[i].skb = skb;
1287 if (skb == NULL)
1288 break;
David S. Miller689be432005-06-28 15:25:31 -07001289 np->rx_info[i].mapping = pci_map_single(np->pci_dev, skb->data, np->rx_buf_sz, PCI_DMA_FROMDEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001290 skb->dev = dev; /* Mark as being used by this device. */
1291 /* Grrr, we cannot offset to correctly align the IP header. */
1292 np->rx_ring[i].rxaddr = cpu_to_dma(np->rx_info[i].mapping | RxDescValid);
1293 }
1294 writew(i - 1, np->base + RxDescQIdx);
1295 np->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1296
1297 /* Clear the remainder of the Rx buffer ring. */
1298 for ( ; i < RX_RING_SIZE; i++) {
1299 np->rx_ring[i].rxaddr = 0;
1300 np->rx_info[i].skb = NULL;
1301 np->rx_info[i].mapping = 0;
1302 }
1303 /* Mark the last entry as wrapping the ring. */
1304 np->rx_ring[RX_RING_SIZE - 1].rxaddr |= cpu_to_dma(RxDescEndRing);
1305
1306 /* Clear the completion rings. */
1307 for (i = 0; i < DONE_Q_SIZE; i++) {
1308 np->rx_done_q[i].status = 0;
1309 np->tx_done_q[i].status = 0;
1310 }
1311
1312 for (i = 0; i < TX_RING_SIZE; i++)
1313 memset(&np->tx_info[i], 0, sizeof(np->tx_info[i]));
1314
1315 return;
1316}
1317
1318
1319static int start_tx(struct sk_buff *skb, struct net_device *dev)
1320{
1321 struct netdev_private *np = netdev_priv(dev);
1322 unsigned int entry;
1323 u32 status;
1324 int i;
1325
Linus Torvalds1da177e2005-04-16 15:20:36 -07001326 /*
1327 * be cautious here, wrapping the queue has weird semantics
1328 * and we may not have enough slots even when it seems we do.
1329 */
1330 if ((np->cur_tx - np->dirty_tx) + skb_num_frags(skb) * 2 > TX_RING_SIZE) {
1331 netif_stop_queue(dev);
1332 return 1;
1333 }
1334
1335#if defined(ZEROCOPY) && defined(HAS_BROKEN_FIRMWARE)
1336 {
1337 int has_bad_length = 0;
1338
1339 if (skb_first_frag_len(skb) == 1)
1340 has_bad_length = 1;
1341 else {
1342 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++)
1343 if (skb_shinfo(skb)->frags[i].size == 1) {
1344 has_bad_length = 1;
1345 break;
1346 }
1347 }
1348
1349 if (has_bad_length)
Jeff Garzikfdecea62005-05-12 20:16:24 -04001350 skb_checksum_help(skb, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001351 }
1352#endif /* ZEROCOPY && HAS_BROKEN_FIRMWARE */
1353
1354 entry = np->cur_tx % TX_RING_SIZE;
1355 for (i = 0; i < skb_num_frags(skb); i++) {
1356 int wrap_ring = 0;
1357 status = TxDescID;
1358
1359 if (i == 0) {
1360 np->tx_info[entry].skb = skb;
1361 status |= TxCRCEn;
1362 if (entry >= TX_RING_SIZE - skb_num_frags(skb)) {
1363 status |= TxRingWrap;
1364 wrap_ring = 1;
1365 }
1366 if (np->reap_tx) {
1367 status |= TxDescIntr;
1368 np->reap_tx = 0;
1369 }
1370 if (skb->ip_summed == CHECKSUM_HW) {
1371 status |= TxCalTCP;
1372 np->stats.tx_compressed++;
1373 }
1374 status |= skb_first_frag_len(skb) | (skb_num_frags(skb) << 16);
1375
1376 np->tx_info[entry].mapping =
1377 pci_map_single(np->pci_dev, skb->data, skb_first_frag_len(skb), PCI_DMA_TODEVICE);
1378 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001379 skb_frag_t *this_frag = &skb_shinfo(skb)->frags[i - 1];
1380 status |= this_frag->size;
1381 np->tx_info[entry].mapping =
1382 pci_map_single(np->pci_dev, page_address(this_frag->page) + this_frag->page_offset, this_frag->size, PCI_DMA_TODEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001383 }
1384
1385 np->tx_ring[entry].addr = cpu_to_dma(np->tx_info[entry].mapping);
1386 np->tx_ring[entry].status = cpu_to_le32(status);
1387 if (debug > 3)
1388 printk(KERN_DEBUG "%s: Tx #%d/#%d slot %d status %#8.8x.\n",
1389 dev->name, np->cur_tx, np->dirty_tx,
1390 entry, status);
1391 if (wrap_ring) {
1392 np->tx_info[entry].used_slots = TX_RING_SIZE - entry;
1393 np->cur_tx += np->tx_info[entry].used_slots;
1394 entry = 0;
1395 } else {
1396 np->tx_info[entry].used_slots = 1;
1397 np->cur_tx += np->tx_info[entry].used_slots;
1398 entry++;
1399 }
1400 /* scavenge the tx descriptors twice per TX_RING_SIZE */
1401 if (np->cur_tx % (TX_RING_SIZE / 2) == 0)
1402 np->reap_tx = 1;
1403 }
1404
1405 /* Non-x86: explicitly flush descriptor cache lines here. */
1406 /* Ensure all descriptors are written back before the transmit is
1407 initiated. - Jes */
1408 wmb();
1409
1410 /* Update the producer index. */
1411 writel(entry * (sizeof(starfire_tx_desc) / 8), np->base + TxProducerIdx);
1412
1413 /* 4 is arbitrary, but should be ok */
1414 if ((np->cur_tx - np->dirty_tx) + 4 > TX_RING_SIZE)
1415 netif_stop_queue(dev);
1416
1417 dev->trans_start = jiffies;
1418
1419 return 0;
1420}
1421
1422
1423/* The interrupt handler does all of the Rx thread work and cleans up
1424 after the Tx thread. */
1425static irqreturn_t intr_handler(int irq, void *dev_instance, struct pt_regs *rgs)
1426{
1427 struct net_device *dev = dev_instance;
1428 struct netdev_private *np = netdev_priv(dev);
1429 void __iomem *ioaddr = np->base;
1430 int boguscnt = max_interrupt_work;
1431 int consumer;
1432 int tx_status;
1433 int handled = 0;
1434
1435 do {
1436 u32 intr_status = readl(ioaddr + IntrClear);
1437
1438 if (debug > 4)
1439 printk(KERN_DEBUG "%s: Interrupt status %#8.8x.\n",
1440 dev->name, intr_status);
1441
1442 if (intr_status == 0 || intr_status == (u32) -1)
1443 break;
1444
1445 handled = 1;
1446
1447 if (intr_status & (IntrRxDone | IntrRxEmpty))
1448 netdev_rx(dev, ioaddr);
1449
1450 /* Scavenge the skbuff list based on the Tx-done queue.
1451 There are redundant checks here that may be cleaned up
1452 after the driver has proven to be reliable. */
1453 consumer = readl(ioaddr + TxConsumerIdx);
1454 if (debug > 3)
1455 printk(KERN_DEBUG "%s: Tx Consumer index is %d.\n",
1456 dev->name, consumer);
1457
1458 while ((tx_status = le32_to_cpu(np->tx_done_q[np->tx_done].status)) != 0) {
1459 if (debug > 3)
1460 printk(KERN_DEBUG "%s: Tx completion #%d entry %d is %#8.8x.\n",
1461 dev->name, np->dirty_tx, np->tx_done, tx_status);
1462 if ((tx_status & 0xe0000000) == 0xa0000000) {
1463 np->stats.tx_packets++;
1464 } else if ((tx_status & 0xe0000000) == 0x80000000) {
1465 u16 entry = (tx_status & 0x7fff) / sizeof(starfire_tx_desc);
1466 struct sk_buff *skb = np->tx_info[entry].skb;
1467 np->tx_info[entry].skb = NULL;
1468 pci_unmap_single(np->pci_dev,
1469 np->tx_info[entry].mapping,
1470 skb_first_frag_len(skb),
1471 PCI_DMA_TODEVICE);
1472 np->tx_info[entry].mapping = 0;
1473 np->dirty_tx += np->tx_info[entry].used_slots;
1474 entry = (entry + np->tx_info[entry].used_slots) % TX_RING_SIZE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001475 {
1476 int i;
1477 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1478 pci_unmap_single(np->pci_dev,
1479 np->tx_info[entry].mapping,
1480 skb_shinfo(skb)->frags[i].size,
1481 PCI_DMA_TODEVICE);
1482 np->dirty_tx++;
1483 entry++;
1484 }
1485 }
Jeff Garzikfdecea62005-05-12 20:16:24 -04001486
Linus Torvalds1da177e2005-04-16 15:20:36 -07001487 dev_kfree_skb_irq(skb);
1488 }
1489 np->tx_done_q[np->tx_done].status = 0;
1490 np->tx_done = (np->tx_done + 1) % DONE_Q_SIZE;
1491 }
1492 writew(np->tx_done, ioaddr + CompletionQConsumerIdx + 2);
1493
1494 if (netif_queue_stopped(dev) &&
1495 (np->cur_tx - np->dirty_tx + 4 < TX_RING_SIZE)) {
1496 /* The ring is no longer full, wake the queue. */
1497 netif_wake_queue(dev);
1498 }
1499
1500 /* Stats overflow */
1501 if (intr_status & IntrStatsMax)
1502 get_stats(dev);
1503
1504 /* Media change interrupt. */
1505 if (intr_status & IntrLinkChange)
1506 netdev_media_change(dev);
1507
1508 /* Abnormal error summary/uncommon events handlers. */
1509 if (intr_status & IntrAbnormalSummary)
1510 netdev_error(dev, intr_status);
1511
1512 if (--boguscnt < 0) {
1513 if (debug > 1)
1514 printk(KERN_WARNING "%s: Too much work at interrupt, "
1515 "status=%#8.8x.\n",
1516 dev->name, intr_status);
1517 break;
1518 }
1519 } while (1);
1520
1521 if (debug > 4)
1522 printk(KERN_DEBUG "%s: exiting interrupt, status=%#8.8x.\n",
1523 dev->name, (int) readl(ioaddr + IntrStatus));
1524 return IRQ_RETVAL(handled);
1525}
1526
1527
1528/* This routine is logically part of the interrupt/poll handler, but separated
1529 for clarity, code sharing between NAPI/non-NAPI, and better register allocation. */
1530static int __netdev_rx(struct net_device *dev, int *quota)
1531{
1532 struct netdev_private *np = netdev_priv(dev);
1533 u32 desc_status;
1534 int retcode = 0;
1535
1536 /* If EOP is set on the next entry, it's a new packet. Send it up. */
1537 while ((desc_status = le32_to_cpu(np->rx_done_q[np->rx_done].status)) != 0) {
1538 struct sk_buff *skb;
1539 u16 pkt_len;
1540 int entry;
1541 rx_done_desc *desc = &np->rx_done_q[np->rx_done];
1542
1543 if (debug > 4)
1544 printk(KERN_DEBUG " netdev_rx() status of %d was %#8.8x.\n", np->rx_done, desc_status);
1545 if (!(desc_status & RxOK)) {
Jeff Garzikfdecea62005-05-12 20:16:24 -04001546 /* There was an error. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001547 if (debug > 2)
1548 printk(KERN_DEBUG " netdev_rx() Rx error was %#8.8x.\n", desc_status);
1549 np->stats.rx_errors++;
1550 if (desc_status & RxFIFOErr)
1551 np->stats.rx_fifo_errors++;
1552 goto next_rx;
1553 }
1554
1555 if (*quota <= 0) { /* out of rx quota */
1556 retcode = 1;
1557 goto out;
1558 }
1559 (*quota)--;
1560
1561 pkt_len = desc_status; /* Implicitly Truncate */
1562 entry = (desc_status >> 16) & 0x7ff;
1563
1564 if (debug > 4)
1565 printk(KERN_DEBUG " netdev_rx() normal Rx pkt length %d, quota %d.\n", pkt_len, *quota);
1566 /* Check if the packet is long enough to accept without copying
1567 to a minimally-sized skbuff. */
1568 if (pkt_len < rx_copybreak
1569 && (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
1570 skb->dev = dev;
1571 skb_reserve(skb, 2); /* 16 byte align the IP header */
1572 pci_dma_sync_single_for_cpu(np->pci_dev,
1573 np->rx_info[entry].mapping,
1574 pkt_len, PCI_DMA_FROMDEVICE);
David S. Miller689be432005-06-28 15:25:31 -07001575 eth_copy_and_sum(skb, np->rx_info[entry].skb->data, pkt_len, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001576 pci_dma_sync_single_for_device(np->pci_dev,
1577 np->rx_info[entry].mapping,
1578 pkt_len, PCI_DMA_FROMDEVICE);
1579 skb_put(skb, pkt_len);
1580 } else {
1581 pci_unmap_single(np->pci_dev, np->rx_info[entry].mapping, np->rx_buf_sz, PCI_DMA_FROMDEVICE);
1582 skb = np->rx_info[entry].skb;
1583 skb_put(skb, pkt_len);
1584 np->rx_info[entry].skb = NULL;
1585 np->rx_info[entry].mapping = 0;
1586 }
1587#ifndef final_version /* Remove after testing. */
1588 /* You will want this info for the initial debug. */
1589 if (debug > 5)
1590 printk(KERN_DEBUG " Rx data %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:"
1591 "%2.2x %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x %2.2x%2.2x.\n",
1592 skb->data[0], skb->data[1], skb->data[2], skb->data[3],
1593 skb->data[4], skb->data[5], skb->data[6], skb->data[7],
1594 skb->data[8], skb->data[9], skb->data[10],
1595 skb->data[11], skb->data[12], skb->data[13]);
1596#endif
1597
1598 skb->protocol = eth_type_trans(skb, dev);
Jeff Garzikfdecea62005-05-12 20:16:24 -04001599#ifdef VLAN_SUPPORT
Linus Torvalds1da177e2005-04-16 15:20:36 -07001600 if (debug > 4)
1601 printk(KERN_DEBUG " netdev_rx() status2 of %d was %#4.4x.\n", np->rx_done, le16_to_cpu(desc->status2));
1602#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001603 if (le16_to_cpu(desc->status2) & 0x0100) {
1604 skb->ip_summed = CHECKSUM_UNNECESSARY;
1605 np->stats.rx_compressed++;
1606 }
1607 /*
1608 * This feature doesn't seem to be working, at least
1609 * with the two firmware versions I have. If the GFP sees
1610 * an IP fragment, it either ignores it completely, or reports
1611 * "bad checksum" on it.
1612 *
1613 * Maybe I missed something -- corrections are welcome.
1614 * Until then, the printk stays. :-) -Ion
1615 */
1616 else if (le16_to_cpu(desc->status2) & 0x0040) {
1617 skb->ip_summed = CHECKSUM_HW;
1618 skb->csum = le16_to_cpu(desc->csum);
1619 printk(KERN_DEBUG "%s: checksum_hw, status2 = %#x\n", dev->name, le16_to_cpu(desc->status2));
1620 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001621#ifdef VLAN_SUPPORT
1622 if (np->vlgrp && le16_to_cpu(desc->status2) & 0x0200) {
1623 if (debug > 4)
1624 printk(KERN_DEBUG " netdev_rx() vlanid = %d\n", le16_to_cpu(desc->vlanid));
1625 /* vlan_netdev_receive_skb() expects a packet with the VLAN tag stripped out */
1626 vlan_netdev_receive_skb(skb, np->vlgrp, le16_to_cpu(desc->vlanid) & VLAN_VID_MASK);
1627 } else
1628#endif /* VLAN_SUPPORT */
1629 netdev_receive_skb(skb);
1630 dev->last_rx = jiffies;
1631 np->stats.rx_packets++;
1632
1633 next_rx:
1634 np->cur_rx++;
1635 desc->status = 0;
1636 np->rx_done = (np->rx_done + 1) % DONE_Q_SIZE;
1637 }
1638 writew(np->rx_done, np->base + CompletionQConsumerIdx);
1639
1640 out:
1641 refill_rx_ring(dev);
1642 if (debug > 5)
1643 printk(KERN_DEBUG " exiting netdev_rx(): %d, status of %d was %#8.8x.\n",
1644 retcode, np->rx_done, desc_status);
1645 return retcode;
1646}
1647
1648
1649#ifdef HAVE_NETDEV_POLL
1650static int netdev_poll(struct net_device *dev, int *budget)
1651{
1652 u32 intr_status;
1653 struct netdev_private *np = netdev_priv(dev);
1654 void __iomem *ioaddr = np->base;
1655 int retcode = 0, quota = dev->quota;
1656
1657 do {
1658 writel(IntrRxDone | IntrRxEmpty, ioaddr + IntrClear);
1659
1660 retcode = __netdev_rx(dev, &quota);
1661 *budget -= (dev->quota - quota);
1662 dev->quota = quota;
1663 if (retcode)
1664 goto out;
1665
1666 intr_status = readl(ioaddr + IntrStatus);
1667 } while (intr_status & (IntrRxDone | IntrRxEmpty));
1668
1669 netif_rx_complete(dev);
1670 intr_status = readl(ioaddr + IntrEnable);
1671 intr_status |= IntrRxDone | IntrRxEmpty;
1672 writel(intr_status, ioaddr + IntrEnable);
1673
1674 out:
1675 if (debug > 5)
1676 printk(KERN_DEBUG " exiting netdev_poll(): %d.\n", retcode);
1677
1678 /* Restart Rx engine if stopped. */
1679 return retcode;
1680}
1681#endif /* HAVE_NETDEV_POLL */
1682
1683
1684static void refill_rx_ring(struct net_device *dev)
1685{
1686 struct netdev_private *np = netdev_priv(dev);
1687 struct sk_buff *skb;
1688 int entry = -1;
1689
1690 /* Refill the Rx ring buffers. */
1691 for (; np->cur_rx - np->dirty_rx > 0; np->dirty_rx++) {
1692 entry = np->dirty_rx % RX_RING_SIZE;
1693 if (np->rx_info[entry].skb == NULL) {
1694 skb = dev_alloc_skb(np->rx_buf_sz);
1695 np->rx_info[entry].skb = skb;
1696 if (skb == NULL)
1697 break; /* Better luck next round. */
1698 np->rx_info[entry].mapping =
David S. Miller689be432005-06-28 15:25:31 -07001699 pci_map_single(np->pci_dev, skb->data, np->rx_buf_sz, PCI_DMA_FROMDEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001700 skb->dev = dev; /* Mark as being used by this device. */
1701 np->rx_ring[entry].rxaddr =
1702 cpu_to_dma(np->rx_info[entry].mapping | RxDescValid);
1703 }
1704 if (entry == RX_RING_SIZE - 1)
1705 np->rx_ring[entry].rxaddr |= cpu_to_dma(RxDescEndRing);
1706 }
1707 if (entry >= 0)
1708 writew(entry, np->base + RxDescQIdx);
1709}
1710
1711
1712static void netdev_media_change(struct net_device *dev)
1713{
1714 struct netdev_private *np = netdev_priv(dev);
1715 void __iomem *ioaddr = np->base;
1716 u16 reg0, reg1, reg4, reg5;
1717 u32 new_tx_mode;
1718 u32 new_intr_timer_ctrl;
1719
1720 /* reset status first */
1721 mdio_read(dev, np->phys[0], MII_BMCR);
1722 mdio_read(dev, np->phys[0], MII_BMSR);
1723
1724 reg0 = mdio_read(dev, np->phys[0], MII_BMCR);
1725 reg1 = mdio_read(dev, np->phys[0], MII_BMSR);
1726
1727 if (reg1 & BMSR_LSTATUS) {
1728 /* link is up */
1729 if (reg0 & BMCR_ANENABLE) {
1730 /* autonegotiation is enabled */
1731 reg4 = mdio_read(dev, np->phys[0], MII_ADVERTISE);
1732 reg5 = mdio_read(dev, np->phys[0], MII_LPA);
1733 if (reg4 & ADVERTISE_100FULL && reg5 & LPA_100FULL) {
1734 np->speed100 = 1;
1735 np->mii_if.full_duplex = 1;
1736 } else if (reg4 & ADVERTISE_100HALF && reg5 & LPA_100HALF) {
1737 np->speed100 = 1;
1738 np->mii_if.full_duplex = 0;
1739 } else if (reg4 & ADVERTISE_10FULL && reg5 & LPA_10FULL) {
1740 np->speed100 = 0;
1741 np->mii_if.full_duplex = 1;
1742 } else {
1743 np->speed100 = 0;
1744 np->mii_if.full_duplex = 0;
1745 }
1746 } else {
1747 /* autonegotiation is disabled */
1748 if (reg0 & BMCR_SPEED100)
1749 np->speed100 = 1;
1750 else
1751 np->speed100 = 0;
1752 if (reg0 & BMCR_FULLDPLX)
1753 np->mii_if.full_duplex = 1;
1754 else
1755 np->mii_if.full_duplex = 0;
1756 }
1757 netif_carrier_on(dev);
1758 printk(KERN_DEBUG "%s: Link is up, running at %sMbit %s-duplex\n",
1759 dev->name,
1760 np->speed100 ? "100" : "10",
1761 np->mii_if.full_duplex ? "full" : "half");
1762
1763 new_tx_mode = np->tx_mode & ~FullDuplex; /* duplex setting */
1764 if (np->mii_if.full_duplex)
1765 new_tx_mode |= FullDuplex;
1766 if (np->tx_mode != new_tx_mode) {
1767 np->tx_mode = new_tx_mode;
1768 writel(np->tx_mode | MiiSoftReset, ioaddr + TxMode);
1769 udelay(1000);
1770 writel(np->tx_mode, ioaddr + TxMode);
1771 }
1772
1773 new_intr_timer_ctrl = np->intr_timer_ctrl & ~Timer10X;
1774 if (np->speed100)
1775 new_intr_timer_ctrl |= Timer10X;
1776 if (np->intr_timer_ctrl != new_intr_timer_ctrl) {
1777 np->intr_timer_ctrl = new_intr_timer_ctrl;
1778 writel(new_intr_timer_ctrl, ioaddr + IntrTimerCtrl);
1779 }
1780 } else {
1781 netif_carrier_off(dev);
1782 printk(KERN_DEBUG "%s: Link is down\n", dev->name);
1783 }
1784}
1785
1786
1787static void netdev_error(struct net_device *dev, int intr_status)
1788{
1789 struct netdev_private *np = netdev_priv(dev);
1790
1791 /* Came close to underrunning the Tx FIFO, increase threshold. */
1792 if (intr_status & IntrTxDataLow) {
1793 if (np->tx_threshold <= PKT_BUF_SZ / 16) {
1794 writel(++np->tx_threshold, np->base + TxThreshold);
1795 printk(KERN_NOTICE "%s: PCI bus congestion, increasing Tx FIFO threshold to %d bytes\n",
1796 dev->name, np->tx_threshold * 16);
1797 } else
1798 printk(KERN_WARNING "%s: PCI Tx underflow -- adapter is probably malfunctioning\n", dev->name);
1799 }
1800 if (intr_status & IntrRxGFPDead) {
1801 np->stats.rx_fifo_errors++;
1802 np->stats.rx_errors++;
1803 }
1804 if (intr_status & (IntrNoTxCsum | IntrDMAErr)) {
1805 np->stats.tx_fifo_errors++;
1806 np->stats.tx_errors++;
1807 }
1808 if ((intr_status & ~(IntrNormalMask | IntrAbnormalSummary | IntrLinkChange | IntrStatsMax | IntrTxDataLow | IntrRxGFPDead | IntrNoTxCsum | IntrPCIPad)) && debug)
1809 printk(KERN_ERR "%s: Something Wicked happened! %#8.8x.\n",
1810 dev->name, intr_status);
1811}
1812
1813
1814static struct net_device_stats *get_stats(struct net_device *dev)
1815{
1816 struct netdev_private *np = netdev_priv(dev);
1817 void __iomem *ioaddr = np->base;
1818
1819 /* This adapter architecture needs no SMP locks. */
1820 np->stats.tx_bytes = readl(ioaddr + 0x57010);
1821 np->stats.rx_bytes = readl(ioaddr + 0x57044);
1822 np->stats.tx_packets = readl(ioaddr + 0x57000);
1823 np->stats.tx_aborted_errors =
1824 readl(ioaddr + 0x57024) + readl(ioaddr + 0x57028);
1825 np->stats.tx_window_errors = readl(ioaddr + 0x57018);
1826 np->stats.collisions =
1827 readl(ioaddr + 0x57004) + readl(ioaddr + 0x57008);
1828
1829 /* The chip only need report frame silently dropped. */
1830 np->stats.rx_dropped += readw(ioaddr + RxDMAStatus);
1831 writew(0, ioaddr + RxDMAStatus);
1832 np->stats.rx_crc_errors = readl(ioaddr + 0x5703C);
1833 np->stats.rx_frame_errors = readl(ioaddr + 0x57040);
1834 np->stats.rx_length_errors = readl(ioaddr + 0x57058);
1835 np->stats.rx_missed_errors = readl(ioaddr + 0x5707C);
1836
1837 return &np->stats;
1838}
1839
1840
Linus Torvalds1da177e2005-04-16 15:20:36 -07001841static void set_rx_mode(struct net_device *dev)
1842{
1843 struct netdev_private *np = netdev_priv(dev);
1844 void __iomem *ioaddr = np->base;
1845 u32 rx_mode = MinVLANPrio;
1846 struct dev_mc_list *mclist;
1847 int i;
1848#ifdef VLAN_SUPPORT
1849
1850 rx_mode |= VlanMode;
1851 if (np->vlgrp) {
1852 int vlan_count = 0;
1853 void __iomem *filter_addr = ioaddr + HashTable + 8;
1854 for (i = 0; i < VLAN_VID_MASK; i++) {
1855 if (np->vlgrp->vlan_devices[i]) {
1856 if (vlan_count >= 32)
1857 break;
1858 writew(cpu_to_be16(i), filter_addr);
1859 filter_addr += 16;
1860 vlan_count++;
1861 }
1862 }
1863 if (i == VLAN_VID_MASK) {
1864 rx_mode |= PerfectFilterVlan;
1865 while (vlan_count < 32) {
1866 writew(0, filter_addr);
1867 filter_addr += 16;
1868 vlan_count++;
1869 }
1870 }
1871 }
1872#endif /* VLAN_SUPPORT */
1873
1874 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1875 rx_mode |= AcceptAll;
1876 } else if ((dev->mc_count > multicast_filter_limit)
1877 || (dev->flags & IFF_ALLMULTI)) {
1878 /* Too many to match, or accept all multicasts. */
1879 rx_mode |= AcceptBroadcast|AcceptAllMulticast|PerfectFilter;
1880 } else if (dev->mc_count <= 14) {
1881 /* Use the 16 element perfect filter, skip first two entries. */
1882 void __iomem *filter_addr = ioaddr + PerfFilterTable + 2 * 16;
1883 u16 *eaddrs;
1884 for (i = 2, mclist = dev->mc_list; mclist && i < dev->mc_count + 2;
1885 i++, mclist = mclist->next) {
1886 eaddrs = (u16 *)mclist->dmi_addr;
1887 writew(cpu_to_be16(eaddrs[2]), filter_addr); filter_addr += 4;
1888 writew(cpu_to_be16(eaddrs[1]), filter_addr); filter_addr += 4;
1889 writew(cpu_to_be16(eaddrs[0]), filter_addr); filter_addr += 8;
1890 }
1891 eaddrs = (u16 *)dev->dev_addr;
1892 while (i++ < 16) {
1893 writew(cpu_to_be16(eaddrs[0]), filter_addr); filter_addr += 4;
1894 writew(cpu_to_be16(eaddrs[1]), filter_addr); filter_addr += 4;
1895 writew(cpu_to_be16(eaddrs[2]), filter_addr); filter_addr += 8;
1896 }
1897 rx_mode |= AcceptBroadcast|PerfectFilter;
1898 } else {
1899 /* Must use a multicast hash table. */
1900 void __iomem *filter_addr;
1901 u16 *eaddrs;
1902 u16 mc_filter[32] __attribute__ ((aligned(sizeof(long)))); /* Multicast hash filter */
1903
1904 memset(mc_filter, 0, sizeof(mc_filter));
1905 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1906 i++, mclist = mclist->next) {
Jeff Garzikfdecea62005-05-12 20:16:24 -04001907 /* The chip uses the upper 9 CRC bits
1908 as index into the hash table */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001909 int bit_nr = ether_crc_le(ETH_ALEN, mclist->dmi_addr) >> 23;
1910 __u32 *fptr = (__u32 *) &mc_filter[(bit_nr >> 4) & ~1];
1911
1912 *fptr |= cpu_to_le32(1 << (bit_nr & 31));
1913 }
1914 /* Clear the perfect filter list, skip first two entries. */
1915 filter_addr = ioaddr + PerfFilterTable + 2 * 16;
1916 eaddrs = (u16 *)dev->dev_addr;
1917 for (i = 2; i < 16; i++) {
1918 writew(cpu_to_be16(eaddrs[0]), filter_addr); filter_addr += 4;
1919 writew(cpu_to_be16(eaddrs[1]), filter_addr); filter_addr += 4;
1920 writew(cpu_to_be16(eaddrs[2]), filter_addr); filter_addr += 8;
1921 }
1922 for (filter_addr = ioaddr + HashTable, i = 0; i < 32; filter_addr+= 16, i++)
1923 writew(mc_filter[i], filter_addr);
1924 rx_mode |= AcceptBroadcast|PerfectFilter|HashFilter;
1925 }
1926 writel(rx_mode, ioaddr + RxFilterMode);
1927}
1928
1929static int check_if_running(struct net_device *dev)
1930{
1931 if (!netif_running(dev))
1932 return -EINVAL;
1933 return 0;
1934}
1935
1936static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1937{
1938 struct netdev_private *np = netdev_priv(dev);
1939 strcpy(info->driver, DRV_NAME);
1940 strcpy(info->version, DRV_VERSION);
Jeff Garzikfdecea62005-05-12 20:16:24 -04001941 strcpy(info->bus_info, pci_name(np->pci_dev));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001942}
1943
1944static int get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1945{
1946 struct netdev_private *np = netdev_priv(dev);
1947 spin_lock_irq(&np->lock);
1948 mii_ethtool_gset(&np->mii_if, ecmd);
1949 spin_unlock_irq(&np->lock);
1950 return 0;
1951}
1952
1953static int set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1954{
1955 struct netdev_private *np = netdev_priv(dev);
1956 int res;
1957 spin_lock_irq(&np->lock);
1958 res = mii_ethtool_sset(&np->mii_if, ecmd);
1959 spin_unlock_irq(&np->lock);
1960 check_duplex(dev);
1961 return res;
1962}
1963
1964static int nway_reset(struct net_device *dev)
1965{
1966 struct netdev_private *np = netdev_priv(dev);
1967 return mii_nway_restart(&np->mii_if);
1968}
1969
1970static u32 get_link(struct net_device *dev)
1971{
1972 struct netdev_private *np = netdev_priv(dev);
1973 return mii_link_ok(&np->mii_if);
1974}
1975
1976static u32 get_msglevel(struct net_device *dev)
1977{
1978 return debug;
1979}
1980
1981static void set_msglevel(struct net_device *dev, u32 val)
1982{
1983 debug = val;
1984}
1985
1986static struct ethtool_ops ethtool_ops = {
1987 .begin = check_if_running,
1988 .get_drvinfo = get_drvinfo,
1989 .get_settings = get_settings,
1990 .set_settings = set_settings,
1991 .nway_reset = nway_reset,
1992 .get_link = get_link,
1993 .get_msglevel = get_msglevel,
1994 .set_msglevel = set_msglevel,
1995};
1996
1997static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1998{
1999 struct netdev_private *np = netdev_priv(dev);
2000 struct mii_ioctl_data *data = if_mii(rq);
2001 int rc;
2002
2003 if (!netif_running(dev))
2004 return -EINVAL;
2005
2006 spin_lock_irq(&np->lock);
2007 rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL);
2008 spin_unlock_irq(&np->lock);
2009
2010 if ((cmd == SIOCSMIIREG) && (data->phy_id == np->phys[0]))
2011 check_duplex(dev);
2012
2013 return rc;
2014}
2015
2016static int netdev_close(struct net_device *dev)
2017{
2018 struct netdev_private *np = netdev_priv(dev);
2019 void __iomem *ioaddr = np->base;
2020 int i;
2021
2022 netif_stop_queue(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002023
2024 if (debug > 1) {
2025 printk(KERN_DEBUG "%s: Shutting down ethercard, Intr status %#8.8x.\n",
2026 dev->name, (int) readl(ioaddr + IntrStatus));
2027 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
2028 dev->name, np->cur_tx, np->dirty_tx,
2029 np->cur_rx, np->dirty_rx);
2030 }
2031
2032 /* Disable interrupts by clearing the interrupt mask. */
2033 writel(0, ioaddr + IntrEnable);
2034
2035 /* Stop the chip's Tx and Rx processes. */
2036 writel(0, ioaddr + GenCtrl);
2037 readl(ioaddr + GenCtrl);
2038
2039 if (debug > 5) {
2040 printk(KERN_DEBUG" Tx ring at %#llx:\n",
2041 (long long) np->tx_ring_dma);
2042 for (i = 0; i < 8 /* TX_RING_SIZE is huge! */; i++)
2043 printk(KERN_DEBUG " #%d desc. %#8.8x %#llx -> %#8.8x.\n",
2044 i, le32_to_cpu(np->tx_ring[i].status),
2045 (long long) dma_to_cpu(np->tx_ring[i].addr),
2046 le32_to_cpu(np->tx_done_q[i].status));
2047 printk(KERN_DEBUG " Rx ring at %#llx -> %p:\n",
2048 (long long) np->rx_ring_dma, np->rx_done_q);
2049 if (np->rx_done_q)
2050 for (i = 0; i < 8 /* RX_RING_SIZE */; i++) {
2051 printk(KERN_DEBUG " #%d desc. %#llx -> %#8.8x\n",
2052 i, (long long) dma_to_cpu(np->rx_ring[i].rxaddr), le32_to_cpu(np->rx_done_q[i].status));
2053 }
2054 }
2055
2056 free_irq(dev->irq, dev);
2057
2058 /* Free all the skbuffs in the Rx queue. */
2059 for (i = 0; i < RX_RING_SIZE; i++) {
2060 np->rx_ring[i].rxaddr = cpu_to_dma(0xBADF00D0); /* An invalid address. */
2061 if (np->rx_info[i].skb != NULL) {
2062 pci_unmap_single(np->pci_dev, np->rx_info[i].mapping, np->rx_buf_sz, PCI_DMA_FROMDEVICE);
2063 dev_kfree_skb(np->rx_info[i].skb);
2064 }
2065 np->rx_info[i].skb = NULL;
2066 np->rx_info[i].mapping = 0;
2067 }
2068 for (i = 0; i < TX_RING_SIZE; i++) {
2069 struct sk_buff *skb = np->tx_info[i].skb;
2070 if (skb == NULL)
2071 continue;
2072 pci_unmap_single(np->pci_dev,
2073 np->tx_info[i].mapping,
2074 skb_first_frag_len(skb), PCI_DMA_TODEVICE);
2075 np->tx_info[i].mapping = 0;
2076 dev_kfree_skb(skb);
2077 np->tx_info[i].skb = NULL;
2078 }
2079
2080 return 0;
2081}
2082
2083
2084static void __devexit starfire_remove_one (struct pci_dev *pdev)
2085{
2086 struct net_device *dev = pci_get_drvdata(pdev);
2087 struct netdev_private *np = netdev_priv(dev);
2088
2089 if (!dev)
2090 BUG();
2091
2092 unregister_netdev(dev);
2093
2094 if (np->queue_mem)
2095 pci_free_consistent(pdev, np->queue_mem_size, np->queue_mem, np->queue_mem_dma);
2096
2097
2098 /* XXX: add wakeup code -- requires firmware for MagicPacket */
2099 pci_set_power_state(pdev, PCI_D3hot); /* go to sleep in D3 mode */
2100 pci_disable_device(pdev);
2101
2102 iounmap(np->base);
2103 pci_release_regions(pdev);
2104
2105 pci_set_drvdata(pdev, NULL);
2106 free_netdev(dev); /* Will also free np!! */
2107}
2108
2109
2110static struct pci_driver starfire_driver = {
2111 .name = DRV_NAME,
2112 .probe = starfire_init_one,
2113 .remove = __devexit_p(starfire_remove_one),
2114 .id_table = starfire_pci_tbl,
2115};
2116
2117
2118static int __init starfire_init (void)
2119{
2120/* when a module, this is printed whether or not devices are found in probe */
2121#ifdef MODULE
2122 printk(version);
Jeff Garzikfdecea62005-05-12 20:16:24 -04002123#ifdef HAVE_NETDEV_POLL
2124 printk(KERN_INFO DRV_NAME ": polling (NAPI) enabled\n");
2125#else
2126 printk(KERN_INFO DRV_NAME ": polling (NAPI) disabled\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07002127#endif
Jeff Garzikfdecea62005-05-12 20:16:24 -04002128#endif
2129
Linus Torvalds1da177e2005-04-16 15:20:36 -07002130#ifndef ADDR_64BITS
2131 /* we can do this test only at run-time... sigh */
2132 if (sizeof(dma_addr_t) == sizeof(u64)) {
2133 printk("This driver has not been ported to this 64-bit architecture yet\n");
2134 return -ENODEV;
2135 }
2136#endif /* not ADDR_64BITS */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002137 return pci_module_init (&starfire_driver);
2138}
2139
2140
2141static void __exit starfire_cleanup (void)
2142{
2143 pci_unregister_driver (&starfire_driver);
2144}
2145
2146
2147module_init(starfire_init);
2148module_exit(starfire_cleanup);
2149
2150
2151/*
2152 * Local variables:
2153 * c-basic-offset: 8
2154 * tab-width: 8
2155 * End:
2156 */