blob: ea8172c747a2655fd7987649e1eecc675c1111ee [file] [log] [blame]
Dave Airlie22f579c2005-06-28 22:48:56 +10001/* via_irq.c
2 *
3 * Copyright 2004 BEAM Ltd.
4 * Copyright 2002 Tungsten Graphics, Inc.
5 * Copyright 2005 Thomas Hellstrom.
6 * All Rights Reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * BEAM LTD, TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
23 * DAMAGES OR
24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
26 * DEALINGS IN THE SOFTWARE.
27 *
28 * Authors:
29 * Terry Barnaby <terry1@beam.ltd.uk>
30 * Keith Whitwell <keith@tungstengraphics.com>
31 * Thomas Hellstrom <unichrome@shipmail.org>
32 *
33 * This code provides standard DRM access to the Via Unichrome / Pro Vertical blank
34 * interrupt, as well as an infrastructure to handle other interrupts of the chip.
35 * The refresh rate is also calculated for video playback sync purposes.
36 */
37
David Howells760285e2012-10-02 18:01:07 +010038#include <drm/drmP.h>
39#include <drm/via_drm.h>
Dave Airlie22f579c2005-06-28 22:48:56 +100040#include "via_drv.h"
41
42#define VIA_REG_INTERRUPT 0x200
43
44/* VIA_REG_INTERRUPT */
Jesse Barnes0a3e67a2008-09-30 12:14:26 -070045#define VIA_IRQ_GLOBAL (1 << 31)
Dave Airlie22f579c2005-06-28 22:48:56 +100046#define VIA_IRQ_VBLANK_ENABLE (1 << 19)
47#define VIA_IRQ_VBLANK_PENDING (1 << 3)
48#define VIA_IRQ_HQV0_ENABLE (1 << 11)
49#define VIA_IRQ_HQV1_ENABLE (1 << 25)
50#define VIA_IRQ_HQV0_PENDING (1 << 9)
51#define VIA_IRQ_HQV1_PENDING (1 << 10)
Dave Airlie92514242005-11-12 21:52:46 +110052#define VIA_IRQ_DMA0_DD_ENABLE (1 << 20)
53#define VIA_IRQ_DMA0_TD_ENABLE (1 << 21)
54#define VIA_IRQ_DMA1_DD_ENABLE (1 << 22)
55#define VIA_IRQ_DMA1_TD_ENABLE (1 << 23)
56#define VIA_IRQ_DMA0_DD_PENDING (1 << 4)
57#define VIA_IRQ_DMA0_TD_PENDING (1 << 5)
58#define VIA_IRQ_DMA1_DD_PENDING (1 << 6)
59#define VIA_IRQ_DMA1_TD_PENDING (1 << 7)
60
Dave Airlie22f579c2005-06-28 22:48:56 +100061
62/*
63 * Device-specific IRQs go here. This type might need to be extended with
64 * the register if there are multiple IRQ control registers.
Dave Airlieb5e89ed2005-09-25 14:28:13 +100065 * Currently we activate the HQV interrupts of Unichrome Pro group A.
Dave Airlie22f579c2005-06-28 22:48:56 +100066 */
67
68static maskarray_t via_pro_group_a_irqs[] = {
Dave Airlieb5e89ed2005-09-25 14:28:13 +100069 {VIA_IRQ_HQV0_ENABLE, VIA_IRQ_HQV0_PENDING, 0x000003D0, 0x00008010,
Jesse Barnes0a3e67a2008-09-30 12:14:26 -070070 0x00000000 },
Dave Airlieb5e89ed2005-09-25 14:28:13 +100071 {VIA_IRQ_HQV1_ENABLE, VIA_IRQ_HQV1_PENDING, 0x000013D0, 0x00008010,
Jesse Barnes0a3e67a2008-09-30 12:14:26 -070072 0x00000000 },
Dave Airlie92514242005-11-12 21:52:46 +110073 {VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0,
74 VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008},
75 {VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1,
76 VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008},
Dave Airlieb5e89ed2005-09-25 14:28:13 +100077};
Jesse Barnes0a3e67a2008-09-30 12:14:26 -070078static int via_num_pro_group_a = ARRAY_SIZE(via_pro_group_a_irqs);
Dave Airlie92514242005-11-12 21:52:46 +110079static int via_irqmap_pro_group_a[] = {0, 1, -1, 2, -1, 3};
Dave Airlie22f579c2005-06-28 22:48:56 +100080
Dave Airlie92514242005-11-12 21:52:46 +110081static maskarray_t via_unichrome_irqs[] = {
82 {VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0,
83 VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008},
84 {VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1,
85 VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008}
86};
Jesse Barnes0a3e67a2008-09-30 12:14:26 -070087static int via_num_unichrome = ARRAY_SIZE(via_unichrome_irqs);
Dave Airlie92514242005-11-12 21:52:46 +110088static int via_irqmap_unichrome[] = {-1, -1, -1, 0, -1, 1};
Dave Airlie22f579c2005-06-28 22:48:56 +100089
Jesse Barnes0a3e67a2008-09-30 12:14:26 -070090
Dave Airlieb5e89ed2005-09-25 14:28:13 +100091static unsigned time_diff(struct timeval *now, struct timeval *then)
Dave Airlie22f579c2005-06-28 22:48:56 +100092{
Dave Airlieb5e89ed2005-09-25 14:28:13 +100093 return (now->tv_usec >= then->tv_usec) ?
Jesse Barnes0a3e67a2008-09-30 12:14:26 -070094 now->tv_usec - then->tv_usec :
95 1000000 - (then->tv_usec - now->tv_usec);
96}
97
Thierry Reding88e72712015-09-24 18:35:31 +020098u32 via_get_vblank_counter(struct drm_device *dev, unsigned int pipe)
Jesse Barnes0a3e67a2008-09-30 12:14:26 -070099{
100 drm_via_private_t *dev_priv = dev->dev_private;
Thierry Reding88e72712015-09-24 18:35:31 +0200101
102 if (pipe != 0)
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700103 return 0;
104
105 return atomic_read(&dev_priv->vbl_received);
Dave Airlie22f579c2005-06-28 22:48:56 +1000106}
107
Daniel Vettere9f0d762013-12-11 11:34:42 +0100108irqreturn_t via_driver_irq_handler(int irq, void *arg)
Dave Airlie22f579c2005-06-28 22:48:56 +1000109{
Dave Airlie84b1fd12007-07-11 15:53:27 +1000110 struct drm_device *dev = (struct drm_device *) arg;
Dave Airlie22f579c2005-06-28 22:48:56 +1000111 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
112 u32 status;
113 int handled = 0;
114 struct timeval cur_vblank;
115 drm_via_irq_t *cur_irq = dev_priv->via_irqs;
116 int i;
117
118 status = VIA_READ(VIA_REG_INTERRUPT);
119 if (status & VIA_IRQ_VBLANK_PENDING) {
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700120 atomic_inc(&dev_priv->vbl_received);
121 if (!(atomic_read(&dev_priv->vbl_received) & 0x0F)) {
Dave Airlie22f579c2005-06-28 22:48:56 +1000122 do_gettimeofday(&cur_vblank);
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000123 if (dev_priv->last_vblank_valid) {
124 dev_priv->usec_per_vblank =
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700125 time_diff(&cur_vblank,
126 &dev_priv->last_vblank) >> 4;
Dave Airlie22f579c2005-06-28 22:48:56 +1000127 }
128 dev_priv->last_vblank = cur_vblank;
129 dev_priv->last_vblank_valid = 1;
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000130 }
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700131 if (!(atomic_read(&dev_priv->vbl_received) & 0xFF)) {
Dave Airlie22f579c2005-06-28 22:48:56 +1000132 DRM_DEBUG("US per vblank is: %u\n",
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000133 dev_priv->usec_per_vblank);
Dave Airlie22f579c2005-06-28 22:48:56 +1000134 }
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700135 drm_handle_vblank(dev, 0);
Dave Airlie22f579c2005-06-28 22:48:56 +1000136 handled = 1;
137 }
Dave Airlie22f579c2005-06-28 22:48:56 +1000138
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000139 for (i = 0; i < dev_priv->num_irqs; ++i) {
Dave Airlie22f579c2005-06-28 22:48:56 +1000140 if (status & cur_irq->pending_mask) {
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000141 atomic_inc(&cur_irq->irq_received);
Daniel Vetter57ed0f72013-12-11 11:34:43 +0100142 wake_up(&cur_irq->irq_queue);
Dave Airlie22f579c2005-06-28 22:48:56 +1000143 handled = 1;
Nicolas Kaiser58c1e852010-07-11 15:32:42 +0200144 if (dev_priv->irq_map[drm_via_irq_dma0_td] == i)
Dave Airlie92514242005-11-12 21:52:46 +1100145 via_dmablit_handler(dev, 0, 1);
Nicolas Kaiser58c1e852010-07-11 15:32:42 +0200146 else if (dev_priv->irq_map[drm_via_irq_dma1_td] == i)
Dave Airlie92514242005-11-12 21:52:46 +1100147 via_dmablit_handler(dev, 1, 1);
Dave Airlie22f579c2005-06-28 22:48:56 +1000148 }
149 cur_irq++;
150 }
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000151
Daniel Mack3ad2f3f2010-02-03 08:01:28 +0800152 /* Acknowledge interrupts */
Dave Airlie22f579c2005-06-28 22:48:56 +1000153 VIA_WRITE(VIA_REG_INTERRUPT, status);
154
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700155
Dave Airlie22f579c2005-06-28 22:48:56 +1000156 if (handled)
157 return IRQ_HANDLED;
158 else
159 return IRQ_NONE;
160}
161
Nicolas Kaiser58c1e852010-07-11 15:32:42 +0200162static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t *dev_priv)
Dave Airlie22f579c2005-06-28 22:48:56 +1000163{
164 u32 status;
165
166 if (dev_priv) {
Daniel Mack3ad2f3f2010-02-03 08:01:28 +0800167 /* Acknowledge interrupts */
Dave Airlie22f579c2005-06-28 22:48:56 +1000168 status = VIA_READ(VIA_REG_INTERRUPT);
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000169 VIA_WRITE(VIA_REG_INTERRUPT, status |
Dave Airlie22f579c2005-06-28 22:48:56 +1000170 dev_priv->irq_pending_mask);
171 }
172}
173
Thierry Reding88e72712015-09-24 18:35:31 +0200174int via_enable_vblank(struct drm_device *dev, unsigned int pipe)
Dave Airlie22f579c2005-06-28 22:48:56 +1000175{
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700176 drm_via_private_t *dev_priv = dev->dev_private;
177 u32 status;
Dave Airlie22f579c2005-06-28 22:48:56 +1000178
Thierry Reding88e72712015-09-24 18:35:31 +0200179 if (pipe != 0) {
180 DRM_ERROR("%s: bad crtc %u\n", __func__, pipe);
Dave Airlie22f579c2005-06-28 22:48:56 +1000181 return -EINVAL;
182 }
183
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700184 status = VIA_READ(VIA_REG_INTERRUPT);
Simon Farnsworth42dd8612009-07-10 11:25:16 +0100185 VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_VBLANK_ENABLE);
Dave Airlie22f579c2005-06-28 22:48:56 +1000186
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700187 VIA_WRITE8(0x83d4, 0x11);
188 VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30);
Dave Airlie22f579c2005-06-28 22:48:56 +1000189
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700190 return 0;
191}
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000192
Thierry Reding88e72712015-09-24 18:35:31 +0200193void via_disable_vblank(struct drm_device *dev, unsigned int pipe)
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700194{
195 drm_via_private_t *dev_priv = dev->dev_private;
Simon Farnsworth42dd8612009-07-10 11:25:16 +0100196 u32 status;
197
198 status = VIA_READ(VIA_REG_INTERRUPT);
199 VIA_WRITE(VIA_REG_INTERRUPT, status & ~VIA_IRQ_VBLANK_ENABLE);
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700200
201 VIA_WRITE8(0x83d4, 0x11);
202 VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30);
203
Thierry Reding88e72712015-09-24 18:35:31 +0200204 if (pipe != 0)
205 DRM_ERROR("%s: bad crtc %u\n", __func__, pipe);
Dave Airlie22f579c2005-06-28 22:48:56 +1000206}
207
Dave Airliece60fe02006-02-02 19:21:38 +1100208static int
Nicolas Kaiser58c1e852010-07-11 15:32:42 +0200209via_driver_irq_wait(struct drm_device *dev, unsigned int irq, int force_sequence,
Dave Airlie22f579c2005-06-28 22:48:56 +1000210 unsigned int *sequence)
211{
212 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
213 unsigned int cur_irq_sequence;
Jayachandran Cd2532582006-04-10 23:18:28 -0700214 drm_via_irq_t *cur_irq;
Dave Airlie22f579c2005-06-28 22:48:56 +1000215 int ret = 0;
Dave Airlie86678df2006-04-05 18:10:11 +1000216 maskarray_t *masks;
Dave Airlie92514242005-11-12 21:52:46 +1100217 int real_irq;
Dave Airlie22f579c2005-06-28 22:48:56 +1000218
Márton Németh3e684ea2008-01-24 15:58:57 +1000219 DRM_DEBUG("\n");
Dave Airlie22f579c2005-06-28 22:48:56 +1000220
221 if (!dev_priv) {
Márton Németh3e684ea2008-01-24 15:58:57 +1000222 DRM_ERROR("called with no initialization\n");
Eric Anholt20caafa2007-08-25 19:22:43 +1000223 return -EINVAL;
Dave Airlie22f579c2005-06-28 22:48:56 +1000224 }
225
Dave Airlie92514242005-11-12 21:52:46 +1100226 if (irq >= drm_via_irq_num) {
Márton Németh3e684ea2008-01-24 15:58:57 +1000227 DRM_ERROR("Trying to wait on unknown irq %d\n", irq);
Eric Anholt20caafa2007-08-25 19:22:43 +1000228 return -EINVAL;
Dave Airlie22f579c2005-06-28 22:48:56 +1000229 }
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000230
Dave Airlie92514242005-11-12 21:52:46 +1100231 real_irq = dev_priv->irq_map[irq];
Dave Airlie22f579c2005-06-28 22:48:56 +1000232
Dave Airlie92514242005-11-12 21:52:46 +1100233 if (real_irq < 0) {
Márton Németh3e684ea2008-01-24 15:58:57 +1000234 DRM_ERROR("Video IRQ %d not available on this hardware.\n",
235 irq);
Eric Anholt20caafa2007-08-25 19:22:43 +1000236 return -EINVAL;
Dave Airlie92514242005-11-12 21:52:46 +1100237 }
Dave Airlie86678df2006-04-05 18:10:11 +1000238
239 masks = dev_priv->irq_masks;
Jayachandran Cd2532582006-04-10 23:18:28 -0700240 cur_irq = dev_priv->via_irqs + real_irq;
Dave Airlie92514242005-11-12 21:52:46 +1100241
242 if (masks[real_irq][2] && !force_sequence) {
Daniel Vetterbfd83032013-12-11 11:34:41 +0100243 DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * HZ,
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000244 ((VIA_READ(masks[irq][2]) & masks[irq][3]) ==
245 masks[irq][4]));
Dave Airlie22f579c2005-06-28 22:48:56 +1000246 cur_irq_sequence = atomic_read(&cur_irq->irq_received);
247 } else {
Daniel Vetterbfd83032013-12-11 11:34:41 +0100248 DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * HZ,
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000249 (((cur_irq_sequence =
250 atomic_read(&cur_irq->irq_received)) -
251 *sequence) <= (1 << 23)));
Dave Airlie22f579c2005-06-28 22:48:56 +1000252 }
253 *sequence = cur_irq_sequence;
254 return ret;
255}
256
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700257
Dave Airlie22f579c2005-06-28 22:48:56 +1000258/*
259 * drm_dma.h hooks
260 */
261
Nicolas Kaiser58c1e852010-07-11 15:32:42 +0200262void via_driver_irq_preinstall(struct drm_device *dev)
Dave Airlie22f579c2005-06-28 22:48:56 +1000263{
264 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
265 u32 status;
Jayachandran Cd2532582006-04-10 23:18:28 -0700266 drm_via_irq_t *cur_irq;
Dave Airlie22f579c2005-06-28 22:48:56 +1000267 int i;
268
Márton Németh3e684ea2008-01-24 15:58:57 +1000269 DRM_DEBUG("dev_priv: %p\n", dev_priv);
Dave Airlie22f579c2005-06-28 22:48:56 +1000270 if (dev_priv) {
Jayachandran Cd2532582006-04-10 23:18:28 -0700271 cur_irq = dev_priv->via_irqs;
Dave Airlie22f579c2005-06-28 22:48:56 +1000272
273 dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE;
274 dev_priv->irq_pending_mask = VIA_IRQ_VBLANK_PENDING;
275
Thomas Hellstrom689692e2007-01-08 21:19:57 +1100276 if (dev_priv->chipset == VIA_PRO_GROUP_A ||
277 dev_priv->chipset == VIA_DX9_0) {
278 dev_priv->irq_masks = via_pro_group_a_irqs;
279 dev_priv->num_irqs = via_num_pro_group_a;
280 dev_priv->irq_map = via_irqmap_pro_group_a;
281 } else {
282 dev_priv->irq_masks = via_unichrome_irqs;
283 dev_priv->num_irqs = via_num_unichrome;
284 dev_priv->irq_map = via_irqmap_unichrome;
285 }
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000286
287 for (i = 0; i < dev_priv->num_irqs; ++i) {
Dave Airlie22f579c2005-06-28 22:48:56 +1000288 atomic_set(&cur_irq->irq_received, 0);
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000289 cur_irq->enable_mask = dev_priv->irq_masks[i][0];
Dave Airlie22f579c2005-06-28 22:48:56 +1000290 cur_irq->pending_mask = dev_priv->irq_masks[i][1];
Daniel Vetter57ed0f72013-12-11 11:34:43 +0100291 init_waitqueue_head(&cur_irq->irq_queue);
Dave Airlie22f579c2005-06-28 22:48:56 +1000292 dev_priv->irq_enable_mask |= cur_irq->enable_mask;
293 dev_priv->irq_pending_mask |= cur_irq->pending_mask;
294 cur_irq++;
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000295
Dave Airlie22f579c2005-06-28 22:48:56 +1000296 DRM_DEBUG("Initializing IRQ %d\n", i);
297 }
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000298
299 dev_priv->last_vblank_valid = 0;
Dave Airlie22f579c2005-06-28 22:48:56 +1000300
Dave Airlie92514242005-11-12 21:52:46 +1100301 /* Clear VSync interrupt regs */
Dave Airlie22f579c2005-06-28 22:48:56 +1000302 status = VIA_READ(VIA_REG_INTERRUPT);
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000303 VIA_WRITE(VIA_REG_INTERRUPT, status &
Dave Airlie22f579c2005-06-28 22:48:56 +1000304 ~(dev_priv->irq_enable_mask));
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000305
Dave Airlie22f579c2005-06-28 22:48:56 +1000306 /* Clear bits if they're already high */
307 viadrv_acknowledge_irqs(dev_priv);
308 }
309}
310
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700311int via_driver_irq_postinstall(struct drm_device *dev)
Dave Airlie22f579c2005-06-28 22:48:56 +1000312{
313 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
314 u32 status;
315
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700316 DRM_DEBUG("via_driver_irq_postinstall\n");
317 if (!dev_priv)
318 return -EINVAL;
Dave Airlie22f579c2005-06-28 22:48:56 +1000319
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700320 status = VIA_READ(VIA_REG_INTERRUPT);
321 VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_GLOBAL
322 | dev_priv->irq_enable_mask);
Dave Airlie22f579c2005-06-28 22:48:56 +1000323
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700324 /* Some magic, oh for some data sheets ! */
325 VIA_WRITE8(0x83d4, 0x11);
326 VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30);
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000327
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700328 return 0;
Dave Airlie22f579c2005-06-28 22:48:56 +1000329}
330
Nicolas Kaiser58c1e852010-07-11 15:32:42 +0200331void via_driver_irq_uninstall(struct drm_device *dev)
Dave Airlie22f579c2005-06-28 22:48:56 +1000332{
333 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
334 u32 status;
335
Márton Németh3e684ea2008-01-24 15:58:57 +1000336 DRM_DEBUG("\n");
Dave Airlie22f579c2005-06-28 22:48:56 +1000337 if (dev_priv) {
338
339 /* Some more magic, oh for some data sheets ! */
340
341 VIA_WRITE8(0x83d4, 0x11);
342 VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30);
343
344 status = VIA_READ(VIA_REG_INTERRUPT);
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000345 VIA_WRITE(VIA_REG_INTERRUPT, status &
Dave Airlie22f579c2005-06-28 22:48:56 +1000346 ~(VIA_IRQ_VBLANK_ENABLE | dev_priv->irq_enable_mask));
347 }
348}
349
Eric Anholtc153f452007-09-03 12:06:45 +1000350int via_wait_irq(struct drm_device *dev, void *data, struct drm_file *file_priv)
Dave Airlie22f579c2005-06-28 22:48:56 +1000351{
Eric Anholtc153f452007-09-03 12:06:45 +1000352 drm_via_irqwait_t *irqwait = data;
Dave Airlie22f579c2005-06-28 22:48:56 +1000353 struct timeval now;
354 int ret = 0;
355 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
356 drm_via_irq_t *cur_irq = dev_priv->via_irqs;
357 int force_sequence;
358
Eric Anholtc153f452007-09-03 12:06:45 +1000359 if (irqwait->request.irq >= dev_priv->num_irqs) {
Márton Németh3e684ea2008-01-24 15:58:57 +1000360 DRM_ERROR("Trying to wait on unknown irq %d\n",
Eric Anholtc153f452007-09-03 12:06:45 +1000361 irqwait->request.irq);
Eric Anholt20caafa2007-08-25 19:22:43 +1000362 return -EINVAL;
Dave Airlie22f579c2005-06-28 22:48:56 +1000363 }
364
Eric Anholtc153f452007-09-03 12:06:45 +1000365 cur_irq += irqwait->request.irq;
Dave Airlie22f579c2005-06-28 22:48:56 +1000366
Eric Anholtc153f452007-09-03 12:06:45 +1000367 switch (irqwait->request.type & ~VIA_IRQ_FLAGS_MASK) {
Dave Airlie22f579c2005-06-28 22:48:56 +1000368 case VIA_IRQ_RELATIVE:
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700369 irqwait->request.sequence +=
370 atomic_read(&cur_irq->irq_received);
Eric Anholtc153f452007-09-03 12:06:45 +1000371 irqwait->request.type &= ~_DRM_VBLANK_RELATIVE;
Dave Airlie22f579c2005-06-28 22:48:56 +1000372 case VIA_IRQ_ABSOLUTE:
373 break;
374 default:
Eric Anholt20caafa2007-08-25 19:22:43 +1000375 return -EINVAL;
Dave Airlie22f579c2005-06-28 22:48:56 +1000376 }
377
Eric Anholtc153f452007-09-03 12:06:45 +1000378 if (irqwait->request.type & VIA_IRQ_SIGNAL) {
Márton Németh3e684ea2008-01-24 15:58:57 +1000379 DRM_ERROR("Signals on Via IRQs not implemented yet.\n");
Eric Anholt20caafa2007-08-25 19:22:43 +1000380 return -EINVAL;
Dave Airlie22f579c2005-06-28 22:48:56 +1000381 }
382
Eric Anholtc153f452007-09-03 12:06:45 +1000383 force_sequence = (irqwait->request.type & VIA_IRQ_FORCE_SEQUENCE);
Dave Airlie22f579c2005-06-28 22:48:56 +1000384
Eric Anholtc153f452007-09-03 12:06:45 +1000385 ret = via_driver_irq_wait(dev, irqwait->request.irq, force_sequence,
386 &irqwait->request.sequence);
Dave Airlie22f579c2005-06-28 22:48:56 +1000387 do_gettimeofday(&now);
Eric Anholtc153f452007-09-03 12:06:45 +1000388 irqwait->reply.tval_sec = now.tv_sec;
389 irqwait->reply.tval_usec = now.tv_usec;
Dave Airlie22f579c2005-06-28 22:48:56 +1000390
391 return ret;
392}