Adam Baker | be3d7d0 | 2014-04-06 22:42:48 +0100 | [diff] [blame] | 1 | /* Device tree file for the Zyxel NSA 320 NAS box. |
| 2 | * |
| 3 | * Copyright (c) 2014, Adam Baker <linux@baker-net.org.uk> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or |
| 6 | * modify it under the terms of the GNU General Public License |
| 7 | * as published by the Free Software Foundation; either version |
| 8 | * 2 of the License, or (at your option) any later version. |
| 9 | * |
| 10 | * Based upon the board setup file created by Peter Schildmann */ |
| 11 | |
| 12 | /dts-v1/; |
| 13 | |
Adam Baker | 76a93dc | 2014-04-08 23:34:32 +0100 | [diff] [blame] | 14 | #include "kirkwood-nsa3x0-common.dtsi" |
Adam Baker | be3d7d0 | 2014-04-06 22:42:48 +0100 | [diff] [blame] | 15 | |
| 16 | / { |
| 17 | model = "Zyxel NSA320"; |
| 18 | compatible = "zyxel,nsa320", "marvell,kirkwood-88f6281", "marvell,kirkwood"; |
| 19 | |
| 20 | memory { |
| 21 | device_type = "memory"; |
| 22 | reg = <0x00000000 0x20000000>; |
| 23 | }; |
| 24 | |
| 25 | chosen { |
| 26 | bootargs = "console=ttyS0,115200"; |
Sebastian Hesselbarth | ab83361 | 2014-04-30 14:56:30 +0200 | [diff] [blame] | 27 | stdout-path = &uart0; |
Adam Baker | be3d7d0 | 2014-04-06 22:42:48 +0100 | [diff] [blame] | 28 | }; |
| 29 | |
Adam Baker | be3d7d0 | 2014-04-06 22:42:48 +0100 | [diff] [blame] | 30 | ocp@f1000000 { |
Sebastian Hesselbarth | a948396 | 2014-04-30 14:56:32 +0200 | [diff] [blame] | 31 | pinctrl: pin-controller@10000 { |
Adam Baker | be3d7d0 | 2014-04-06 22:42:48 +0100 | [diff] [blame] | 32 | pinctrl-names = "default"; |
| 33 | |
| 34 | /* SATA Activity and Present pins are not connected */ |
| 35 | pmx_sata0: pmx-sata0 { |
| 36 | marvell,pins ; |
| 37 | marvell,function = "sata0"; |
| 38 | }; |
| 39 | |
| 40 | pmx_sata1: pmx-sata1 { |
| 41 | marvell,pins ; |
| 42 | marvell,function = "sata1"; |
| 43 | }; |
| 44 | |
| 45 | pmx_led_hdd2_green: pmx-led-hdd2-green { |
| 46 | marvell,pins = "mpp12"; |
| 47 | marvell,function = "gpio"; |
| 48 | }; |
| 49 | |
| 50 | pmx_led_hdd2_red: pmx-led-hdd2-red { |
| 51 | marvell,pins = "mpp13"; |
| 52 | marvell,function = "gpio"; |
| 53 | }; |
| 54 | |
| 55 | pmx_mcu_data: pmx-mcu-data { |
| 56 | marvell,pins = "mpp14"; |
| 57 | marvell,function = "gpio"; |
| 58 | }; |
| 59 | |
| 60 | pmx_led_usb_green: pmx-led-usb-green { |
| 61 | marvell,pins = "mpp15"; |
| 62 | marvell,function = "gpio"; |
| 63 | }; |
| 64 | |
| 65 | pmx_mcu_clk: pmx-mcu-clk { |
| 66 | marvell,pins = "mpp16"; |
| 67 | marvell,function = "gpio"; |
| 68 | }; |
| 69 | |
| 70 | pmx_mcu_act: pmx-mcu-act { |
| 71 | marvell,pins = "mpp17"; |
| 72 | marvell,function = "gpio"; |
| 73 | }; |
| 74 | |
| 75 | pmx_led_sys_green: pmx-led-sys-green { |
| 76 | marvell,pins = "mpp28"; |
| 77 | marvell,function = "gpio"; |
| 78 | }; |
| 79 | |
| 80 | pmx_led_sys_orange: pmx-led-sys-orange { |
| 81 | marvell,pins = "mpp29"; |
| 82 | marvell,function = "gpio"; |
| 83 | }; |
| 84 | |
| 85 | pmx_led_hdd1_green: pmx-led-hdd1-green { |
| 86 | marvell,pins = "mpp41"; |
| 87 | marvell,function = "gpio"; |
| 88 | }; |
| 89 | |
| 90 | pmx_led_hdd1_red: pmx-led-hdd1-red { |
| 91 | marvell,pins = "mpp42"; |
| 92 | marvell,function = "gpio"; |
| 93 | }; |
| 94 | |
| 95 | pmx_htp: pmx-htp { |
| 96 | marvell,pins = "mpp43"; |
| 97 | marvell,function = "gpio"; |
| 98 | }; |
| 99 | |
| 100 | /* Buzzer needs to be switched at around 1kHz so is |
| 101 | not compatible with the gpio-beeper driver. */ |
| 102 | pmx_buzzer: pmx-buzzer { |
| 103 | marvell,pins = "mpp44"; |
| 104 | marvell,function = "gpio"; |
| 105 | }; |
| 106 | |
| 107 | pmx_vid_b1: pmx-vid-b1 { |
| 108 | marvell,pins = "mpp45"; |
| 109 | marvell,function = "gpio"; |
| 110 | }; |
| 111 | |
| 112 | pmx_power_resume_data: pmx-power-resume-data { |
| 113 | marvell,pins = "mpp47"; |
| 114 | marvell,function = "gpio"; |
| 115 | }; |
| 116 | |
| 117 | pmx_power_resume_clk: pmx-power-resume-clk { |
| 118 | marvell,pins = "mpp49"; |
| 119 | marvell,function = "gpio"; |
| 120 | }; |
| 121 | }; |
| 122 | |
| 123 | i2c@11000 { |
| 124 | status = "okay"; |
| 125 | |
| 126 | pcf8563: pcf8563@51 { |
| 127 | compatible = "nxp,pcf8563"; |
| 128 | reg = <0x51>; |
| 129 | }; |
| 130 | }; |
| 131 | }; |
| 132 | |
| 133 | regulators { |
| 134 | usb0_power: regulator@1 { |
| 135 | enable-active-high; |
| 136 | }; |
| 137 | }; |
| 138 | |
| 139 | gpio-leds { |
| 140 | compatible = "gpio-leds"; |
| 141 | pinctrl-0 = <&pmx_led_hdd2_green &pmx_led_hdd2_red |
| 142 | &pmx_led_usb_green |
| 143 | &pmx_led_sys_green &pmx_led_sys_orange |
| 144 | &pmx_led_copy_green &pmx_led_copy_red |
| 145 | &pmx_led_hdd1_green &pmx_led_hdd1_red>; |
| 146 | pinctrl-names = "default"; |
| 147 | |
| 148 | green-sys { |
| 149 | label = "nsa320:green:sys"; |
| 150 | gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; |
| 151 | }; |
| 152 | orange-sys { |
| 153 | label = "nsa320:orange:sys"; |
| 154 | gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; |
| 155 | }; |
| 156 | green-hdd1 { |
| 157 | label = "nsa320:green:hdd1"; |
| 158 | gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; |
| 159 | }; |
| 160 | red-hdd1 { |
| 161 | label = "nsa320:red:hdd1"; |
| 162 | gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; |
| 163 | }; |
| 164 | green-hdd2 { |
| 165 | label = "nsa320:green:hdd2"; |
| 166 | gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; |
| 167 | }; |
| 168 | red-hdd2 { |
| 169 | label = "nsa320:red:hdd2"; |
| 170 | gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; |
| 171 | }; |
| 172 | green-usb { |
| 173 | label = "nsa320:green:usb"; |
| 174 | gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; |
| 175 | }; |
| 176 | green-copy { |
| 177 | label = "nsa320:green:copy"; |
| 178 | gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; |
| 179 | }; |
| 180 | red-copy { |
| 181 | label = "nsa320:red:copy"; |
| 182 | gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; |
| 183 | }; |
| 184 | }; |
| 185 | |
Adam Baker | 9fe3219 | 2016-03-05 15:34:57 +0000 | [diff] [blame] | 186 | hwmon { |
| 187 | compatible = "zyxel,nsa320-mcu"; |
| 188 | pinctrl-0 = <&pmx_mcu_data &pmx_mcu_clk &pmx_mcu_act>; |
| 189 | pinctrl-names = "default"; |
| 190 | |
| 191 | data-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; |
| 192 | clk-gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>; |
| 193 | act-gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; |
| 194 | }; |
| 195 | |
Adam Baker | be3d7d0 | 2014-04-06 22:42:48 +0100 | [diff] [blame] | 196 | /* The following pins are currently not assigned to a driver, |
| 197 | some of them should be configured as inputs. |
Adam Baker | 9fe3219 | 2016-03-05 15:34:57 +0000 | [diff] [blame] | 198 | pinctrl-0 = <&pmx_htp &pmx_vid_b1 |
Adam Baker | be3d7d0 | 2014-04-06 22:42:48 +0100 | [diff] [blame] | 199 | &pmx_power_resume_data &pmx_power_resume_clk>; */ |
| 200 | }; |
| 201 | |
| 202 | &mdio { |
| 203 | status = "okay"; |
| 204 | ethphy0: ethernet-phy@1 { |
| 205 | reg = <1>; |
| 206 | }; |
| 207 | }; |
| 208 | |
| 209 | ð0 { |
| 210 | status = "okay"; |
| 211 | ethernet0-port@0 { |
| 212 | phy-handle = <ðphy0>; |
| 213 | }; |
| 214 | }; |
Andrew Lunn | eb13cf8 | 2016-04-03 04:03:47 +0200 | [diff] [blame] | 215 | |
| 216 | &pciec { |
| 217 | status = "okay"; |
| 218 | }; |
| 219 | |
| 220 | &pcie0 { |
| 221 | status = "okay"; |
| 222 | }; |