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Jean-Christophe PLAGNIOL-VILLARD23fa6482012-02-27 11:19:34 +01001Atmel AT91 device tree bindings.
2================================
3
Alexandre Belloni02037a92014-09-15 18:15:59 +02004Boards with a SoC of the Atmel AT91 or SMART family shall have the following
5properties:
6
7Required root node properties:
8compatible: must be one of:
9 * "atmel,at91rm9200"
10
11 * "atmel,at91sam9" for SoCs using an ARM926EJ-S core, shall be extended with
12 the specific SoC family or compatible:
13 o "atmel,at91sam9260"
14 o "atmel,at91sam9261"
15 o "atmel,at91sam9263"
16 o "atmel,at91sam9x5" for the 5 series, shall be extended with the specific
17 SoC compatible:
18 - "atmel,at91sam9g15"
19 - "atmel,at91sam9g25"
20 - "atmel,at91sam9g35"
21 - "atmel,at91sam9x25"
22 - "atmel,at91sam9x35"
23 o "atmel,at91sam9g20"
24 o "atmel,at91sam9g45"
25 o "atmel,at91sam9n12"
26 o "atmel,at91sam9rl"
Alexandre Belloni1d376df2015-01-13 19:12:25 +010027 o "atmel,at91sam9xe"
Alexandre Belloni02037a92014-09-15 18:15:59 +020028 * "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific
29 SoC family:
30 o "atmel,sama5d3" shall be extended with the specific SoC compatible:
31 - "atmel,sama5d31"
32 - "atmel,sama5d33"
33 - "atmel,sama5d34"
34 - "atmel,sama5d35"
35 - "atmel,sama5d36"
36 o "atmel,sama5d4" shall be extended with the specific SoC compatible:
37 - "atmel,sama5d41"
38 - "atmel,sama5d42"
39 - "atmel,sama5d43"
40 - "atmel,sama5d44"
41
Jean-Christophe PLAGNIOL-VILLARD23fa6482012-02-27 11:19:34 +010042PIT Timer required properties:
43- compatible: Should be "atmel,at91sam9260-pit"
44- reg: Should contain registers location and length
45- interrupts: Should contain interrupt for the PIT which is the IRQ line
46 shared across all System Controller members.
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +010047
Joachim Eastwood454c46d2012-10-28 18:31:07 +000048System Timer (ST) required properties:
Alexandre Bellonib5958092015-03-12 13:07:25 +010049- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
Joachim Eastwood454c46d2012-10-28 18:31:07 +000050- reg: Should contain registers location and length
51- interrupts: Should contain interrupt for the ST which is the IRQ line
52 shared across all System Controller members.
Alexandre Bellonib5958092015-03-12 13:07:25 +010053Its subnodes can be:
54- watchdog: compatible should be "atmel,at91rm9200-wdt"
Joachim Eastwood454c46d2012-10-28 18:31:07 +000055
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +010056TC/TCLIB Timer required properties:
Josh Wu11930c52012-09-14 17:01:29 +080057- compatible: Should be "atmel,<chip>-tcb".
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +010058 <chip> can be "at91rm9200" or "at91sam9x5"
59- reg: Should contain registers location and length
60- interrupts: Should contain all interrupts for the TC block
61 Note that you can specify several interrupt cells if the TC
62 block has one interrupt per channel.
Boris BREZILLON864382d2013-12-17 16:47:14 +010063- clock-names: tuple listing input clock names.
64 Required elements: "t0_clk"
65 Optional elements: "t1_clk", "t2_clk"
66- clocks: phandles to input clocks.
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +010067
68Examples:
69
70One interrupt per TC block:
71 tcb0: timer@fff7c000 {
72 compatible = "atmel,at91rm9200-tcb";
73 reg = <0xfff7c000 0x100>;
74 interrupts = <18 4>;
Boris BREZILLON864382d2013-12-17 16:47:14 +010075 clocks = <&tcb0_clk>;
76 clock-names = "t0_clk";
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +010077 };
78
79One interrupt per TC channel in a TC block:
80 tcb1: timer@fffdc000 {
81 compatible = "atmel,at91rm9200-tcb";
82 reg = <0xfffdc000 0x100>;
83 interrupts = <26 4 27 4 28 4>;
Boris BREZILLON864382d2013-12-17 16:47:14 +010084 clocks = <&tcb1_clk>;
85 clock-names = "t0_clk";
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +010086 };
Jean-Christophe PLAGNIOL-VILLARDc8082d32012-03-03 03:16:27 +080087
88RSTC Reset Controller required properties:
89- compatible: Should be "atmel,<chip>-rstc".
90 <chip> can be "at91sam9260" or "at91sam9g45"
91- reg: Should contain registers location and length
92
93Example:
94
95 rstc@fffffd00 {
96 compatible = "atmel,at91sam9260-rstc";
97 reg = <0xfffffd00 0x10>;
98 };
Jean-Christophe PLAGNIOL-VILLARDa7776ec2012-03-02 20:54:37 +080099
100RAMC SDRAM/DDR Controller required properties:
Alexandre Belloni0506b292015-03-16 21:04:06 +0100101- compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
Nicolas Ferre20b4e4f2013-11-15 11:03:23 +0100102 "atmel,at91sam9260-sdramc",
Jean-Christophe PLAGNIOL-VILLARDa7776ec2012-03-02 20:54:37 +0800103 "atmel,at91sam9g45-ddramc",
Alexandre Belloni017b5522014-07-08 18:21:11 +0200104 "atmel,sama5d3-ddramc",
Jean-Christophe PLAGNIOL-VILLARDa7776ec2012-03-02 20:54:37 +0800105- reg: Should contain registers location and length
Jean-Christophe PLAGNIOL-VILLARDa7776ec2012-03-02 20:54:37 +0800106
107Examples:
108
109 ramc0: ramc@ffffe800 {
110 compatible = "atmel,at91sam9g45-ddramc";
111 reg = <0xffffe800 0x200>;
112 };
113
Jean-Christophe PLAGNIOL-VILLARD82015c42012-03-02 21:01:00 +0800114SHDWC Shutdown Controller
115
116required properties:
117- compatible: Should be "atmel,<chip>-shdwc".
118 <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
119- reg: Should contain registers location and length
120
121optional properties:
122- atmel,wakeup-mode: String, operation mode of the wakeup mode.
123 Supported values are: "none", "high", "low", "any".
124- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
125
126optional at91sam9260 properties:
127- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
128
129optional at91sam9rl properties:
130- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
131- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
132
133optional at91sam9x5 properties:
134- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
135
136Example:
137
138 rstc@fffffd00 {
139 compatible = "atmel,at91sam9260-rstc";
140 reg = <0xfffffd00 0x10>;
141 };
Alexandre Bellonicb282f72014-12-18 10:45:50 +0100142
143Special Function Registers (SFR)
144
145Special Function Registers (SFR) manage specific aspects of the integrated
146memory, bridge implementations, processor and other functionality not controlled
147elsewhere.
148
149required properties:
150- compatible: Should be "atmel,<chip>-sfr", "syscon".
151 <chip> can be "sama5d3" or "sama5d4".
152- reg: Should contain registers location and length
153
154 sfr@f0038000 {
155 compatible = "atmel,sama5d3-sfr", "syscon";
156 reg = <0xf0038000 0x60>;
157 };