Laurent Pinchart | 334bc11 | 2013-12-06 10:59:53 +0100 | [diff] [blame] | 1 | * Renesas SH-Mobile Serial Communication Interface |
| 2 | |
| 3 | Required properties: |
| 4 | |
Geert Uytterhoeven | 598604f | 2015-12-11 12:48:15 +0100 | [diff] [blame] | 5 | - compatible: Must contain one or more of the following: |
Laurent Pinchart | 334bc11 | 2013-12-06 10:59:53 +0100 | [diff] [blame] | 6 | |
Geert Uytterhoeven | 681b05f | 2014-11-14 16:59:32 +0100 | [diff] [blame] | 7 | - "renesas,scif-r7s72100" for R7S72100 (RZ/A1H) SCIF compatible UART. |
Simon Horman | 34c4eda | 2014-07-11 11:11:08 +0200 | [diff] [blame] | 8 | - "renesas,scifa-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFA compatible UART. |
| 9 | - "renesas,scifb-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFB compatible UART. |
| 10 | - "renesas,scifa-r8a7740" for R8A7740 (R-Mobile A1) SCIFA compatible UART. |
| 11 | - "renesas,scifb-r8a7740" for R8A7740 (R-Mobile A1) SCIFB compatible UART. |
Sergei Shtylyov | c03e1b8 | 2016-10-21 23:00:43 +0300 | [diff] [blame] | 12 | - "renesas,scif-r8a7743" for R8A7743 (RZ/G1M) SCIF compatible UART. |
| 13 | - "renesas,scifa-r8a7743" for R8A7743 (RZ/G1M) SCIFA compatible UART. |
| 14 | - "renesas,scifb-r8a7743" for R8A7743 (RZ/G1M) SCIFB compatible UART. |
| 15 | - "renesas,hscif-r8a7743" for R8A7743 (RZ/G1M) HSCIF compatible UART. |
| 16 | - "renesas,scif-r8a7745" for R8A7745 (RZ/G1E) SCIF compatible UART. |
| 17 | - "renesas,scifa-r8a7745" for R8A7745 (RZ/G1E) SCIFA compatible UART. |
| 18 | - "renesas,scifb-r8a7745" for R8A7745 (RZ/G1E) SCIFB compatible UART. |
| 19 | - "renesas,hscif-r8a7745" for R8A7745 (RZ/G1E) HSCIF compatible UART. |
Simon Horman | 34c4eda | 2014-07-11 11:11:08 +0200 | [diff] [blame] | 20 | - "renesas,scif-r8a7778" for R8A7778 (R-Car M1) SCIF compatible UART. |
Simon Horman | 81bd1eb | 2014-05-15 20:00:58 +0900 | [diff] [blame] | 21 | - "renesas,scif-r8a7779" for R8A7779 (R-Car H1) SCIF compatible UART. |
Laurent Pinchart | 334bc11 | 2013-12-06 10:59:53 +0100 | [diff] [blame] | 22 | - "renesas,scif-r8a7790" for R8A7790 (R-Car H2) SCIF compatible UART. |
| 23 | - "renesas,scifa-r8a7790" for R8A7790 (R-Car H2) SCIFA compatible UART. |
| 24 | - "renesas,scifb-r8a7790" for R8A7790 (R-Car H2) SCIFB compatible UART. |
| 25 | - "renesas,hscif-r8a7790" for R8A7790 (R-Car H2) HSCIF compatible UART. |
Ulrich Hecht | 456ad4a | 2015-10-19 14:31:49 +0200 | [diff] [blame] | 26 | - "renesas,scif-r8a7791" for R8A7791 (R-Car M2-W) SCIF compatible UART. |
| 27 | - "renesas,scifa-r8a7791" for R8A7791 (R-Car M2-W) SCIFA compatible UART. |
| 28 | - "renesas,scifb-r8a7791" for R8A7791 (R-Car M2-W) SCIFB compatible UART. |
| 29 | - "renesas,hscif-r8a7791" for R8A7791 (R-Car M2-W) HSCIF compatible UART. |
Simon Horman | 0206417 | 2016-01-11 10:39:20 +0900 | [diff] [blame] | 30 | - "renesas,scif-r8a7792" for R8A7792 (R-Car V2H) SCIF compatible UART. |
| 31 | - "renesas,hscif-r8a7792" for R8A7792 (R-Car V2H) HSCIF compatible UART. |
Ulrich Hecht | 456ad4a | 2015-10-19 14:31:49 +0200 | [diff] [blame] | 32 | - "renesas,scif-r8a7793" for R8A7793 (R-Car M2-N) SCIF compatible UART. |
| 33 | - "renesas,scifa-r8a7793" for R8A7793 (R-Car M2-N) SCIFA compatible UART. |
| 34 | - "renesas,scifb-r8a7793" for R8A7793 (R-Car M2-N) SCIFB compatible UART. |
| 35 | - "renesas,hscif-r8a7793" for R8A7793 (R-Car M2-N) HSCIF compatible UART. |
Ulrich Hecht | c556522 | 2014-11-14 16:59:31 +0100 | [diff] [blame] | 36 | - "renesas,scif-r8a7794" for R8A7794 (R-Car E2) SCIF compatible UART. |
| 37 | - "renesas,scifa-r8a7794" for R8A7794 (R-Car E2) SCIFA compatible UART. |
| 38 | - "renesas,scifb-r8a7794" for R8A7794 (R-Car E2) SCIFB compatible UART. |
| 39 | - "renesas,hscif-r8a7794" for R8A7794 (R-Car E2) HSCIF compatible UART. |
Kuninori Morimoto | 3575b85 | 2015-09-30 11:57:33 +0200 | [diff] [blame] | 40 | - "renesas,scif-r8a7795" for R8A7795 (R-Car H3) SCIF compatible UART. |
| 41 | - "renesas,hscif-r8a7795" for R8A7795 (R-Car H3) HSCIF compatible UART. |
Hiromitsu Yamasaki | ac8305c | 2016-05-12 15:33:58 +0900 | [diff] [blame] | 42 | - "renesas,scif-r8a7796" for R8A7796 (R-Car M3-W) SCIF compatible UART. |
| 43 | - "renesas,hscif-r8a7796" for R8A7796 (R-Car M3-W) HSCIF compatible UART. |
Geert Uytterhoeven | 681b05f | 2014-11-14 16:59:32 +0100 | [diff] [blame] | 44 | - "renesas,scifa-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFA compatible UART. |
| 45 | - "renesas,scifb-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFB compatible UART. |
Geert Uytterhoeven | 598604f | 2015-12-11 12:48:15 +0100 | [diff] [blame] | 46 | - "renesas,rcar-gen1-scif" for R-Car Gen1 SCIF compatible UART, |
| 47 | - "renesas,rcar-gen2-scif" for R-Car Gen2 SCIF compatible UART, |
| 48 | - "renesas,rcar-gen3-scif" for R-Car Gen3 SCIF compatible UART, |
| 49 | - "renesas,rcar-gen2-scifa" for R-Car Gen2 SCIFA compatible UART, |
| 50 | - "renesas,rcar-gen2-scifb" for R-Car Gen2 SCIFB compatible UART, |
| 51 | - "renesas,rcar-gen1-hscif" for R-Car Gen1 HSCIF compatible UART, |
| 52 | - "renesas,rcar-gen2-hscif" for R-Car Gen2 HSCIF compatible UART, |
| 53 | - "renesas,rcar-gen3-hscif" for R-Car Gen3 HSCIF compatible UART, |
Laurent Pinchart | 334bc11 | 2013-12-06 10:59:53 +0100 | [diff] [blame] | 54 | - "renesas,scif" for generic SCIF compatible UART. |
| 55 | - "renesas,scifa" for generic SCIFA compatible UART. |
| 56 | - "renesas,scifb" for generic SCIFB compatible UART. |
| 57 | - "renesas,hscif" for generic HSCIF compatible UART. |
Yoshinori Sato | e1d0be6 | 2015-01-28 02:53:55 +0900 | [diff] [blame] | 58 | - "renesas,sci" for generic SCI compatible UART. |
Laurent Pinchart | 334bc11 | 2013-12-06 10:59:53 +0100 | [diff] [blame] | 59 | |
| 60 | When compatible with the generic version, nodes must list the |
Geert Uytterhoeven | 598604f | 2015-12-11 12:48:15 +0100 | [diff] [blame] | 61 | SoC-specific version corresponding to the platform first, followed by the |
| 62 | family-specific and/or generic versions. |
Laurent Pinchart | 334bc11 | 2013-12-06 10:59:53 +0100 | [diff] [blame] | 63 | |
| 64 | - reg: Base address and length of the I/O registers used by the UART. |
| 65 | - interrupts: Must contain an interrupt-specifier for the SCIx interrupt. |
| 66 | |
| 67 | - clocks: Must contain a phandle and clock-specifier pair for each entry |
| 68 | in clock-names. |
Laurent Pinchart | a9ec81f | 2015-09-14 15:14:23 +0300 | [diff] [blame] | 69 | - clock-names: Must contain "fck" for the SCIx UART functional clock. |
Geert Uytterhoeven | 9a040c9 | 2015-11-12 13:44:29 +0100 | [diff] [blame] | 70 | Apart from the divided functional clock, there may be other possible |
| 71 | sources for the sampling clock, depending on SCIx variant. |
| 72 | On (H)SCI(F) and some SCIFA, an additional clock may be specified: |
| 73 | - "hsck" for the optional external clock input (on HSCIF), |
| 74 | - "sck" for the optional external clock input (on other variants). |
Geert Uytterhoeven | 176ae5f | 2015-10-26 09:43:22 +0100 | [diff] [blame] | 75 | On UARTs equipped with a Baud Rate Generator for External Clock (BRG) |
| 76 | (some SCIF and HSCIF), additional clocks may be specified: |
| 77 | - "brg_int" for the optional internal clock source for the frequency |
| 78 | divider (typically the (AXI or SHwy) bus clock), |
| 79 | - "scif_clk" for the optional external clock source for the frequency |
| 80 | divider (SCIF_CLK). |
Laurent Pinchart | 334bc11 | 2013-12-06 10:59:53 +0100 | [diff] [blame] | 81 | |
| 82 | Note: Each enabled SCIx UART should have an alias correctly numbered in the |
| 83 | "aliases" node. |
| 84 | |
Geert Uytterhoeven | 3c99121 | 2015-05-20 19:46:24 +0200 | [diff] [blame] | 85 | Optional properties: |
| 86 | - dmas: Must contain a list of two references to DMA specifiers, one for |
| 87 | transmission, and one for reception. |
| 88 | - dma-names: Must contain a list of two DMA names, "tx" and "rx". |
Geert Uytterhoeven | 0c529b3 | 2016-06-03 12:00:01 +0200 | [diff] [blame] | 89 | - {cts,dsr,dcd,rng,rts,dtr}-gpios: Specify GPIOs for modem lines, cfr. the |
| 90 | generic serial DT bindings in serial.txt. |
Geert Uytterhoeven | b0405dc | 2016-06-03 12:00:02 +0200 | [diff] [blame] | 91 | - uart-has-rtscts: Indicates dedicated lines for RTS/CTS hardware flow |
| 92 | control, cfr. the generic serial DT bindings in serial.txt. |
Geert Uytterhoeven | 3c99121 | 2015-05-20 19:46:24 +0200 | [diff] [blame] | 93 | |
Laurent Pinchart | 334bc11 | 2013-12-06 10:59:53 +0100 | [diff] [blame] | 94 | Example: |
| 95 | aliases { |
| 96 | serial0 = &scifa0; |
| 97 | }; |
| 98 | |
| 99 | scifa0: serial@e6c40000 { |
Geert Uytterhoeven | 598604f | 2015-12-11 12:48:15 +0100 | [diff] [blame] | 100 | compatible = "renesas,scifa-r8a7790", |
| 101 | "renesas,rcar-gen2-scifa", "renesas,scifa"; |
Laurent Pinchart | 334bc11 | 2013-12-06 10:59:53 +0100 | [diff] [blame] | 102 | reg = <0 0xe6c40000 0 64>; |
| 103 | interrupt-parent = <&gic>; |
| 104 | interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>; |
| 105 | clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>; |
Laurent Pinchart | a9ec81f | 2015-09-14 15:14:23 +0300 | [diff] [blame] | 106 | clock-names = "fck"; |
Geert Uytterhoeven | 3c99121 | 2015-05-20 19:46:24 +0200 | [diff] [blame] | 107 | dmas = <&dmac0 0x21>, <&dmac0 0x22>; |
| 108 | dma-names = "tx", "rx"; |
Laurent Pinchart | 334bc11 | 2013-12-06 10:59:53 +0100 | [diff] [blame] | 109 | }; |