Steffen Trumtrar | a4f3ac4 | 2013-12-18 15:10:26 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright 2012 Steffen Trumtrar, Pengutronix |
| 3 | * |
| 4 | * based on imx27.dtsi |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it under |
| 7 | * the terms of the GNU General Public License version 2 as published by the |
| 8 | * Free Software Foundation. |
| 9 | */ |
| 10 | |
| 11 | #include "skeleton.dtsi" |
| 12 | #include "imx35-pinfunc.h" |
| 13 | |
| 14 | / { |
| 15 | aliases { |
| 16 | gpio0 = &gpio1; |
| 17 | gpio1 = &gpio2; |
| 18 | gpio2 = &gpio3; |
| 19 | serial0 = &uart1; |
| 20 | serial1 = &uart2; |
| 21 | serial2 = &uart3; |
| 22 | spi0 = &spi1; |
| 23 | spi1 = &spi2; |
| 24 | }; |
| 25 | |
| 26 | cpus { |
| 27 | #address-cells = <0>; |
| 28 | #size-cells = <0>; |
| 29 | |
| 30 | cpu { |
| 31 | compatible = "arm,arm1136"; |
| 32 | device_type = "cpu"; |
| 33 | }; |
| 34 | }; |
| 35 | |
| 36 | avic: avic-interrupt-controller@68000000 { |
| 37 | compatible = "fsl,imx35-avic", "fsl,avic"; |
| 38 | interrupt-controller; |
| 39 | #interrupt-cells = <1>; |
| 40 | reg = <0x68000000 0x10000000>; |
| 41 | }; |
| 42 | |
| 43 | soc { |
| 44 | #address-cells = <1>; |
| 45 | #size-cells = <1>; |
| 46 | compatible = "simple-bus"; |
| 47 | interrupt-parent = <&avic>; |
| 48 | ranges; |
| 49 | |
| 50 | L2: l2-cache@30000000 { |
| 51 | compatible = "arm,l210-cache"; |
| 52 | reg = <0x30000000 0x1000>; |
| 53 | cache-unified; |
| 54 | cache-level = <2>; |
| 55 | }; |
| 56 | |
| 57 | aips1: aips@43f00000 { |
| 58 | compatible = "fsl,aips", "simple-bus"; |
| 59 | #address-cells = <1>; |
| 60 | #size-cells = <1>; |
| 61 | reg = <0x43f00000 0x100000>; |
| 62 | ranges; |
| 63 | |
| 64 | i2c1: i2c@43f80000 { |
| 65 | #address-cells = <1>; |
| 66 | #size-cells = <0>; |
| 67 | compatible = "fsl,imx35-i2c", "fsl,imx1-i2c"; |
| 68 | reg = <0x43f80000 0x4000>; |
| 69 | clocks = <&clks 51>; |
| 70 | clock-names = "ipg_per"; |
| 71 | interrupts = <10>; |
| 72 | status = "disabled"; |
| 73 | }; |
| 74 | |
| 75 | i2c3: i2c@43f84000 { |
| 76 | #address-cells = <1>; |
| 77 | #size-cells = <0>; |
| 78 | compatible = "fsl,imx35-i2c", "fsl,imx1-i2c"; |
| 79 | reg = <0x43f84000 0x4000>; |
| 80 | clocks = <&clks 53>; |
| 81 | clock-names = "ipg_per"; |
| 82 | interrupts = <3>; |
| 83 | status = "disabled"; |
| 84 | }; |
| 85 | |
| 86 | uart1: serial@43f90000 { |
| 87 | compatible = "fsl,imx35-uart", "fsl,imx21-uart"; |
| 88 | reg = <0x43f90000 0x4000>; |
| 89 | clocks = <&clks 9>, <&clks 70>; |
| 90 | clock-names = "ipg", "per"; |
| 91 | interrupts = <45>; |
| 92 | status = "disabled"; |
| 93 | }; |
| 94 | |
| 95 | uart2: serial@43f94000 { |
| 96 | compatible = "fsl,imx35-uart", "fsl,imx21-uart"; |
| 97 | reg = <0x43f94000 0x4000>; |
| 98 | clocks = <&clks 9>, <&clks 71>; |
| 99 | clock-names = "ipg", "per"; |
| 100 | interrupts = <32>; |
| 101 | status = "disabled"; |
| 102 | }; |
| 103 | |
| 104 | i2c2: i2c@43f98000 { |
| 105 | #address-cells = <1>; |
| 106 | #size-cells = <0>; |
| 107 | compatible = "fsl,imx35-i2c", "fsl,imx1-i2c"; |
| 108 | reg = <0x43f98000 0x4000>; |
| 109 | clocks = <&clks 52>; |
| 110 | clock-names = "ipg_per"; |
| 111 | interrupts = <4>; |
| 112 | status = "disabled"; |
| 113 | }; |
| 114 | |
| 115 | ssi1: ssi@43fa0000 { |
| 116 | compatible = "fsl,imx35-ssi", "fsl,imx21-ssi"; |
| 117 | reg = <0x43fa0000 0x4000>; |
| 118 | interrupts = <11>; |
| 119 | clocks = <&clks 68>; |
| 120 | dmas = <&sdma 28 0 0>, |
| 121 | <&sdma 29 0 0>; |
| 122 | dma-names = "rx", "tx"; |
| 123 | fsl,fifo-depth = <15>; |
| 124 | status = "disabled"; |
| 125 | }; |
| 126 | |
| 127 | spi1: cspi@43fa4000 { |
| 128 | #address-cells = <1>; |
| 129 | #size-cells = <0>; |
| 130 | compatible = "fsl,imx35-cspi"; |
| 131 | reg = <0x43fa4000 0x4000>; |
| 132 | clocks = <&clks 35 &clks 35>; |
| 133 | clock-names = "ipg", "per"; |
| 134 | interrupts = <14>; |
| 135 | status = "disabled"; |
| 136 | }; |
| 137 | |
| 138 | iomuxc: iomuxc@43fac000 { |
| 139 | compatible = "fsl,imx35-iomuxc"; |
| 140 | reg = <0x43fac000 0x4000>; |
| 141 | }; |
| 142 | }; |
| 143 | |
| 144 | spba: spba-bus@50000000 { |
| 145 | compatible = "fsl,spba-bus", "simple-bus"; |
| 146 | #address-cells = <1>; |
| 147 | #size-cells = <1>; |
| 148 | reg = <0x50000000 0x100000>; |
| 149 | ranges; |
| 150 | |
| 151 | uart3: serial@5000c000 { |
| 152 | compatible = "fsl,imx35-uart", "fsl,imx21-uart"; |
| 153 | reg = <0x5000c000 0x4000>; |
| 154 | clocks = <&clks 9>, <&clks 72>; |
| 155 | clock-names = "ipg", "per"; |
| 156 | interrupts = <18>; |
| 157 | status = "disabled"; |
| 158 | }; |
| 159 | |
| 160 | spi2: cspi@50010000 { |
| 161 | #address-cells = <1>; |
| 162 | #size-cells = <0>; |
| 163 | compatible = "fsl,imx35-cspi"; |
| 164 | reg = <0x50010000 0x4000>; |
| 165 | interrupts = <13>; |
| 166 | clocks = <&clks 36 &clks 36>; |
| 167 | clock-names = "ipg", "per"; |
| 168 | status = "disabled"; |
| 169 | }; |
| 170 | |
| 171 | fec: fec@50038000 { |
| 172 | compatible = "fsl,imx35-fec", "fsl,imx27-fec"; |
| 173 | reg = <0x50038000 0x4000>; |
| 174 | clocks = <&clks 46>, <&clks 8>; |
| 175 | clock-names = "ipg", "ahb"; |
| 176 | interrupts = <57>; |
| 177 | status = "disabled"; |
| 178 | }; |
| 179 | }; |
| 180 | |
| 181 | aips2: aips@53f00000 { |
| 182 | compatible = "fsl,aips", "simple-bus"; |
| 183 | #address-cells = <1>; |
| 184 | #size-cells = <1>; |
| 185 | reg = <0x53f00000 0x100000>; |
| 186 | ranges; |
| 187 | |
| 188 | clks: ccm@53f80000 { |
| 189 | compatible = "fsl,imx35-ccm"; |
| 190 | reg = <0x53f80000 0x4000>; |
| 191 | interrupts = <31>; |
| 192 | #clock-cells = <1>; |
| 193 | }; |
| 194 | |
| 195 | gpio3: gpio@53fa4000 { |
| 196 | compatible = "fsl,imx35-gpio", "fsl,imx31-gpio"; |
| 197 | reg = <0x53fa4000 0x4000>; |
| 198 | interrupts = <56>; |
| 199 | gpio-controller; |
| 200 | #gpio-cells = <2>; |
| 201 | interrupt-controller; |
| 202 | #interrupt-cells = <2>; |
| 203 | }; |
| 204 | |
| 205 | esdhc1: esdhc@53fb4000 { |
| 206 | compatible = "fsl,imx35-esdhc"; |
| 207 | reg = <0x53fb4000 0x4000>; |
| 208 | interrupts = <7>; |
| 209 | clocks = <&clks 9>, <&clks 8>, <&clks 43>; |
| 210 | clock-names = "ipg", "ahb", "per"; |
| 211 | status = "disabled"; |
| 212 | }; |
| 213 | |
| 214 | esdhc2: esdhc@53fb8000 { |
| 215 | compatible = "fsl,imx35-esdhc"; |
| 216 | reg = <0x53fb8000 0x4000>; |
| 217 | interrupts = <8>; |
| 218 | clocks = <&clks 9>, <&clks 8>, <&clks 44>; |
| 219 | clock-names = "ipg", "ahb", "per"; |
| 220 | status = "disabled"; |
| 221 | }; |
| 222 | |
| 223 | esdhc3: esdhc@53fbc000 { |
| 224 | compatible = "fsl,imx35-esdhc"; |
| 225 | reg = <0x53fbc000 0x4000>; |
| 226 | interrupts = <9>; |
| 227 | clocks = <&clks 9>, <&clks 8>, <&clks 45>; |
| 228 | clock-names = "ipg", "ahb", "per"; |
| 229 | status = "disabled"; |
| 230 | }; |
| 231 | |
| 232 | audmux: audmux@53fc4000 { |
| 233 | compatible = "fsl,imx35-audmux", "fsl,imx31-audmux"; |
| 234 | reg = <0x53fc4000 0x4000>; |
| 235 | status = "disabled"; |
| 236 | }; |
| 237 | |
| 238 | gpio1: gpio@53fcc000 { |
| 239 | compatible = "fsl,imx35-gpio", "fsl,imx31-gpio"; |
| 240 | reg = <0x53fcc000 0x4000>; |
| 241 | interrupts = <52>; |
| 242 | gpio-controller; |
| 243 | #gpio-cells = <2>; |
| 244 | interrupt-controller; |
| 245 | #interrupt-cells = <2>; |
| 246 | }; |
| 247 | |
| 248 | gpio2: gpio@53fd0000 { |
| 249 | compatible = "fsl,imx35-gpio", "fsl,imx31-gpio"; |
| 250 | reg = <0x53fd0000 0x4000>; |
| 251 | interrupts = <51>; |
| 252 | gpio-controller; |
| 253 | #gpio-cells = <2>; |
| 254 | interrupt-controller; |
| 255 | #interrupt-cells = <2>; |
| 256 | }; |
| 257 | |
| 258 | sdma: sdma@53fd4000 { |
| 259 | compatible = "fsl,imx35-sdma"; |
| 260 | reg = <0x53fd4000 0x4000>; |
| 261 | clocks = <&clks 9>, <&clks 65>; |
| 262 | clock-names = "ipg", "ahb"; |
| 263 | #dma-cells = <3>; |
| 264 | interrupts = <34>; |
| 265 | fsl,sdma-ram-script-name = "imx/sdma/sdma-imx35.bin"; |
| 266 | }; |
| 267 | |
| 268 | wdog: wdog@53fdc000 { |
| 269 | compatible = "fsl,imx35-wdt", "fsl,imx21-wdt"; |
| 270 | reg = <0x53fdc000 0x4000>; |
| 271 | clocks = <&clks 74>; |
| 272 | clock-names = ""; |
| 273 | interrupts = <55>; |
| 274 | }; |
| 275 | |
| 276 | can1: can@53fe4000 { |
| 277 | compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan"; |
| 278 | reg = <0x53fe4000 0x1000>; |
| 279 | clocks = <&clks 33>; |
| 280 | clock-names = "ipg"; |
| 281 | interrupts = <43>; |
| 282 | status = "disabled"; |
| 283 | }; |
| 284 | |
| 285 | can2: can@53fe8000 { |
| 286 | compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan"; |
| 287 | reg = <0x53fe8000 0x1000>; |
| 288 | clocks = <&clks 34>; |
| 289 | clock-names = "ipg"; |
| 290 | interrupts = <44>; |
| 291 | status = "disabled"; |
| 292 | }; |
| 293 | |
| 294 | usbotg: usb@53ff4000 { |
| 295 | compatible = "fsl,imx35-usb", "fsl,imx27-usb"; |
| 296 | reg = <0x53ff4000 0x0200>; |
| 297 | interrupts = <37>; |
| 298 | clocks = <&clks 9>, <&clks 73>, <&clks 28>; |
| 299 | clock-names = "ipg", "ahb", "per"; |
| 300 | fsl,usbmisc = <&usbmisc 0>; |
| 301 | status = "disabled"; |
| 302 | }; |
| 303 | |
| 304 | usbhost1: usb@53ff4400 { |
| 305 | compatible = "fsl,imx35-usb", "fsl,imx27-usb"; |
| 306 | reg = <0x53ff4400 0x0200>; |
| 307 | interrupts = <35>; |
| 308 | clocks = <&clks 9>, <&clks 73>, <&clks 28>; |
| 309 | clock-names = "ipg", "ahb", "per"; |
| 310 | fsl,usbmisc = <&usbmisc 1>; |
| 311 | status = "disabled"; |
| 312 | }; |
| 313 | |
| 314 | usbmisc: usbmisc@53ff4600 { |
| 315 | #index-cells = <1>; |
| 316 | compatible = "fsl,imx35-usbmisc"; |
| 317 | clocks = <&clks 9>, <&clks 73>, <&clks 28>; |
| 318 | clock-names = "ipg", "ahb", "per"; |
| 319 | reg = <0x53ff4600 0x00f>; |
| 320 | }; |
| 321 | }; |
| 322 | |
| 323 | emi@80000000 { /* External Memory Interface */ |
| 324 | compatible = "fsl,emi", "simple-bus"; |
| 325 | #address-cells = <1>; |
| 326 | #size-cells = <1>; |
| 327 | reg = <0x80000000 0x40000000>; |
| 328 | ranges; |
| 329 | |
| 330 | nfc: nand@bb000000 { |
| 331 | #address-cells = <1>; |
| 332 | #size-cells = <1>; |
| 333 | compatible = "fsl,imx35-nand", "fsl,imx25-nand"; |
| 334 | reg = <0xbb000000 0x2000>; |
| 335 | clocks = <&clks 29>; |
| 336 | clock-names = ""; |
| 337 | interrupts = <33>; |
| 338 | status = "disabled"; |
| 339 | }; |
| 340 | |
| 341 | weim: weim@b8002000 { |
| 342 | #address-cells = <2>; |
| 343 | #size-cells = <1>; |
| 344 | clocks = <&clks 0>; |
| 345 | compatible = "fsl,imx35-weim", "fsl,imx27-weim"; |
| 346 | reg = <0xb8002000 0x1000>; |
| 347 | ranges = < |
| 348 | 0 0 0xa0000000 0x8000000 |
| 349 | 1 0 0xa8000000 0x8000000 |
| 350 | 2 0 0xb0000000 0x2000000 |
| 351 | 3 0 0xb2000000 0x2000000 |
| 352 | 4 0 0xb4000000 0x2000000 |
| 353 | 5 0 0xb6000000 0x2000000 |
| 354 | >; |
| 355 | status = "disabled"; |
| 356 | }; |
| 357 | }; |
| 358 | }; |
| 359 | }; |