blob: 524dec0a3adb2cc7e85e02a2588a170703de912a [file] [log] [blame]
Dan Williamsb94d5232015-05-19 22:54:31 -04001/*
2 * NVDIMM Firmware Interface Table - NFIT
3 *
4 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 */
15#ifndef __NFIT_H__
16#define __NFIT_H__
17#include <linux/libnvdimm.h>
18#include <linux/types.h>
19#include <linux/uuid.h>
20#include <linux/acpi.h>
21#include <acpi/acuuid.h>
22
23#define UUID_NFIT_BUS "2f10e7a4-9e91-11e4-89d3-123b93f75cba"
24#define UUID_NFIT_DIMM "4309ac30-0d11-11e4-9191-0800200c9a66"
Dan Williams58138822015-06-23 20:08:34 -040025#define ACPI_NFIT_MEM_FAILED_MASK (ACPI_NFIT_MEM_SAVE_FAILED \
26 | ACPI_NFIT_MEM_RESTORE_FAILED | ACPI_NFIT_MEM_FLUSH_FAILED \
Bob Mooreca321d12015-10-19 10:24:52 +080027 | ACPI_NFIT_MEM_NOT_ARMED)
Dan Williamsb94d5232015-05-19 22:54:31 -040028
29enum nfit_uuids {
30 NFIT_SPA_VOLATILE,
31 NFIT_SPA_PM,
32 NFIT_SPA_DCR,
33 NFIT_SPA_BDW,
34 NFIT_SPA_VDISK,
35 NFIT_SPA_VCD,
36 NFIT_SPA_PDISK,
37 NFIT_SPA_PCD,
38 NFIT_DEV_BUS,
39 NFIT_DEV_DIMM,
40 NFIT_UUID_MAX,
41};
42
Dan Williamsbe26f9a2016-02-01 17:48:42 -080043enum nfit_fic {
44 NFIT_FIC_BYTE = 0x101, /* byte-addressable energy backed */
45 NFIT_FIC_BLK = 0x201, /* block-addressable non-energy backed */
46 NFIT_FIC_BYTEN = 0x301, /* byte-addressable non-energy backed */
47};
48
Ross Zwislerf0f2c072015-07-10 11:06:14 -060049enum {
Dan Williamsaef25332016-02-12 17:01:11 -080050 NFIT_BLK_READ_FLUSH = 1,
51 NFIT_BLK_DCR_LATCH = 2,
52 NFIT_ARS_STATUS_DONE = 0,
53 NFIT_ARS_STATUS_BUSY = 1 << 16,
54 NFIT_ARS_STATUS_NONE = 2 << 16,
55 NFIT_ARS_STATUS_INTR = 3 << 16,
56 NFIT_ARS_START_BUSY = 6,
57 NFIT_ARS_CAP_NONE = 1,
58 NFIT_ARS_F_OVERFLOW = 1,
Ross Zwislerf0f2c072015-07-10 11:06:14 -060059};
60
Dan Williamsb94d5232015-05-19 22:54:31 -040061struct nfit_spa {
62 struct acpi_nfit_system_address *spa;
63 struct list_head list;
Vishal Verma20985162015-10-27 16:58:27 -060064 int is_registered;
Dan Williamsb94d5232015-05-19 22:54:31 -040065};
66
67struct nfit_dcr {
68 struct acpi_nfit_control_region *dcr;
69 struct list_head list;
70};
71
72struct nfit_bdw {
73 struct acpi_nfit_data_region *bdw;
74 struct list_head list;
75};
76
Ross Zwisler047fc8a2015-06-25 04:21:02 -040077struct nfit_idt {
78 struct acpi_nfit_interleave *idt;
79 struct list_head list;
80};
81
Ross Zwislerc2ad2952015-07-10 11:06:13 -060082struct nfit_flush {
83 struct acpi_nfit_flush_address *flush;
84 struct list_head list;
85};
86
Dan Williamsb94d5232015-05-19 22:54:31 -040087struct nfit_memdev {
88 struct acpi_nfit_memory_map *memdev;
89 struct list_head list;
90};
91
92/* assembled tables for a given dimm/memory-device */
93struct nfit_mem {
Dan Williamse6dfb2d2015-04-25 03:56:17 -040094 struct nvdimm *nvdimm;
Dan Williamsb94d5232015-05-19 22:54:31 -040095 struct acpi_nfit_memory_map *memdev_dcr;
96 struct acpi_nfit_memory_map *memdev_pmem;
Ross Zwisler047fc8a2015-06-25 04:21:02 -040097 struct acpi_nfit_memory_map *memdev_bdw;
Dan Williamsb94d5232015-05-19 22:54:31 -040098 struct acpi_nfit_control_region *dcr;
99 struct acpi_nfit_data_region *bdw;
100 struct acpi_nfit_system_address *spa_dcr;
101 struct acpi_nfit_system_address *spa_bdw;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400102 struct acpi_nfit_interleave *idt_dcr;
103 struct acpi_nfit_interleave *idt_bdw;
Ross Zwislerc2ad2952015-07-10 11:06:13 -0600104 struct nfit_flush *nfit_flush;
Dan Williamsb94d5232015-05-19 22:54:31 -0400105 struct list_head list;
Dan Williams62232e452015-06-08 14:27:06 -0400106 struct acpi_device *adev;
107 unsigned long dsm_mask;
Dan Williamsb94d5232015-05-19 22:54:31 -0400108};
109
110struct acpi_nfit_desc {
111 struct nvdimm_bus_descriptor nd_desc;
Linda Knippers6b577c92015-11-20 19:05:49 -0500112 struct acpi_table_header acpi_header;
113 struct acpi_nfit_header *nfit;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400114 struct mutex spa_map_mutex;
Vishal Verma20985162015-10-27 16:58:27 -0600115 struct mutex init_mutex;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400116 struct list_head spa_maps;
Dan Williamsb94d5232015-05-19 22:54:31 -0400117 struct list_head memdevs;
Ross Zwislerc2ad2952015-07-10 11:06:13 -0600118 struct list_head flushes;
Dan Williamsb94d5232015-05-19 22:54:31 -0400119 struct list_head dimms;
120 struct list_head spas;
121 struct list_head dcrs;
122 struct list_head bdws;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400123 struct list_head idts;
Dan Williamsb94d5232015-05-19 22:54:31 -0400124 struct nvdimm_bus *nvdimm_bus;
125 struct device *dev;
Dan Williams62232e452015-06-08 14:27:06 -0400126 unsigned long dimm_dsm_force_en;
Vishal Verma39c686b2015-07-09 13:25:36 -0600127 unsigned long bus_dsm_force_en;
Dan Williams6bc75612015-06-17 17:23:32 -0400128 int (*blk_do_io)(struct nd_blk_region *ndbr, resource_size_t dpa,
129 void *iobuf, u64 len, int rw);
Dan Williamsb94d5232015-05-19 22:54:31 -0400130};
131
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400132enum nd_blk_mmio_selector {
133 BDW,
134 DCR,
135};
136
Ross Zwisler67a3e8f2015-08-27 13:14:20 -0600137struct nd_blk_addr {
138 union {
139 void __iomem *base;
140 void __pmem *aperture;
141 };
142};
143
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400144struct nfit_blk {
145 struct nfit_blk_mmio {
Ross Zwisler67a3e8f2015-08-27 13:14:20 -0600146 struct nd_blk_addr addr;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400147 u64 size;
148 u64 base_offset;
149 u32 line_size;
150 u32 num_lines;
151 u32 table_size;
152 struct acpi_nfit_interleave *idt;
153 struct acpi_nfit_system_address *spa;
154 } mmio[2];
155 struct nd_region *nd_region;
156 u64 bdw_offset; /* post interleave offset */
157 u64 stat_offset;
158 u64 cmd_offset;
Ross Zwislerc2ad2952015-07-10 11:06:13 -0600159 void __iomem *nvdimm_flush;
Ross Zwislerf0f2c072015-07-10 11:06:14 -0600160 u32 dimm_flags;
Ross Zwislerc2ad2952015-07-10 11:06:13 -0600161};
162
163enum spa_map_type {
164 SPA_MAP_CONTROL,
165 SPA_MAP_APERTURE,
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400166};
167
168struct nfit_spa_mapping {
169 struct acpi_nfit_desc *acpi_desc;
170 struct acpi_nfit_system_address *spa;
171 struct list_head list;
172 struct kref kref;
Ross Zwisler67a3e8f2015-08-27 13:14:20 -0600173 enum spa_map_type type;
174 struct nd_blk_addr addr;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400175};
176
177static inline struct nfit_spa_mapping *to_spa_map(struct kref *kref)
178{
179 return container_of(kref, struct nfit_spa_mapping, kref);
180}
181
Dan Williamsb94d5232015-05-19 22:54:31 -0400182static inline struct acpi_nfit_memory_map *__to_nfit_memdev(
183 struct nfit_mem *nfit_mem)
184{
185 if (nfit_mem->memdev_dcr)
186 return nfit_mem->memdev_dcr;
187 return nfit_mem->memdev_pmem;
188}
Dan Williams45def222015-04-26 19:26:48 -0400189
190static inline struct acpi_nfit_desc *to_acpi_desc(
191 struct nvdimm_bus_descriptor *nd_desc)
192{
193 return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
194}
Dan Williams6bc75612015-06-17 17:23:32 -0400195
196const u8 *to_nfit_uuid(enum nfit_uuids id);
197int acpi_nfit_init(struct acpi_nfit_desc *nfit, acpi_size sz);
Dan Williamsa61fe6f2016-02-19 12:29:32 -0800198void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev);
Dan Williamsb94d5232015-05-19 22:54:31 -0400199#endif /* __NFIT_H__ */