Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Persistent Memory Driver |
| 3 | * |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 4 | * Copyright (c) 2014-2015, Intel Corporation. |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 5 | * Copyright (c) 2015, Christoph Hellwig <hch@lst.de>. |
| 6 | * Copyright (c) 2015, Boaz Harrosh <boaz@plexistor.com>. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | * under the terms and conditions of the GNU General Public License, |
| 10 | * version 2, as published by the Free Software Foundation. |
| 11 | * |
| 12 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 15 | * more details. |
| 16 | */ |
| 17 | |
| 18 | #include <asm/cacheflush.h> |
| 19 | #include <linux/blkdev.h> |
| 20 | #include <linux/hdreg.h> |
| 21 | #include <linux/init.h> |
| 22 | #include <linux/platform_device.h> |
| 23 | #include <linux/module.h> |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 24 | #include <linux/memory_hotplug.h> |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 25 | #include <linux/moduleparam.h> |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 26 | #include <linux/vmalloc.h> |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 27 | #include <linux/slab.h> |
Ross Zwisler | 6103195 | 2015-06-25 03:08:39 -0400 | [diff] [blame] | 28 | #include <linux/pmem.h> |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 29 | #include <linux/nd.h> |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 30 | #include "pfn.h" |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 31 | #include "nd.h" |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 32 | |
| 33 | struct pmem_device { |
| 34 | struct request_queue *pmem_queue; |
| 35 | struct gendisk *pmem_disk; |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 36 | struct nd_namespace_common *ndns; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 37 | |
| 38 | /* One contiguous memory region per device */ |
| 39 | phys_addr_t phys_addr; |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 40 | /* when non-zero this device is hosting a 'pfn' instance */ |
| 41 | phys_addr_t data_offset; |
Ross Zwisler | 6103195 | 2015-06-25 03:08:39 -0400 | [diff] [blame] | 42 | void __pmem *virt_addr; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 43 | size_t size; |
| 44 | }; |
| 45 | |
| 46 | static int pmem_major; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 47 | |
| 48 | static void pmem_do_bvec(struct pmem_device *pmem, struct page *page, |
| 49 | unsigned int len, unsigned int off, int rw, |
| 50 | sector_t sector) |
| 51 | { |
| 52 | void *mem = kmap_atomic(page); |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 53 | phys_addr_t pmem_off = sector * 512 + pmem->data_offset; |
Ross Zwisler | 6103195 | 2015-06-25 03:08:39 -0400 | [diff] [blame] | 54 | void __pmem *pmem_addr = pmem->virt_addr + pmem_off; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 55 | |
| 56 | if (rw == READ) { |
Ross Zwisler | 6103195 | 2015-06-25 03:08:39 -0400 | [diff] [blame] | 57 | memcpy_from_pmem(mem + off, pmem_addr, len); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 58 | flush_dcache_page(page); |
| 59 | } else { |
| 60 | flush_dcache_page(page); |
Ross Zwisler | 6103195 | 2015-06-25 03:08:39 -0400 | [diff] [blame] | 61 | memcpy_to_pmem(pmem_addr, mem + off, len); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 62 | } |
| 63 | |
| 64 | kunmap_atomic(mem); |
| 65 | } |
| 66 | |
| 67 | static void pmem_make_request(struct request_queue *q, struct bio *bio) |
| 68 | { |
Dan Williams | f0dc089 | 2015-05-16 12:28:53 -0400 | [diff] [blame] | 69 | bool do_acct; |
| 70 | unsigned long start; |
Dan Williams | edc870e | 2015-05-16 12:28:51 -0400 | [diff] [blame] | 71 | struct bio_vec bvec; |
| 72 | struct bvec_iter iter; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 73 | struct block_device *bdev = bio->bi_bdev; |
| 74 | struct pmem_device *pmem = bdev->bd_disk->private_data; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 75 | |
Dan Williams | f0dc089 | 2015-05-16 12:28:53 -0400 | [diff] [blame] | 76 | do_acct = nd_iostat_start(bio, &start); |
Dan Williams | edc870e | 2015-05-16 12:28:51 -0400 | [diff] [blame] | 77 | bio_for_each_segment(bvec, bio, iter) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 78 | pmem_do_bvec(pmem, bvec.bv_page, bvec.bv_len, bvec.bv_offset, |
Dan Williams | edc870e | 2015-05-16 12:28:51 -0400 | [diff] [blame] | 79 | bio_data_dir(bio), iter.bi_sector); |
Dan Williams | f0dc089 | 2015-05-16 12:28:53 -0400 | [diff] [blame] | 80 | if (do_acct) |
| 81 | nd_iostat_end(bio, start); |
Ross Zwisler | 6103195 | 2015-06-25 03:08:39 -0400 | [diff] [blame] | 82 | |
| 83 | if (bio_data_dir(bio)) |
| 84 | wmb_pmem(); |
| 85 | |
Christoph Hellwig | 4246a0b | 2015-07-20 15:29:37 +0200 | [diff] [blame] | 86 | bio_endio(bio); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 87 | } |
| 88 | |
| 89 | static int pmem_rw_page(struct block_device *bdev, sector_t sector, |
| 90 | struct page *page, int rw) |
| 91 | { |
| 92 | struct pmem_device *pmem = bdev->bd_disk->private_data; |
| 93 | |
| 94 | pmem_do_bvec(pmem, page, PAGE_CACHE_SIZE, 0, rw, sector); |
Ross Zwisler | ba8fe0f | 2015-09-16 14:52:21 -0600 | [diff] [blame] | 95 | if (rw & WRITE) |
| 96 | wmb_pmem(); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 97 | page_endio(page, rw & WRITE, 0); |
| 98 | |
| 99 | return 0; |
| 100 | } |
| 101 | |
| 102 | static long pmem_direct_access(struct block_device *bdev, sector_t sector, |
Dan Williams | cb389b9 | 2015-08-07 17:41:00 -0400 | [diff] [blame] | 103 | void __pmem **kaddr, unsigned long *pfn) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 104 | { |
| 105 | struct pmem_device *pmem = bdev->bd_disk->private_data; |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 106 | resource_size_t offset = sector * 512 + pmem->data_offset; |
| 107 | resource_size_t size; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 108 | |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 109 | if (pmem->data_offset) { |
| 110 | /* |
| 111 | * Limit the direct_access() size to what is covered by |
| 112 | * the memmap |
| 113 | */ |
| 114 | size = (pmem->size - offset) & ~ND_PFN_MASK; |
| 115 | } else |
| 116 | size = pmem->size - offset; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 117 | |
Ross Zwisler | 6103195 | 2015-06-25 03:08:39 -0400 | [diff] [blame] | 118 | /* FIXME convert DAX to comprehend that this mapping has a lifetime */ |
Ross Zwisler | e2e0539 | 2015-08-18 13:55:41 -0600 | [diff] [blame] | 119 | *kaddr = pmem->virt_addr + offset; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 120 | *pfn = (pmem->phys_addr + offset) >> PAGE_SHIFT; |
| 121 | |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 122 | return size; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 123 | } |
| 124 | |
| 125 | static const struct block_device_operations pmem_fops = { |
| 126 | .owner = THIS_MODULE, |
| 127 | .rw_page = pmem_rw_page, |
| 128 | .direct_access = pmem_direct_access, |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 129 | .revalidate_disk = nvdimm_revalidate_disk, |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 130 | }; |
| 131 | |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 132 | static struct pmem_device *pmem_alloc(struct device *dev, |
| 133 | struct resource *res, int id) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 134 | { |
| 135 | struct pmem_device *pmem; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 136 | |
Christoph Hellwig | 708ab62 | 2015-08-10 23:07:08 -0400 | [diff] [blame] | 137 | pmem = devm_kzalloc(dev, sizeof(*pmem), GFP_KERNEL); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 138 | if (!pmem) |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 139 | return ERR_PTR(-ENOMEM); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 140 | |
| 141 | pmem->phys_addr = res->start; |
| 142 | pmem->size = resource_size(res); |
Dan Williams | 96601ad | 2015-08-24 18:29:38 -0400 | [diff] [blame] | 143 | if (!arch_has_wmb_pmem()) |
Ross Zwisler | 6103195 | 2015-06-25 03:08:39 -0400 | [diff] [blame] | 144 | dev_warn(dev, "unable to guarantee persistence of writes\n"); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 145 | |
Christoph Hellwig | 708ab62 | 2015-08-10 23:07:08 -0400 | [diff] [blame] | 146 | if (!devm_request_mem_region(dev, pmem->phys_addr, pmem->size, |
| 147 | dev_name(dev))) { |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 148 | dev_warn(dev, "could not reserve region [0x%pa:0x%zx]\n", |
| 149 | &pmem->phys_addr, pmem->size); |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 150 | return ERR_PTR(-EBUSY); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 151 | } |
| 152 | |
Dan Williams | 004f1af | 2015-08-24 19:20:23 -0400 | [diff] [blame] | 153 | if (pmem_should_map_pages(dev)) { |
| 154 | void *addr = devm_memremap_pages(dev, res); |
| 155 | |
| 156 | if (IS_ERR(addr)) |
| 157 | return addr; |
| 158 | pmem->virt_addr = (void __pmem *) addr; |
| 159 | } else { |
Dan Williams | a639315 | 2015-09-15 02:14:03 -0400 | [diff] [blame^] | 160 | pmem->virt_addr = (void __pmem *) devm_memremap(dev, |
| 161 | pmem->phys_addr, pmem->size, |
| 162 | ARCH_MEMREMAP_PMEM); |
Dan Williams | 004f1af | 2015-08-24 19:20:23 -0400 | [diff] [blame] | 163 | if (!pmem->virt_addr) |
| 164 | return ERR_PTR(-ENXIO); |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 165 | } |
| 166 | |
| 167 | return pmem; |
| 168 | } |
| 169 | |
| 170 | static void pmem_detach_disk(struct pmem_device *pmem) |
| 171 | { |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 172 | if (!pmem->pmem_disk) |
| 173 | return; |
| 174 | |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 175 | del_gendisk(pmem->pmem_disk); |
| 176 | put_disk(pmem->pmem_disk); |
| 177 | blk_cleanup_queue(pmem->pmem_queue); |
| 178 | } |
| 179 | |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 180 | static int pmem_attach_disk(struct device *dev, |
| 181 | struct nd_namespace_common *ndns, struct pmem_device *pmem) |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 182 | { |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 183 | struct gendisk *disk; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 184 | |
| 185 | pmem->pmem_queue = blk_alloc_queue(GFP_KERNEL); |
| 186 | if (!pmem->pmem_queue) |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 187 | return -ENOMEM; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 188 | |
| 189 | blk_queue_make_request(pmem->pmem_queue, pmem_make_request); |
Vishal Verma | 6b47496 | 2015-07-23 11:58:48 -0600 | [diff] [blame] | 190 | blk_queue_physical_block_size(pmem->pmem_queue, PAGE_SIZE); |
Dan Williams | 43d3fa3 | 2015-05-16 12:28:50 -0400 | [diff] [blame] | 191 | blk_queue_max_hw_sectors(pmem->pmem_queue, UINT_MAX); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 192 | blk_queue_bounce_limit(pmem->pmem_queue, BLK_BOUNCE_ANY); |
Dan Williams | 0f51c4f | 2015-05-16 12:28:54 -0400 | [diff] [blame] | 193 | queue_flag_set_unlocked(QUEUE_FLAG_NONROT, pmem->pmem_queue); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 194 | |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 195 | disk = alloc_disk(0); |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 196 | if (!disk) { |
| 197 | blk_cleanup_queue(pmem->pmem_queue); |
| 198 | return -ENOMEM; |
| 199 | } |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 200 | |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 201 | disk->major = pmem_major; |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 202 | disk->first_minor = 0; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 203 | disk->fops = &pmem_fops; |
| 204 | disk->private_data = pmem; |
| 205 | disk->queue = pmem->pmem_queue; |
| 206 | disk->flags = GENHD_FL_EXT_DEVT; |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 207 | nvdimm_namespace_disk_name(ndns, disk->disk_name); |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 208 | disk->driverfs_dev = dev; |
| 209 | set_capacity(disk, (pmem->size - pmem->data_offset) / 512); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 210 | pmem->pmem_disk = disk; |
| 211 | |
| 212 | add_disk(disk); |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 213 | revalidate_disk(disk); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 214 | |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 215 | return 0; |
| 216 | } |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 217 | |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 218 | static int pmem_rw_bytes(struct nd_namespace_common *ndns, |
| 219 | resource_size_t offset, void *buf, size_t size, int rw) |
| 220 | { |
| 221 | struct pmem_device *pmem = dev_get_drvdata(ndns->claim); |
| 222 | |
| 223 | if (unlikely(offset + size > pmem->size)) { |
| 224 | dev_WARN_ONCE(&ndns->dev, 1, "request out of range\n"); |
| 225 | return -EFAULT; |
| 226 | } |
| 227 | |
| 228 | if (rw == READ) |
Ross Zwisler | 6103195 | 2015-06-25 03:08:39 -0400 | [diff] [blame] | 229 | memcpy_from_pmem(buf, pmem->virt_addr + offset, size); |
| 230 | else { |
| 231 | memcpy_to_pmem(pmem->virt_addr + offset, buf, size); |
| 232 | wmb_pmem(); |
| 233 | } |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 234 | |
| 235 | return 0; |
| 236 | } |
| 237 | |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 238 | static int nd_pfn_init(struct nd_pfn *nd_pfn) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 239 | { |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 240 | struct nd_pfn_sb *pfn_sb = kzalloc(sizeof(*pfn_sb), GFP_KERNEL); |
| 241 | struct pmem_device *pmem = dev_get_drvdata(&nd_pfn->dev); |
| 242 | struct nd_namespace_common *ndns = nd_pfn->ndns; |
| 243 | struct nd_region *nd_region; |
| 244 | unsigned long npfns; |
| 245 | phys_addr_t offset; |
| 246 | u64 checksum; |
| 247 | int rc; |
| 248 | |
| 249 | if (!pfn_sb) |
| 250 | return -ENOMEM; |
| 251 | |
| 252 | nd_pfn->pfn_sb = pfn_sb; |
| 253 | rc = nd_pfn_validate(nd_pfn); |
| 254 | if (rc == 0 || rc == -EBUSY) |
| 255 | return rc; |
| 256 | |
| 257 | /* section alignment for simple hotplug */ |
| 258 | if (nvdimm_namespace_capacity(ndns) < ND_PFN_ALIGN |
| 259 | || pmem->phys_addr & ND_PFN_MASK) |
| 260 | return -ENODEV; |
| 261 | |
| 262 | nd_region = to_nd_region(nd_pfn->dev.parent); |
| 263 | if (nd_region->ro) { |
| 264 | dev_info(&nd_pfn->dev, |
| 265 | "%s is read-only, unable to init metadata\n", |
| 266 | dev_name(&nd_region->dev)); |
| 267 | goto err; |
| 268 | } |
| 269 | |
| 270 | memset(pfn_sb, 0, sizeof(*pfn_sb)); |
| 271 | npfns = (pmem->size - SZ_8K) / SZ_4K; |
| 272 | /* |
| 273 | * Note, we use 64 here for the standard size of struct page, |
| 274 | * debugging options may cause it to be larger in which case the |
| 275 | * implementation will limit the pfns advertised through |
| 276 | * ->direct_access() to those that are included in the memmap. |
| 277 | */ |
| 278 | if (nd_pfn->mode == PFN_MODE_PMEM) |
| 279 | offset = ALIGN(SZ_8K + 64 * npfns, PMD_SIZE); |
| 280 | else if (nd_pfn->mode == PFN_MODE_RAM) |
| 281 | offset = SZ_8K; |
| 282 | else |
| 283 | goto err; |
| 284 | |
| 285 | npfns = (pmem->size - offset) / SZ_4K; |
| 286 | pfn_sb->mode = cpu_to_le32(nd_pfn->mode); |
| 287 | pfn_sb->dataoff = cpu_to_le64(offset); |
| 288 | pfn_sb->npfns = cpu_to_le64(npfns); |
| 289 | memcpy(pfn_sb->signature, PFN_SIG, PFN_SIG_LEN); |
| 290 | memcpy(pfn_sb->uuid, nd_pfn->uuid, 16); |
| 291 | pfn_sb->version_major = cpu_to_le16(1); |
| 292 | checksum = nd_sb_checksum((struct nd_gen_sb *) pfn_sb); |
| 293 | pfn_sb->checksum = cpu_to_le64(checksum); |
| 294 | |
| 295 | rc = nvdimm_write_bytes(ndns, SZ_4K, pfn_sb, sizeof(*pfn_sb)); |
| 296 | if (rc) |
| 297 | goto err; |
| 298 | |
| 299 | return 0; |
| 300 | err: |
| 301 | nd_pfn->pfn_sb = NULL; |
| 302 | kfree(pfn_sb); |
| 303 | return -ENXIO; |
| 304 | } |
| 305 | |
| 306 | static int nvdimm_namespace_detach_pfn(struct nd_namespace_common *ndns) |
| 307 | { |
| 308 | struct nd_pfn *nd_pfn = to_nd_pfn(ndns->claim); |
| 309 | struct pmem_device *pmem; |
| 310 | |
| 311 | /* free pmem disk */ |
| 312 | pmem = dev_get_drvdata(&nd_pfn->dev); |
| 313 | pmem_detach_disk(pmem); |
| 314 | |
| 315 | /* release nd_pfn resources */ |
| 316 | kfree(nd_pfn->pfn_sb); |
| 317 | nd_pfn->pfn_sb = NULL; |
| 318 | |
| 319 | return 0; |
| 320 | } |
| 321 | |
| 322 | static int nvdimm_namespace_attach_pfn(struct nd_namespace_common *ndns) |
| 323 | { |
| 324 | struct nd_namespace_io *nsio = to_nd_namespace_io(&ndns->dev); |
| 325 | struct nd_pfn *nd_pfn = to_nd_pfn(ndns->claim); |
| 326 | struct device *dev = &nd_pfn->dev; |
| 327 | struct vmem_altmap *altmap; |
| 328 | struct nd_region *nd_region; |
| 329 | struct nd_pfn_sb *pfn_sb; |
| 330 | struct pmem_device *pmem; |
| 331 | phys_addr_t offset; |
| 332 | int rc; |
| 333 | |
| 334 | if (!nd_pfn->uuid || !nd_pfn->ndns) |
| 335 | return -ENODEV; |
| 336 | |
| 337 | nd_region = to_nd_region(dev->parent); |
| 338 | rc = nd_pfn_init(nd_pfn); |
| 339 | if (rc) |
| 340 | return rc; |
| 341 | |
| 342 | if (PAGE_SIZE != SZ_4K) { |
| 343 | dev_err(dev, "only supported on systems with 4K PAGE_SIZE\n"); |
| 344 | return -ENXIO; |
| 345 | } |
| 346 | if (nsio->res.start & ND_PFN_MASK) { |
| 347 | dev_err(dev, "%s not memory hotplug section aligned\n", |
| 348 | dev_name(&ndns->dev)); |
| 349 | return -ENXIO; |
| 350 | } |
| 351 | |
| 352 | pfn_sb = nd_pfn->pfn_sb; |
| 353 | offset = le64_to_cpu(pfn_sb->dataoff); |
| 354 | nd_pfn->mode = le32_to_cpu(nd_pfn->pfn_sb->mode); |
| 355 | if (nd_pfn->mode == PFN_MODE_RAM) { |
| 356 | if (offset != SZ_8K) |
| 357 | return -EINVAL; |
| 358 | nd_pfn->npfns = le64_to_cpu(pfn_sb->npfns); |
| 359 | altmap = NULL; |
| 360 | } else { |
| 361 | rc = -ENXIO; |
| 362 | goto err; |
| 363 | } |
| 364 | |
| 365 | /* establish pfn range for lookup, and switch to direct map */ |
| 366 | pmem = dev_get_drvdata(dev); |
Dan Williams | a639315 | 2015-09-15 02:14:03 -0400 | [diff] [blame^] | 367 | devm_memunmap(dev, (void __force *) pmem->virt_addr); |
| 368 | pmem->virt_addr = (void __pmem *) devm_memremap_pages(dev, &nsio->res); |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 369 | if (IS_ERR(pmem->virt_addr)) { |
| 370 | rc = PTR_ERR(pmem->virt_addr); |
| 371 | goto err; |
| 372 | } |
| 373 | |
| 374 | /* attach pmem disk in "pfn-mode" */ |
| 375 | pmem->data_offset = offset; |
| 376 | rc = pmem_attach_disk(dev, ndns, pmem); |
| 377 | if (rc) |
| 378 | goto err; |
| 379 | |
| 380 | return rc; |
| 381 | err: |
| 382 | nvdimm_namespace_detach_pfn(ndns); |
| 383 | return rc; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 384 | } |
| 385 | |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 386 | static int nd_pmem_probe(struct device *dev) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 387 | { |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 388 | struct nd_region *nd_region = to_nd_region(dev->parent); |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 389 | struct nd_namespace_common *ndns; |
| 390 | struct nd_namespace_io *nsio; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 391 | struct pmem_device *pmem; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 392 | |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 393 | ndns = nvdimm_namespace_common_probe(dev); |
| 394 | if (IS_ERR(ndns)) |
| 395 | return PTR_ERR(ndns); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 396 | |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 397 | nsio = to_nd_namespace_io(&ndns->dev); |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 398 | pmem = pmem_alloc(dev, &nsio->res, nd_region->id); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 399 | if (IS_ERR(pmem)) |
| 400 | return PTR_ERR(pmem); |
| 401 | |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 402 | pmem->ndns = ndns; |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 403 | dev_set_drvdata(dev, pmem); |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 404 | ndns->rw_bytes = pmem_rw_bytes; |
Christoph Hellwig | 708ab62 | 2015-08-10 23:07:08 -0400 | [diff] [blame] | 405 | |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 406 | if (is_nd_btt(dev)) |
Christoph Hellwig | 708ab62 | 2015-08-10 23:07:08 -0400 | [diff] [blame] | 407 | return nvdimm_namespace_attach_btt(ndns); |
| 408 | |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 409 | if (is_nd_pfn(dev)) |
| 410 | return nvdimm_namespace_attach_pfn(ndns); |
| 411 | |
| 412 | if (nd_btt_probe(ndns, pmem) == 0) { |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 413 | /* we'll come back as btt-pmem */ |
Christoph Hellwig | 708ab62 | 2015-08-10 23:07:08 -0400 | [diff] [blame] | 414 | return -ENXIO; |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 415 | } |
| 416 | |
| 417 | if (nd_pfn_probe(ndns, pmem) == 0) { |
| 418 | /* we'll come back as pfn-pmem */ |
| 419 | return -ENXIO; |
| 420 | } |
| 421 | |
| 422 | return pmem_attach_disk(dev, ndns, pmem); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 423 | } |
| 424 | |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 425 | static int nd_pmem_remove(struct device *dev) |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 426 | { |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 427 | struct pmem_device *pmem = dev_get_drvdata(dev); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 428 | |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 429 | if (is_nd_btt(dev)) |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 430 | nvdimm_namespace_detach_btt(pmem->ndns); |
| 431 | else if (is_nd_pfn(dev)) |
| 432 | nvdimm_namespace_detach_pfn(pmem->ndns); |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 433 | else |
| 434 | pmem_detach_disk(pmem); |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 435 | |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 436 | return 0; |
| 437 | } |
| 438 | |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 439 | MODULE_ALIAS("pmem"); |
| 440 | MODULE_ALIAS_ND_DEVICE(ND_DEVICE_NAMESPACE_IO); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 441 | MODULE_ALIAS_ND_DEVICE(ND_DEVICE_NAMESPACE_PMEM); |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 442 | static struct nd_device_driver nd_pmem_driver = { |
| 443 | .probe = nd_pmem_probe, |
| 444 | .remove = nd_pmem_remove, |
| 445 | .drv = { |
| 446 | .name = "nd_pmem", |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 447 | }, |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 448 | .type = ND_DRIVER_NAMESPACE_IO | ND_DRIVER_NAMESPACE_PMEM, |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 449 | }; |
| 450 | |
| 451 | static int __init pmem_init(void) |
| 452 | { |
| 453 | int error; |
| 454 | |
| 455 | pmem_major = register_blkdev(0, "pmem"); |
| 456 | if (pmem_major < 0) |
| 457 | return pmem_major; |
| 458 | |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 459 | error = nd_driver_register(&nd_pmem_driver); |
| 460 | if (error) { |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 461 | unregister_blkdev(pmem_major, "pmem"); |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 462 | return error; |
| 463 | } |
| 464 | |
| 465 | return 0; |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 466 | } |
| 467 | module_init(pmem_init); |
| 468 | |
| 469 | static void pmem_exit(void) |
| 470 | { |
Dan Williams | 9f53f9f | 2015-06-09 15:33:45 -0400 | [diff] [blame] | 471 | driver_unregister(&nd_pmem_driver.drv); |
Ross Zwisler | 9e853f2 | 2015-04-01 09:12:19 +0200 | [diff] [blame] | 472 | unregister_blkdev(pmem_major, "pmem"); |
| 473 | } |
| 474 | module_exit(pmem_exit); |
| 475 | |
| 476 | MODULE_AUTHOR("Ross Zwisler <ross.zwisler@linux.intel.com>"); |
| 477 | MODULE_LICENSE("GPL v2"); |