blob: 71f01204a590f8b4641ee22d97e8fa60ff660575 [file] [log] [blame]
Jerome Anand5dab11d2017-01-25 04:27:52 +05301/*
2 * intel_hdmi_audio.c - Intel HDMI audio driver
3 *
4 * Copyright (C) 2016 Intel Corp
5 * Authors: Sailaja Bandarupalli <sailaja.bandarupalli@intel.com>
6 * Ramesh Babu K V <ramesh.babu@intel.com>
7 * Vaibhav Agarwal <vaibhav.agarwal@intel.com>
8 * Jerome Anand <jerome.anand@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
21 * ALSA driver for Intel HDMI audio
22 */
23
Takashi Iwai03c34372017-02-02 16:19:03 +010024#include <linux/types.h>
Jerome Anand5dab11d2017-01-25 04:27:52 +053025#include <linux/platform_device.h>
26#include <linux/io.h>
27#include <linux/slab.h>
28#include <linux/module.h>
Takashi Iwaida864802017-01-31 13:52:22 +010029#include <linux/interrupt.h>
Takashi Iwai03c34372017-02-02 16:19:03 +010030#include <linux/pm_runtime.h>
Takashi Iwai412bbe7d52017-02-02 22:03:22 +010031#include <linux/dma-mapping.h>
Takashi Iwaie2acecf2017-02-11 08:21:56 +010032#include <linux/delay.h>
Jerome Anand5dab11d2017-01-25 04:27:52 +053033#include <asm/cacheflush.h>
Jerome Anand5dab11d2017-01-25 04:27:52 +053034#include <sound/core.h>
Takashi Iwai03c34372017-02-02 16:19:03 +010035#include <sound/asoundef.h>
36#include <sound/pcm.h>
Jerome Anand5dab11d2017-01-25 04:27:52 +053037#include <sound/pcm_params.h>
38#include <sound/initval.h>
39#include <sound/control.h>
Takashi Iwaib9bacf22017-02-14 12:29:38 +010040#include <sound/jack.h>
Takashi Iwai03c34372017-02-02 16:19:03 +010041#include <drm/drm_edid.h>
Takashi Iwaida864802017-01-31 13:52:22 +010042#include <drm/intel_lpe_audio.h>
Jerome Anand5dab11d2017-01-25 04:27:52 +053043#include "intel_hdmi_audio.h"
44
Jerome Anand5dab11d2017-01-25 04:27:52 +053045/*standard module options for ALSA. This module supports only one card*/
46static int hdmi_card_index = SNDRV_DEFAULT_IDX1;
47static char *hdmi_card_id = SNDRV_DEFAULT_STR1;
Jerome Anand5dab11d2017-01-25 04:27:52 +053048
49module_param_named(index, hdmi_card_index, int, 0444);
50MODULE_PARM_DESC(index,
51 "Index value for INTEL Intel HDMI Audio controller.");
52module_param_named(id, hdmi_card_id, charp, 0444);
53MODULE_PARM_DESC(id,
54 "ID string for INTEL Intel HDMI Audio controller.");
55
56/*
57 * ELD SA bits in the CEA Speaker Allocation data block
58 */
Takashi Iwai4a5ddb22017-02-01 16:45:38 +010059static const int eld_speaker_allocation_bits[] = {
Jerome Anand5dab11d2017-01-25 04:27:52 +053060 [0] = FL | FR,
61 [1] = LFE,
62 [2] = FC,
63 [3] = RL | RR,
64 [4] = RC,
65 [5] = FLC | FRC,
66 [6] = RLC | RRC,
67 /* the following are not defined in ELD yet */
68 [7] = 0,
69};
70
71/*
72 * This is an ordered list!
73 *
74 * The preceding ones have better chances to be selected by
75 * hdmi_channel_allocation().
76 */
77static struct cea_channel_speaker_allocation channel_allocations[] = {
78/* channel: 7 6 5 4 3 2 1 0 */
79{ .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
80 /* 2.1 */
81{ .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
82 /* Dolby Surround */
83{ .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
84 /* surround40 */
85{ .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
86 /* surround41 */
87{ .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
88 /* surround50 */
89{ .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
90 /* surround51 */
91{ .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
92 /* 6.1 */
93{ .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
94 /* surround71 */
95{ .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
96
97{ .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
98{ .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
99{ .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
100{ .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
101{ .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
102{ .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
103{ .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
104{ .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
105{ .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
106{ .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
107{ .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
108{ .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
109{ .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
110{ .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
111{ .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
112{ .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
113{ .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
114{ .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
115{ .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
116{ .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
117{ .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
118{ .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
119{ .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
120};
121
Takashi Iwai4a5ddb22017-02-01 16:45:38 +0100122static const struct channel_map_table map_tables[] = {
Jerome Anand5dab11d2017-01-25 04:27:52 +0530123 { SNDRV_CHMAP_FL, 0x00, FL },
124 { SNDRV_CHMAP_FR, 0x01, FR },
125 { SNDRV_CHMAP_RL, 0x04, RL },
126 { SNDRV_CHMAP_RR, 0x05, RR },
127 { SNDRV_CHMAP_LFE, 0x02, LFE },
128 { SNDRV_CHMAP_FC, 0x03, FC },
129 { SNDRV_CHMAP_RLC, 0x06, RLC },
130 { SNDRV_CHMAP_RRC, 0x07, RRC },
131 {} /* terminator */
132};
133
134/* hardware capability structure */
Takashi Iwaib5562902017-02-04 22:05:33 +0100135static const struct snd_pcm_hardware had_pcm_hardware = {
Jerome Anand5dab11d2017-01-25 04:27:52 +0530136 .info = (SNDRV_PCM_INFO_INTERLEAVED |
Takashi Iwaia9ebdd02017-02-02 21:33:54 +0100137 SNDRV_PCM_INFO_MMAP |
Takashi Iwaie8de9852017-02-07 08:09:12 +0100138 SNDRV_PCM_INFO_MMAP_VALID |
139 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
Takashi Iwai3fe2cf72017-02-07 13:53:42 +0100140 .formats = (SNDRV_PCM_FMTBIT_S16_LE |
141 SNDRV_PCM_FMTBIT_S24_LE |
Takashi Iwai85bd8742017-02-07 13:33:17 +0100142 SNDRV_PCM_FMTBIT_S32_LE),
Jerome Anand5dab11d2017-01-25 04:27:52 +0530143 .rates = SNDRV_PCM_RATE_32000 |
144 SNDRV_PCM_RATE_44100 |
145 SNDRV_PCM_RATE_48000 |
146 SNDRV_PCM_RATE_88200 |
147 SNDRV_PCM_RATE_96000 |
148 SNDRV_PCM_RATE_176400 |
149 SNDRV_PCM_RATE_192000,
150 .rate_min = HAD_MIN_RATE,
151 .rate_max = HAD_MAX_RATE,
152 .channels_min = HAD_MIN_CHANNEL,
153 .channels_max = HAD_MAX_CHANNEL,
154 .buffer_bytes_max = HAD_MAX_BUFFER,
155 .period_bytes_min = HAD_MIN_PERIOD_BYTES,
156 .period_bytes_max = HAD_MAX_PERIOD_BYTES,
157 .periods_min = HAD_MIN_PERIODS,
158 .periods_max = HAD_MAX_PERIODS,
159 .fifo_size = HAD_FIFO_SIZE,
160};
161
Takashi Iwai313d9f22017-02-02 13:00:12 +0100162/* Get the active PCM substream;
163 * Call had_substream_put() for unreferecing.
164 * Don't call this inside had_spinlock, as it takes by itself
165 */
166static struct snd_pcm_substream *
167had_substream_get(struct snd_intelhad *intelhaddata)
168{
169 struct snd_pcm_substream *substream;
170 unsigned long flags;
171
172 spin_lock_irqsave(&intelhaddata->had_spinlock, flags);
173 substream = intelhaddata->stream_info.substream;
174 if (substream)
175 intelhaddata->stream_info.substream_refcount++;
176 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flags);
177 return substream;
178}
179
180/* Unref the active PCM substream;
181 * Don't call this inside had_spinlock, as it takes by itself
182 */
183static void had_substream_put(struct snd_intelhad *intelhaddata)
184{
185 unsigned long flags;
186
187 spin_lock_irqsave(&intelhaddata->had_spinlock, flags);
188 intelhaddata->stream_info.substream_refcount--;
189 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flags);
190}
191
Jerome Anand5dab11d2017-01-25 04:27:52 +0530192/* Register access functions */
Takashi Iwai83af57d2017-02-03 08:50:06 +0100193static void had_read_register(struct snd_intelhad *ctx, u32 reg, u32 *val)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530194{
Takashi Iwaida864802017-01-31 13:52:22 +0100195 *val = ioread32(ctx->mmio_start + ctx->had_config_offset + reg);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530196}
197
Takashi Iwai83af57d2017-02-03 08:50:06 +0100198static void had_write_register(struct snd_intelhad *ctx, u32 reg, u32 val)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530199{
Takashi Iwaida864802017-01-31 13:52:22 +0100200 iowrite32(val, ctx->mmio_start + ctx->had_config_offset + reg);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530201}
202
Takashi Iwaida864802017-01-31 13:52:22 +0100203/*
Takashi Iwai313d9f22017-02-02 13:00:12 +0100204 * enable / disable audio configuration
205 *
Takashi Iwai83af57d2017-02-03 08:50:06 +0100206 * The normal read/modify should not directly be used on VLV2 for
Takashi Iwaida864802017-01-31 13:52:22 +0100207 * updating AUD_CONFIG register.
Jerome Anand5dab11d2017-01-25 04:27:52 +0530208 * This is because:
209 * Bit6 of AUD_CONFIG register is writeonly due to a silicon bug on VLV2
210 * HDMI IP. As a result a read-modify of AUD_CONFIG regiter will always
211 * clear bit6. AUD_CONFIG[6:4] represents the "channels" field of the
212 * register. This field should be 1xy binary for configuration with 6 or
213 * more channels. Read-modify of AUD_CONFIG (Eg. for enabling audio)
214 * causes the "channels" field to be updated as 0xy binary resulting in
215 * bad audio. The fix is to always write the AUD_CONFIG[6:4] with
216 * appropriate value when doing read-modify of AUD_CONFIG register.
Jerome Anand5dab11d2017-01-25 04:27:52 +0530217 */
Takashi Iwai40ce4b52017-02-07 16:17:06 +0100218static void had_enable_audio(struct snd_intelhad *intelhaddata,
Takashi Iwaib5562902017-02-04 22:05:33 +0100219 bool enable)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530220{
Takashi Iwai40ce4b52017-02-07 16:17:06 +0100221 /* update the cached value */
222 intelhaddata->aud_config.regx.aud_en = enable;
223 had_write_register(intelhaddata, AUD_CONFIG,
224 intelhaddata->aud_config.regval);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530225}
226
Takashi Iwai075a1d42017-02-07 07:55:27 +0100227/* forcibly ACKs to both BUFFER_DONE and BUFFER_UNDERRUN interrupts */
228static void had_ack_irqs(struct snd_intelhad *ctx)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530229{
Takashi Iwaida864802017-01-31 13:52:22 +0100230 u32 status_reg;
231
Takashi Iwai075a1d42017-02-07 07:55:27 +0100232 had_read_register(ctx, AUD_HDMI_STATUS, &status_reg);
233 status_reg |= HDMI_AUDIO_BUFFER_DONE | HDMI_AUDIO_UNDERRUN;
234 had_write_register(ctx, AUD_HDMI_STATUS, status_reg);
235 had_read_register(ctx, AUD_HDMI_STATUS, &status_reg);
Takashi Iwaida864802017-01-31 13:52:22 +0100236}
237
Takashi Iwaif4566aa2017-02-04 21:39:56 +0100238/* Reset buffer pointers */
239static void had_reset_audio(struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530240{
Takashi Iwai77531be2017-02-07 12:17:23 +0100241 had_write_register(intelhaddata, AUD_HDMI_STATUS,
242 AUD_HDMI_STATUSG_MASK_FUNCRST);
Takashi Iwaif4566aa2017-02-04 21:39:56 +0100243 had_write_register(intelhaddata, AUD_HDMI_STATUS, 0);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530244}
245
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100246/*
Jerome Anand5dab11d2017-01-25 04:27:52 +0530247 * initialize audio channel status registers
248 * This function is called in the prepare callback
249 */
250static int had_prog_status_reg(struct snd_pcm_substream *substream,
251 struct snd_intelhad *intelhaddata)
252{
Takashi Iwai7ceba752017-02-02 15:58:35 +0100253 union aud_cfg cfg_val = {.regval = 0};
254 union aud_ch_status_0 ch_stat0 = {.regval = 0};
255 union aud_ch_status_1 ch_stat1 = {.regval = 0};
Jerome Anand5dab11d2017-01-25 04:27:52 +0530256
Takashi Iwai7ceba752017-02-02 15:58:35 +0100257 ch_stat0.regx.lpcm_id = (intelhaddata->aes_bits &
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100258 IEC958_AES0_NONAUDIO) >> 1;
Takashi Iwai7ceba752017-02-02 15:58:35 +0100259 ch_stat0.regx.clk_acc = (intelhaddata->aes_bits &
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100260 IEC958_AES3_CON_CLOCK) >> 4;
Takashi Iwai7ceba752017-02-02 15:58:35 +0100261 cfg_val.regx.val_bit = ch_stat0.regx.lpcm_id;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530262
263 switch (substream->runtime->rate) {
264 case AUD_SAMPLE_RATE_32:
Takashi Iwai7ceba752017-02-02 15:58:35 +0100265 ch_stat0.regx.samp_freq = CH_STATUS_MAP_32KHZ;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530266 break;
267
268 case AUD_SAMPLE_RATE_44_1:
Takashi Iwai7ceba752017-02-02 15:58:35 +0100269 ch_stat0.regx.samp_freq = CH_STATUS_MAP_44KHZ;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530270 break;
271 case AUD_SAMPLE_RATE_48:
Takashi Iwai7ceba752017-02-02 15:58:35 +0100272 ch_stat0.regx.samp_freq = CH_STATUS_MAP_48KHZ;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530273 break;
274 case AUD_SAMPLE_RATE_88_2:
Takashi Iwai7ceba752017-02-02 15:58:35 +0100275 ch_stat0.regx.samp_freq = CH_STATUS_MAP_88KHZ;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530276 break;
277 case AUD_SAMPLE_RATE_96:
Takashi Iwai7ceba752017-02-02 15:58:35 +0100278 ch_stat0.regx.samp_freq = CH_STATUS_MAP_96KHZ;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530279 break;
280 case AUD_SAMPLE_RATE_176_4:
Takashi Iwai7ceba752017-02-02 15:58:35 +0100281 ch_stat0.regx.samp_freq = CH_STATUS_MAP_176KHZ;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530282 break;
283 case AUD_SAMPLE_RATE_192:
Takashi Iwai7ceba752017-02-02 15:58:35 +0100284 ch_stat0.regx.samp_freq = CH_STATUS_MAP_192KHZ;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530285 break;
286
287 default:
288 /* control should never come here */
289 return -EINVAL;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530290 }
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100291
Takashi Iwai79dda752017-01-30 17:23:39 +0100292 had_write_register(intelhaddata,
Takashi Iwai7ceba752017-02-02 15:58:35 +0100293 AUD_CH_STATUS_0, ch_stat0.regval);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530294
Takashi Iwai85bd8742017-02-07 13:33:17 +0100295 switch (substream->runtime->format) {
Takashi Iwai85bd8742017-02-07 13:33:17 +0100296 case SNDRV_PCM_FORMAT_S16_LE:
Takashi Iwai7ceba752017-02-02 15:58:35 +0100297 ch_stat1.regx.max_wrd_len = MAX_SMPL_WIDTH_20;
298 ch_stat1.regx.wrd_len = SMPL_WIDTH_16BITS;
Takashi Iwai85bd8742017-02-07 13:33:17 +0100299 break;
Takashi Iwai85bd8742017-02-07 13:33:17 +0100300 case SNDRV_PCM_FORMAT_S24_LE:
301 case SNDRV_PCM_FORMAT_S32_LE:
Takashi Iwai7ceba752017-02-02 15:58:35 +0100302 ch_stat1.regx.max_wrd_len = MAX_SMPL_WIDTH_24;
303 ch_stat1.regx.wrd_len = SMPL_WIDTH_24BITS;
Takashi Iwai85bd8742017-02-07 13:33:17 +0100304 break;
305 default:
306 return -EINVAL;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530307 }
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100308
Takashi Iwai79dda752017-01-30 17:23:39 +0100309 had_write_register(intelhaddata,
Takashi Iwai7ceba752017-02-02 15:58:35 +0100310 AUD_CH_STATUS_1, ch_stat1.regval);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530311 return 0;
312}
313
Takashi Iwai76296ef2017-01-30 16:09:11 +0100314/*
Jerome Anand5dab11d2017-01-25 04:27:52 +0530315 * function to initialize audio
316 * registers and buffer confgiuration registers
317 * This function is called in the prepare callback
318 */
Takashi Iwaib5562902017-02-04 22:05:33 +0100319static int had_init_audio_ctrl(struct snd_pcm_substream *substream,
320 struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530321{
Takashi Iwai7ceba752017-02-02 15:58:35 +0100322 union aud_cfg cfg_val = {.regval = 0};
323 union aud_buf_config buf_cfg = {.regval = 0};
Jerome Anand5dab11d2017-01-25 04:27:52 +0530324 u8 channels;
325
326 had_prog_status_reg(substream, intelhaddata);
327
Takashi Iwai7ceba752017-02-02 15:58:35 +0100328 buf_cfg.regx.audio_fifo_watermark = FIFO_THRESHOLD;
329 buf_cfg.regx.dma_fifo_watermark = DMA_FIFO_THRESHOLD;
330 buf_cfg.regx.aud_delay = 0;
331 had_write_register(intelhaddata, AUD_BUF_CONFIG, buf_cfg.regval);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530332
333 channels = substream->runtime->channels;
Takashi Iwai7ceba752017-02-02 15:58:35 +0100334 cfg_val.regx.num_ch = channels - 2;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530335 if (channels <= 2)
Takashi Iwai7ceba752017-02-02 15:58:35 +0100336 cfg_val.regx.layout = LAYOUT0;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530337 else
Takashi Iwai7ceba752017-02-02 15:58:35 +0100338 cfg_val.regx.layout = LAYOUT1;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530339
Takashi Iwai3fe2cf72017-02-07 13:53:42 +0100340 if (substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE)
341 cfg_val.regx.packet_mode = 1;
342
Takashi Iwai85bd8742017-02-07 13:33:17 +0100343 if (substream->runtime->format == SNDRV_PCM_FORMAT_S32_LE)
344 cfg_val.regx.left_align = 1;
345
Takashi Iwai7ceba752017-02-02 15:58:35 +0100346 cfg_val.regx.val_bit = 1;
Takashi Iwai83af57d2017-02-03 08:50:06 +0100347
348 /* fix up the DP bits */
349 if (intelhaddata->dp_output) {
350 cfg_val.regx.dp_modei = 1;
351 cfg_val.regx.set = 1;
352 }
353
Takashi Iwai7ceba752017-02-02 15:58:35 +0100354 had_write_register(intelhaddata, AUD_CONFIG, cfg_val.regval);
Takashi Iwai40ce4b52017-02-07 16:17:06 +0100355 intelhaddata->aud_config = cfg_val;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530356 return 0;
357}
358
Jerome Anand5dab11d2017-01-25 04:27:52 +0530359/*
360 * Compute derived values in channel_allocations[].
361 */
362static void init_channel_allocations(void)
363{
364 int i, j;
365 struct cea_channel_speaker_allocation *p;
366
Jerome Anand5dab11d2017-01-25 04:27:52 +0530367 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
368 p = channel_allocations + i;
369 p->channels = 0;
370 p->spk_mask = 0;
371 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
372 if (p->speakers[j]) {
373 p->channels++;
374 p->spk_mask |= p->speakers[j];
375 }
376 }
377}
378
379/*
380 * The transformation takes two steps:
381 *
382 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
383 * spk_mask => (channel_allocations[]) => ai->CA
384 *
385 * TODO: it could select the wrong CA from multiple candidates.
386 */
Takashi Iwaib5562902017-02-04 22:05:33 +0100387static int had_channel_allocation(struct snd_intelhad *intelhaddata,
388 int channels)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530389{
390 int i;
391 int ca = 0;
392 int spk_mask = 0;
393
394 /*
395 * CA defaults to 0 for basic stereo audio
396 */
397 if (channels <= 2)
398 return 0;
399
400 /*
401 * expand ELD's speaker allocation mask
402 *
403 * ELD tells the speaker mask in a compact(paired) form,
404 * expand ELD's notions to match the ones used by Audio InfoFrame.
405 */
406
407 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
Takashi Iwaidf0435d2017-02-02 15:37:11 +0100408 if (intelhaddata->eld[DRM_ELD_SPEAKER] & (1 << i))
Jerome Anand5dab11d2017-01-25 04:27:52 +0530409 spk_mask |= eld_speaker_allocation_bits[i];
410 }
411
412 /* search for the first working match in the CA table */
413 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
414 if (channels == channel_allocations[i].channels &&
415 (spk_mask & channel_allocations[i].spk_mask) ==
416 channel_allocations[i].spk_mask) {
417 ca = channel_allocations[i].ca_index;
418 break;
419 }
420 }
421
Takashi Iwaic75b0472017-01-31 15:49:15 +0100422 dev_dbg(intelhaddata->dev, "select CA 0x%x for %d\n", ca, channels);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530423
424 return ca;
425}
426
427/* from speaker bit mask to ALSA API channel position */
428static int spk_to_chmap(int spk)
429{
Takashi Iwai4a5ddb22017-02-01 16:45:38 +0100430 const struct channel_map_table *t = map_tables;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530431
432 for (; t->map; t++) {
433 if (t->spk_mask == spk)
434 return t->map;
435 }
436 return 0;
437}
438
Takashi Iwai372d8552017-01-31 13:57:58 +0100439static void had_build_channel_allocation_map(struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530440{
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100441 int i, c;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530442 int spk_mask = 0;
443 struct snd_pcm_chmap_elem *chmap;
444 u8 eld_high, eld_high_mask = 0xF0;
445 u8 high_msb;
446
Takashi Iwai18353192017-02-15 21:42:20 +0100447 kfree(intelhaddata->chmap->chmap);
448 intelhaddata->chmap->chmap = NULL;
449
Jerome Anand5dab11d2017-01-25 04:27:52 +0530450 chmap = kzalloc(sizeof(*chmap), GFP_KERNEL);
Takashi Iwai18353192017-02-15 21:42:20 +0100451 if (!chmap)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530452 return;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530453
Takashi Iwaidf0435d2017-02-02 15:37:11 +0100454 dev_dbg(intelhaddata->dev, "eld speaker = %x\n",
455 intelhaddata->eld[DRM_ELD_SPEAKER]);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530456
457 /* WA: Fix the max channel supported to 8 */
458
459 /*
460 * Sink may support more than 8 channels, if eld_high has more than
461 * one bit set. SOC supports max 8 channels.
462 * Refer eld_speaker_allocation_bits, for sink speaker allocation
463 */
464
465 /* if 0x2F < eld < 0x4F fall back to 0x2f, else fall back to 0x4F */
Takashi Iwaidf0435d2017-02-02 15:37:11 +0100466 eld_high = intelhaddata->eld[DRM_ELD_SPEAKER] & eld_high_mask;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530467 if ((eld_high & (eld_high-1)) && (eld_high > 0x1F)) {
468 /* eld_high & (eld_high-1): if more than 1 bit set */
469 /* 0x1F: 7 channels */
470 for (i = 1; i < 4; i++) {
471 high_msb = eld_high & (0x80 >> i);
472 if (high_msb) {
Takashi Iwaidf0435d2017-02-02 15:37:11 +0100473 intelhaddata->eld[DRM_ELD_SPEAKER] &=
Jerome Anand5dab11d2017-01-25 04:27:52 +0530474 high_msb | 0xF;
475 break;
476 }
477 }
478 }
479
480 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
Takashi Iwaidf0435d2017-02-02 15:37:11 +0100481 if (intelhaddata->eld[DRM_ELD_SPEAKER] & (1 << i))
Jerome Anand5dab11d2017-01-25 04:27:52 +0530482 spk_mask |= eld_speaker_allocation_bits[i];
483 }
484
485 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
486 if (spk_mask == channel_allocations[i].spk_mask) {
487 for (c = 0; c < channel_allocations[i].channels; c++) {
488 chmap->map[c] = spk_to_chmap(
489 channel_allocations[i].speakers[
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100490 (MAX_SPEAKERS - 1) - c]);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530491 }
492 chmap->channels = channel_allocations[i].channels;
493 intelhaddata->chmap->chmap = chmap;
494 break;
495 }
496 }
Takashi Iwai18353192017-02-15 21:42:20 +0100497 if (i >= ARRAY_SIZE(channel_allocations))
Jerome Anand5dab11d2017-01-25 04:27:52 +0530498 kfree(chmap);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530499}
500
501/*
502 * ALSA API channel-map control callbacks
503 */
504static int had_chmap_ctl_info(struct snd_kcontrol *kcontrol,
505 struct snd_ctl_elem_info *uinfo)
506{
Jerome Anand5dab11d2017-01-25 04:27:52 +0530507 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
508 uinfo->count = HAD_MAX_CHANNEL;
509 uinfo->value.integer.min = 0;
510 uinfo->value.integer.max = SNDRV_CHMAP_LAST;
511 return 0;
512}
513
514static int had_chmap_ctl_get(struct snd_kcontrol *kcontrol,
515 struct snd_ctl_elem_value *ucontrol)
516{
517 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
518 struct snd_intelhad *intelhaddata = info->private_data;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100519 int i;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530520 const struct snd_pcm_chmap_elem *chmap;
521
Takashi Iwaia72ccfb2017-02-15 21:45:06 +0100522 memset(ucontrol->value.integer.value, 0,
523 sizeof(long) * HAD_MAX_CHANNEL);
Takashi Iwai8f8d1d72017-02-01 17:24:02 +0100524 mutex_lock(&intelhaddata->mutex);
525 if (!intelhaddata->chmap->chmap) {
526 mutex_unlock(&intelhaddata->mutex);
Takashi Iwaia72ccfb2017-02-15 21:45:06 +0100527 return 0;
Takashi Iwai8f8d1d72017-02-01 17:24:02 +0100528 }
529
Jerome Anand5dab11d2017-01-25 04:27:52 +0530530 chmap = intelhaddata->chmap->chmap;
Takashi Iwaic75b0472017-01-31 15:49:15 +0100531 for (i = 0; i < chmap->channels; i++)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530532 ucontrol->value.integer.value[i] = chmap->map[i];
Takashi Iwai8f8d1d72017-02-01 17:24:02 +0100533 mutex_unlock(&intelhaddata->mutex);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530534
535 return 0;
536}
537
538static int had_register_chmap_ctls(struct snd_intelhad *intelhaddata,
539 struct snd_pcm *pcm)
540{
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100541 int err;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530542
543 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
544 NULL, 0, (unsigned long)intelhaddata,
545 &intelhaddata->chmap);
546 if (err < 0)
547 return err;
548
549 intelhaddata->chmap->private_data = intelhaddata;
Takashi Iwaie9d65ab2017-01-31 16:11:27 +0100550 intelhaddata->chmap->kctl->info = had_chmap_ctl_info;
551 intelhaddata->chmap->kctl->get = had_chmap_ctl_get;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530552 intelhaddata->chmap->chmap = NULL;
553 return 0;
554}
555
Takashi Iwai76296ef2017-01-30 16:09:11 +0100556/*
Takashi Iwai44684f62017-02-02 17:27:40 +0100557 * Initialize Data Island Packets registers
Jerome Anand5dab11d2017-01-25 04:27:52 +0530558 * This function is called in the prepare callback
559 */
Takashi Iwaib5562902017-02-04 22:05:33 +0100560static void had_prog_dip(struct snd_pcm_substream *substream,
561 struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530562{
563 int i;
Takashi Iwai7ceba752017-02-02 15:58:35 +0100564 union aud_ctrl_st ctrl_state = {.regval = 0};
565 union aud_info_frame2 frame2 = {.regval = 0};
566 union aud_info_frame3 frame3 = {.regval = 0};
Jerome Anand5dab11d2017-01-25 04:27:52 +0530567 u8 checksum = 0;
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600568 u32 info_frame;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530569 int channels;
Takashi Iwai36ed3462017-02-02 17:06:38 +0100570 int ca;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530571
572 channels = substream->runtime->channels;
573
Takashi Iwai7ceba752017-02-02 15:58:35 +0100574 had_write_register(intelhaddata, AUD_CNTL_ST, ctrl_state.regval);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530575
Takashi Iwaib5562902017-02-04 22:05:33 +0100576 ca = had_channel_allocation(intelhaddata, channels);
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600577 if (intelhaddata->dp_output) {
578 info_frame = DP_INFO_FRAME_WORD1;
Takashi Iwai36ed3462017-02-02 17:06:38 +0100579 frame2.regval = (substream->runtime->channels - 1) | (ca << 24);
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600580 } else {
581 info_frame = HDMI_INFO_FRAME_WORD1;
Takashi Iwai7ceba752017-02-02 15:58:35 +0100582 frame2.regx.chnl_cnt = substream->runtime->channels - 1;
Takashi Iwai36ed3462017-02-02 17:06:38 +0100583 frame3.regx.chnl_alloc = ca;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530584
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100585 /* Calculte the byte wide checksum for all valid DIP words */
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600586 for (i = 0; i < BYTES_PER_WORD; i++)
Takashi Iwai7ceba752017-02-02 15:58:35 +0100587 checksum += (info_frame >> (i * 8)) & 0xff;
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600588 for (i = 0; i < BYTES_PER_WORD; i++)
Takashi Iwai7ceba752017-02-02 15:58:35 +0100589 checksum += (frame2.regval >> (i * 8)) & 0xff;
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600590 for (i = 0; i < BYTES_PER_WORD; i++)
Takashi Iwai7ceba752017-02-02 15:58:35 +0100591 checksum += (frame3.regval >> (i * 8)) & 0xff;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530592
Takashi Iwai7ceba752017-02-02 15:58:35 +0100593 frame2.regx.chksum = -(checksum);
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600594 }
Jerome Anand5dab11d2017-01-25 04:27:52 +0530595
Takashi Iwai4151ee82017-01-31 18:14:15 +0100596 had_write_register(intelhaddata, AUD_HDMIW_INFOFR, info_frame);
Takashi Iwai7ceba752017-02-02 15:58:35 +0100597 had_write_register(intelhaddata, AUD_HDMIW_INFOFR, frame2.regval);
598 had_write_register(intelhaddata, AUD_HDMIW_INFOFR, frame3.regval);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530599
600 /* program remaining DIP words with zero */
601 for (i = 0; i < HAD_MAX_DIP_WORDS-VALID_DIP_WORDS; i++)
Takashi Iwai4151ee82017-01-31 18:14:15 +0100602 had_write_register(intelhaddata, AUD_HDMIW_INFOFR, 0x0);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530603
Takashi Iwai7ceba752017-02-02 15:58:35 +0100604 ctrl_state.regx.dip_freq = 1;
605 ctrl_state.regx.dip_en_sta = 1;
606 had_write_register(intelhaddata, AUD_CNTL_ST, ctrl_state.regval);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530607}
608
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600609static int had_calculate_maud_value(u32 aud_samp_freq, u32 link_rate)
610{
611 u32 maud_val;
612
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100613 /* Select maud according to DP 1.2 spec */
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600614 if (link_rate == DP_2_7_GHZ) {
615 switch (aud_samp_freq) {
616 case AUD_SAMPLE_RATE_32:
617 maud_val = AUD_SAMPLE_RATE_32_DP_2_7_MAUD_VAL;
618 break;
619
620 case AUD_SAMPLE_RATE_44_1:
621 maud_val = AUD_SAMPLE_RATE_44_1_DP_2_7_MAUD_VAL;
622 break;
623
624 case AUD_SAMPLE_RATE_48:
625 maud_val = AUD_SAMPLE_RATE_48_DP_2_7_MAUD_VAL;
626 break;
627
628 case AUD_SAMPLE_RATE_88_2:
629 maud_val = AUD_SAMPLE_RATE_88_2_DP_2_7_MAUD_VAL;
630 break;
631
632 case AUD_SAMPLE_RATE_96:
633 maud_val = AUD_SAMPLE_RATE_96_DP_2_7_MAUD_VAL;
634 break;
635
636 case AUD_SAMPLE_RATE_176_4:
637 maud_val = AUD_SAMPLE_RATE_176_4_DP_2_7_MAUD_VAL;
638 break;
639
640 case HAD_MAX_RATE:
641 maud_val = HAD_MAX_RATE_DP_2_7_MAUD_VAL;
642 break;
643
644 default:
645 maud_val = -EINVAL;
646 break;
647 }
648 } else if (link_rate == DP_1_62_GHZ) {
649 switch (aud_samp_freq) {
650 case AUD_SAMPLE_RATE_32:
651 maud_val = AUD_SAMPLE_RATE_32_DP_1_62_MAUD_VAL;
652 break;
653
654 case AUD_SAMPLE_RATE_44_1:
655 maud_val = AUD_SAMPLE_RATE_44_1_DP_1_62_MAUD_VAL;
656 break;
657
658 case AUD_SAMPLE_RATE_48:
659 maud_val = AUD_SAMPLE_RATE_48_DP_1_62_MAUD_VAL;
660 break;
661
662 case AUD_SAMPLE_RATE_88_2:
663 maud_val = AUD_SAMPLE_RATE_88_2_DP_1_62_MAUD_VAL;
664 break;
665
666 case AUD_SAMPLE_RATE_96:
667 maud_val = AUD_SAMPLE_RATE_96_DP_1_62_MAUD_VAL;
668 break;
669
670 case AUD_SAMPLE_RATE_176_4:
671 maud_val = AUD_SAMPLE_RATE_176_4_DP_1_62_MAUD_VAL;
672 break;
673
674 case HAD_MAX_RATE:
675 maud_val = HAD_MAX_RATE_DP_1_62_MAUD_VAL;
676 break;
677
678 default:
679 maud_val = -EINVAL;
680 break;
681 }
682 } else
683 maud_val = -EINVAL;
684
685 return maud_val;
686}
687
Takashi Iwai76296ef2017-01-30 16:09:11 +0100688/*
Takashi Iwai44684f62017-02-02 17:27:40 +0100689 * Program HDMI audio CTS value
Jerome Anand5dab11d2017-01-25 04:27:52 +0530690 *
691 * @aud_samp_freq: sampling frequency of audio data
692 * @tmds: sampling frequency of the display data
Takashi Iwaib5562902017-02-04 22:05:33 +0100693 * @link_rate: DP link rate
Jerome Anand5dab11d2017-01-25 04:27:52 +0530694 * @n_param: N value, depends on aud_samp_freq
Takashi Iwaib5562902017-02-04 22:05:33 +0100695 * @intelhaddata: substream private data
Jerome Anand5dab11d2017-01-25 04:27:52 +0530696 *
697 * Program CTS register based on the audio and display sampling frequency
698 */
Takashi Iwaib5562902017-02-04 22:05:33 +0100699static void had_prog_cts(u32 aud_samp_freq, u32 tmds, u32 link_rate,
700 u32 n_param, struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530701{
702 u32 cts_val;
703 u64 dividend, divisor;
704
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600705 if (intelhaddata->dp_output) {
706 /* Substitute cts_val with Maud according to DP 1.2 spec*/
707 cts_val = had_calculate_maud_value(aud_samp_freq, link_rate);
708 } else {
709 /* Calculate CTS according to HDMI 1.3a spec*/
710 dividend = (u64)tmds * n_param*1000;
711 divisor = 128 * aud_samp_freq;
712 cts_val = div64_u64(dividend, divisor);
713 }
Takashi Iwaic75b0472017-01-31 15:49:15 +0100714 dev_dbg(intelhaddata->dev, "TMDS value=%d, N value=%d, CTS Value=%d\n",
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600715 tmds, n_param, cts_val);
Takashi Iwai79dda752017-01-30 17:23:39 +0100716 had_write_register(intelhaddata, AUD_HDMI_CTS, (BIT(24) | cts_val));
Jerome Anand5dab11d2017-01-25 04:27:52 +0530717}
718
719static int had_calculate_n_value(u32 aud_samp_freq)
720{
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100721 int n_val;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530722
723 /* Select N according to HDMI 1.3a spec*/
724 switch (aud_samp_freq) {
725 case AUD_SAMPLE_RATE_32:
726 n_val = 4096;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100727 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530728
729 case AUD_SAMPLE_RATE_44_1:
730 n_val = 6272;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100731 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530732
733 case AUD_SAMPLE_RATE_48:
734 n_val = 6144;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100735 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530736
737 case AUD_SAMPLE_RATE_88_2:
738 n_val = 12544;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100739 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530740
741 case AUD_SAMPLE_RATE_96:
742 n_val = 12288;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100743 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530744
745 case AUD_SAMPLE_RATE_176_4:
746 n_val = 25088;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100747 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530748
749 case HAD_MAX_RATE:
750 n_val = 24576;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100751 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530752
753 default:
754 n_val = -EINVAL;
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100755 break;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530756 }
757 return n_val;
758}
759
Takashi Iwai76296ef2017-01-30 16:09:11 +0100760/*
Takashi Iwai44684f62017-02-02 17:27:40 +0100761 * Program HDMI audio N value
Jerome Anand5dab11d2017-01-25 04:27:52 +0530762 *
763 * @aud_samp_freq: sampling frequency of audio data
764 * @n_param: N value, depends on aud_samp_freq
Takashi Iwaib5562902017-02-04 22:05:33 +0100765 * @intelhaddata: substream private data
Jerome Anand5dab11d2017-01-25 04:27:52 +0530766 *
767 * This function is called in the prepare callback.
768 * It programs based on the audio and display sampling frequency
769 */
Takashi Iwaib5562902017-02-04 22:05:33 +0100770static int had_prog_n(u32 aud_samp_freq, u32 *n_param,
771 struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530772{
Takashi Iwai2e52f5e2017-01-31 17:09:13 +0100773 int n_val;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530774
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600775 if (intelhaddata->dp_output) {
776 /*
777 * According to DP specs, Maud and Naud values hold
778 * a relationship, which is stated as:
779 * Maud/Naud = 512 * fs / f_LS_Clk
780 * where, fs is the sampling frequency of the audio stream
781 * and Naud is 32768 for Async clock.
782 */
783
784 n_val = DP_NAUD_VAL;
785 } else
786 n_val = had_calculate_n_value(aud_samp_freq);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530787
788 if (n_val < 0)
789 return n_val;
790
Takashi Iwai79dda752017-01-30 17:23:39 +0100791 had_write_register(intelhaddata, AUD_N_ENABLE, (BIT(24) | n_val));
Jerome Anand5dab11d2017-01-25 04:27:52 +0530792 *n_param = n_val;
793 return 0;
794}
795
Takashi Iwaie1b239f2017-02-03 00:01:18 +0100796/*
797 * PCM ring buffer handling
798 *
799 * The hardware provides a ring buffer with the fixed 4 buffer descriptors
800 * (BDs). The driver maps these 4 BDs onto the PCM ring buffer. The mapping
801 * moves at each period elapsed. The below illustrates how it works:
802 *
803 * At time=0
804 * PCM | 0 | 1 | 2 | 3 | 4 | 5 | .... |n-1|
805 * BD | 0 | 1 | 2 | 3 |
806 *
807 * At time=1 (period elapsed)
808 * PCM | 0 | 1 | 2 | 3 | 4 | 5 | .... |n-1|
809 * BD | 1 | 2 | 3 | 0 |
810 *
811 * At time=2 (second period elapsed)
812 * PCM | 0 | 1 | 2 | 3 | 4 | 5 | .... |n-1|
813 * BD | 2 | 3 | 0 | 1 |
814 *
815 * The bd_head field points to the index of the BD to be read. It's also the
816 * position to be filled at next. The pcm_head and the pcm_filled fields
817 * point to the indices of the current position and of the next position to
818 * be filled, respectively. For PCM buffer there are both _head and _filled
819 * because they may be difference when nperiods > 4. For example, in the
820 * example above at t=1, bd_head=1 and pcm_head=1 while pcm_filled=5:
821 *
822 * pcm_head (=1) --v v-- pcm_filled (=5)
823 * PCM | 0 | 1 | 2 | 3 | 4 | 5 | .... |n-1|
824 * BD | 1 | 2 | 3 | 0 |
825 * bd_head (=1) --^ ^-- next to fill (= bd_head)
826 *
827 * For nperiods < 4, the remaining BDs out of 4 are marked as invalid, so that
828 * the hardware skips those BDs in the loop.
Takashi Iwai8d48c012017-02-07 08:05:46 +0100829 *
830 * An exceptional setup is the case with nperiods=1. Since we have to update
831 * BDs after finishing one BD processing, we'd need at least two BDs, where
832 * both BDs point to the same content, the same address, the same size of the
833 * whole PCM buffer.
Takashi Iwaie1b239f2017-02-03 00:01:18 +0100834 */
835
836#define AUD_BUF_ADDR(x) (AUD_BUF_A_ADDR + (x) * HAD_REG_WIDTH)
837#define AUD_BUF_LEN(x) (AUD_BUF_A_LENGTH + (x) * HAD_REG_WIDTH)
838
839/* Set up a buffer descriptor at the "filled" position */
840static void had_prog_bd(struct snd_pcm_substream *substream,
841 struct snd_intelhad *intelhaddata)
842{
843 int idx = intelhaddata->bd_head;
844 int ofs = intelhaddata->pcmbuf_filled * intelhaddata->period_bytes;
845 u32 addr = substream->runtime->dma_addr + ofs;
846
Takashi Iwaie8de9852017-02-07 08:09:12 +0100847 addr |= AUD_BUF_VALID;
848 if (!substream->runtime->no_period_wakeup)
849 addr |= AUD_BUF_INTR_EN;
Takashi Iwaie1b239f2017-02-03 00:01:18 +0100850 had_write_register(intelhaddata, AUD_BUF_ADDR(idx), addr);
851 had_write_register(intelhaddata, AUD_BUF_LEN(idx),
852 intelhaddata->period_bytes);
853
854 /* advance the indices to the next */
855 intelhaddata->bd_head++;
856 intelhaddata->bd_head %= intelhaddata->num_bds;
857 intelhaddata->pcmbuf_filled++;
858 intelhaddata->pcmbuf_filled %= substream->runtime->periods;
859}
860
861/* invalidate a buffer descriptor with the given index */
862static void had_invalidate_bd(struct snd_intelhad *intelhaddata,
863 int idx)
864{
865 had_write_register(intelhaddata, AUD_BUF_ADDR(idx), 0);
866 had_write_register(intelhaddata, AUD_BUF_LEN(idx), 0);
867}
868
869/* Initial programming of ring buffer */
870static void had_init_ringbuf(struct snd_pcm_substream *substream,
871 struct snd_intelhad *intelhaddata)
872{
873 struct snd_pcm_runtime *runtime = substream->runtime;
874 int i, num_periods;
875
876 num_periods = runtime->periods;
877 intelhaddata->num_bds = min(num_periods, HAD_NUM_OF_RING_BUFS);
Takashi Iwai8d48c012017-02-07 08:05:46 +0100878 /* set the minimum 2 BDs for num_periods=1 */
879 intelhaddata->num_bds = max(intelhaddata->num_bds, 2U);
Takashi Iwaie1b239f2017-02-03 00:01:18 +0100880 intelhaddata->period_bytes =
881 frames_to_bytes(runtime, runtime->period_size);
882 WARN_ON(intelhaddata->period_bytes & 0x3f);
883
884 intelhaddata->bd_head = 0;
885 intelhaddata->pcmbuf_head = 0;
886 intelhaddata->pcmbuf_filled = 0;
887
888 for (i = 0; i < HAD_NUM_OF_RING_BUFS; i++) {
Takashi Iwai8d48c012017-02-07 08:05:46 +0100889 if (i < intelhaddata->num_bds)
Takashi Iwaie1b239f2017-02-03 00:01:18 +0100890 had_prog_bd(substream, intelhaddata);
891 else /* invalidate the rest */
892 had_invalidate_bd(intelhaddata, i);
893 }
894
895 intelhaddata->bd_head = 0; /* reset at head again before starting */
896}
897
898/* process a bd, advance to the next */
899static void had_advance_ringbuf(struct snd_pcm_substream *substream,
900 struct snd_intelhad *intelhaddata)
901{
902 int num_periods = substream->runtime->periods;
903
904 /* reprogram the next buffer */
905 had_prog_bd(substream, intelhaddata);
906
907 /* proceed to next */
908 intelhaddata->pcmbuf_head++;
909 intelhaddata->pcmbuf_head %= num_periods;
910}
911
912/* process the current BD(s);
913 * returns the current PCM buffer byte position, or -EPIPE for underrun.
914 */
915static int had_process_ringbuf(struct snd_pcm_substream *substream,
916 struct snd_intelhad *intelhaddata)
917{
918 int len, processed;
919 unsigned long flags;
920
921 processed = 0;
922 spin_lock_irqsave(&intelhaddata->had_spinlock, flags);
923 for (;;) {
924 /* get the remaining bytes on the buffer */
925 had_read_register(intelhaddata,
926 AUD_BUF_LEN(intelhaddata->bd_head),
927 &len);
928 if (len < 0 || len > intelhaddata->period_bytes) {
929 dev_dbg(intelhaddata->dev, "Invalid buf length %d\n",
930 len);
931 len = -EPIPE;
932 goto out;
933 }
934
935 if (len > 0) /* OK, this is the current buffer */
936 break;
937
938 /* len=0 => already empty, check the next buffer */
939 if (++processed >= intelhaddata->num_bds) {
940 len = -EPIPE; /* all empty? - report underrun */
941 goto out;
942 }
943 had_advance_ringbuf(substream, intelhaddata);
944 }
945
946 len = intelhaddata->period_bytes - len;
947 len += intelhaddata->period_bytes * intelhaddata->pcmbuf_head;
948 out:
949 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flags);
950 return len;
951}
952
953/* called from irq handler */
954static void had_process_buffer_done(struct snd_intelhad *intelhaddata)
955{
956 struct snd_pcm_substream *substream;
957
958 if (!intelhaddata->connected)
959 return; /* disconnected? - bail out */
960
961 substream = had_substream_get(intelhaddata);
962 if (!substream)
963 return; /* no stream? - bail out */
964
965 /* process or stop the stream */
966 if (had_process_ringbuf(substream, intelhaddata) < 0)
967 snd_pcm_stop_xrun(substream);
968 else
969 snd_pcm_period_elapsed(substream);
970
971 had_substream_put(intelhaddata);
972}
973
Takashi Iwaie1b239f2017-02-03 00:01:18 +0100974/*
975 * The interrupt status 'sticky' bits might not be cleared by
976 * setting '1' to that bit once...
977 */
978static void wait_clear_underrun_bit(struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +0530979{
Takashi Iwaie1b239f2017-02-03 00:01:18 +0100980 int i;
981 u32 val;
982
Takashi Iwaie2acecf2017-02-11 08:21:56 +0100983 for (i = 0; i < 100; i++) {
Takashi Iwaie1b239f2017-02-03 00:01:18 +0100984 /* clear bit30, 31 AUD_HDMI_STATUS */
985 had_read_register(intelhaddata, AUD_HDMI_STATUS, &val);
Takashi Iwai77531be2017-02-07 12:17:23 +0100986 if (!(val & AUD_HDMI_STATUS_MASK_UNDERRUN))
Takashi Iwaie1b239f2017-02-03 00:01:18 +0100987 return;
Takashi Iwaie2acecf2017-02-11 08:21:56 +0100988 udelay(100);
989 cond_resched();
Takashi Iwaie1b239f2017-02-03 00:01:18 +0100990 had_write_register(intelhaddata, AUD_HDMI_STATUS, val);
991 }
992 dev_err(intelhaddata->dev, "Unable to clear UNDERRUN bits\n");
993}
994
Takashi Iwaie2acecf2017-02-11 08:21:56 +0100995/* Perform some reset procedure but only when need_reset is set;
996 * this is called from prepare or hw_free callbacks once after trigger STOP
997 * or underrun has been processed in order to settle down the h/w state.
998 */
999static void had_do_reset(struct snd_intelhad *intelhaddata)
1000{
1001 if (!intelhaddata->need_reset)
1002 return;
1003
1004 /* Reset buffer pointers */
1005 had_reset_audio(intelhaddata);
1006 wait_clear_underrun_bit(intelhaddata);
1007 intelhaddata->need_reset = false;
1008}
1009
Takashi Iwaie1b239f2017-02-03 00:01:18 +01001010/* called from irq handler */
1011static void had_process_buffer_underrun(struct snd_intelhad *intelhaddata)
1012{
1013 struct snd_pcm_substream *substream;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301014
Takashi Iwaie1b239f2017-02-03 00:01:18 +01001015 /* Report UNDERRUN error to above layers */
1016 substream = had_substream_get(intelhaddata);
1017 if (substream) {
1018 snd_pcm_stop_xrun(substream);
1019 had_substream_put(intelhaddata);
1020 }
Takashi Iwaie2acecf2017-02-11 08:21:56 +01001021 intelhaddata->need_reset = true;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301022}
1023
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001024/*
Takashi Iwai44684f62017-02-02 17:27:40 +01001025 * ALSA PCM open callback
Jerome Anand5dab11d2017-01-25 04:27:52 +05301026 */
Takashi Iwaib5562902017-02-04 22:05:33 +01001027static int had_pcm_open(struct snd_pcm_substream *substream)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301028{
1029 struct snd_intelhad *intelhaddata;
1030 struct snd_pcm_runtime *runtime;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301031 int retval;
1032
Jerome Anand5dab11d2017-01-25 04:27:52 +05301033 intelhaddata = snd_pcm_substream_chip(substream);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301034 runtime = substream->runtime;
1035
Takashi Iwai182cdf22017-02-02 14:43:39 +01001036 pm_runtime_get_sync(intelhaddata->dev);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301037
Takashi Iwai91b0cb02017-02-02 17:46:49 +01001038 if (!intelhaddata->connected) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001039 dev_dbg(intelhaddata->dev, "%s: HDMI cable plugged-out\n",
1040 __func__);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301041 retval = -ENODEV;
Takashi Iwaifa5dfe62017-02-01 22:03:26 +01001042 goto error;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301043 }
1044
1045 /* set the runtime hw parameter with local snd_pcm_hardware struct */
Takashi Iwaib5562902017-02-04 22:05:33 +01001046 runtime->hw = had_pcm_hardware;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301047
Jerome Anand5dab11d2017-01-25 04:27:52 +05301048 retval = snd_pcm_hw_constraint_integer(runtime,
1049 SNDRV_PCM_HW_PARAM_PERIODS);
1050 if (retval < 0)
Takashi Iwaifa5dfe62017-02-01 22:03:26 +01001051 goto error;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301052
1053 /* Make sure, that the period size is always aligned
1054 * 64byte boundary
1055 */
1056 retval = snd_pcm_hw_constraint_step(substream->runtime, 0,
1057 SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64);
Takashi Iwai73997b02017-02-02 17:38:50 +01001058 if (retval < 0)
Takashi Iwaifa5dfe62017-02-01 22:03:26 +01001059 goto error;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301060
Takashi Iwai85bd8742017-02-07 13:33:17 +01001061 retval = snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1062 if (retval < 0)
1063 goto error;
1064
Takashi Iwai73997b02017-02-02 17:38:50 +01001065 /* expose PCM substream */
Takashi Iwai313d9f22017-02-02 13:00:12 +01001066 spin_lock_irq(&intelhaddata->had_spinlock);
1067 intelhaddata->stream_info.substream = substream;
1068 intelhaddata->stream_info.substream_refcount++;
1069 spin_unlock_irq(&intelhaddata->had_spinlock);
1070
Jerome Anand5dab11d2017-01-25 04:27:52 +05301071 return retval;
Takashi Iwaifa5dfe62017-02-01 22:03:26 +01001072 error:
Jerome Anand5dab11d2017-01-25 04:27:52 +05301073 pm_runtime_put(intelhaddata->dev);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301074 return retval;
1075}
1076
Takashi Iwaidf76df12017-01-31 16:04:10 +01001077/*
Takashi Iwai44684f62017-02-02 17:27:40 +01001078 * ALSA PCM close callback
Jerome Anand5dab11d2017-01-25 04:27:52 +05301079 */
Takashi Iwaib5562902017-02-04 22:05:33 +01001080static int had_pcm_close(struct snd_pcm_substream *substream)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301081{
1082 struct snd_intelhad *intelhaddata;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301083
Jerome Anand5dab11d2017-01-25 04:27:52 +05301084 intelhaddata = snd_pcm_substream_chip(substream);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301085
Takashi Iwai73997b02017-02-02 17:38:50 +01001086 /* unreference and sync with the pending PCM accesses */
Takashi Iwai313d9f22017-02-02 13:00:12 +01001087 spin_lock_irq(&intelhaddata->had_spinlock);
1088 intelhaddata->stream_info.substream = NULL;
1089 intelhaddata->stream_info.substream_refcount--;
1090 while (intelhaddata->stream_info.substream_refcount > 0) {
1091 spin_unlock_irq(&intelhaddata->had_spinlock);
1092 cpu_relax();
1093 spin_lock_irq(&intelhaddata->had_spinlock);
1094 }
1095 spin_unlock_irq(&intelhaddata->had_spinlock);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301096
Jerome Anand5dab11d2017-01-25 04:27:52 +05301097 pm_runtime_put(intelhaddata->dev);
1098 return 0;
1099}
1100
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001101/*
Takashi Iwai44684f62017-02-02 17:27:40 +01001102 * ALSA PCM hw_params callback
Jerome Anand5dab11d2017-01-25 04:27:52 +05301103 */
Takashi Iwaib5562902017-02-04 22:05:33 +01001104static int had_pcm_hw_params(struct snd_pcm_substream *substream,
1105 struct snd_pcm_hw_params *hw_params)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301106{
Takashi Iwaic75b0472017-01-31 15:49:15 +01001107 struct snd_intelhad *intelhaddata;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301108 unsigned long addr;
1109 int pages, buf_size, retval;
1110
Takashi Iwaic75b0472017-01-31 15:49:15 +01001111 intelhaddata = snd_pcm_substream_chip(substream);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301112 buf_size = params_buffer_bytes(hw_params);
1113 retval = snd_pcm_lib_malloc_pages(substream, buf_size);
1114 if (retval < 0)
1115 return retval;
Takashi Iwaic75b0472017-01-31 15:49:15 +01001116 dev_dbg(intelhaddata->dev, "%s:allocated memory = %d\n",
1117 __func__, buf_size);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301118 /* mark the pages as uncached region */
1119 addr = (unsigned long) substream->runtime->dma_area;
1120 pages = (substream->runtime->dma_bytes + PAGE_SIZE - 1) / PAGE_SIZE;
1121 retval = set_memory_uc(addr, pages);
1122 if (retval) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001123 dev_err(intelhaddata->dev, "set_memory_uc failed.Error:%d\n",
1124 retval);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301125 return retval;
1126 }
1127 memset(substream->runtime->dma_area, 0, buf_size);
1128
1129 return retval;
1130}
1131
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001132/*
Takashi Iwai44684f62017-02-02 17:27:40 +01001133 * ALSA PCM hw_free callback
Jerome Anand5dab11d2017-01-25 04:27:52 +05301134 */
Takashi Iwaib5562902017-02-04 22:05:33 +01001135static int had_pcm_hw_free(struct snd_pcm_substream *substream)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301136{
Takashi Iwaie2acecf2017-02-11 08:21:56 +01001137 struct snd_intelhad *intelhaddata;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301138 unsigned long addr;
1139 u32 pages;
1140
Takashi Iwaie2acecf2017-02-11 08:21:56 +01001141 intelhaddata = snd_pcm_substream_chip(substream);
1142 had_do_reset(intelhaddata);
1143
Jerome Anand5dab11d2017-01-25 04:27:52 +05301144 /* mark back the pages as cached/writeback region before the free */
1145 if (substream->runtime->dma_area != NULL) {
1146 addr = (unsigned long) substream->runtime->dma_area;
1147 pages = (substream->runtime->dma_bytes + PAGE_SIZE - 1) /
1148 PAGE_SIZE;
1149 set_memory_wb(addr, pages);
1150 return snd_pcm_lib_free_pages(substream);
1151 }
1152 return 0;
1153}
1154
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001155/*
Takashi Iwai44684f62017-02-02 17:27:40 +01001156 * ALSA PCM trigger callback
Jerome Anand5dab11d2017-01-25 04:27:52 +05301157 */
Takashi Iwaib5562902017-02-04 22:05:33 +01001158static int had_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301159{
Takashi Iwaida864802017-01-31 13:52:22 +01001160 int retval = 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301161 struct snd_intelhad *intelhaddata;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301162
Jerome Anand5dab11d2017-01-25 04:27:52 +05301163 intelhaddata = snd_pcm_substream_chip(substream);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301164
Takashi Iwaidf42cb42017-02-12 11:35:44 +01001165 spin_lock(&intelhaddata->had_spinlock);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301166 switch (cmd) {
1167 case SNDRV_PCM_TRIGGER_START:
Takashi Iwai182cdf22017-02-02 14:43:39 +01001168 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1169 case SNDRV_PCM_TRIGGER_RESUME:
Jerome Anand5dab11d2017-01-25 04:27:52 +05301170 /* Disable local INTRs till register prgmng is done */
Takashi Iwai91b0cb02017-02-02 17:46:49 +01001171 if (!intelhaddata->connected) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001172 dev_dbg(intelhaddata->dev,
1173 "_START: HDMI cable plugged-out\n");
Jerome Anand5dab11d2017-01-25 04:27:52 +05301174 retval = -ENODEV;
1175 break;
1176 }
Jerome Anand5dab11d2017-01-25 04:27:52 +05301177
Jerome Anand5dab11d2017-01-25 04:27:52 +05301178 /* Enable Audio */
Takashi Iwai075a1d42017-02-07 07:55:27 +01001179 had_ack_irqs(intelhaddata); /* FIXME: do we need this? */
Takashi Iwai40ce4b52017-02-07 16:17:06 +01001180 had_enable_audio(intelhaddata, true);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301181 break;
1182
1183 case SNDRV_PCM_TRIGGER_STOP:
Takashi Iwai182cdf22017-02-02 14:43:39 +01001184 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
Jerome Anand5dab11d2017-01-25 04:27:52 +05301185 /* Disable Audio */
Takashi Iwai40ce4b52017-02-07 16:17:06 +01001186 had_enable_audio(intelhaddata, false);
Takashi Iwaie2acecf2017-02-11 08:21:56 +01001187 intelhaddata->need_reset = true;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301188 break;
1189
1190 default:
1191 retval = -EINVAL;
1192 }
Takashi Iwaidf42cb42017-02-12 11:35:44 +01001193 spin_unlock(&intelhaddata->had_spinlock);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301194 return retval;
1195}
1196
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001197/*
Takashi Iwai44684f62017-02-02 17:27:40 +01001198 * ALSA PCM prepare callback
Jerome Anand5dab11d2017-01-25 04:27:52 +05301199 */
Takashi Iwaib5562902017-02-04 22:05:33 +01001200static int had_pcm_prepare(struct snd_pcm_substream *substream)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301201{
1202 int retval;
1203 u32 disp_samp_freq, n_param;
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -06001204 u32 link_rate = 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301205 struct snd_intelhad *intelhaddata;
1206 struct snd_pcm_runtime *runtime;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301207
Jerome Anand5dab11d2017-01-25 04:27:52 +05301208 intelhaddata = snd_pcm_substream_chip(substream);
1209 runtime = substream->runtime;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301210
Takashi Iwai91b0cb02017-02-02 17:46:49 +01001211 if (!intelhaddata->connected) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001212 dev_dbg(intelhaddata->dev, "%s: HDMI cable plugged-out\n",
1213 __func__);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301214 retval = -ENODEV;
1215 goto prep_end;
1216 }
1217
Takashi Iwaic75b0472017-01-31 15:49:15 +01001218 dev_dbg(intelhaddata->dev, "period_size=%d\n",
Jerome Anand5dab11d2017-01-25 04:27:52 +05301219 (int)frames_to_bytes(runtime, runtime->period_size));
Takashi Iwaic75b0472017-01-31 15:49:15 +01001220 dev_dbg(intelhaddata->dev, "periods=%d\n", runtime->periods);
1221 dev_dbg(intelhaddata->dev, "buffer_size=%d\n",
1222 (int)snd_pcm_lib_buffer_bytes(substream));
1223 dev_dbg(intelhaddata->dev, "rate=%d\n", runtime->rate);
1224 dev_dbg(intelhaddata->dev, "channels=%d\n", runtime->channels);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301225
Takashi Iwaie2acecf2017-02-11 08:21:56 +01001226 had_do_reset(intelhaddata);
1227
Jerome Anand5dab11d2017-01-25 04:27:52 +05301228 /* Get N value in KHz */
Takashi Iwaida864802017-01-31 13:52:22 +01001229 disp_samp_freq = intelhaddata->tmds_clock_speed;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301230
Takashi Iwaib5562902017-02-04 22:05:33 +01001231 retval = had_prog_n(substream->runtime->rate, &n_param, intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301232 if (retval) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001233 dev_err(intelhaddata->dev,
1234 "programming N value failed %#x\n", retval);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301235 goto prep_end;
1236 }
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -06001237
1238 if (intelhaddata->dp_output)
Takashi Iwaida864802017-01-31 13:52:22 +01001239 link_rate = intelhaddata->link_rate;
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -06001240
Takashi Iwaib5562902017-02-04 22:05:33 +01001241 had_prog_cts(substream->runtime->rate, disp_samp_freq, link_rate,
1242 n_param, intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301243
Takashi Iwaib5562902017-02-04 22:05:33 +01001244 had_prog_dip(substream, intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301245
Takashi Iwaib5562902017-02-04 22:05:33 +01001246 retval = had_init_audio_ctrl(substream, intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301247
1248 /* Prog buffer address */
Takashi Iwaie1b239f2017-02-03 00:01:18 +01001249 had_init_ringbuf(substream, intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301250
1251 /*
1252 * Program channel mapping in following order:
1253 * FL, FR, C, LFE, RL, RR
1254 */
1255
Takashi Iwai79dda752017-01-30 17:23:39 +01001256 had_write_register(intelhaddata, AUD_BUF_CH_SWAP, SWAP_LFE_CENTER);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301257
1258prep_end:
1259 return retval;
1260}
1261
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001262/*
Takashi Iwai44684f62017-02-02 17:27:40 +01001263 * ALSA PCM pointer callback
Jerome Anand5dab11d2017-01-25 04:27:52 +05301264 */
Takashi Iwaib5562902017-02-04 22:05:33 +01001265static snd_pcm_uframes_t had_pcm_pointer(struct snd_pcm_substream *substream)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301266{
1267 struct snd_intelhad *intelhaddata;
Takashi Iwaie1b239f2017-02-03 00:01:18 +01001268 int len;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301269
Jerome Anand5dab11d2017-01-25 04:27:52 +05301270 intelhaddata = snd_pcm_substream_chip(substream);
1271
Takashi Iwai91b0cb02017-02-02 17:46:49 +01001272 if (!intelhaddata->connected)
Takashi Iwai79f439e2017-01-31 16:46:44 +01001273 return SNDRV_PCM_POS_XRUN;
1274
Takashi Iwaie1b239f2017-02-03 00:01:18 +01001275 len = had_process_ringbuf(substream, intelhaddata);
1276 if (len < 0)
1277 return SNDRV_PCM_POS_XRUN;
Takashi Iwai8d48c012017-02-07 08:05:46 +01001278 len = bytes_to_frames(substream->runtime, len);
1279 /* wrapping may happen when periods=1 */
1280 len %= substream->runtime->buffer_size;
1281 return len;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301282}
1283
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001284/*
Takashi Iwai44684f62017-02-02 17:27:40 +01001285 * ALSA PCM mmap callback
Jerome Anand5dab11d2017-01-25 04:27:52 +05301286 */
Takashi Iwaib5562902017-02-04 22:05:33 +01001287static int had_pcm_mmap(struct snd_pcm_substream *substream,
1288 struct vm_area_struct *vma)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301289{
Jerome Anand5dab11d2017-01-25 04:27:52 +05301290 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1291 return remap_pfn_range(vma, vma->vm_start,
1292 substream->dma_buffer.addr >> PAGE_SHIFT,
1293 vma->vm_end - vma->vm_start, vma->vm_page_prot);
1294}
1295
Takashi Iwai73997b02017-02-02 17:38:50 +01001296/*
1297 * ALSA PCM ops
1298 */
Takashi Iwaib5562902017-02-04 22:05:33 +01001299static const struct snd_pcm_ops had_pcm_ops = {
1300 .open = had_pcm_open,
1301 .close = had_pcm_close,
Takashi Iwai73997b02017-02-02 17:38:50 +01001302 .ioctl = snd_pcm_lib_ioctl,
Takashi Iwaib5562902017-02-04 22:05:33 +01001303 .hw_params = had_pcm_hw_params,
1304 .hw_free = had_pcm_hw_free,
1305 .prepare = had_pcm_prepare,
1306 .trigger = had_pcm_trigger,
1307 .pointer = had_pcm_pointer,
1308 .mmap = had_pcm_mmap,
Takashi Iwai73997b02017-02-02 17:38:50 +01001309};
1310
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001311/* process mode change of the running stream; called in mutex */
Takashi Iwaib5562902017-02-04 22:05:33 +01001312static int had_process_mode_change(struct snd_intelhad *intelhaddata)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301313{
Takashi Iwaida864802017-01-31 13:52:22 +01001314 struct snd_pcm_substream *substream;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301315 int retval = 0;
1316 u32 disp_samp_freq, n_param;
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -06001317 u32 link_rate = 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301318
Takashi Iwai313d9f22017-02-02 13:00:12 +01001319 substream = had_substream_get(intelhaddata);
1320 if (!substream)
Takashi Iwaida864802017-01-31 13:52:22 +01001321 return 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301322
1323 /* Disable Audio */
Takashi Iwai40ce4b52017-02-07 16:17:06 +01001324 had_enable_audio(intelhaddata, false);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301325
1326 /* Update CTS value */
Takashi Iwaida864802017-01-31 13:52:22 +01001327 disp_samp_freq = intelhaddata->tmds_clock_speed;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301328
Takashi Iwaib5562902017-02-04 22:05:33 +01001329 retval = had_prog_n(substream->runtime->rate, &n_param, intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301330 if (retval) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001331 dev_err(intelhaddata->dev,
1332 "programming N value failed %#x\n", retval);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301333 goto out;
1334 }
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -06001335
1336 if (intelhaddata->dp_output)
Takashi Iwaida864802017-01-31 13:52:22 +01001337 link_rate = intelhaddata->link_rate;
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -06001338
Takashi Iwaib5562902017-02-04 22:05:33 +01001339 had_prog_cts(substream->runtime->rate, disp_samp_freq, link_rate,
1340 n_param, intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301341
1342 /* Enable Audio */
Takashi Iwai40ce4b52017-02-07 16:17:06 +01001343 had_enable_audio(intelhaddata, true);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301344
1345out:
Takashi Iwai313d9f22017-02-02 13:00:12 +01001346 had_substream_put(intelhaddata);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301347 return retval;
1348}
1349
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001350/* process hot plug, called from wq with mutex locked */
Takashi Iwai0e9c67d2017-02-01 17:53:19 +01001351static void had_process_hot_plug(struct snd_intelhad *intelhaddata)
Takashi Iwai372d8552017-01-31 13:57:58 +01001352{
Takashi Iwai372d8552017-01-31 13:57:58 +01001353 struct snd_pcm_substream *substream;
Takashi Iwai372d8552017-01-31 13:57:58 +01001354
Takashi Iwaibcce7752017-02-01 17:18:20 +01001355 spin_lock_irq(&intelhaddata->had_spinlock);
Takashi Iwai91b0cb02017-02-02 17:46:49 +01001356 if (intelhaddata->connected) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001357 dev_dbg(intelhaddata->dev, "Device already connected\n");
Takashi Iwaibcce7752017-02-01 17:18:20 +01001358 spin_unlock_irq(&intelhaddata->had_spinlock);
Takashi Iwai0e9c67d2017-02-01 17:53:19 +01001359 return;
Takashi Iwai372d8552017-01-31 13:57:58 +01001360 }
Takashi Iwai0e9c67d2017-02-01 17:53:19 +01001361
Takashi Iwai91b0cb02017-02-02 17:46:49 +01001362 intelhaddata->connected = true;
Takashi Iwaic75b0472017-01-31 15:49:15 +01001363 dev_dbg(intelhaddata->dev,
1364 "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_CONNECTED\n",
Takashi Iwai372d8552017-01-31 13:57:58 +01001365 __func__, __LINE__);
Takashi Iwaibcce7752017-02-01 17:18:20 +01001366 spin_unlock_irq(&intelhaddata->had_spinlock);
Takashi Iwai372d8552017-01-31 13:57:58 +01001367
Takashi Iwai372d8552017-01-31 13:57:58 +01001368 /* Safety check */
Takashi Iwai313d9f22017-02-02 13:00:12 +01001369 substream = had_substream_get(intelhaddata);
Takashi Iwai372d8552017-01-31 13:57:58 +01001370 if (substream) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001371 dev_dbg(intelhaddata->dev,
1372 "Force to stop the active stream by disconnection\n");
Takashi Iwai372d8552017-01-31 13:57:58 +01001373 /* Set runtime->state to hw_params done */
Takashi Iwai5def9012017-02-15 21:36:38 +01001374 snd_pcm_stop_xrun(substream);
Takashi Iwai313d9f22017-02-02 13:00:12 +01001375 had_substream_put(intelhaddata);
Takashi Iwai372d8552017-01-31 13:57:58 +01001376 }
1377
1378 had_build_channel_allocation_map(intelhaddata);
Takashi Iwaib9bacf22017-02-14 12:29:38 +01001379
1380 snd_jack_report(intelhaddata->jack, SND_JACK_AVOUT);
Takashi Iwai372d8552017-01-31 13:57:58 +01001381}
1382
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001383/* process hot unplug, called from wq with mutex locked */
Takashi Iwai0e9c67d2017-02-01 17:53:19 +01001384static void had_process_hot_unplug(struct snd_intelhad *intelhaddata)
Takashi Iwai372d8552017-01-31 13:57:58 +01001385{
Takashi Iwai313d9f22017-02-02 13:00:12 +01001386 struct snd_pcm_substream *substream;
Takashi Iwai372d8552017-01-31 13:57:58 +01001387
Takashi Iwai313d9f22017-02-02 13:00:12 +01001388 substream = had_substream_get(intelhaddata);
1389
Takashi Iwaibcce7752017-02-01 17:18:20 +01001390 spin_lock_irq(&intelhaddata->had_spinlock);
Takashi Iwai372d8552017-01-31 13:57:58 +01001391
Takashi Iwai91b0cb02017-02-02 17:46:49 +01001392 if (!intelhaddata->connected) {
Takashi Iwaic75b0472017-01-31 15:49:15 +01001393 dev_dbg(intelhaddata->dev, "Device already disconnected\n");
Takashi Iwaibcce7752017-02-01 17:18:20 +01001394 spin_unlock_irq(&intelhaddata->had_spinlock);
Takashi Iwai313d9f22017-02-02 13:00:12 +01001395 goto out;
Takashi Iwai372d8552017-01-31 13:57:58 +01001396
Takashi Iwai372d8552017-01-31 13:57:58 +01001397 }
1398
Takashi Iwai0e9c67d2017-02-01 17:53:19 +01001399 /* Disable Audio */
Takashi Iwai40ce4b52017-02-07 16:17:06 +01001400 had_enable_audio(intelhaddata, false);
Takashi Iwai0e9c67d2017-02-01 17:53:19 +01001401
Takashi Iwai91b0cb02017-02-02 17:46:49 +01001402 intelhaddata->connected = false;
Takashi Iwaic75b0472017-01-31 15:49:15 +01001403 dev_dbg(intelhaddata->dev,
1404 "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_DISCONNECTED\n",
Takashi Iwai372d8552017-01-31 13:57:58 +01001405 __func__, __LINE__);
Takashi Iwaibcce7752017-02-01 17:18:20 +01001406 spin_unlock_irq(&intelhaddata->had_spinlock);
Takashi Iwai313d9f22017-02-02 13:00:12 +01001407
1408 /* Report to above ALSA layer */
1409 if (substream)
Takashi Iwai5def9012017-02-15 21:36:38 +01001410 snd_pcm_stop_xrun(substream);
Takashi Iwai313d9f22017-02-02 13:00:12 +01001411
1412 out:
Takashi Iwaib9bacf22017-02-14 12:29:38 +01001413 snd_jack_report(intelhaddata->jack, 0);
Takashi Iwai313d9f22017-02-02 13:00:12 +01001414 if (substream)
1415 had_substream_put(intelhaddata);
Takashi Iwai372d8552017-01-31 13:57:58 +01001416 kfree(intelhaddata->chmap->chmap);
1417 intelhaddata->chmap->chmap = NULL;
Takashi Iwai372d8552017-01-31 13:57:58 +01001418}
1419
Takashi Iwai73997b02017-02-02 17:38:50 +01001420/*
1421 * ALSA iec958 and ELD controls
1422 */
Jerome Anand5dab11d2017-01-25 04:27:52 +05301423
Jerome Anand5dab11d2017-01-25 04:27:52 +05301424static int had_iec958_info(struct snd_kcontrol *kcontrol,
1425 struct snd_ctl_elem_info *uinfo)
1426{
1427 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1428 uinfo->count = 1;
1429 return 0;
1430}
1431
1432static int had_iec958_get(struct snd_kcontrol *kcontrol,
1433 struct snd_ctl_elem_value *ucontrol)
1434{
1435 struct snd_intelhad *intelhaddata = snd_kcontrol_chip(kcontrol);
1436
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001437 mutex_lock(&intelhaddata->mutex);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301438 ucontrol->value.iec958.status[0] = (intelhaddata->aes_bits >> 0) & 0xff;
1439 ucontrol->value.iec958.status[1] = (intelhaddata->aes_bits >> 8) & 0xff;
1440 ucontrol->value.iec958.status[2] =
1441 (intelhaddata->aes_bits >> 16) & 0xff;
1442 ucontrol->value.iec958.status[3] =
1443 (intelhaddata->aes_bits >> 24) & 0xff;
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001444 mutex_unlock(&intelhaddata->mutex);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301445 return 0;
1446}
Takashi Iwai372d8552017-01-31 13:57:58 +01001447
Jerome Anand5dab11d2017-01-25 04:27:52 +05301448static int had_iec958_mask_get(struct snd_kcontrol *kcontrol,
1449 struct snd_ctl_elem_value *ucontrol)
1450{
1451 ucontrol->value.iec958.status[0] = 0xff;
1452 ucontrol->value.iec958.status[1] = 0xff;
1453 ucontrol->value.iec958.status[2] = 0xff;
1454 ucontrol->value.iec958.status[3] = 0xff;
1455 return 0;
1456}
Takashi Iwai372d8552017-01-31 13:57:58 +01001457
Jerome Anand5dab11d2017-01-25 04:27:52 +05301458static int had_iec958_put(struct snd_kcontrol *kcontrol,
1459 struct snd_ctl_elem_value *ucontrol)
1460{
1461 unsigned int val;
1462 struct snd_intelhad *intelhaddata = snd_kcontrol_chip(kcontrol);
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001463 int changed = 0;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301464
Jerome Anand5dab11d2017-01-25 04:27:52 +05301465 val = (ucontrol->value.iec958.status[0] << 0) |
1466 (ucontrol->value.iec958.status[1] << 8) |
1467 (ucontrol->value.iec958.status[2] << 16) |
1468 (ucontrol->value.iec958.status[3] << 24);
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001469 mutex_lock(&intelhaddata->mutex);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301470 if (intelhaddata->aes_bits != val) {
1471 intelhaddata->aes_bits = val;
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001472 changed = 1;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301473 }
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001474 mutex_unlock(&intelhaddata->mutex);
1475 return changed;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301476}
1477
Takashi Iwai4aedb942017-02-02 16:38:39 +01001478static int had_ctl_eld_info(struct snd_kcontrol *kcontrol,
1479 struct snd_ctl_elem_info *uinfo)
1480{
1481 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
1482 uinfo->count = HDMI_MAX_ELD_BYTES;
1483 return 0;
1484}
1485
1486static int had_ctl_eld_get(struct snd_kcontrol *kcontrol,
1487 struct snd_ctl_elem_value *ucontrol)
1488{
1489 struct snd_intelhad *intelhaddata = snd_kcontrol_chip(kcontrol);
1490
1491 mutex_lock(&intelhaddata->mutex);
1492 memcpy(ucontrol->value.bytes.data, intelhaddata->eld,
1493 HDMI_MAX_ELD_BYTES);
1494 mutex_unlock(&intelhaddata->mutex);
1495 return 0;
1496}
1497
Takashi Iwai73997b02017-02-02 17:38:50 +01001498static const struct snd_kcontrol_new had_controls[] = {
Takashi Iwai4aedb942017-02-02 16:38:39 +01001499 {
1500 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1501 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1502 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, MASK),
1503 .info = had_iec958_info, /* shared */
1504 .get = had_iec958_mask_get,
1505 },
1506 {
1507 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1508 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1509 .info = had_iec958_info,
1510 .get = had_iec958_get,
1511 .put = had_iec958_put,
1512 },
1513 {
1514 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
1515 SNDRV_CTL_ELEM_ACCESS_VOLATILE),
1516 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1517 .name = "ELD",
1518 .info = had_ctl_eld_info,
1519 .get = had_ctl_eld_get,
1520 },
Jerome Anand5dab11d2017-01-25 04:27:52 +05301521};
1522
Takashi Iwai73997b02017-02-02 17:38:50 +01001523/*
1524 * audio interrupt handler
1525 */
Takashi Iwaida864802017-01-31 13:52:22 +01001526static irqreturn_t display_pipe_interrupt_handler(int irq, void *dev_id)
1527{
1528 struct snd_intelhad *ctx = dev_id;
1529 u32 audio_stat, audio_reg;
1530
Takashi Iwai4151ee82017-01-31 18:14:15 +01001531 audio_reg = AUD_HDMI_STATUS;
Takashi Iwai83af57d2017-02-03 08:50:06 +01001532 had_read_register(ctx, audio_reg, &audio_stat);
Takashi Iwaida864802017-01-31 13:52:22 +01001533
1534 if (audio_stat & HDMI_AUDIO_UNDERRUN) {
Takashi Iwai83af57d2017-02-03 08:50:06 +01001535 had_write_register(ctx, audio_reg, HDMI_AUDIO_UNDERRUN);
Takashi Iwaida864802017-01-31 13:52:22 +01001536 had_process_buffer_underrun(ctx);
1537 }
1538
1539 if (audio_stat & HDMI_AUDIO_BUFFER_DONE) {
Takashi Iwai83af57d2017-02-03 08:50:06 +01001540 had_write_register(ctx, audio_reg, HDMI_AUDIO_BUFFER_DONE);
Takashi Iwaida864802017-01-31 13:52:22 +01001541 had_process_buffer_done(ctx);
1542 }
1543
1544 return IRQ_HANDLED;
1545}
1546
Takashi Iwai73997b02017-02-02 17:38:50 +01001547/*
1548 * monitor plug/unplug notification from i915; just kick off the work
1549 */
Takashi Iwaida864802017-01-31 13:52:22 +01001550static void notify_audio_lpe(struct platform_device *pdev)
1551{
1552 struct snd_intelhad *ctx = platform_get_drvdata(pdev);
Takashi Iwaida864802017-01-31 13:52:22 +01001553
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001554 schedule_work(&ctx->hdmi_audio_wq);
1555}
Takashi Iwaida864802017-01-31 13:52:22 +01001556
Takashi Iwai73997b02017-02-02 17:38:50 +01001557/* the work to handle monitor hot plug/unplug */
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001558static void had_audio_wq(struct work_struct *work)
1559{
1560 struct snd_intelhad *ctx =
1561 container_of(work, struct snd_intelhad, hdmi_audio_wq);
1562 struct intel_hdmi_lpe_audio_pdata *pdata = ctx->dev->platform_data;
1563
Takashi Iwai182cdf22017-02-02 14:43:39 +01001564 pm_runtime_get_sync(ctx->dev);
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001565 mutex_lock(&ctx->mutex);
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001566 if (!pdata->hdmi_connected) {
1567 dev_dbg(ctx->dev, "%s: Event: HAD_NOTIFY_HOT_UNPLUG\n",
Takashi Iwaida864802017-01-31 13:52:22 +01001568 __func__);
Takashi Iwai4aedb942017-02-02 16:38:39 +01001569 memset(ctx->eld, 0, sizeof(ctx->eld)); /* clear the old ELD */
Takashi Iwai0e9c67d2017-02-01 17:53:19 +01001570 had_process_hot_unplug(ctx);
Takashi Iwaida864802017-01-31 13:52:22 +01001571 } else {
1572 struct intel_hdmi_lpe_audio_eld *eld = &pdata->eld;
1573
Takashi Iwai0e9c67d2017-02-01 17:53:19 +01001574 dev_dbg(ctx->dev, "%s: HAD_NOTIFY_ELD : port = %d, tmds = %d\n",
1575 __func__, eld->port_id, pdata->tmds_clock_speed);
1576
Takashi Iwaida864802017-01-31 13:52:22 +01001577 switch (eld->pipe_id) {
1578 case 0:
1579 ctx->had_config_offset = AUDIO_HDMI_CONFIG_A;
1580 break;
1581 case 1:
1582 ctx->had_config_offset = AUDIO_HDMI_CONFIG_B;
1583 break;
1584 case 2:
1585 ctx->had_config_offset = AUDIO_HDMI_CONFIG_C;
1586 break;
1587 default:
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001588 dev_dbg(ctx->dev, "Invalid pipe %d\n",
Takashi Iwaida864802017-01-31 13:52:22 +01001589 eld->pipe_id);
1590 break;
1591 }
1592
Takashi Iwaidf0435d2017-02-02 15:37:11 +01001593 memcpy(ctx->eld, eld->eld_data, sizeof(ctx->eld));
Takashi Iwaida864802017-01-31 13:52:22 +01001594
Takashi Iwai0e9c67d2017-02-01 17:53:19 +01001595 ctx->dp_output = pdata->dp_output;
1596 ctx->tmds_clock_speed = pdata->tmds_clock_speed;
1597 ctx->link_rate = pdata->link_rate;
1598
Takashi Iwaida864802017-01-31 13:52:22 +01001599 had_process_hot_plug(ctx);
1600
Takashi Iwai0e9c67d2017-02-01 17:53:19 +01001601 /* Process mode change if stream is active */
Takashi Iwaib5562902017-02-04 22:05:33 +01001602 had_process_mode_change(ctx);
Takashi Iwaida864802017-01-31 13:52:22 +01001603 }
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001604 mutex_unlock(&ctx->mutex);
Takashi Iwai182cdf22017-02-02 14:43:39 +01001605 pm_runtime_put(ctx->dev);
1606}
1607
1608/*
Takashi Iwaib9bacf22017-02-14 12:29:38 +01001609 * Jack interface
1610 */
1611static int had_create_jack(struct snd_intelhad *ctx)
1612{
1613 int err;
1614
1615 err = snd_jack_new(ctx->card, "HDMI/DP", SND_JACK_AVOUT, &ctx->jack,
1616 true, false);
1617 if (err < 0)
1618 return err;
1619 ctx->jack->private_data = ctx;
1620 return 0;
1621}
1622
1623/*
Takashi Iwai182cdf22017-02-02 14:43:39 +01001624 * PM callbacks
1625 */
1626
1627static int hdmi_lpe_audio_runtime_suspend(struct device *dev)
1628{
1629 struct snd_intelhad *ctx = dev_get_drvdata(dev);
1630 struct snd_pcm_substream *substream;
1631
1632 substream = had_substream_get(ctx);
1633 if (substream) {
1634 snd_pcm_suspend(substream);
1635 had_substream_put(ctx);
1636 }
1637
1638 return 0;
1639}
1640
Arnd Bergmann1df98922017-02-07 14:38:51 +01001641static int __maybe_unused hdmi_lpe_audio_suspend(struct device *dev)
Takashi Iwai182cdf22017-02-02 14:43:39 +01001642{
1643 struct snd_intelhad *ctx = dev_get_drvdata(dev);
1644 int err;
1645
1646 err = hdmi_lpe_audio_runtime_suspend(dev);
1647 if (!err)
1648 snd_power_change_state(ctx->card, SNDRV_CTL_POWER_D3hot);
1649 return err;
1650}
1651
Arnd Bergmann1df98922017-02-07 14:38:51 +01001652static int __maybe_unused hdmi_lpe_audio_resume(struct device *dev)
Takashi Iwai182cdf22017-02-02 14:43:39 +01001653{
1654 struct snd_intelhad *ctx = dev_get_drvdata(dev);
1655
1656 snd_power_change_state(ctx->card, SNDRV_CTL_POWER_D0);
1657 return 0;
Takashi Iwaida864802017-01-31 13:52:22 +01001658}
1659
1660/* release resources */
1661static void hdmi_lpe_audio_free(struct snd_card *card)
1662{
1663 struct snd_intelhad *ctx = card->private_data;
1664
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001665 cancel_work_sync(&ctx->hdmi_audio_wq);
1666
Takashi Iwaida864802017-01-31 13:52:22 +01001667 if (ctx->mmio_start)
1668 iounmap(ctx->mmio_start);
1669 if (ctx->irq >= 0)
1670 free_irq(ctx->irq, ctx);
1671}
1672
1673/*
1674 * hdmi_lpe_audio_probe - start bridge with i915
1675 *
1676 * This function is called when the i915 driver creates the
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001677 * hdmi-lpe-audio platform device.
Takashi Iwaida864802017-01-31 13:52:22 +01001678 */
1679static int hdmi_lpe_audio_probe(struct platform_device *pdev)
1680{
1681 struct snd_card *card;
1682 struct snd_intelhad *ctx;
1683 struct snd_pcm *pcm;
1684 struct intel_hdmi_lpe_audio_pdata *pdata;
1685 int irq;
1686 struct resource *res_mmio;
Takashi Iwai4aedb942017-02-02 16:38:39 +01001687 int i, ret;
Takashi Iwaida864802017-01-31 13:52:22 +01001688
Takashi Iwaida864802017-01-31 13:52:22 +01001689 pdata = pdev->dev.platform_data;
1690 if (!pdata) {
1691 dev_err(&pdev->dev, "%s: quit: pdata not allocated by i915!!\n", __func__);
1692 return -EINVAL;
1693 }
1694
1695 /* get resources */
1696 irq = platform_get_irq(pdev, 0);
1697 if (irq < 0) {
1698 dev_err(&pdev->dev, "Could not get irq resource\n");
1699 return -ENODEV;
1700 }
1701
1702 res_mmio = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1703 if (!res_mmio) {
1704 dev_err(&pdev->dev, "Could not get IO_MEM resources\n");
1705 return -ENXIO;
1706 }
Jerome Anand5dab11d2017-01-25 04:27:52 +05301707
Takashi Iwai5647aec2017-01-31 08:14:34 +01001708 /* create a card instance with ALSA framework */
Takashi Iwaida864802017-01-31 13:52:22 +01001709 ret = snd_card_new(&pdev->dev, hdmi_card_index, hdmi_card_id,
1710 THIS_MODULE, sizeof(*ctx), &card);
1711 if (ret)
1712 return ret;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301713
Takashi Iwaida864802017-01-31 13:52:22 +01001714 ctx = card->private_data;
1715 spin_lock_init(&ctx->had_spinlock);
Takashi Iwai8f8d1d72017-02-01 17:24:02 +01001716 mutex_init(&ctx->mutex);
Takashi Iwai91b0cb02017-02-02 17:46:49 +01001717 ctx->connected = false;
Takashi Iwaida864802017-01-31 13:52:22 +01001718 ctx->dev = &pdev->dev;
1719 ctx->card = card;
Takashi Iwaida864802017-01-31 13:52:22 +01001720 ctx->aes_bits = SNDRV_PCM_DEFAULT_CON_SPDIF;
1721 strcpy(card->driver, INTEL_HAD);
Takashi Iwai873ab032017-02-07 12:14:04 +01001722 strcpy(card->shortname, "Intel HDMI/DP LPE Audio");
1723 strcpy(card->longname, "Intel HDMI/DP LPE Audio");
Jerome Anand5dab11d2017-01-25 04:27:52 +05301724
Takashi Iwaida864802017-01-31 13:52:22 +01001725 ctx->irq = -1;
1726 ctx->tmds_clock_speed = DIS_SAMPLE_RATE_148_5;
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001727 INIT_WORK(&ctx->hdmi_audio_wq, had_audio_wq);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301728
Takashi Iwaida864802017-01-31 13:52:22 +01001729 card->private_free = hdmi_lpe_audio_free;
1730
1731 /* assume pipe A as default */
1732 ctx->had_config_offset = AUDIO_HDMI_CONFIG_A;
1733
1734 platform_set_drvdata(pdev, ctx);
1735
1736 dev_dbg(&pdev->dev, "%s: mmio_start = 0x%x, mmio_end = 0x%x\n",
1737 __func__, (unsigned int)res_mmio->start,
1738 (unsigned int)res_mmio->end);
1739
1740 ctx->mmio_start = ioremap_nocache(res_mmio->start,
1741 (size_t)(resource_size(res_mmio)));
1742 if (!ctx->mmio_start) {
1743 dev_err(&pdev->dev, "Could not get ioremap\n");
1744 ret = -EACCES;
1745 goto err;
1746 }
1747
1748 /* setup interrupt handler */
1749 ret = request_irq(irq, display_pipe_interrupt_handler, 0,
1750 pdev->name, ctx);
1751 if (ret < 0) {
1752 dev_err(&pdev->dev, "request_irq failed\n");
1753 goto err;
1754 }
1755
1756 ctx->irq = irq;
1757
1758 ret = snd_pcm_new(card, INTEL_HAD, PCM_INDEX, MAX_PB_STREAMS,
1759 MAX_CAP_STREAMS, &pcm);
1760 if (ret)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301761 goto err;
1762
1763 /* setup private data which can be retrieved when required */
Takashi Iwaida864802017-01-31 13:52:22 +01001764 pcm->private_data = ctx;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301765 pcm->info_flags = 0;
1766 strncpy(pcm->name, card->shortname, strlen(card->shortname));
Takashi Iwaida864802017-01-31 13:52:22 +01001767 /* setup the ops for playabck */
Takashi Iwaib5562902017-02-04 22:05:33 +01001768 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &had_pcm_ops);
Takashi Iwai412bbe7d52017-02-02 22:03:22 +01001769
1770 /* only 32bit addressable */
1771 dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
1772 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
1773
Takashi Iwaie1b239f2017-02-03 00:01:18 +01001774 /* allocate dma pages;
1775 * try to allocate 600k buffer as default which is large enough
Jerome Anand5dab11d2017-01-25 04:27:52 +05301776 */
Takashi Iwaida864802017-01-31 13:52:22 +01001777 snd_pcm_lib_preallocate_pages_for_all(pcm,
Jerome Anand5dab11d2017-01-25 04:27:52 +05301778 SNDRV_DMA_TYPE_DEV, NULL,
Takashi Iwaie1b239f2017-02-03 00:01:18 +01001779 HAD_DEFAULT_BUFFER, HAD_MAX_BUFFER);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301780
Takashi Iwai4aedb942017-02-02 16:38:39 +01001781 /* create controls */
1782 for (i = 0; i < ARRAY_SIZE(had_controls); i++) {
1783 ret = snd_ctl_add(card, snd_ctl_new1(&had_controls[i], ctx));
1784 if (ret < 0)
1785 goto err;
1786 }
Jerome Anand5dab11d2017-01-25 04:27:52 +05301787
1788 init_channel_allocations();
1789
1790 /* Register channel map controls */
Takashi Iwaida864802017-01-31 13:52:22 +01001791 ret = had_register_chmap_ctls(ctx, pcm);
1792 if (ret < 0)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301793 goto err;
1794
Takashi Iwaib9bacf22017-02-14 12:29:38 +01001795 ret = had_create_jack(ctx);
1796 if (ret < 0)
1797 goto err;
1798
Takashi Iwaida864802017-01-31 13:52:22 +01001799 ret = snd_card_register(card);
1800 if (ret)
Takashi Iwai36ec0d92017-01-31 08:47:05 +01001801 goto err;
1802
Takashi Iwaibcce7752017-02-01 17:18:20 +01001803 spin_lock_irq(&pdata->lpe_audio_slock);
Takashi Iwaida864802017-01-31 13:52:22 +01001804 pdata->notify_audio_lpe = notify_audio_lpe;
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001805 pdata->notify_pending = false;
Takashi Iwaibcce7752017-02-01 17:18:20 +01001806 spin_unlock_irq(&pdata->lpe_audio_slock);
Takashi Iwaida864802017-01-31 13:52:22 +01001807
1808 pm_runtime_set_active(&pdev->dev);
1809 pm_runtime_enable(&pdev->dev);
1810
Takashi Iwai99b2ab92017-01-31 16:26:10 +01001811 dev_dbg(&pdev->dev, "%s: handle pending notification\n", __func__);
Takashi Iwaida864802017-01-31 13:52:22 +01001812 schedule_work(&ctx->hdmi_audio_wq);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301813
Takashi Iwai79dda752017-01-30 17:23:39 +01001814 return 0;
Takashi Iwai5647aec2017-01-31 08:14:34 +01001815
Jerome Anand5dab11d2017-01-25 04:27:52 +05301816err:
1817 snd_card_free(card);
Takashi Iwaida864802017-01-31 13:52:22 +01001818 return ret;
Jerome Anand5dab11d2017-01-25 04:27:52 +05301819}
1820
Takashi Iwai79dda752017-01-30 17:23:39 +01001821/*
Takashi Iwaida864802017-01-31 13:52:22 +01001822 * hdmi_lpe_audio_remove - stop bridge with i915
Jerome Anand5dab11d2017-01-25 04:27:52 +05301823 *
Takashi Iwai2e52f5e2017-01-31 17:09:13 +01001824 * This function is called when the platform device is destroyed.
Jerome Anand5dab11d2017-01-25 04:27:52 +05301825 */
Takashi Iwaida864802017-01-31 13:52:22 +01001826static int hdmi_lpe_audio_remove(struct platform_device *pdev)
Jerome Anand5dab11d2017-01-25 04:27:52 +05301827{
Takashi Iwaida864802017-01-31 13:52:22 +01001828 struct snd_intelhad *ctx = platform_get_drvdata(pdev);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301829
Takashi Iwaida864802017-01-31 13:52:22 +01001830 snd_card_free(ctx->card);
Jerome Anand5dab11d2017-01-25 04:27:52 +05301831 return 0;
1832}
1833
Takashi Iwai182cdf22017-02-02 14:43:39 +01001834static const struct dev_pm_ops hdmi_lpe_audio_pm = {
1835 SET_SYSTEM_SLEEP_PM_OPS(hdmi_lpe_audio_suspend, hdmi_lpe_audio_resume)
1836 SET_RUNTIME_PM_OPS(hdmi_lpe_audio_runtime_suspend, NULL, NULL)
1837};
1838
Takashi Iwaida864802017-01-31 13:52:22 +01001839static struct platform_driver hdmi_lpe_audio_driver = {
1840 .driver = {
1841 .name = "hdmi-lpe-audio",
Takashi Iwai182cdf22017-02-02 14:43:39 +01001842 .pm = &hdmi_lpe_audio_pm,
Takashi Iwaida864802017-01-31 13:52:22 +01001843 },
1844 .probe = hdmi_lpe_audio_probe,
1845 .remove = hdmi_lpe_audio_remove,
Takashi Iwaida864802017-01-31 13:52:22 +01001846};
1847
1848module_platform_driver(hdmi_lpe_audio_driver);
1849MODULE_ALIAS("platform:hdmi_lpe_audio");
1850
Jerome Anand5dab11d2017-01-25 04:27:52 +05301851MODULE_AUTHOR("Sailaja Bandarupalli <sailaja.bandarupalli@intel.com>");
1852MODULE_AUTHOR("Ramesh Babu K V <ramesh.babu@intel.com>");
1853MODULE_AUTHOR("Vaibhav Agarwal <vaibhav.agarwal@intel.com>");
1854MODULE_AUTHOR("Jerome Anand <jerome.anand@intel.com>");
1855MODULE_DESCRIPTION("Intel HDMI Audio driver");
1856MODULE_LICENSE("GPL v2");
1857MODULE_SUPPORTED_DEVICE("{Intel,Intel_HAD}");