blob: 7bf3682cdf478b1597cf04e071b525eed31adb69 [file] [log] [blame]
Jan Ceuleers0977f812012-06-05 03:42:12 +00001/* drivers/net/ethernet/freescale/gianfar.c
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 *
3 * Gianfar Ethernet Driver
Andy Fleming7f7f5312005-11-11 12:38:59 -06004 * This driver is designed for the non-CPM ethernet controllers
5 * on the 85xx and 83xx family of integrated processors
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 * Based on 8260_io/fcc_enet.c
7 *
8 * Author: Andy Fleming
Kumar Gala4c8d3d92005-11-13 16:06:30 -08009 * Maintainer: Kumar Gala
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +000010 * Modifier: Sandeep Gopalpet <sandeep.kumar@freescale.com>
Linus Torvalds1da177e2005-04-16 15:20:36 -070011 *
Claudiu Manoil20862782014-02-17 12:53:14 +020012 * Copyright 2002-2009, 2011-2013 Freescale Semiconductor, Inc.
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +000013 * Copyright 2007 MontaVista Software, Inc.
Linus Torvalds1da177e2005-04-16 15:20:36 -070014 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
19 *
20 * Gianfar: AKA Lambda Draconis, "Dragon"
21 * RA 11 31 24.2
22 * Dec +69 19 52
23 * V 3.84
24 * B-V +1.62
25 *
26 * Theory of operation
Kumar Gala0bbaf062005-06-20 10:54:21 -050027 *
Andy Flemingb31a1d82008-12-16 15:29:15 -080028 * The driver is initialized through of_device. Configuration information
29 * is therefore conveyed through an OF-style device tree.
Linus Torvalds1da177e2005-04-16 15:20:36 -070030 *
31 * The Gianfar Ethernet Controller uses a ring of buffer
32 * descriptors. The beginning is indicated by a register
Kumar Gala0bbaf062005-06-20 10:54:21 -050033 * pointing to the physical address of the start of the ring.
34 * The end is determined by a "wrap" bit being set in the
Linus Torvalds1da177e2005-04-16 15:20:36 -070035 * last descriptor of the ring.
36 *
37 * When a packet is received, the RXF bit in the
Kumar Gala0bbaf062005-06-20 10:54:21 -050038 * IEVENT register is set, triggering an interrupt when the
Linus Torvalds1da177e2005-04-16 15:20:36 -070039 * corresponding bit in the IMASK register is also set (if
40 * interrupt coalescing is active, then the interrupt may not
41 * happen immediately, but will wait until either a set number
Andy Flemingbb40dcb2005-09-23 22:54:21 -040042 * of frames or amount of time have passed). In NAPI, the
Linus Torvalds1da177e2005-04-16 15:20:36 -070043 * interrupt handler will signal there is work to be done, and
Francois Romieu0aa15382008-07-11 00:33:52 +020044 * exit. This method will start at the last known empty
Kumar Gala0bbaf062005-06-20 10:54:21 -050045 * descriptor, and process every subsequent descriptor until there
Linus Torvalds1da177e2005-04-16 15:20:36 -070046 * are none left with data (NAPI will stop after a set number of
47 * packets to give time to other tasks, but will eventually
48 * process all the packets). The data arrives inside a
49 * pre-allocated skb, and so after the skb is passed up to the
50 * stack, a new skb must be allocated, and the address field in
51 * the buffer descriptor must be updated to indicate this new
52 * skb.
53 *
54 * When the kernel requests that a packet be transmitted, the
55 * driver starts where it left off last time, and points the
56 * descriptor at the buffer which was passed in. The driver
57 * then informs the DMA engine that there are packets ready to
58 * be transmitted. Once the controller is finished transmitting
59 * the packet, an interrupt may be triggered (under the same
60 * conditions as for reception, but depending on the TXF bit).
61 * The driver then cleans up the buffer.
62 */
63
Joe Perches59deab22011-06-14 08:57:47 +000064#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
65#define DEBUG
66
Linus Torvalds1da177e2005-04-16 15:20:36 -070067#include <linux/kernel.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070068#include <linux/string.h>
69#include <linux/errno.h>
Andy Flemingbb40dcb2005-09-23 22:54:21 -040070#include <linux/unistd.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070071#include <linux/slab.h>
72#include <linux/interrupt.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070073#include <linux/delay.h>
74#include <linux/netdevice.h>
75#include <linux/etherdevice.h>
76#include <linux/skbuff.h>
Kumar Gala0bbaf062005-06-20 10:54:21 -050077#include <linux/if_vlan.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070078#include <linux/spinlock.h>
79#include <linux/mm.h>
Rob Herring5af50732013-09-17 14:28:33 -050080#include <linux/of_address.h>
81#include <linux/of_irq.h>
Grant Likelyfe192a42009-04-25 12:53:12 +000082#include <linux/of_mdio.h>
Andy Flemingb31a1d82008-12-16 15:29:15 -080083#include <linux/of_platform.h>
Kumar Gala0bbaf062005-06-20 10:54:21 -050084#include <linux/ip.h>
85#include <linux/tcp.h>
86#include <linux/udp.h>
Kumar Gala9c07b8842006-01-11 11:26:25 -080087#include <linux/in.h>
Manfred Rudigiercc772ab2010-04-08 23:10:03 +000088#include <linux/net_tstamp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070089
90#include <asm/io.h>
Claudiu Manoild6ef0bc2014-10-07 10:44:32 +030091#ifdef CONFIG_PPC
Anton Vorontsov7d350972010-06-30 06:39:12 +000092#include <asm/reg.h>
Claudiu Manoil2969b1f2013-10-09 20:20:41 +030093#include <asm/mpc85xx.h>
Claudiu Manoild6ef0bc2014-10-07 10:44:32 +030094#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070095#include <asm/irq.h>
96#include <asm/uaccess.h>
97#include <linux/module.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070098#include <linux/dma-mapping.h>
99#include <linux/crc32.h>
Andy Flemingbb40dcb2005-09-23 22:54:21 -0400100#include <linux/mii.h>
101#include <linux/phy.h>
Andy Flemingb31a1d82008-12-16 15:29:15 -0800102#include <linux/phy_fixed.h>
103#include <linux/of.h>
David Daney4b6ba8a2010-10-26 15:07:13 -0700104#include <linux/of_net.h>
Claudiu Manoilfd31a952014-10-07 10:44:31 +0300105#include <linux/of_address.h>
106#include <linux/of_irq.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -0700107
108#include "gianfar.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109
110#define TX_TIMEOUT (1*HZ)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111
Andy Fleming7f7f5312005-11-11 12:38:59 -0600112const char gfar_driver_version[] = "1.3";
Linus Torvalds1da177e2005-04-16 15:20:36 -0700113
Linus Torvalds1da177e2005-04-16 15:20:36 -0700114static int gfar_enet_open(struct net_device *dev);
115static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev);
Sebastian Siewiorab939902008-08-19 21:12:45 +0200116static void gfar_reset_task(struct work_struct *work);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700117static void gfar_timeout(struct net_device *dev);
118static int gfar_close(struct net_device *dev);
Kevin Hao91c53f762014-12-24 14:05:44 +0800119static struct sk_buff *gfar_new_skb(struct net_device *dev,
120 dma_addr_t *bufaddr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121static int gfar_set_mac_address(struct net_device *dev);
122static int gfar_change_mtu(struct net_device *dev, int new_mtu);
David Howells7d12e782006-10-05 14:55:46 +0100123static irqreturn_t gfar_error(int irq, void *dev_id);
124static irqreturn_t gfar_transmit(int irq, void *dev_id);
125static irqreturn_t gfar_interrupt(int irq, void *dev_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700126static void adjust_link(struct net_device *dev);
Claudiu Manoil6ce29b02014-04-30 14:27:21 +0300127static noinline void gfar_update_link_state(struct gfar_private *priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700128static int init_phy(struct net_device *dev);
Grant Likely74888762011-02-22 21:05:51 -0700129static int gfar_probe(struct platform_device *ofdev);
Grant Likely2dc11582010-08-06 09:25:50 -0600130static int gfar_remove(struct platform_device *ofdev);
Andy Flemingbb40dcb2005-09-23 22:54:21 -0400131static void free_skb_resources(struct gfar_private *priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700132static void gfar_set_multi(struct net_device *dev);
133static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr);
Kapil Junejad3c12872007-05-11 18:25:11 -0500134static void gfar_configure_serdes(struct net_device *dev);
Claudiu Manoilaeb12c52014-03-07 14:42:45 +0200135static int gfar_poll_rx(struct napi_struct *napi, int budget);
136static int gfar_poll_tx(struct napi_struct *napi, int budget);
137static int gfar_poll_rx_sq(struct napi_struct *napi, int budget);
138static int gfar_poll_tx_sq(struct napi_struct *napi, int budget);
Vitaly Woolf2d71c22006-11-07 13:27:02 +0300139#ifdef CONFIG_NET_POLL_CONTROLLER
140static void gfar_netpoll(struct net_device *dev);
141#endif
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +0000142int gfar_clean_rx_ring(struct gfar_priv_rx_q *rx_queue, int rx_work_limit);
Claudiu Manoilc233cf402013-03-19 07:40:02 +0000143static void gfar_clean_tx_ring(struct gfar_priv_tx_q *tx_queue);
Claudiu Manoil61db26c2013-02-14 05:00:05 +0000144static void gfar_process_frame(struct net_device *dev, struct sk_buff *skb,
145 int amount_pull, struct napi_struct *napi);
Claudiu Manoilc10650b2014-02-17 12:53:18 +0200146static void gfar_halt_nodisable(struct gfar_private *priv);
Andy Fleming7f7f5312005-11-11 12:38:59 -0600147static void gfar_clear_exact_match(struct net_device *dev);
Joe Perchesb6bc7652010-12-21 02:16:08 -0800148static void gfar_set_mac_for_addr(struct net_device *dev, int num,
149 const u8 *addr);
Andy Fleming26ccfc32009-03-10 12:58:28 +0000150static int gfar_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152MODULE_AUTHOR("Freescale Semiconductor, Inc");
153MODULE_DESCRIPTION("Gianfar Ethernet Driver");
154MODULE_LICENSE("GPL");
155
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +0000156static void gfar_init_rxbdp(struct gfar_priv_rx_q *rx_queue, struct rxbd8 *bdp,
Anton Vorontsov8a102fe2009-10-12 06:00:37 +0000157 dma_addr_t buf)
158{
Anton Vorontsov8a102fe2009-10-12 06:00:37 +0000159 u32 lstatus;
160
161 bdp->bufPtr = buf;
162
163 lstatus = BD_LFLAG(RXBD_EMPTY | RXBD_INTERRUPT);
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +0000164 if (bdp == rx_queue->rx_bd_base + rx_queue->rx_ring_size - 1)
Anton Vorontsov8a102fe2009-10-12 06:00:37 +0000165 lstatus |= BD_LFLAG(RXBD_WRAP);
166
Claudiu Manoild55398b2014-10-07 10:44:35 +0300167 gfar_wmb();
Anton Vorontsov8a102fe2009-10-12 06:00:37 +0000168
169 bdp->lstatus = lstatus;
170}
171
Anton Vorontsov87283272009-10-12 06:00:39 +0000172static int gfar_init_bds(struct net_device *ndev)
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000173{
Anton Vorontsov87283272009-10-12 06:00:39 +0000174 struct gfar_private *priv = netdev_priv(ndev);
Matei Pavaluca45b679c92014-10-27 10:42:44 +0200175 struct gfar __iomem *regs = priv->gfargrp[0].regs;
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +0000176 struct gfar_priv_tx_q *tx_queue = NULL;
177 struct gfar_priv_rx_q *rx_queue = NULL;
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000178 struct txbd8 *txbdp;
179 struct rxbd8 *rxbdp;
Kevin Hao03366a32014-12-24 14:05:45 +0800180 u32 __iomem *rfbptr;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000181 int i, j;
Kevin Hao0a4b5a22014-12-11 14:08:41 +0800182 dma_addr_t bufaddr;
Anton Vorontsov87283272009-10-12 06:00:39 +0000183
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000184 for (i = 0; i < priv->num_tx_queues; i++) {
185 tx_queue = priv->tx_queue[i];
186 /* Initialize some variables in our dev structure */
187 tx_queue->num_txbdfree = tx_queue->tx_ring_size;
188 tx_queue->dirty_tx = tx_queue->tx_bd_base;
189 tx_queue->cur_tx = tx_queue->tx_bd_base;
190 tx_queue->skb_curtx = 0;
191 tx_queue->skb_dirtytx = 0;
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +0000192
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000193 /* Initialize Transmit Descriptor Ring */
194 txbdp = tx_queue->tx_bd_base;
195 for (j = 0; j < tx_queue->tx_ring_size; j++) {
196 txbdp->lstatus = 0;
197 txbdp->bufPtr = 0;
198 txbdp++;
Anton Vorontsov87283272009-10-12 06:00:39 +0000199 }
200
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000201 /* Set the last descriptor in the ring to indicate wrap */
202 txbdp--;
203 txbdp->status |= TXBD_WRAP;
204 }
205
Matei Pavaluca45b679c92014-10-27 10:42:44 +0200206 rfbptr = &regs->rfbptr0;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000207 for (i = 0; i < priv->num_rx_queues; i++) {
208 rx_queue = priv->rx_queue[i];
209 rx_queue->cur_rx = rx_queue->rx_bd_base;
210 rx_queue->skb_currx = 0;
211 rxbdp = rx_queue->rx_bd_base;
212
213 for (j = 0; j < rx_queue->rx_ring_size; j++) {
214 struct sk_buff *skb = rx_queue->rx_skbuff[j];
215
216 if (skb) {
Kevin Hao0a4b5a22014-12-11 14:08:41 +0800217 bufaddr = rxbdp->bufPtr;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000218 } else {
Kevin Hao0a4b5a22014-12-11 14:08:41 +0800219 skb = gfar_new_skb(ndev, &bufaddr);
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000220 if (!skb) {
Joe Perches59deab22011-06-14 08:57:47 +0000221 netdev_err(ndev, "Can't allocate RX buffers\n");
Claudiu Manoil1eb8f7a2012-11-08 22:11:41 +0000222 return -ENOMEM;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000223 }
224 rx_queue->rx_skbuff[j] = skb;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000225 }
226
Kevin Hao0a4b5a22014-12-11 14:08:41 +0800227 gfar_init_rxbdp(rx_queue, rxbdp, bufaddr);
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000228 rxbdp++;
229 }
230
Matei Pavaluca45b679c92014-10-27 10:42:44 +0200231 rx_queue->rfbptr = rfbptr;
232 rfbptr += 2;
Anton Vorontsov87283272009-10-12 06:00:39 +0000233 }
234
235 return 0;
236}
237
238static int gfar_alloc_skb_resources(struct net_device *ndev)
239{
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000240 void *vaddr;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000241 dma_addr_t addr;
242 int i, j, k;
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000243 struct gfar_private *priv = netdev_priv(ndev);
Claudiu Manoil369ec162013-02-14 05:00:02 +0000244 struct device *dev = priv->dev;
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +0000245 struct gfar_priv_tx_q *tx_queue = NULL;
246 struct gfar_priv_rx_q *rx_queue = NULL;
247
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000248 priv->total_tx_ring_size = 0;
249 for (i = 0; i < priv->num_tx_queues; i++)
250 priv->total_tx_ring_size += priv->tx_queue[i]->tx_ring_size;
251
252 priv->total_rx_ring_size = 0;
253 for (i = 0; i < priv->num_rx_queues; i++)
254 priv->total_rx_ring_size += priv->rx_queue[i]->rx_ring_size;
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000255
256 /* Allocate memory for the buffer descriptors */
Anton Vorontsov87283272009-10-12 06:00:39 +0000257 vaddr = dma_alloc_coherent(dev,
Joe Perchesd0320f72013-03-14 13:07:21 +0000258 (priv->total_tx_ring_size *
259 sizeof(struct txbd8)) +
260 (priv->total_rx_ring_size *
261 sizeof(struct rxbd8)),
262 &addr, GFP_KERNEL);
263 if (!vaddr)
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000264 return -ENOMEM;
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000265
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000266 for (i = 0; i < priv->num_tx_queues; i++) {
267 tx_queue = priv->tx_queue[i];
Joe Perches43d620c2011-06-16 19:08:06 +0000268 tx_queue->tx_bd_base = vaddr;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000269 tx_queue->tx_bd_dma_base = addr;
270 tx_queue->dev = ndev;
271 /* enet DMA only understands physical addresses */
Jan Ceuleersbc4598b2012-06-05 03:42:13 +0000272 addr += sizeof(struct txbd8) * tx_queue->tx_ring_size;
273 vaddr += sizeof(struct txbd8) * tx_queue->tx_ring_size;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000274 }
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000275
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000276 /* Start the rx descriptor ring where the tx ring leaves off */
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000277 for (i = 0; i < priv->num_rx_queues; i++) {
278 rx_queue = priv->rx_queue[i];
Joe Perches43d620c2011-06-16 19:08:06 +0000279 rx_queue->rx_bd_base = vaddr;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000280 rx_queue->rx_bd_dma_base = addr;
281 rx_queue->dev = ndev;
Jan Ceuleersbc4598b2012-06-05 03:42:13 +0000282 addr += sizeof(struct rxbd8) * rx_queue->rx_ring_size;
283 vaddr += sizeof(struct rxbd8) * rx_queue->rx_ring_size;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000284 }
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000285
286 /* Setup the skbuff rings */
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000287 for (i = 0; i < priv->num_tx_queues; i++) {
288 tx_queue = priv->tx_queue[i];
Joe Perches14f8dc42013-02-07 11:46:27 +0000289 tx_queue->tx_skbuff =
290 kmalloc_array(tx_queue->tx_ring_size,
291 sizeof(*tx_queue->tx_skbuff),
292 GFP_KERNEL);
293 if (!tx_queue->tx_skbuff)
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000294 goto cleanup;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000295
296 for (k = 0; k < tx_queue->tx_ring_size; k++)
297 tx_queue->tx_skbuff[k] = NULL;
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000298 }
299
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000300 for (i = 0; i < priv->num_rx_queues; i++) {
301 rx_queue = priv->rx_queue[i];
Joe Perches14f8dc42013-02-07 11:46:27 +0000302 rx_queue->rx_skbuff =
303 kmalloc_array(rx_queue->rx_ring_size,
304 sizeof(*rx_queue->rx_skbuff),
305 GFP_KERNEL);
306 if (!rx_queue->rx_skbuff)
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000307 goto cleanup;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000308
309 for (j = 0; j < rx_queue->rx_ring_size; j++)
310 rx_queue->rx_skbuff[j] = NULL;
311 }
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000312
Anton Vorontsov87283272009-10-12 06:00:39 +0000313 if (gfar_init_bds(ndev))
314 goto cleanup;
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000315
316 return 0;
317
318cleanup:
319 free_skb_resources(priv);
320 return -ENOMEM;
321}
322
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000323static void gfar_init_tx_rx_base(struct gfar_private *priv)
324{
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000325 struct gfar __iomem *regs = priv->gfargrp[0].regs;
Anton Vorontsov18294ad2009-11-04 12:53:00 +0000326 u32 __iomem *baddr;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000327 int i;
328
329 baddr = &regs->tbase0;
Jan Ceuleersbc4598b2012-06-05 03:42:13 +0000330 for (i = 0; i < priv->num_tx_queues; i++) {
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000331 gfar_write(baddr, priv->tx_queue[i]->tx_bd_dma_base);
Jan Ceuleersbc4598b2012-06-05 03:42:13 +0000332 baddr += 2;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000333 }
334
335 baddr = &regs->rbase0;
Jan Ceuleersbc4598b2012-06-05 03:42:13 +0000336 for (i = 0; i < priv->num_rx_queues; i++) {
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000337 gfar_write(baddr, priv->rx_queue[i]->rx_bd_dma_base);
Jan Ceuleersbc4598b2012-06-05 03:42:13 +0000338 baddr += 2;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000339 }
340}
341
Matei Pavaluca45b679c92014-10-27 10:42:44 +0200342static void gfar_init_rqprm(struct gfar_private *priv)
343{
344 struct gfar __iomem *regs = priv->gfargrp[0].regs;
345 u32 __iomem *baddr;
346 int i;
347
348 baddr = &regs->rqprm0;
349 for (i = 0; i < priv->num_rx_queues; i++) {
350 gfar_write(baddr, priv->rx_queue[i]->rx_ring_size |
351 (DEFAULT_RX_LFC_THR << FBTHR_SHIFT));
352 baddr++;
353 }
354}
355
Claudiu Manoil88302642014-02-24 12:13:43 +0200356static void gfar_rx_buff_size_config(struct gfar_private *priv)
357{
Claudiu Manoilf5b720b2014-10-15 19:11:46 +0300358 int frame_size = priv->ndev->mtu + ETH_HLEN + ETH_FCS_LEN;
Claudiu Manoil88302642014-02-24 12:13:43 +0200359
360 /* set this when rx hw offload (TOE) functions are being used */
361 priv->uses_rxfcb = 0;
362
363 if (priv->ndev->features & (NETIF_F_RXCSUM | NETIF_F_HW_VLAN_CTAG_RX))
364 priv->uses_rxfcb = 1;
365
366 if (priv->hwts_rx_en)
367 priv->uses_rxfcb = 1;
368
369 if (priv->uses_rxfcb)
370 frame_size += GMAC_FCB_LEN;
371
372 frame_size += priv->padding;
373
374 frame_size = (frame_size & ~(INCREMENTAL_BUFFER_SIZE - 1)) +
375 INCREMENTAL_BUFFER_SIZE;
376
377 priv->rx_buffer_size = frame_size;
378}
379
Claudiu Manoila328ac92014-02-24 12:13:42 +0200380static void gfar_mac_rx_config(struct gfar_private *priv)
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000381{
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000382 struct gfar __iomem *regs = priv->gfargrp[0].regs;
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000383 u32 rctrl = 0;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000384
Sandeep Gopalpet1ccb8382009-12-16 01:14:58 +0000385 if (priv->rx_filer_enable) {
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000386 rctrl |= RCTRL_FILREN;
Sandeep Gopalpet1ccb8382009-12-16 01:14:58 +0000387 /* Program the RIR0 reg with the required distribution */
Claudiu Manoil71ff9e32014-03-07 14:42:46 +0200388 if (priv->poll_mode == GFAR_SQ_POLLING)
389 gfar_write(&regs->rir0, DEFAULT_2RXQ_RIR0);
390 else /* GFAR_MQ_POLLING */
391 gfar_write(&regs->rir0, DEFAULT_8RXQ_RIR0);
Sandeep Gopalpet1ccb8382009-12-16 01:14:58 +0000392 }
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000393
Claudiu Manoilf5ae6272013-01-23 00:18:36 +0000394 /* Restore PROMISC mode */
Claudiu Manoila328ac92014-02-24 12:13:42 +0200395 if (priv->ndev->flags & IFF_PROMISC)
Claudiu Manoilf5ae6272013-01-23 00:18:36 +0000396 rctrl |= RCTRL_PROM;
397
Claudiu Manoil88302642014-02-24 12:13:43 +0200398 if (priv->ndev->features & NETIF_F_RXCSUM)
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000399 rctrl |= RCTRL_CHECKSUMMING;
400
Claudiu Manoil88302642014-02-24 12:13:43 +0200401 if (priv->extended_hash)
402 rctrl |= RCTRL_EXTHASH | RCTRL_EMEN;
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000403
404 if (priv->padding) {
405 rctrl &= ~RCTRL_PAL_MASK;
406 rctrl |= RCTRL_PADDING(priv->padding);
407 }
408
Manfred Rudigier97553f72010-06-11 01:49:05 +0000409 /* Enable HW time stamping if requested from user space */
Claudiu Manoil88302642014-02-24 12:13:43 +0200410 if (priv->hwts_rx_en)
Manfred Rudigier97553f72010-06-11 01:49:05 +0000411 rctrl |= RCTRL_PRSDEP_INIT | RCTRL_TS_ENABLE;
412
Claudiu Manoil88302642014-02-24 12:13:43 +0200413 if (priv->ndev->features & NETIF_F_HW_VLAN_CTAG_RX)
Sebastian Pöhnb852b722011-07-26 00:03:13 +0000414 rctrl |= RCTRL_VLEX | RCTRL_PRSDEP_INIT;
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000415
Matei Pavaluca45b679c92014-10-27 10:42:44 +0200416 /* Clear the LFC bit */
417 gfar_write(&regs->rctrl, rctrl);
418 /* Init flow control threshold values */
419 gfar_init_rqprm(priv);
420 gfar_write(&regs->ptv, DEFAULT_LFC_PTVVAL);
421 rctrl |= RCTRL_LFC;
422
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000423 /* Init rctrl based on our settings */
424 gfar_write(&regs->rctrl, rctrl);
Claudiu Manoila328ac92014-02-24 12:13:42 +0200425}
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000426
Claudiu Manoila328ac92014-02-24 12:13:42 +0200427static void gfar_mac_tx_config(struct gfar_private *priv)
428{
429 struct gfar __iomem *regs = priv->gfargrp[0].regs;
430 u32 tctrl = 0;
431
432 if (priv->ndev->features & NETIF_F_IP_CSUM)
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000433 tctrl |= TCTRL_INIT_CSUM;
434
Claudiu Manoilb98b8ba2012-09-23 22:39:08 +0000435 if (priv->prio_sched_en)
436 tctrl |= TCTRL_TXSCHED_PRIO;
437 else {
438 tctrl |= TCTRL_TXSCHED_WRRS;
439 gfar_write(&regs->tr03wt, DEFAULT_WRRS_WEIGHT);
440 gfar_write(&regs->tr47wt, DEFAULT_WRRS_WEIGHT);
441 }
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000442
Claudiu Manoil88302642014-02-24 12:13:43 +0200443 if (priv->ndev->features & NETIF_F_HW_VLAN_CTAG_TX)
444 tctrl |= TCTRL_VLINS;
445
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000446 gfar_write(&regs->tctrl, tctrl);
Anton Vorontsov826aa4a2009-10-12 06:00:34 +0000447}
448
Claudiu Manoilf19015b2014-02-24 12:13:46 +0200449static void gfar_configure_coalescing(struct gfar_private *priv,
450 unsigned long tx_mask, unsigned long rx_mask)
451{
452 struct gfar __iomem *regs = priv->gfargrp[0].regs;
453 u32 __iomem *baddr;
454
455 if (priv->mode == MQ_MG_MODE) {
456 int i = 0;
457
458 baddr = &regs->txic0;
459 for_each_set_bit(i, &tx_mask, priv->num_tx_queues) {
460 gfar_write(baddr + i, 0);
461 if (likely(priv->tx_queue[i]->txcoalescing))
462 gfar_write(baddr + i, priv->tx_queue[i]->txic);
463 }
464
465 baddr = &regs->rxic0;
466 for_each_set_bit(i, &rx_mask, priv->num_rx_queues) {
467 gfar_write(baddr + i, 0);
468 if (likely(priv->rx_queue[i]->rxcoalescing))
469 gfar_write(baddr + i, priv->rx_queue[i]->rxic);
470 }
471 } else {
472 /* Backward compatible case -- even if we enable
473 * multiple queues, there's only single reg to program
474 */
475 gfar_write(&regs->txic, 0);
476 if (likely(priv->tx_queue[0]->txcoalescing))
477 gfar_write(&regs->txic, priv->tx_queue[0]->txic);
478
479 gfar_write(&regs->rxic, 0);
480 if (unlikely(priv->rx_queue[0]->rxcoalescing))
481 gfar_write(&regs->rxic, priv->rx_queue[0]->rxic);
482 }
483}
484
485void gfar_configure_coalescing_all(struct gfar_private *priv)
486{
487 gfar_configure_coalescing(priv, 0xFF, 0xFF);
488}
489
Sandeep Gopalpeta7f38042009-12-16 01:15:07 +0000490static struct net_device_stats *gfar_get_stats(struct net_device *dev)
491{
492 struct gfar_private *priv = netdev_priv(dev);
Sandeep Gopalpeta7f38042009-12-16 01:15:07 +0000493 unsigned long rx_packets = 0, rx_bytes = 0, rx_dropped = 0;
494 unsigned long tx_packets = 0, tx_bytes = 0;
Jan Ceuleers3a2e16c2012-06-05 03:42:14 +0000495 int i;
Sandeep Gopalpeta7f38042009-12-16 01:15:07 +0000496
497 for (i = 0; i < priv->num_rx_queues; i++) {
498 rx_packets += priv->rx_queue[i]->stats.rx_packets;
Jan Ceuleersbc4598b2012-06-05 03:42:13 +0000499 rx_bytes += priv->rx_queue[i]->stats.rx_bytes;
Sandeep Gopalpeta7f38042009-12-16 01:15:07 +0000500 rx_dropped += priv->rx_queue[i]->stats.rx_dropped;
501 }
502
503 dev->stats.rx_packets = rx_packets;
Jan Ceuleersbc4598b2012-06-05 03:42:13 +0000504 dev->stats.rx_bytes = rx_bytes;
Sandeep Gopalpeta7f38042009-12-16 01:15:07 +0000505 dev->stats.rx_dropped = rx_dropped;
506
507 for (i = 0; i < priv->num_tx_queues; i++) {
Eric Dumazet1ac9ad12011-01-12 12:13:14 +0000508 tx_bytes += priv->tx_queue[i]->stats.tx_bytes;
509 tx_packets += priv->tx_queue[i]->stats.tx_packets;
Sandeep Gopalpeta7f38042009-12-16 01:15:07 +0000510 }
511
Jan Ceuleersbc4598b2012-06-05 03:42:13 +0000512 dev->stats.tx_bytes = tx_bytes;
Sandeep Gopalpeta7f38042009-12-16 01:15:07 +0000513 dev->stats.tx_packets = tx_packets;
514
515 return &dev->stats;
516}
517
Andy Fleming26ccfc32009-03-10 12:58:28 +0000518static const struct net_device_ops gfar_netdev_ops = {
519 .ndo_open = gfar_enet_open,
520 .ndo_start_xmit = gfar_start_xmit,
521 .ndo_stop = gfar_close,
522 .ndo_change_mtu = gfar_change_mtu,
Michał Mirosław8b3afe92011-04-15 04:50:50 +0000523 .ndo_set_features = gfar_set_features,
Jiri Pirkoafc4b132011-08-16 06:29:01 +0000524 .ndo_set_rx_mode = gfar_set_multi,
Andy Fleming26ccfc32009-03-10 12:58:28 +0000525 .ndo_tx_timeout = gfar_timeout,
526 .ndo_do_ioctl = gfar_ioctl,
Sandeep Gopalpeta7f38042009-12-16 01:15:07 +0000527 .ndo_get_stats = gfar_get_stats,
Ben Hutchings240c1022009-07-09 17:54:35 +0000528 .ndo_set_mac_address = eth_mac_addr,
529 .ndo_validate_addr = eth_validate_addr,
Andy Fleming26ccfc32009-03-10 12:58:28 +0000530#ifdef CONFIG_NET_POLL_CONTROLLER
531 .ndo_poll_controller = gfar_netpoll,
532#endif
533};
534
Claudiu Manoilefeddce2014-02-17 12:53:17 +0200535static void gfar_ints_disable(struct gfar_private *priv)
536{
537 int i;
538 for (i = 0; i < priv->num_grps; i++) {
539 struct gfar __iomem *regs = priv->gfargrp[i].regs;
540 /* Clear IEVENT */
541 gfar_write(&regs->ievent, IEVENT_INIT_CLEAR);
542
543 /* Initialize IMASK */
544 gfar_write(&regs->imask, IMASK_INIT_CLEAR);
545 }
546}
547
548static void gfar_ints_enable(struct gfar_private *priv)
549{
550 int i;
551 for (i = 0; i < priv->num_grps; i++) {
552 struct gfar __iomem *regs = priv->gfargrp[i].regs;
553 /* Unmask the interrupts we look for */
554 gfar_write(&regs->imask, IMASK_DEFAULT);
555 }
556}
557
Kevin Hao91c53f762014-12-24 14:05:44 +0800558static void lock_tx_qs(struct gfar_private *priv)
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000559{
Jan Ceuleers3a2e16c2012-06-05 03:42:14 +0000560 int i;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000561
562 for (i = 0; i < priv->num_tx_queues; i++)
563 spin_lock(&priv->tx_queue[i]->txlock);
564}
565
Kevin Hao91c53f762014-12-24 14:05:44 +0800566static void unlock_tx_qs(struct gfar_private *priv)
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000567{
Jan Ceuleers3a2e16c2012-06-05 03:42:14 +0000568 int i;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000569
570 for (i = 0; i < priv->num_tx_queues; i++)
571 spin_unlock(&priv->tx_queue[i]->txlock);
572}
573
Claudiu Manoil20862782014-02-17 12:53:14 +0200574static int gfar_alloc_tx_queues(struct gfar_private *priv)
575{
576 int i;
577
578 for (i = 0; i < priv->num_tx_queues; i++) {
579 priv->tx_queue[i] = kzalloc(sizeof(struct gfar_priv_tx_q),
580 GFP_KERNEL);
581 if (!priv->tx_queue[i])
582 return -ENOMEM;
583
584 priv->tx_queue[i]->tx_skbuff = NULL;
585 priv->tx_queue[i]->qindex = i;
586 priv->tx_queue[i]->dev = priv->ndev;
587 spin_lock_init(&(priv->tx_queue[i]->txlock));
588 }
589 return 0;
590}
591
592static int gfar_alloc_rx_queues(struct gfar_private *priv)
593{
594 int i;
595
596 for (i = 0; i < priv->num_rx_queues; i++) {
597 priv->rx_queue[i] = kzalloc(sizeof(struct gfar_priv_rx_q),
598 GFP_KERNEL);
599 if (!priv->rx_queue[i])
600 return -ENOMEM;
601
602 priv->rx_queue[i]->rx_skbuff = NULL;
603 priv->rx_queue[i]->qindex = i;
604 priv->rx_queue[i]->dev = priv->ndev;
Claudiu Manoil20862782014-02-17 12:53:14 +0200605 }
606 return 0;
607}
608
609static void gfar_free_tx_queues(struct gfar_private *priv)
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000610{
Jan Ceuleers3a2e16c2012-06-05 03:42:14 +0000611 int i;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000612
613 for (i = 0; i < priv->num_tx_queues; i++)
614 kfree(priv->tx_queue[i]);
615}
616
Claudiu Manoil20862782014-02-17 12:53:14 +0200617static void gfar_free_rx_queues(struct gfar_private *priv)
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000618{
Jan Ceuleers3a2e16c2012-06-05 03:42:14 +0000619 int i;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000620
621 for (i = 0; i < priv->num_rx_queues; i++)
622 kfree(priv->rx_queue[i]);
623}
624
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000625static void unmap_group_regs(struct gfar_private *priv)
626{
Jan Ceuleers3a2e16c2012-06-05 03:42:14 +0000627 int i;
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000628
629 for (i = 0; i < MAXGROUPS; i++)
630 if (priv->gfargrp[i].regs)
631 iounmap(priv->gfargrp[i].regs);
632}
633
Claudiu Manoilee873fd2013-01-29 03:55:12 +0000634static void free_gfar_dev(struct gfar_private *priv)
635{
636 int i, j;
637
638 for (i = 0; i < priv->num_grps; i++)
639 for (j = 0; j < GFAR_NUM_IRQS; j++) {
640 kfree(priv->gfargrp[i].irqinfo[j]);
641 priv->gfargrp[i].irqinfo[j] = NULL;
642 }
643
644 free_netdev(priv->ndev);
645}
646
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000647static void disable_napi(struct gfar_private *priv)
648{
Jan Ceuleers3a2e16c2012-06-05 03:42:14 +0000649 int i;
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000650
Claudiu Manoilaeb12c52014-03-07 14:42:45 +0200651 for (i = 0; i < priv->num_grps; i++) {
652 napi_disable(&priv->gfargrp[i].napi_rx);
653 napi_disable(&priv->gfargrp[i].napi_tx);
654 }
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000655}
656
657static void enable_napi(struct gfar_private *priv)
658{
Jan Ceuleers3a2e16c2012-06-05 03:42:14 +0000659 int i;
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000660
Claudiu Manoilaeb12c52014-03-07 14:42:45 +0200661 for (i = 0; i < priv->num_grps; i++) {
662 napi_enable(&priv->gfargrp[i].napi_rx);
663 napi_enable(&priv->gfargrp[i].napi_tx);
664 }
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000665}
666
667static int gfar_parse_group(struct device_node *np,
Jan Ceuleersbc4598b2012-06-05 03:42:13 +0000668 struct gfar_private *priv, const char *model)
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000669{
Claudiu Manoil5fedcc12013-01-29 03:55:11 +0000670 struct gfar_priv_grp *grp = &priv->gfargrp[priv->num_grps];
Claudiu Manoilee873fd2013-01-29 03:55:12 +0000671 int i;
672
Paul Gortmaker7c1e7e92013-02-04 09:49:42 +0000673 for (i = 0; i < GFAR_NUM_IRQS; i++) {
674 grp->irqinfo[i] = kzalloc(sizeof(struct gfar_irqinfo),
675 GFP_KERNEL);
676 if (!grp->irqinfo[i])
Claudiu Manoilee873fd2013-01-29 03:55:12 +0000677 return -ENOMEM;
Claudiu Manoilee873fd2013-01-29 03:55:12 +0000678 }
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000679
Claudiu Manoil5fedcc12013-01-29 03:55:11 +0000680 grp->regs = of_iomap(np, 0);
681 if (!grp->regs)
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000682 return -ENOMEM;
683
Claudiu Manoilee873fd2013-01-29 03:55:12 +0000684 gfar_irq(grp, TX)->irq = irq_of_parse_and_map(np, 0);
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000685
686 /* If we aren't the FEC we have multiple interrupts */
687 if (model && strcasecmp(model, "FEC")) {
Claudiu Manoilee873fd2013-01-29 03:55:12 +0000688 gfar_irq(grp, RX)->irq = irq_of_parse_and_map(np, 1);
689 gfar_irq(grp, ER)->irq = irq_of_parse_and_map(np, 2);
690 if (gfar_irq(grp, TX)->irq == NO_IRQ ||
691 gfar_irq(grp, RX)->irq == NO_IRQ ||
692 gfar_irq(grp, ER)->irq == NO_IRQ)
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000693 return -EINVAL;
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000694 }
695
Claudiu Manoil5fedcc12013-01-29 03:55:11 +0000696 grp->priv = priv;
697 spin_lock_init(&grp->grplock);
Jan Ceuleersbc4598b2012-06-05 03:42:13 +0000698 if (priv->mode == MQ_MG_MODE) {
Claudiu Manoil71ff9e32014-03-07 14:42:46 +0200699 u32 *rxq_mask, *txq_mask;
700 rxq_mask = (u32 *)of_get_property(np, "fsl,rx-bit-map", NULL);
701 txq_mask = (u32 *)of_get_property(np, "fsl,tx-bit-map", NULL);
702
703 if (priv->poll_mode == GFAR_SQ_POLLING) {
704 /* One Q per interrupt group: Q0 to G0, Q1 to G1 */
705 grp->rx_bit_map = (DEFAULT_MAPPING >> priv->num_grps);
706 grp->tx_bit_map = (DEFAULT_MAPPING >> priv->num_grps);
707 } else { /* GFAR_MQ_POLLING */
708 grp->rx_bit_map = rxq_mask ?
709 *rxq_mask : (DEFAULT_MAPPING >> priv->num_grps);
710 grp->tx_bit_map = txq_mask ?
711 *txq_mask : (DEFAULT_MAPPING >> priv->num_grps);
712 }
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000713 } else {
Claudiu Manoil5fedcc12013-01-29 03:55:11 +0000714 grp->rx_bit_map = 0xFF;
715 grp->tx_bit_map = 0xFF;
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000716 }
Claudiu Manoil20862782014-02-17 12:53:14 +0200717
718 /* bit_map's MSB is q0 (from q0 to q7) but, for_each_set_bit parses
719 * right to left, so we need to revert the 8 bits to get the q index
720 */
721 grp->rx_bit_map = bitrev8(grp->rx_bit_map);
722 grp->tx_bit_map = bitrev8(grp->tx_bit_map);
723
724 /* Calculate RSTAT, TSTAT, RQUEUE and TQUEUE values,
725 * also assign queues to groups
726 */
727 for_each_set_bit(i, &grp->rx_bit_map, priv->num_rx_queues) {
Claudiu Manoil71ff9e32014-03-07 14:42:46 +0200728 if (!grp->rx_queue)
729 grp->rx_queue = priv->rx_queue[i];
Claudiu Manoil20862782014-02-17 12:53:14 +0200730 grp->num_rx_queues++;
731 grp->rstat |= (RSTAT_CLEAR_RHALT >> i);
732 priv->rqueue |= ((RQUEUE_EN0 | RQUEUE_EX0) >> i);
733 priv->rx_queue[i]->grp = grp;
734 }
735
736 for_each_set_bit(i, &grp->tx_bit_map, priv->num_tx_queues) {
Claudiu Manoil71ff9e32014-03-07 14:42:46 +0200737 if (!grp->tx_queue)
738 grp->tx_queue = priv->tx_queue[i];
Claudiu Manoil20862782014-02-17 12:53:14 +0200739 grp->num_tx_queues++;
740 grp->tstat |= (TSTAT_CLEAR_THALT >> i);
741 priv->tqueue |= (TQUEUE_EN0 >> i);
742 priv->tx_queue[i]->grp = grp;
743 }
744
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000745 priv->num_grps++;
746
747 return 0;
748}
749
Tobias Waldekranzf50724c2015-03-05 14:48:23 +0100750static int gfar_of_group_count(struct device_node *np)
751{
752 struct device_node *child;
753 int num = 0;
754
755 for_each_available_child_of_node(np, child)
756 if (!of_node_cmp(child->name, "queue-group"))
757 num++;
758
759 return num;
760}
761
Grant Likely2dc11582010-08-06 09:25:50 -0600762static int gfar_of_init(struct platform_device *ofdev, struct net_device **pdev)
Andy Flemingb31a1d82008-12-16 15:29:15 -0800763{
Andy Flemingb31a1d82008-12-16 15:29:15 -0800764 const char *model;
765 const char *ctype;
766 const void *mac_addr;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000767 int err = 0, i;
768 struct net_device *dev = NULL;
769 struct gfar_private *priv = NULL;
Grant Likely61c7a082010-04-13 16:12:29 -0700770 struct device_node *np = ofdev->dev.of_node;
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000771 struct device_node *child = NULL;
Andy Fleming4d7902f2009-02-04 16:43:44 -0800772 const u32 *stash;
773 const u32 *stash_len;
774 const u32 *stash_idx;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000775 unsigned int num_tx_qs, num_rx_qs;
776 u32 *tx_queues, *rx_queues;
Claudiu Manoilb338ce22014-03-11 18:01:24 +0200777 unsigned short mode, poll_mode;
Andy Flemingb31a1d82008-12-16 15:29:15 -0800778
Kevin Hao4b222ca2015-01-28 20:06:48 +0800779 if (!np)
Andy Flemingb31a1d82008-12-16 15:29:15 -0800780 return -ENODEV;
781
Claudiu Manoilb338ce22014-03-11 18:01:24 +0200782 if (of_device_is_compatible(np, "fsl,etsec2")) {
783 mode = MQ_MG_MODE;
784 poll_mode = GFAR_SQ_POLLING;
785 } else {
786 mode = SQ_SG_MODE;
787 poll_mode = GFAR_SQ_POLLING;
788 }
789
Claudiu Manoil71ff9e32014-03-07 14:42:46 +0200790 /* parse the num of HW tx and rx queues */
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000791 tx_queues = (u32 *)of_get_property(np, "fsl,num_tx_queues", NULL);
Claudiu Manoil71ff9e32014-03-07 14:42:46 +0200792 rx_queues = (u32 *)of_get_property(np, "fsl,num_rx_queues", NULL);
793
Claudiu Manoilb338ce22014-03-11 18:01:24 +0200794 if (mode == SQ_SG_MODE) {
Claudiu Manoil71ff9e32014-03-07 14:42:46 +0200795 num_tx_qs = 1;
796 num_rx_qs = 1;
797 } else { /* MQ_MG_MODE */
Claudiu Manoilc65d7532014-03-21 09:33:17 +0200798 /* get the actual number of supported groups */
Tobias Waldekranzf50724c2015-03-05 14:48:23 +0100799 unsigned int num_grps = gfar_of_group_count(np);
Claudiu Manoilc65d7532014-03-21 09:33:17 +0200800
801 if (num_grps == 0 || num_grps > MAXGROUPS) {
802 dev_err(&ofdev->dev, "Invalid # of int groups(%d)\n",
803 num_grps);
804 pr_err("Cannot do alloc_etherdev, aborting\n");
805 return -EINVAL;
806 }
807
Claudiu Manoilb338ce22014-03-11 18:01:24 +0200808 if (poll_mode == GFAR_SQ_POLLING) {
Claudiu Manoilc65d7532014-03-21 09:33:17 +0200809 num_tx_qs = num_grps; /* one txq per int group */
810 num_rx_qs = num_grps; /* one rxq per int group */
Claudiu Manoil71ff9e32014-03-07 14:42:46 +0200811 } else { /* GFAR_MQ_POLLING */
812 num_tx_qs = tx_queues ? *tx_queues : 1;
813 num_rx_qs = rx_queues ? *rx_queues : 1;
814 }
815 }
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000816
817 if (num_tx_qs > MAX_TX_QS) {
Joe Perches59deab22011-06-14 08:57:47 +0000818 pr_err("num_tx_qs(=%d) greater than MAX_TX_QS(=%d)\n",
819 num_tx_qs, MAX_TX_QS);
820 pr_err("Cannot do alloc_etherdev, aborting\n");
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000821 return -EINVAL;
822 }
823
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000824 if (num_rx_qs > MAX_RX_QS) {
Joe Perches59deab22011-06-14 08:57:47 +0000825 pr_err("num_rx_qs(=%d) greater than MAX_RX_QS(=%d)\n",
826 num_rx_qs, MAX_RX_QS);
827 pr_err("Cannot do alloc_etherdev, aborting\n");
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000828 return -EINVAL;
829 }
830
831 *pdev = alloc_etherdev_mq(sizeof(*priv), num_tx_qs);
832 dev = *pdev;
833 if (NULL == dev)
834 return -ENOMEM;
835
836 priv = netdev_priv(dev);
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000837 priv->ndev = dev;
838
Claudiu Manoilb338ce22014-03-11 18:01:24 +0200839 priv->mode = mode;
840 priv->poll_mode = poll_mode;
841
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000842 priv->num_tx_queues = num_tx_qs;
Ben Hutchingsfe069122010-09-27 08:27:37 +0000843 netif_set_real_num_rx_queues(dev, num_rx_qs);
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +0000844 priv->num_rx_queues = num_rx_qs;
Claudiu Manoil20862782014-02-17 12:53:14 +0200845
846 err = gfar_alloc_tx_queues(priv);
847 if (err)
848 goto tx_alloc_failed;
849
850 err = gfar_alloc_rx_queues(priv);
851 if (err)
852 goto rx_alloc_failed;
Andy Flemingb31a1d82008-12-16 15:29:15 -0800853
Jan Ceuleers0977f812012-06-05 03:42:12 +0000854 /* Init Rx queue filer rule set linked list */
Sebastian Poehn4aa3a712011-06-20 13:57:59 -0700855 INIT_LIST_HEAD(&priv->rx_list.list);
856 priv->rx_list.count = 0;
857 mutex_init(&priv->rx_queue_access);
858
Andy Flemingb31a1d82008-12-16 15:29:15 -0800859 model = of_get_property(np, "model", NULL);
860
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000861 for (i = 0; i < MAXGROUPS; i++)
862 priv->gfargrp[i].regs = NULL;
Andy Flemingb31a1d82008-12-16 15:29:15 -0800863
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000864 /* Parse and initialize group specific information */
Claudiu Manoilb338ce22014-03-11 18:01:24 +0200865 if (priv->mode == MQ_MG_MODE) {
Tobias Waldekranzf50724c2015-03-05 14:48:23 +0100866 for_each_available_child_of_node(np, child) {
867 if (of_node_cmp(child->name, "queue-group"))
868 continue;
869
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000870 err = gfar_parse_group(child, priv, model);
871 if (err)
872 goto err_grp_init;
Andy Flemingb31a1d82008-12-16 15:29:15 -0800873 }
Claudiu Manoilb338ce22014-03-11 18:01:24 +0200874 } else { /* SQ_SG_MODE */
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000875 err = gfar_parse_group(np, priv, model);
Jan Ceuleersbc4598b2012-06-05 03:42:13 +0000876 if (err)
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000877 goto err_grp_init;
Andy Flemingb31a1d82008-12-16 15:29:15 -0800878 }
879
Andy Fleming4d7902f2009-02-04 16:43:44 -0800880 stash = of_get_property(np, "bd-stash", NULL);
881
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +0000882 if (stash) {
Andy Fleming4d7902f2009-02-04 16:43:44 -0800883 priv->device_flags |= FSL_GIANFAR_DEV_HAS_BD_STASHING;
884 priv->bd_stash_en = 1;
885 }
886
887 stash_len = of_get_property(np, "rx-stash-len", NULL);
888
889 if (stash_len)
890 priv->rx_stash_size = *stash_len;
891
892 stash_idx = of_get_property(np, "rx-stash-idx", NULL);
893
894 if (stash_idx)
895 priv->rx_stash_index = *stash_idx;
896
897 if (stash_len || stash_idx)
898 priv->device_flags |= FSL_GIANFAR_DEV_HAS_BUF_STASHING;
899
Andy Flemingb31a1d82008-12-16 15:29:15 -0800900 mac_addr = of_get_mac_address(np);
Jan Ceuleersbc4598b2012-06-05 03:42:13 +0000901
Andy Flemingb31a1d82008-12-16 15:29:15 -0800902 if (mac_addr)
Joe Perches6a3c9102011-11-16 09:38:02 +0000903 memcpy(dev->dev_addr, mac_addr, ETH_ALEN);
Andy Flemingb31a1d82008-12-16 15:29:15 -0800904
905 if (model && !strcasecmp(model, "TSEC"))
Claudiu Manoil34018fd2014-02-17 12:53:15 +0200906 priv->device_flags |= FSL_GIANFAR_DEV_HAS_GIGABIT |
Jan Ceuleersbc4598b2012-06-05 03:42:13 +0000907 FSL_GIANFAR_DEV_HAS_COALESCE |
908 FSL_GIANFAR_DEV_HAS_RMON |
909 FSL_GIANFAR_DEV_HAS_MULTI_INTR;
910
Andy Flemingb31a1d82008-12-16 15:29:15 -0800911 if (model && !strcasecmp(model, "eTSEC"))
Claudiu Manoil34018fd2014-02-17 12:53:15 +0200912 priv->device_flags |= FSL_GIANFAR_DEV_HAS_GIGABIT |
Jan Ceuleersbc4598b2012-06-05 03:42:13 +0000913 FSL_GIANFAR_DEV_HAS_COALESCE |
914 FSL_GIANFAR_DEV_HAS_RMON |
915 FSL_GIANFAR_DEV_HAS_MULTI_INTR |
Jan Ceuleersbc4598b2012-06-05 03:42:13 +0000916 FSL_GIANFAR_DEV_HAS_CSUM |
917 FSL_GIANFAR_DEV_HAS_VLAN |
918 FSL_GIANFAR_DEV_HAS_MAGIC_PACKET |
919 FSL_GIANFAR_DEV_HAS_EXTENDED_HASH |
920 FSL_GIANFAR_DEV_HAS_TIMER;
Andy Flemingb31a1d82008-12-16 15:29:15 -0800921
922 ctype = of_get_property(np, "phy-connection-type", NULL);
923
924 /* We only care about rgmii-id. The rest are autodetected */
925 if (ctype && !strcmp(ctype, "rgmii-id"))
926 priv->interface = PHY_INTERFACE_MODE_RGMII_ID;
927 else
928 priv->interface = PHY_INTERFACE_MODE_MII;
929
930 if (of_get_property(np, "fsl,magic-packet", NULL))
931 priv->device_flags |= FSL_GIANFAR_DEV_HAS_MAGIC_PACKET;
932
Grant Likelyfe192a42009-04-25 12:53:12 +0000933 priv->phy_node = of_parse_phandle(np, "phy-handle", 0);
Andy Flemingb31a1d82008-12-16 15:29:15 -0800934
Florian Fainellibe403642014-05-22 09:47:48 -0700935 /* In the case of a fixed PHY, the DT node associated
936 * to the PHY is the Ethernet MAC DT node.
937 */
Uwe Kleine-König6f2c9bd2014-08-07 22:17:07 +0200938 if (!priv->phy_node && of_phy_is_fixed_link(np)) {
Florian Fainellibe403642014-05-22 09:47:48 -0700939 err = of_phy_register_fixed_link(np);
940 if (err)
941 goto err_grp_init;
942
Uwe Kleine-König6f2c9bd2014-08-07 22:17:07 +0200943 priv->phy_node = of_node_get(np);
Florian Fainellibe403642014-05-22 09:47:48 -0700944 }
945
Andy Flemingb31a1d82008-12-16 15:29:15 -0800946 /* Find the TBI PHY. If it's not there, we don't support SGMII */
Grant Likelyfe192a42009-04-25 12:53:12 +0000947 priv->tbi_node = of_parse_phandle(np, "tbi-handle", 0);
Andy Flemingb31a1d82008-12-16 15:29:15 -0800948
949 return 0;
950
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +0000951err_grp_init:
952 unmap_group_regs(priv);
Claudiu Manoil20862782014-02-17 12:53:14 +0200953rx_alloc_failed:
954 gfar_free_rx_queues(priv);
955tx_alloc_failed:
956 gfar_free_tx_queues(priv);
Claudiu Manoilee873fd2013-01-29 03:55:12 +0000957 free_gfar_dev(priv);
Andy Flemingb31a1d82008-12-16 15:29:15 -0800958 return err;
959}
960
Ben Hutchingsca0c88c2013-11-18 23:05:27 +0000961static int gfar_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
Manfred Rudigiercc772ab2010-04-08 23:10:03 +0000962{
963 struct hwtstamp_config config;
964 struct gfar_private *priv = netdev_priv(netdev);
965
966 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
967 return -EFAULT;
968
969 /* reserved for future extensions */
970 if (config.flags)
971 return -EINVAL;
972
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +0000973 switch (config.tx_type) {
974 case HWTSTAMP_TX_OFF:
975 priv->hwts_tx_en = 0;
976 break;
977 case HWTSTAMP_TX_ON:
978 if (!(priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER))
979 return -ERANGE;
980 priv->hwts_tx_en = 1;
981 break;
982 default:
Manfred Rudigiercc772ab2010-04-08 23:10:03 +0000983 return -ERANGE;
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +0000984 }
Manfred Rudigiercc772ab2010-04-08 23:10:03 +0000985
986 switch (config.rx_filter) {
987 case HWTSTAMP_FILTER_NONE:
Manfred Rudigier97553f72010-06-11 01:49:05 +0000988 if (priv->hwts_rx_en) {
Manfred Rudigier97553f72010-06-11 01:49:05 +0000989 priv->hwts_rx_en = 0;
Claudiu Manoil08511332014-02-24 12:13:45 +0200990 reset_gfar(netdev);
Manfred Rudigier97553f72010-06-11 01:49:05 +0000991 }
Manfred Rudigiercc772ab2010-04-08 23:10:03 +0000992 break;
993 default:
994 if (!(priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER))
995 return -ERANGE;
Manfred Rudigier97553f72010-06-11 01:49:05 +0000996 if (!priv->hwts_rx_en) {
Manfred Rudigier97553f72010-06-11 01:49:05 +0000997 priv->hwts_rx_en = 1;
Claudiu Manoil08511332014-02-24 12:13:45 +0200998 reset_gfar(netdev);
Manfred Rudigier97553f72010-06-11 01:49:05 +0000999 }
Manfred Rudigiercc772ab2010-04-08 23:10:03 +00001000 config.rx_filter = HWTSTAMP_FILTER_ALL;
1001 break;
1002 }
1003
1004 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
1005 -EFAULT : 0;
1006}
1007
Ben Hutchingsca0c88c2013-11-18 23:05:27 +00001008static int gfar_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
1009{
1010 struct hwtstamp_config config;
1011 struct gfar_private *priv = netdev_priv(netdev);
1012
1013 config.flags = 0;
1014 config.tx_type = priv->hwts_tx_en ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;
1015 config.rx_filter = (priv->hwts_rx_en ?
1016 HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE);
1017
1018 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
1019 -EFAULT : 0;
1020}
1021
Clifford Wolf0faac9f2009-01-09 10:23:11 +00001022static int gfar_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1023{
1024 struct gfar_private *priv = netdev_priv(dev);
1025
1026 if (!netif_running(dev))
1027 return -EINVAL;
1028
Manfred Rudigiercc772ab2010-04-08 23:10:03 +00001029 if (cmd == SIOCSHWTSTAMP)
Ben Hutchingsca0c88c2013-11-18 23:05:27 +00001030 return gfar_hwtstamp_set(dev, rq);
1031 if (cmd == SIOCGHWTSTAMP)
1032 return gfar_hwtstamp_get(dev, rq);
Manfred Rudigiercc772ab2010-04-08 23:10:03 +00001033
Clifford Wolf0faac9f2009-01-09 10:23:11 +00001034 if (!priv->phydev)
1035 return -ENODEV;
1036
Richard Cochran28b04112010-07-17 08:48:55 +00001037 return phy_mii_ioctl(priv->phydev, rq, cmd);
Clifford Wolf0faac9f2009-01-09 10:23:11 +00001038}
1039
Anton Vorontsov18294ad2009-11-04 12:53:00 +00001040static u32 cluster_entry_per_class(struct gfar_private *priv, u32 rqfar,
1041 u32 class)
Sandeep Gopalpet7a8b3372009-11-02 07:03:40 +00001042{
1043 u32 rqfpr = FPR_FILER_MASK;
1044 u32 rqfcr = 0x0;
1045
1046 rqfar--;
1047 rqfcr = RQFCR_CLE | RQFCR_PID_MASK | RQFCR_CMP_EXACT;
Wu Jiajun-B063786c43e042011-06-07 21:46:51 +00001048 priv->ftp_rqfpr[rqfar] = rqfpr;
1049 priv->ftp_rqfcr[rqfar] = rqfcr;
Sandeep Gopalpet7a8b3372009-11-02 07:03:40 +00001050 gfar_write_filer(priv, rqfar, rqfcr, rqfpr);
1051
1052 rqfar--;
1053 rqfcr = RQFCR_CMP_NOMATCH;
Wu Jiajun-B063786c43e042011-06-07 21:46:51 +00001054 priv->ftp_rqfpr[rqfar] = rqfpr;
1055 priv->ftp_rqfcr[rqfar] = rqfcr;
Sandeep Gopalpet7a8b3372009-11-02 07:03:40 +00001056 gfar_write_filer(priv, rqfar, rqfcr, rqfpr);
1057
1058 rqfar--;
1059 rqfcr = RQFCR_CMP_EXACT | RQFCR_PID_PARSE | RQFCR_CLE | RQFCR_AND;
1060 rqfpr = class;
Wu Jiajun-B063786c43e042011-06-07 21:46:51 +00001061 priv->ftp_rqfcr[rqfar] = rqfcr;
1062 priv->ftp_rqfpr[rqfar] = rqfpr;
Sandeep Gopalpet7a8b3372009-11-02 07:03:40 +00001063 gfar_write_filer(priv, rqfar, rqfcr, rqfpr);
1064
1065 rqfar--;
1066 rqfcr = RQFCR_CMP_EXACT | RQFCR_PID_MASK | RQFCR_AND;
1067 rqfpr = class;
Wu Jiajun-B063786c43e042011-06-07 21:46:51 +00001068 priv->ftp_rqfcr[rqfar] = rqfcr;
1069 priv->ftp_rqfpr[rqfar] = rqfpr;
Sandeep Gopalpet7a8b3372009-11-02 07:03:40 +00001070 gfar_write_filer(priv, rqfar, rqfcr, rqfpr);
1071
1072 return rqfar;
1073}
1074
1075static void gfar_init_filer_table(struct gfar_private *priv)
1076{
1077 int i = 0x0;
1078 u32 rqfar = MAX_FILER_IDX;
1079 u32 rqfcr = 0x0;
1080 u32 rqfpr = FPR_FILER_MASK;
1081
1082 /* Default rule */
1083 rqfcr = RQFCR_CMP_MATCH;
Wu Jiajun-B063786c43e042011-06-07 21:46:51 +00001084 priv->ftp_rqfcr[rqfar] = rqfcr;
1085 priv->ftp_rqfpr[rqfar] = rqfpr;
Sandeep Gopalpet7a8b3372009-11-02 07:03:40 +00001086 gfar_write_filer(priv, rqfar, rqfcr, rqfpr);
1087
1088 rqfar = cluster_entry_per_class(priv, rqfar, RQFPR_IPV6);
1089 rqfar = cluster_entry_per_class(priv, rqfar, RQFPR_IPV6 | RQFPR_UDP);
1090 rqfar = cluster_entry_per_class(priv, rqfar, RQFPR_IPV6 | RQFPR_TCP);
1091 rqfar = cluster_entry_per_class(priv, rqfar, RQFPR_IPV4);
1092 rqfar = cluster_entry_per_class(priv, rqfar, RQFPR_IPV4 | RQFPR_UDP);
1093 rqfar = cluster_entry_per_class(priv, rqfar, RQFPR_IPV4 | RQFPR_TCP);
1094
Uwe Kleine-König85dd08e2010-06-11 12:16:55 +02001095 /* cur_filer_idx indicated the first non-masked rule */
Sandeep Gopalpet7a8b3372009-11-02 07:03:40 +00001096 priv->cur_filer_idx = rqfar;
1097
1098 /* Rest are masked rules */
1099 rqfcr = RQFCR_CMP_NOMATCH;
1100 for (i = 0; i < rqfar; i++) {
Wu Jiajun-B063786c43e042011-06-07 21:46:51 +00001101 priv->ftp_rqfcr[i] = rqfcr;
1102 priv->ftp_rqfpr[i] = rqfpr;
Sandeep Gopalpet7a8b3372009-11-02 07:03:40 +00001103 gfar_write_filer(priv, i, rqfcr, rqfpr);
1104 }
1105}
1106
Claudiu Manoild6ef0bc2014-10-07 10:44:32 +03001107#ifdef CONFIG_PPC
Claudiu Manoil2969b1f2013-10-09 20:20:41 +03001108static void __gfar_detect_errata_83xx(struct gfar_private *priv)
Anton Vorontsov7d350972010-06-30 06:39:12 +00001109{
Anton Vorontsov7d350972010-06-30 06:39:12 +00001110 unsigned int pvr = mfspr(SPRN_PVR);
1111 unsigned int svr = mfspr(SPRN_SVR);
1112 unsigned int mod = (svr >> 16) & 0xfff6; /* w/o E suffix */
1113 unsigned int rev = svr & 0xffff;
1114
1115 /* MPC8313 Rev 2.0 and higher; All MPC837x */
1116 if ((pvr == 0x80850010 && mod == 0x80b0 && rev >= 0x0020) ||
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00001117 (pvr == 0x80861010 && (mod & 0xfff9) == 0x80c0))
Anton Vorontsov7d350972010-06-30 06:39:12 +00001118 priv->errata |= GFAR_ERRATA_74;
1119
Anton Vorontsovdeb90ea2010-06-30 06:39:13 +00001120 /* MPC8313 and MPC837x all rev */
1121 if ((pvr == 0x80850010 && mod == 0x80b0) ||
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00001122 (pvr == 0x80861010 && (mod & 0xfff9) == 0x80c0))
Anton Vorontsovdeb90ea2010-06-30 06:39:13 +00001123 priv->errata |= GFAR_ERRATA_76;
1124
Claudiu Manoil2969b1f2013-10-09 20:20:41 +03001125 /* MPC8313 Rev < 2.0 */
1126 if (pvr == 0x80850010 && mod == 0x80b0 && rev < 0x0020)
Alex Dubov4363c2f2011-03-16 17:57:13 +00001127 priv->errata |= GFAR_ERRATA_12;
Claudiu Manoil2969b1f2013-10-09 20:20:41 +03001128}
1129
1130static void __gfar_detect_errata_85xx(struct gfar_private *priv)
1131{
1132 unsigned int svr = mfspr(SPRN_SVR);
1133
1134 if ((SVR_SOC_VER(svr) == SVR_8548) && (SVR_REV(svr) == 0x20))
1135 priv->errata |= GFAR_ERRATA_12;
Claudiu Manoil53fad772013-10-09 20:20:42 +03001136 if (((SVR_SOC_VER(svr) == SVR_P2020) && (SVR_REV(svr) < 0x20)) ||
1137 ((SVR_SOC_VER(svr) == SVR_P2010) && (SVR_REV(svr) < 0x20)))
1138 priv->errata |= GFAR_ERRATA_76; /* aka eTSEC 20 */
Claudiu Manoil2969b1f2013-10-09 20:20:41 +03001139}
Claudiu Manoild6ef0bc2014-10-07 10:44:32 +03001140#endif
Claudiu Manoil2969b1f2013-10-09 20:20:41 +03001141
1142static void gfar_detect_errata(struct gfar_private *priv)
1143{
1144 struct device *dev = &priv->ofdev->dev;
1145
1146 /* no plans to fix */
1147 priv->errata |= GFAR_ERRATA_A002;
1148
Claudiu Manoild6ef0bc2014-10-07 10:44:32 +03001149#ifdef CONFIG_PPC
Claudiu Manoil2969b1f2013-10-09 20:20:41 +03001150 if (pvr_version_is(PVR_VER_E500V1) || pvr_version_is(PVR_VER_E500V2))
1151 __gfar_detect_errata_85xx(priv);
1152 else /* non-mpc85xx parts, i.e. e300 core based */
1153 __gfar_detect_errata_83xx(priv);
Claudiu Manoild6ef0bc2014-10-07 10:44:32 +03001154#endif
Alex Dubov4363c2f2011-03-16 17:57:13 +00001155
Anton Vorontsov7d350972010-06-30 06:39:12 +00001156 if (priv->errata)
1157 dev_info(dev, "enabled errata workarounds, flags: 0x%x\n",
1158 priv->errata);
1159}
1160
Claudiu Manoil08511332014-02-24 12:13:45 +02001161void gfar_mac_reset(struct gfar_private *priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001162{
Claudiu Manoil20862782014-02-17 12:53:14 +02001163 struct gfar __iomem *regs = priv->gfargrp[0].regs;
Claudiu Manoila328ac92014-02-24 12:13:42 +02001164 u32 tempval;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001165
1166 /* Reset MAC layer */
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00001167 gfar_write(&regs->maccfg1, MACCFG1_SOFT_RESET);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001168
Andy Flemingb98ac702009-02-04 16:38:05 -08001169 /* We need to delay at least 3 TX clocks */
Claudiu Manoila328ac92014-02-24 12:13:42 +02001170 udelay(3);
Andy Flemingb98ac702009-02-04 16:38:05 -08001171
Claudiu Manoil23402bd2013-08-12 13:53:26 +03001172 /* the soft reset bit is not self-resetting, so we need to
1173 * clear it before resuming normal operation
1174 */
Claudiu Manoil20862782014-02-17 12:53:14 +02001175 gfar_write(&regs->maccfg1, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001176
Claudiu Manoila328ac92014-02-24 12:13:42 +02001177 udelay(3);
1178
Claudiu Manoil88302642014-02-24 12:13:43 +02001179 /* Compute rx_buff_size based on config flags */
1180 gfar_rx_buff_size_config(priv);
1181
1182 /* Initialize the max receive frame/buffer lengths */
1183 gfar_write(&regs->maxfrm, priv->rx_buffer_size);
Claudiu Manoila328ac92014-02-24 12:13:42 +02001184 gfar_write(&regs->mrblr, priv->rx_buffer_size);
1185
1186 /* Initialize the Minimum Frame Length Register */
1187 gfar_write(&regs->minflr, MINFLR_INIT_SETTINGS);
1188
Linus Torvalds1da177e2005-04-16 15:20:36 -07001189 /* Initialize MACCFG2. */
Anton Vorontsov7d350972010-06-30 06:39:12 +00001190 tempval = MACCFG2_INIT_SETTINGS;
Claudiu Manoil88302642014-02-24 12:13:43 +02001191
1192 /* If the mtu is larger than the max size for standard
1193 * ethernet frames (ie, a jumbo frame), then set maccfg2
1194 * to allow huge frames, and to check the length
1195 */
1196 if (priv->rx_buffer_size > DEFAULT_RX_BUFFER_SIZE ||
1197 gfar_has_errata(priv, GFAR_ERRATA_74))
Anton Vorontsov7d350972010-06-30 06:39:12 +00001198 tempval |= MACCFG2_HUGEFRAME | MACCFG2_LENGTHCHECK;
Claudiu Manoil88302642014-02-24 12:13:43 +02001199
Anton Vorontsov7d350972010-06-30 06:39:12 +00001200 gfar_write(&regs->maccfg2, tempval);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001201
Claudiu Manoila328ac92014-02-24 12:13:42 +02001202 /* Clear mac addr hash registers */
1203 gfar_write(&regs->igaddr0, 0);
1204 gfar_write(&regs->igaddr1, 0);
1205 gfar_write(&regs->igaddr2, 0);
1206 gfar_write(&regs->igaddr3, 0);
1207 gfar_write(&regs->igaddr4, 0);
1208 gfar_write(&regs->igaddr5, 0);
1209 gfar_write(&regs->igaddr6, 0);
1210 gfar_write(&regs->igaddr7, 0);
1211
1212 gfar_write(&regs->gaddr0, 0);
1213 gfar_write(&regs->gaddr1, 0);
1214 gfar_write(&regs->gaddr2, 0);
1215 gfar_write(&regs->gaddr3, 0);
1216 gfar_write(&regs->gaddr4, 0);
1217 gfar_write(&regs->gaddr5, 0);
1218 gfar_write(&regs->gaddr6, 0);
1219 gfar_write(&regs->gaddr7, 0);
1220
1221 if (priv->extended_hash)
1222 gfar_clear_exact_match(priv->ndev);
1223
1224 gfar_mac_rx_config(priv);
1225
1226 gfar_mac_tx_config(priv);
1227
1228 gfar_set_mac_address(priv->ndev);
1229
1230 gfar_set_multi(priv->ndev);
1231
1232 /* clear ievent and imask before configuring coalescing */
1233 gfar_ints_disable(priv);
1234
1235 /* Configure the coalescing support */
1236 gfar_configure_coalescing_all(priv);
1237}
1238
1239static void gfar_hw_init(struct gfar_private *priv)
1240{
1241 struct gfar __iomem *regs = priv->gfargrp[0].regs;
1242 u32 attrs;
1243
1244 /* Stop the DMA engine now, in case it was running before
1245 * (The firmware could have used it, and left it running).
1246 */
1247 gfar_halt(priv);
1248
1249 gfar_mac_reset(priv);
1250
1251 /* Zero out the rmon mib registers if it has them */
1252 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON) {
1253 memset_io(&(regs->rmon), 0, sizeof(struct rmon_mib));
1254
1255 /* Mask off the CAM interrupts */
1256 gfar_write(&regs->rmon.cam1, 0xffffffff);
1257 gfar_write(&regs->rmon.cam2, 0xffffffff);
1258 }
1259
Linus Torvalds1da177e2005-04-16 15:20:36 -07001260 /* Initialize ECNTRL */
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00001261 gfar_write(&regs->ecntrl, ECNTRL_INIT_SETTINGS);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001262
Claudiu Manoil34018fd2014-02-17 12:53:15 +02001263 /* Set the extraction length and index */
1264 attrs = ATTRELI_EL(priv->rx_stash_size) |
1265 ATTRELI_EI(priv->rx_stash_index);
1266
1267 gfar_write(&regs->attreli, attrs);
1268
1269 /* Start with defaults, and add stashing
1270 * depending on driver parameters
1271 */
1272 attrs = ATTR_INIT_SETTINGS;
1273
1274 if (priv->bd_stash_en)
1275 attrs |= ATTR_BDSTASH;
1276
1277 if (priv->rx_stash_size != 0)
1278 attrs |= ATTR_BUFSTASH;
1279
1280 gfar_write(&regs->attr, attrs);
1281
1282 /* FIFO configs */
1283 gfar_write(&regs->fifo_tx_thr, DEFAULT_FIFO_TX_THR);
1284 gfar_write(&regs->fifo_tx_starve, DEFAULT_FIFO_TX_STARVE);
1285 gfar_write(&regs->fifo_tx_starve_shutoff, DEFAULT_FIFO_TX_STARVE_OFF);
1286
Claudiu Manoil20862782014-02-17 12:53:14 +02001287 /* Program the interrupt steering regs, only for MG devices */
1288 if (priv->num_grps > 1)
1289 gfar_write_isrg(priv);
Claudiu Manoil20862782014-02-17 12:53:14 +02001290}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001291
Xiubo Li898157e2014-06-04 16:49:16 +08001292static void gfar_init_addr_hash_table(struct gfar_private *priv)
Claudiu Manoil20862782014-02-17 12:53:14 +02001293{
1294 struct gfar __iomem *regs = priv->gfargrp[0].regs;
Kumar Gala0bbaf062005-06-20 10:54:21 -05001295
Andy Flemingb31a1d82008-12-16 15:29:15 -08001296 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_EXTENDED_HASH) {
Kumar Gala0bbaf062005-06-20 10:54:21 -05001297 priv->extended_hash = 1;
1298 priv->hash_width = 9;
1299
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00001300 priv->hash_regs[0] = &regs->igaddr0;
1301 priv->hash_regs[1] = &regs->igaddr1;
1302 priv->hash_regs[2] = &regs->igaddr2;
1303 priv->hash_regs[3] = &regs->igaddr3;
1304 priv->hash_regs[4] = &regs->igaddr4;
1305 priv->hash_regs[5] = &regs->igaddr5;
1306 priv->hash_regs[6] = &regs->igaddr6;
1307 priv->hash_regs[7] = &regs->igaddr7;
1308 priv->hash_regs[8] = &regs->gaddr0;
1309 priv->hash_regs[9] = &regs->gaddr1;
1310 priv->hash_regs[10] = &regs->gaddr2;
1311 priv->hash_regs[11] = &regs->gaddr3;
1312 priv->hash_regs[12] = &regs->gaddr4;
1313 priv->hash_regs[13] = &regs->gaddr5;
1314 priv->hash_regs[14] = &regs->gaddr6;
1315 priv->hash_regs[15] = &regs->gaddr7;
Kumar Gala0bbaf062005-06-20 10:54:21 -05001316
1317 } else {
1318 priv->extended_hash = 0;
1319 priv->hash_width = 8;
1320
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00001321 priv->hash_regs[0] = &regs->gaddr0;
1322 priv->hash_regs[1] = &regs->gaddr1;
1323 priv->hash_regs[2] = &regs->gaddr2;
1324 priv->hash_regs[3] = &regs->gaddr3;
1325 priv->hash_regs[4] = &regs->gaddr4;
1326 priv->hash_regs[5] = &regs->gaddr5;
1327 priv->hash_regs[6] = &regs->gaddr6;
1328 priv->hash_regs[7] = &regs->gaddr7;
Kumar Gala0bbaf062005-06-20 10:54:21 -05001329 }
Claudiu Manoil20862782014-02-17 12:53:14 +02001330}
1331
1332/* Set up the ethernet device structure, private data,
1333 * and anything else we need before we start
1334 */
1335static int gfar_probe(struct platform_device *ofdev)
1336{
1337 struct net_device *dev = NULL;
1338 struct gfar_private *priv = NULL;
1339 int err = 0, i;
1340
1341 err = gfar_of_init(ofdev, &dev);
1342
1343 if (err)
1344 return err;
1345
1346 priv = netdev_priv(dev);
1347 priv->ndev = dev;
1348 priv->ofdev = ofdev;
1349 priv->dev = &ofdev->dev;
1350 SET_NETDEV_DEV(dev, &ofdev->dev);
1351
1352 spin_lock_init(&priv->bflock);
1353 INIT_WORK(&priv->reset_task, gfar_reset_task);
1354
1355 platform_set_drvdata(ofdev, priv);
1356
1357 gfar_detect_errata(priv);
1358
Claudiu Manoil20862782014-02-17 12:53:14 +02001359 /* Set the dev->base_addr to the gfar reg region */
1360 dev->base_addr = (unsigned long) priv->gfargrp[0].regs;
1361
1362 /* Fill in the dev structure */
1363 dev->watchdog_timeo = TX_TIMEOUT;
1364 dev->mtu = 1500;
1365 dev->netdev_ops = &gfar_netdev_ops;
1366 dev->ethtool_ops = &gfar_ethtool_ops;
1367
1368 /* Register for napi ...We are registering NAPI for each grp */
Claudiu Manoil71ff9e32014-03-07 14:42:46 +02001369 for (i = 0; i < priv->num_grps; i++) {
1370 if (priv->poll_mode == GFAR_SQ_POLLING) {
1371 netif_napi_add(dev, &priv->gfargrp[i].napi_rx,
1372 gfar_poll_rx_sq, GFAR_DEV_WEIGHT);
1373 netif_napi_add(dev, &priv->gfargrp[i].napi_tx,
1374 gfar_poll_tx_sq, 2);
1375 } else {
Claudiu Manoilaeb12c52014-03-07 14:42:45 +02001376 netif_napi_add(dev, &priv->gfargrp[i].napi_rx,
1377 gfar_poll_rx, GFAR_DEV_WEIGHT);
1378 netif_napi_add(dev, &priv->gfargrp[i].napi_tx,
1379 gfar_poll_tx, 2);
1380 }
1381 }
Claudiu Manoil20862782014-02-17 12:53:14 +02001382
1383 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_CSUM) {
1384 dev->hw_features = NETIF_F_IP_CSUM | NETIF_F_SG |
1385 NETIF_F_RXCSUM;
1386 dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG |
1387 NETIF_F_RXCSUM | NETIF_F_HIGHDMA;
1388 }
1389
1390 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_VLAN) {
1391 dev->hw_features |= NETIF_F_HW_VLAN_CTAG_TX |
1392 NETIF_F_HW_VLAN_CTAG_RX;
1393 dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
1394 }
1395
1396 gfar_init_addr_hash_table(priv);
Kumar Gala0bbaf062005-06-20 10:54:21 -05001397
Claudiu Manoil532c37b2014-02-17 12:53:16 +02001398 /* Insert receive time stamps into padding alignment bytes */
1399 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)
1400 priv->padding = 8;
Kumar Gala0bbaf062005-06-20 10:54:21 -05001401
Manfred Rudigiercc772ab2010-04-08 23:10:03 +00001402 if (dev->features & NETIF_F_IP_CSUM ||
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00001403 priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)
Wu Jiajun-B06378bee9e582012-05-21 23:00:48 +00001404 dev->needed_headroom = GMAC_FCB_LEN;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001405
1406 priv->rx_buffer_size = DEFAULT_RX_BUFFER_SIZE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001407
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00001408 /* Initializing some of the rx/tx queue level parameters */
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00001409 for (i = 0; i < priv->num_tx_queues; i++) {
1410 priv->tx_queue[i]->tx_ring_size = DEFAULT_TX_RING_SIZE;
1411 priv->tx_queue[i]->num_txbdfree = DEFAULT_TX_RING_SIZE;
1412 priv->tx_queue[i]->txcoalescing = DEFAULT_TX_COALESCE;
1413 priv->tx_queue[i]->txic = DEFAULT_TXIC;
1414 }
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00001415
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00001416 for (i = 0; i < priv->num_rx_queues; i++) {
1417 priv->rx_queue[i]->rx_ring_size = DEFAULT_RX_RING_SIZE;
1418 priv->rx_queue[i]->rxcoalescing = DEFAULT_RX_COALESCE;
1419 priv->rx_queue[i]->rxic = DEFAULT_RXIC;
1420 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001421
Jan Ceuleers0977f812012-06-05 03:42:12 +00001422 /* always enable rx filer */
Sebastian Poehn4aa3a712011-06-20 13:57:59 -07001423 priv->rx_filer_enable = 1;
Kumar Gala0bbaf062005-06-20 10:54:21 -05001424 /* Enable most messages by default */
1425 priv->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
Claudiu Manoilb98b8ba2012-09-23 22:39:08 +00001426 /* use pritority h/w tx queue scheduling for single queue devices */
1427 if (priv->num_tx_queues == 1)
1428 priv->prio_sched_en = 1;
Kumar Gala0bbaf062005-06-20 10:54:21 -05001429
Claudiu Manoil08511332014-02-24 12:13:45 +02001430 set_bit(GFAR_DOWN, &priv->state);
1431
Claudiu Manoila328ac92014-02-24 12:13:42 +02001432 gfar_hw_init(priv);
Trent Piephod3eab822008-10-02 11:12:24 +00001433
Fabio Estevamd4c642e2014-06-03 19:55:38 -03001434 /* Carrier starts down, phylib will bring it up */
1435 netif_carrier_off(dev);
1436
Linus Torvalds1da177e2005-04-16 15:20:36 -07001437 err = register_netdev(dev);
1438
1439 if (err) {
Joe Perches59deab22011-06-14 08:57:47 +00001440 pr_err("%s: Cannot register net device, aborting\n", dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001441 goto register_fail;
1442 }
1443
Anton Vorontsov2884e5c2009-02-01 00:52:34 -08001444 device_init_wakeup(&dev->dev,
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00001445 priv->device_flags &
1446 FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
Anton Vorontsov2884e5c2009-02-01 00:52:34 -08001447
Dai Harukic50a5d92008-12-17 16:51:32 -08001448 /* fill out IRQ number and name fields */
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00001449 for (i = 0; i < priv->num_grps; i++) {
Claudiu Manoilee873fd2013-01-29 03:55:12 +00001450 struct gfar_priv_grp *grp = &priv->gfargrp[i];
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00001451 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
Claudiu Manoilee873fd2013-01-29 03:55:12 +00001452 sprintf(gfar_irq(grp, TX)->name, "%s%s%c%s",
Joe Perches0015e552012-03-25 07:10:07 +00001453 dev->name, "_g", '0' + i, "_tx");
Claudiu Manoilee873fd2013-01-29 03:55:12 +00001454 sprintf(gfar_irq(grp, RX)->name, "%s%s%c%s",
Joe Perches0015e552012-03-25 07:10:07 +00001455 dev->name, "_g", '0' + i, "_rx");
Claudiu Manoilee873fd2013-01-29 03:55:12 +00001456 sprintf(gfar_irq(grp, ER)->name, "%s%s%c%s",
Joe Perches0015e552012-03-25 07:10:07 +00001457 dev->name, "_g", '0' + i, "_er");
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00001458 } else
Claudiu Manoilee873fd2013-01-29 03:55:12 +00001459 strcpy(gfar_irq(grp, TX)->name, dev->name);
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00001460 }
Dai Harukic50a5d92008-12-17 16:51:32 -08001461
Sandeep Gopalpet7a8b3372009-11-02 07:03:40 +00001462 /* Initialize the filer table */
1463 gfar_init_filer_table(priv);
1464
Linus Torvalds1da177e2005-04-16 15:20:36 -07001465 /* Print out the device info */
Joe Perches59deab22011-06-14 08:57:47 +00001466 netdev_info(dev, "mac: %pM\n", dev->dev_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001467
Jan Ceuleers0977f812012-06-05 03:42:12 +00001468 /* Even more device info helps when determining which kernel
1469 * provided which set of benchmarks.
1470 */
Joe Perches59deab22011-06-14 08:57:47 +00001471 netdev_info(dev, "Running with NAPI enabled\n");
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00001472 for (i = 0; i < priv->num_rx_queues; i++)
Joe Perches59deab22011-06-14 08:57:47 +00001473 netdev_info(dev, "RX BD ring size for Q[%d]: %d\n",
1474 i, priv->rx_queue[i]->rx_ring_size);
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00001475 for (i = 0; i < priv->num_tx_queues; i++)
Joe Perches59deab22011-06-14 08:57:47 +00001476 netdev_info(dev, "TX BD ring size for Q[%d]: %d\n",
1477 i, priv->tx_queue[i]->tx_ring_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001478
1479 return 0;
1480
1481register_fail:
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00001482 unmap_group_regs(priv);
Claudiu Manoil20862782014-02-17 12:53:14 +02001483 gfar_free_rx_queues(priv);
1484 gfar_free_tx_queues(priv);
Uwe Kleine-König888c88b2014-08-07 21:20:12 +02001485 of_node_put(priv->phy_node);
1486 of_node_put(priv->tbi_node);
Claudiu Manoilee873fd2013-01-29 03:55:12 +00001487 free_gfar_dev(priv);
Andy Flemingbb40dcb2005-09-23 22:54:21 -04001488 return err;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001489}
1490
Grant Likely2dc11582010-08-06 09:25:50 -06001491static int gfar_remove(struct platform_device *ofdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001492{
Jingoo Han8513fbd2013-05-23 00:52:31 +00001493 struct gfar_private *priv = platform_get_drvdata(ofdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001494
Uwe Kleine-König888c88b2014-08-07 21:20:12 +02001495 of_node_put(priv->phy_node);
1496 of_node_put(priv->tbi_node);
Grant Likelyfe192a42009-04-25 12:53:12 +00001497
David S. Millerd9d8e042009-09-06 01:41:02 -07001498 unregister_netdev(priv->ndev);
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00001499 unmap_group_regs(priv);
Claudiu Manoil20862782014-02-17 12:53:14 +02001500 gfar_free_rx_queues(priv);
1501 gfar_free_tx_queues(priv);
Claudiu Manoilee873fd2013-01-29 03:55:12 +00001502 free_gfar_dev(priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001503
1504 return 0;
1505}
1506
Scott Woodd87eb122008-07-11 18:04:45 -05001507#ifdef CONFIG_PM
Anton Vorontsovbe926fc2009-10-12 06:00:42 +00001508
1509static int gfar_suspend(struct device *dev)
Scott Woodd87eb122008-07-11 18:04:45 -05001510{
Anton Vorontsovbe926fc2009-10-12 06:00:42 +00001511 struct gfar_private *priv = dev_get_drvdata(dev);
1512 struct net_device *ndev = priv->ndev;
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00001513 struct gfar __iomem *regs = priv->gfargrp[0].regs;
Scott Woodd87eb122008-07-11 18:04:45 -05001514 unsigned long flags;
1515 u32 tempval;
1516
1517 int magic_packet = priv->wol_en &&
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00001518 (priv->device_flags &
1519 FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
Scott Woodd87eb122008-07-11 18:04:45 -05001520
Anton Vorontsovbe926fc2009-10-12 06:00:42 +00001521 netif_device_detach(ndev);
Scott Woodd87eb122008-07-11 18:04:45 -05001522
Anton Vorontsovbe926fc2009-10-12 06:00:42 +00001523 if (netif_running(ndev)) {
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00001524
1525 local_irq_save(flags);
1526 lock_tx_qs(priv);
Scott Woodd87eb122008-07-11 18:04:45 -05001527
Claudiu Manoilc10650b2014-02-17 12:53:18 +02001528 gfar_halt_nodisable(priv);
Scott Woodd87eb122008-07-11 18:04:45 -05001529
1530 /* Disable Tx, and Rx if wake-on-LAN is disabled. */
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00001531 tempval = gfar_read(&regs->maccfg1);
Scott Woodd87eb122008-07-11 18:04:45 -05001532
1533 tempval &= ~MACCFG1_TX_EN;
1534
1535 if (!magic_packet)
1536 tempval &= ~MACCFG1_RX_EN;
1537
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00001538 gfar_write(&regs->maccfg1, tempval);
Scott Woodd87eb122008-07-11 18:04:45 -05001539
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00001540 unlock_tx_qs(priv);
1541 local_irq_restore(flags);
Scott Woodd87eb122008-07-11 18:04:45 -05001542
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00001543 disable_napi(priv);
Scott Woodd87eb122008-07-11 18:04:45 -05001544
1545 if (magic_packet) {
1546 /* Enable interrupt on Magic Packet */
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00001547 gfar_write(&regs->imask, IMASK_MAG);
Scott Woodd87eb122008-07-11 18:04:45 -05001548
1549 /* Enable Magic Packet mode */
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00001550 tempval = gfar_read(&regs->maccfg2);
Scott Woodd87eb122008-07-11 18:04:45 -05001551 tempval |= MACCFG2_MPEN;
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00001552 gfar_write(&regs->maccfg2, tempval);
Scott Woodd87eb122008-07-11 18:04:45 -05001553 } else {
1554 phy_stop(priv->phydev);
1555 }
1556 }
1557
1558 return 0;
1559}
1560
Anton Vorontsovbe926fc2009-10-12 06:00:42 +00001561static int gfar_resume(struct device *dev)
Scott Woodd87eb122008-07-11 18:04:45 -05001562{
Anton Vorontsovbe926fc2009-10-12 06:00:42 +00001563 struct gfar_private *priv = dev_get_drvdata(dev);
1564 struct net_device *ndev = priv->ndev;
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00001565 struct gfar __iomem *regs = priv->gfargrp[0].regs;
Scott Woodd87eb122008-07-11 18:04:45 -05001566 unsigned long flags;
1567 u32 tempval;
1568 int magic_packet = priv->wol_en &&
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00001569 (priv->device_flags &
1570 FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
Scott Woodd87eb122008-07-11 18:04:45 -05001571
Anton Vorontsovbe926fc2009-10-12 06:00:42 +00001572 if (!netif_running(ndev)) {
1573 netif_device_attach(ndev);
Scott Woodd87eb122008-07-11 18:04:45 -05001574 return 0;
1575 }
1576
1577 if (!magic_packet && priv->phydev)
1578 phy_start(priv->phydev);
1579
1580 /* Disable Magic Packet mode, in case something
1581 * else woke us up.
1582 */
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00001583 local_irq_save(flags);
1584 lock_tx_qs(priv);
Scott Woodd87eb122008-07-11 18:04:45 -05001585
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00001586 tempval = gfar_read(&regs->maccfg2);
Scott Woodd87eb122008-07-11 18:04:45 -05001587 tempval &= ~MACCFG2_MPEN;
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00001588 gfar_write(&regs->maccfg2, tempval);
Scott Woodd87eb122008-07-11 18:04:45 -05001589
Claudiu Manoilc10650b2014-02-17 12:53:18 +02001590 gfar_start(priv);
Scott Woodd87eb122008-07-11 18:04:45 -05001591
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00001592 unlock_tx_qs(priv);
1593 local_irq_restore(flags);
Scott Woodd87eb122008-07-11 18:04:45 -05001594
Anton Vorontsovbe926fc2009-10-12 06:00:42 +00001595 netif_device_attach(ndev);
Scott Woodd87eb122008-07-11 18:04:45 -05001596
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00001597 enable_napi(priv);
Scott Woodd87eb122008-07-11 18:04:45 -05001598
1599 return 0;
1600}
Anton Vorontsovbe926fc2009-10-12 06:00:42 +00001601
1602static int gfar_restore(struct device *dev)
1603{
1604 struct gfar_private *priv = dev_get_drvdata(dev);
1605 struct net_device *ndev = priv->ndev;
1606
Wang Dongsheng103cdd12012-11-09 04:43:51 +00001607 if (!netif_running(ndev)) {
1608 netif_device_attach(ndev);
1609
Anton Vorontsovbe926fc2009-10-12 06:00:42 +00001610 return 0;
Wang Dongsheng103cdd12012-11-09 04:43:51 +00001611 }
Anton Vorontsovbe926fc2009-10-12 06:00:42 +00001612
Claudiu Manoil1eb8f7a2012-11-08 22:11:41 +00001613 if (gfar_init_bds(ndev)) {
1614 free_skb_resources(priv);
1615 return -ENOMEM;
1616 }
1617
Claudiu Manoila328ac92014-02-24 12:13:42 +02001618 gfar_mac_reset(priv);
1619
1620 gfar_init_tx_rx_base(priv);
1621
Claudiu Manoilc10650b2014-02-17 12:53:18 +02001622 gfar_start(priv);
Anton Vorontsovbe926fc2009-10-12 06:00:42 +00001623
1624 priv->oldlink = 0;
1625 priv->oldspeed = 0;
1626 priv->oldduplex = -1;
1627
1628 if (priv->phydev)
1629 phy_start(priv->phydev);
1630
1631 netif_device_attach(ndev);
Anton Vorontsov5ea681d2009-11-10 14:11:05 +00001632 enable_napi(priv);
Anton Vorontsovbe926fc2009-10-12 06:00:42 +00001633
1634 return 0;
1635}
1636
1637static struct dev_pm_ops gfar_pm_ops = {
1638 .suspend = gfar_suspend,
1639 .resume = gfar_resume,
1640 .freeze = gfar_suspend,
1641 .thaw = gfar_resume,
1642 .restore = gfar_restore,
1643};
1644
1645#define GFAR_PM_OPS (&gfar_pm_ops)
1646
Scott Woodd87eb122008-07-11 18:04:45 -05001647#else
Anton Vorontsovbe926fc2009-10-12 06:00:42 +00001648
1649#define GFAR_PM_OPS NULL
Anton Vorontsovbe926fc2009-10-12 06:00:42 +00001650
Scott Woodd87eb122008-07-11 18:04:45 -05001651#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001652
Andy Fleminge8a2b6a2006-12-01 12:01:06 -06001653/* Reads the controller's registers to determine what interface
1654 * connects it to the PHY.
1655 */
1656static phy_interface_t gfar_get_interface(struct net_device *dev)
1657{
1658 struct gfar_private *priv = netdev_priv(dev);
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00001659 struct gfar __iomem *regs = priv->gfargrp[0].regs;
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00001660 u32 ecntrl;
1661
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00001662 ecntrl = gfar_read(&regs->ecntrl);
Andy Fleminge8a2b6a2006-12-01 12:01:06 -06001663
1664 if (ecntrl & ECNTRL_SGMII_MODE)
1665 return PHY_INTERFACE_MODE_SGMII;
1666
1667 if (ecntrl & ECNTRL_TBI_MODE) {
1668 if (ecntrl & ECNTRL_REDUCED_MODE)
1669 return PHY_INTERFACE_MODE_RTBI;
1670 else
1671 return PHY_INTERFACE_MODE_TBI;
1672 }
1673
1674 if (ecntrl & ECNTRL_REDUCED_MODE) {
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00001675 if (ecntrl & ECNTRL_REDUCED_MII_MODE) {
Andy Fleminge8a2b6a2006-12-01 12:01:06 -06001676 return PHY_INTERFACE_MODE_RMII;
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00001677 }
Andy Fleming7132ab72007-07-11 11:43:07 -05001678 else {
Andy Flemingb31a1d82008-12-16 15:29:15 -08001679 phy_interface_t interface = priv->interface;
Andy Fleming7132ab72007-07-11 11:43:07 -05001680
Jan Ceuleers0977f812012-06-05 03:42:12 +00001681 /* This isn't autodetected right now, so it must
Andy Fleming7132ab72007-07-11 11:43:07 -05001682 * be set by the device tree or platform code.
1683 */
1684 if (interface == PHY_INTERFACE_MODE_RGMII_ID)
1685 return PHY_INTERFACE_MODE_RGMII_ID;
1686
Andy Fleminge8a2b6a2006-12-01 12:01:06 -06001687 return PHY_INTERFACE_MODE_RGMII;
Andy Fleming7132ab72007-07-11 11:43:07 -05001688 }
Andy Fleminge8a2b6a2006-12-01 12:01:06 -06001689 }
1690
Andy Flemingb31a1d82008-12-16 15:29:15 -08001691 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_GIGABIT)
Andy Fleminge8a2b6a2006-12-01 12:01:06 -06001692 return PHY_INTERFACE_MODE_GMII;
1693
1694 return PHY_INTERFACE_MODE_MII;
1695}
1696
1697
Andy Flemingbb40dcb2005-09-23 22:54:21 -04001698/* Initializes driver's PHY state, and attaches to the PHY.
1699 * Returns 0 on success.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001700 */
1701static int init_phy(struct net_device *dev)
1702{
1703 struct gfar_private *priv = netdev_priv(dev);
Andy Flemingbb40dcb2005-09-23 22:54:21 -04001704 uint gigabit_support =
Andy Flemingb31a1d82008-12-16 15:29:15 -08001705 priv->device_flags & FSL_GIANFAR_DEV_HAS_GIGABIT ?
Claudiu Manoil23402bd2013-08-12 13:53:26 +03001706 GFAR_SUPPORTED_GBIT : 0;
Andy Fleminge8a2b6a2006-12-01 12:01:06 -06001707 phy_interface_t interface;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001708
1709 priv->oldlink = 0;
1710 priv->oldspeed = 0;
1711 priv->oldduplex = -1;
1712
Andy Fleminge8a2b6a2006-12-01 12:01:06 -06001713 interface = gfar_get_interface(dev);
1714
Anton Vorontsov1db780f2009-07-16 21:31:42 +00001715 priv->phydev = of_phy_connect(dev, priv->phy_node, &adjust_link, 0,
1716 interface);
Anton Vorontsov1db780f2009-07-16 21:31:42 +00001717 if (!priv->phydev) {
1718 dev_err(&dev->dev, "could not attach to PHY\n");
1719 return -ENODEV;
Grant Likelyfe192a42009-04-25 12:53:12 +00001720 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001721
Kapil Junejad3c12872007-05-11 18:25:11 -05001722 if (interface == PHY_INTERFACE_MODE_SGMII)
1723 gfar_configure_serdes(dev);
1724
Andy Flemingbb40dcb2005-09-23 22:54:21 -04001725 /* Remove any features not supported by the controller */
Grant Likelyfe192a42009-04-25 12:53:12 +00001726 priv->phydev->supported &= (GFAR_SUPPORTED | gigabit_support);
1727 priv->phydev->advertising = priv->phydev->supported;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001728
Pavaluca Matei-B46610cf987af2014-10-27 10:42:42 +02001729 /* Add support for flow control, but don't advertise it by default */
1730 priv->phydev->supported |= (SUPPORTED_Pause | SUPPORTED_Asym_Pause);
1731
Linus Torvalds1da177e2005-04-16 15:20:36 -07001732 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001733}
1734
Jan Ceuleers0977f812012-06-05 03:42:12 +00001735/* Initialize TBI PHY interface for communicating with the
Paul Gortmakerd0313582008-04-17 00:08:10 -04001736 * SERDES lynx PHY on the chip. We communicate with this PHY
1737 * through the MDIO bus on each controller, treating it as a
1738 * "normal" PHY at the address found in the TBIPA register. We assume
1739 * that the TBIPA register is valid. Either the MDIO bus code will set
1740 * it to a value that doesn't conflict with other PHYs on the bus, or the
1741 * value doesn't matter, as there are no other PHYs on the bus.
1742 */
Kapil Junejad3c12872007-05-11 18:25:11 -05001743static void gfar_configure_serdes(struct net_device *dev)
1744{
1745 struct gfar_private *priv = netdev_priv(dev);
Grant Likelyfe192a42009-04-25 12:53:12 +00001746 struct phy_device *tbiphy;
Trent Piephoc1324192008-10-30 18:17:06 -07001747
Grant Likelyfe192a42009-04-25 12:53:12 +00001748 if (!priv->tbi_node) {
1749 dev_warn(&dev->dev, "error: SGMII mode requires that the "
1750 "device tree specify a tbi-handle\n");
1751 return;
1752 }
1753
1754 tbiphy = of_phy_find_device(priv->tbi_node);
1755 if (!tbiphy) {
1756 dev_err(&dev->dev, "error: Could not get TBI device\n");
Andy Flemingb31a1d82008-12-16 15:29:15 -08001757 return;
1758 }
Kapil Junejad3c12872007-05-11 18:25:11 -05001759
Jan Ceuleers0977f812012-06-05 03:42:12 +00001760 /* If the link is already up, we must already be ok, and don't need to
Trent Piephobdb59f92008-10-30 18:17:07 -07001761 * configure and reset the TBI<->SerDes link. Maybe U-Boot configured
1762 * everything for us? Resetting it takes the link down and requires
1763 * several seconds for it to come back.
1764 */
Grant Likelyfe192a42009-04-25 12:53:12 +00001765 if (phy_read(tbiphy, MII_BMSR) & BMSR_LSTATUS)
Andy Flemingb31a1d82008-12-16 15:29:15 -08001766 return;
Kapil Junejad3c12872007-05-11 18:25:11 -05001767
Paul Gortmakerd0313582008-04-17 00:08:10 -04001768 /* Single clk mode, mii mode off(for serdes communication) */
Grant Likelyfe192a42009-04-25 12:53:12 +00001769 phy_write(tbiphy, MII_TBICON, TBICON_CLK_SELECT);
Kapil Junejad3c12872007-05-11 18:25:11 -05001770
Grant Likelyfe192a42009-04-25 12:53:12 +00001771 phy_write(tbiphy, MII_ADVERTISE,
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00001772 ADVERTISE_1000XFULL | ADVERTISE_1000XPAUSE |
1773 ADVERTISE_1000XPSE_ASYM);
Kapil Junejad3c12872007-05-11 18:25:11 -05001774
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00001775 phy_write(tbiphy, MII_BMCR,
1776 BMCR_ANENABLE | BMCR_ANRESTART | BMCR_FULLDPLX |
1777 BMCR_SPEED1000);
Kapil Junejad3c12872007-05-11 18:25:11 -05001778}
1779
Anton Vorontsov511d9342010-06-30 06:39:15 +00001780static int __gfar_is_rx_idle(struct gfar_private *priv)
1781{
1782 u32 res;
1783
Jan Ceuleers0977f812012-06-05 03:42:12 +00001784 /* Normaly TSEC should not hang on GRS commands, so we should
Anton Vorontsov511d9342010-06-30 06:39:15 +00001785 * actually wait for IEVENT_GRSC flag.
1786 */
Claudiu Manoilad3660c2013-10-09 20:20:40 +03001787 if (!gfar_has_errata(priv, GFAR_ERRATA_A002))
Anton Vorontsov511d9342010-06-30 06:39:15 +00001788 return 0;
1789
Jan Ceuleers0977f812012-06-05 03:42:12 +00001790 /* Read the eTSEC register at offset 0xD1C. If bits 7-14 are
Anton Vorontsov511d9342010-06-30 06:39:15 +00001791 * the same as bits 23-30, the eTSEC Rx is assumed to be idle
1792 * and the Rx can be safely reset.
1793 */
1794 res = gfar_read((void __iomem *)priv->gfargrp[0].regs + 0xd1c);
1795 res &= 0x7f807f80;
1796 if ((res & 0xffff) == (res >> 16))
1797 return 1;
1798
1799 return 0;
1800}
Kumar Gala0bbaf062005-06-20 10:54:21 -05001801
1802/* Halt the receive and transmit queues */
Claudiu Manoilc10650b2014-02-17 12:53:18 +02001803static void gfar_halt_nodisable(struct gfar_private *priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001804{
Claudiu Manoilefeddce2014-02-17 12:53:17 +02001805 struct gfar __iomem *regs = priv->gfargrp[0].regs;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001806 u32 tempval;
Claudiu Manoila4feee82014-10-07 10:44:34 +03001807 unsigned int timeout;
1808 int stopped;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001809
Claudiu Manoilefeddce2014-02-17 12:53:17 +02001810 gfar_ints_disable(priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001811
Claudiu Manoila4feee82014-10-07 10:44:34 +03001812 if (gfar_is_dma_stopped(priv))
1813 return;
1814
Linus Torvalds1da177e2005-04-16 15:20:36 -07001815 /* Stop the DMA, and wait for it to stop */
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00001816 tempval = gfar_read(&regs->dmactrl);
Claudiu Manoila4feee82014-10-07 10:44:34 +03001817 tempval |= (DMACTRL_GRS | DMACTRL_GTS);
1818 gfar_write(&regs->dmactrl, tempval);
Anton Vorontsov511d9342010-06-30 06:39:15 +00001819
Claudiu Manoila4feee82014-10-07 10:44:34 +03001820retry:
1821 timeout = 1000;
1822 while (!(stopped = gfar_is_dma_stopped(priv)) && timeout) {
1823 cpu_relax();
1824 timeout--;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001825 }
Claudiu Manoila4feee82014-10-07 10:44:34 +03001826
1827 if (!timeout)
1828 stopped = gfar_is_dma_stopped(priv);
1829
1830 if (!stopped && !gfar_is_rx_dma_stopped(priv) &&
1831 !__gfar_is_rx_idle(priv))
1832 goto retry;
Scott Woodd87eb122008-07-11 18:04:45 -05001833}
Scott Woodd87eb122008-07-11 18:04:45 -05001834
1835/* Halt the receive and transmit queues */
Claudiu Manoilc10650b2014-02-17 12:53:18 +02001836void gfar_halt(struct gfar_private *priv)
Scott Woodd87eb122008-07-11 18:04:45 -05001837{
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00001838 struct gfar __iomem *regs = priv->gfargrp[0].regs;
Scott Woodd87eb122008-07-11 18:04:45 -05001839 u32 tempval;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001840
Claudiu Manoilc10650b2014-02-17 12:53:18 +02001841 /* Dissable the Rx/Tx hw queues */
1842 gfar_write(&regs->rqueue, 0);
1843 gfar_write(&regs->tqueue, 0);
Scott Wood2a54adc2008-08-12 15:10:46 -05001844
Claudiu Manoilc10650b2014-02-17 12:53:18 +02001845 mdelay(10);
1846
1847 gfar_halt_nodisable(priv);
1848
1849 /* Disable Rx/Tx DMA */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001850 tempval = gfar_read(&regs->maccfg1);
1851 tempval &= ~(MACCFG1_RX_EN | MACCFG1_TX_EN);
1852 gfar_write(&regs->maccfg1, tempval);
Kumar Gala0bbaf062005-06-20 10:54:21 -05001853}
1854
1855void stop_gfar(struct net_device *dev)
1856{
1857 struct gfar_private *priv = netdev_priv(dev);
Kumar Gala0bbaf062005-06-20 10:54:21 -05001858
Claudiu Manoil08511332014-02-24 12:13:45 +02001859 netif_tx_stop_all_queues(dev);
Andy Flemingbb40dcb2005-09-23 22:54:21 -04001860
Peter Zijlstra4e857c52014-03-17 18:06:10 +01001861 smp_mb__before_atomic();
Claudiu Manoil08511332014-02-24 12:13:45 +02001862 set_bit(GFAR_DOWN, &priv->state);
Peter Zijlstra4e857c52014-03-17 18:06:10 +01001863 smp_mb__after_atomic();
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00001864
Claudiu Manoil08511332014-02-24 12:13:45 +02001865 disable_napi(priv);
Kumar Gala0bbaf062005-06-20 10:54:21 -05001866
Claudiu Manoil08511332014-02-24 12:13:45 +02001867 /* disable ints and gracefully shut down Rx/Tx DMA */
Claudiu Manoilc10650b2014-02-17 12:53:18 +02001868 gfar_halt(priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001869
Claudiu Manoil08511332014-02-24 12:13:45 +02001870 phy_stop(priv->phydev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001871
Linus Torvalds1da177e2005-04-16 15:20:36 -07001872 free_skb_resources(priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001873}
1874
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00001875static void free_skb_tx_queue(struct gfar_priv_tx_q *tx_queue)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001876{
Linus Torvalds1da177e2005-04-16 15:20:36 -07001877 struct txbd8 *txbdp;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00001878 struct gfar_private *priv = netdev_priv(tx_queue->dev);
Dai Haruki4669bc92008-12-17 16:51:04 -08001879 int i, j;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001880
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00001881 txbdp = tx_queue->tx_bd_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001882
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00001883 for (i = 0; i < tx_queue->tx_ring_size; i++) {
1884 if (!tx_queue->tx_skbuff[i])
Dai Haruki4669bc92008-12-17 16:51:04 -08001885 continue;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001886
Claudiu Manoil369ec162013-02-14 05:00:02 +00001887 dma_unmap_single(priv->dev, txbdp->bufPtr,
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00001888 txbdp->length, DMA_TO_DEVICE);
Dai Haruki4669bc92008-12-17 16:51:04 -08001889 txbdp->lstatus = 0;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00001890 for (j = 0; j < skb_shinfo(tx_queue->tx_skbuff[i])->nr_frags;
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00001891 j++) {
Dai Haruki4669bc92008-12-17 16:51:04 -08001892 txbdp++;
Claudiu Manoil369ec162013-02-14 05:00:02 +00001893 dma_unmap_page(priv->dev, txbdp->bufPtr,
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00001894 txbdp->length, DMA_TO_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001895 }
Andy Flemingad5da7a2008-05-07 13:20:55 -05001896 txbdp++;
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00001897 dev_kfree_skb_any(tx_queue->tx_skbuff[i]);
1898 tx_queue->tx_skbuff[i] = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001899 }
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00001900 kfree(tx_queue->tx_skbuff);
Claudiu Manoil1eb8f7a2012-11-08 22:11:41 +00001901 tx_queue->tx_skbuff = NULL;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00001902}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001903
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00001904static void free_skb_rx_queue(struct gfar_priv_rx_q *rx_queue)
1905{
1906 struct rxbd8 *rxbdp;
1907 struct gfar_private *priv = netdev_priv(rx_queue->dev);
1908 int i;
1909
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00001910 rxbdp = rx_queue->rx_bd_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001911
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00001912 for (i = 0; i < rx_queue->rx_ring_size; i++) {
1913 if (rx_queue->rx_skbuff[i]) {
Claudiu Manoil369ec162013-02-14 05:00:02 +00001914 dma_unmap_single(priv->dev, rxbdp->bufPtr,
1915 priv->rx_buffer_size,
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00001916 DMA_FROM_DEVICE);
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00001917 dev_kfree_skb_any(rx_queue->rx_skbuff[i]);
1918 rx_queue->rx_skbuff[i] = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001919 }
Anton Vorontsove69edd22009-10-12 06:00:30 +00001920 rxbdp->lstatus = 0;
1921 rxbdp->bufPtr = 0;
1922 rxbdp++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001923 }
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00001924 kfree(rx_queue->rx_skbuff);
Claudiu Manoil1eb8f7a2012-11-08 22:11:41 +00001925 rx_queue->rx_skbuff = NULL;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00001926}
Anton Vorontsove69edd22009-10-12 06:00:30 +00001927
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00001928/* If there are any tx skbs or rx skbs still around, free them.
Jan Ceuleers0977f812012-06-05 03:42:12 +00001929 * Then free tx_skbuff and rx_skbuff
1930 */
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00001931static void free_skb_resources(struct gfar_private *priv)
1932{
1933 struct gfar_priv_tx_q *tx_queue = NULL;
1934 struct gfar_priv_rx_q *rx_queue = NULL;
1935 int i;
1936
1937 /* Go through all the buffer descriptors and free their data buffers */
1938 for (i = 0; i < priv->num_tx_queues; i++) {
Paul Gortmakerd8a0f1b2012-01-06 13:51:03 -05001939 struct netdev_queue *txq;
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00001940
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00001941 tx_queue = priv->tx_queue[i];
Paul Gortmakerd8a0f1b2012-01-06 13:51:03 -05001942 txq = netdev_get_tx_queue(tx_queue->dev, tx_queue->qindex);
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00001943 if (tx_queue->tx_skbuff)
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00001944 free_skb_tx_queue(tx_queue);
Paul Gortmakerd8a0f1b2012-01-06 13:51:03 -05001945 netdev_tx_reset_queue(txq);
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00001946 }
1947
1948 for (i = 0; i < priv->num_rx_queues; i++) {
1949 rx_queue = priv->rx_queue[i];
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00001950 if (rx_queue->rx_skbuff)
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00001951 free_skb_rx_queue(rx_queue);
1952 }
1953
Claudiu Manoil369ec162013-02-14 05:00:02 +00001954 dma_free_coherent(priv->dev,
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00001955 sizeof(struct txbd8) * priv->total_tx_ring_size +
1956 sizeof(struct rxbd8) * priv->total_rx_ring_size,
1957 priv->tx_queue[0]->tx_bd_base,
1958 priv->tx_queue[0]->tx_bd_dma_base);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001959}
1960
Claudiu Manoilc10650b2014-02-17 12:53:18 +02001961void gfar_start(struct gfar_private *priv)
Kumar Gala0bbaf062005-06-20 10:54:21 -05001962{
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00001963 struct gfar __iomem *regs = priv->gfargrp[0].regs;
Kumar Gala0bbaf062005-06-20 10:54:21 -05001964 u32 tempval;
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00001965 int i = 0;
Kumar Gala0bbaf062005-06-20 10:54:21 -05001966
Claudiu Manoilc10650b2014-02-17 12:53:18 +02001967 /* Enable Rx/Tx hw queues */
1968 gfar_write(&regs->rqueue, priv->rqueue);
1969 gfar_write(&regs->tqueue, priv->tqueue);
Kumar Gala0bbaf062005-06-20 10:54:21 -05001970
1971 /* Initialize DMACTRL to have WWR and WOP */
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00001972 tempval = gfar_read(&regs->dmactrl);
Kumar Gala0bbaf062005-06-20 10:54:21 -05001973 tempval |= DMACTRL_INIT_SETTINGS;
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00001974 gfar_write(&regs->dmactrl, tempval);
Kumar Gala0bbaf062005-06-20 10:54:21 -05001975
Kumar Gala0bbaf062005-06-20 10:54:21 -05001976 /* Make sure we aren't stopped */
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00001977 tempval = gfar_read(&regs->dmactrl);
Kumar Gala0bbaf062005-06-20 10:54:21 -05001978 tempval &= ~(DMACTRL_GRS | DMACTRL_GTS);
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00001979 gfar_write(&regs->dmactrl, tempval);
Kumar Gala0bbaf062005-06-20 10:54:21 -05001980
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00001981 for (i = 0; i < priv->num_grps; i++) {
1982 regs = priv->gfargrp[i].regs;
1983 /* Clear THLT/RHLT, so that the DMA starts polling now */
1984 gfar_write(&regs->tstat, priv->gfargrp[i].tstat);
1985 gfar_write(&regs->rstat, priv->gfargrp[i].rstat);
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00001986 }
Dai Haruki12dea572008-12-16 15:30:20 -08001987
Claudiu Manoilc10650b2014-02-17 12:53:18 +02001988 /* Enable Rx/Tx DMA */
1989 tempval = gfar_read(&regs->maccfg1);
1990 tempval |= (MACCFG1_RX_EN | MACCFG1_TX_EN);
1991 gfar_write(&regs->maccfg1, tempval);
1992
Claudiu Manoilefeddce2014-02-17 12:53:17 +02001993 gfar_ints_enable(priv);
1994
Claudiu Manoilc10650b2014-02-17 12:53:18 +02001995 priv->ndev->trans_start = jiffies; /* prevent tx timeout */
Kumar Gala0bbaf062005-06-20 10:54:21 -05001996}
1997
Claudiu Manoil80ec3962014-02-24 12:13:44 +02001998static void free_grp_irqs(struct gfar_priv_grp *grp)
1999{
2000 free_irq(gfar_irq(grp, TX)->irq, grp);
2001 free_irq(gfar_irq(grp, RX)->irq, grp);
2002 free_irq(gfar_irq(grp, ER)->irq, grp);
2003}
2004
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00002005static int register_grp_irqs(struct gfar_priv_grp *grp)
2006{
2007 struct gfar_private *priv = grp->priv;
2008 struct net_device *dev = priv->ndev;
Anton Vorontsovccc05c62009-10-12 06:00:26 +00002009 int err;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002010
Linus Torvalds1da177e2005-04-16 15:20:36 -07002011 /* If the device has multiple interrupts, register for
Jan Ceuleers0977f812012-06-05 03:42:12 +00002012 * them. Otherwise, only register for the one
2013 */
Andy Flemingb31a1d82008-12-16 15:29:15 -08002014 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
Kumar Gala0bbaf062005-06-20 10:54:21 -05002015 /* Install our interrupt handlers for Error,
Jan Ceuleers0977f812012-06-05 03:42:12 +00002016 * Transmit, and Receive
2017 */
Claudiu Manoilee873fd2013-01-29 03:55:12 +00002018 err = request_irq(gfar_irq(grp, ER)->irq, gfar_error, 0,
2019 gfar_irq(grp, ER)->name, grp);
2020 if (err < 0) {
Joe Perches59deab22011-06-14 08:57:47 +00002021 netif_err(priv, intr, dev, "Can't get IRQ %d\n",
Claudiu Manoilee873fd2013-01-29 03:55:12 +00002022 gfar_irq(grp, ER)->irq);
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00002023
Julia Lawall2145f1a2010-08-05 10:26:20 +00002024 goto err_irq_fail;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002025 }
Claudiu Manoilee873fd2013-01-29 03:55:12 +00002026 err = request_irq(gfar_irq(grp, TX)->irq, gfar_transmit, 0,
2027 gfar_irq(grp, TX)->name, grp);
2028 if (err < 0) {
Joe Perches59deab22011-06-14 08:57:47 +00002029 netif_err(priv, intr, dev, "Can't get IRQ %d\n",
Claudiu Manoilee873fd2013-01-29 03:55:12 +00002030 gfar_irq(grp, TX)->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002031 goto tx_irq_fail;
2032 }
Claudiu Manoilee873fd2013-01-29 03:55:12 +00002033 err = request_irq(gfar_irq(grp, RX)->irq, gfar_receive, 0,
2034 gfar_irq(grp, RX)->name, grp);
2035 if (err < 0) {
Joe Perches59deab22011-06-14 08:57:47 +00002036 netif_err(priv, intr, dev, "Can't get IRQ %d\n",
Claudiu Manoilee873fd2013-01-29 03:55:12 +00002037 gfar_irq(grp, RX)->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002038 goto rx_irq_fail;
2039 }
2040 } else {
Claudiu Manoilee873fd2013-01-29 03:55:12 +00002041 err = request_irq(gfar_irq(grp, TX)->irq, gfar_interrupt, 0,
2042 gfar_irq(grp, TX)->name, grp);
2043 if (err < 0) {
Joe Perches59deab22011-06-14 08:57:47 +00002044 netif_err(priv, intr, dev, "Can't get IRQ %d\n",
Claudiu Manoilee873fd2013-01-29 03:55:12 +00002045 gfar_irq(grp, TX)->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002046 goto err_irq_fail;
2047 }
2048 }
2049
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00002050 return 0;
2051
2052rx_irq_fail:
Claudiu Manoilee873fd2013-01-29 03:55:12 +00002053 free_irq(gfar_irq(grp, TX)->irq, grp);
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00002054tx_irq_fail:
Claudiu Manoilee873fd2013-01-29 03:55:12 +00002055 free_irq(gfar_irq(grp, ER)->irq, grp);
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00002056err_irq_fail:
2057 return err;
2058
2059}
2060
Claudiu Manoil80ec3962014-02-24 12:13:44 +02002061static void gfar_free_irq(struct gfar_private *priv)
2062{
2063 int i;
2064
2065 /* Free the IRQs */
2066 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
2067 for (i = 0; i < priv->num_grps; i++)
2068 free_grp_irqs(&priv->gfargrp[i]);
2069 } else {
2070 for (i = 0; i < priv->num_grps; i++)
2071 free_irq(gfar_irq(&priv->gfargrp[i], TX)->irq,
2072 &priv->gfargrp[i]);
2073 }
2074}
2075
2076static int gfar_request_irq(struct gfar_private *priv)
2077{
2078 int err, i, j;
2079
2080 for (i = 0; i < priv->num_grps; i++) {
2081 err = register_grp_irqs(&priv->gfargrp[i]);
2082 if (err) {
2083 for (j = 0; j < i; j++)
2084 free_grp_irqs(&priv->gfargrp[j]);
2085 return err;
2086 }
2087 }
2088
2089 return 0;
2090}
2091
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00002092/* Bring the controller up and running */
2093int startup_gfar(struct net_device *ndev)
2094{
2095 struct gfar_private *priv = netdev_priv(ndev);
Claudiu Manoil80ec3962014-02-24 12:13:44 +02002096 int err;
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00002097
Claudiu Manoila328ac92014-02-24 12:13:42 +02002098 gfar_mac_reset(priv);
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00002099
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00002100 err = gfar_alloc_skb_resources(ndev);
2101 if (err)
2102 return err;
2103
Claudiu Manoila328ac92014-02-24 12:13:42 +02002104 gfar_init_tx_rx_base(priv);
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00002105
Peter Zijlstra4e857c52014-03-17 18:06:10 +01002106 smp_mb__before_atomic();
Claudiu Manoil08511332014-02-24 12:13:45 +02002107 clear_bit(GFAR_DOWN, &priv->state);
Peter Zijlstra4e857c52014-03-17 18:06:10 +01002108 smp_mb__after_atomic();
Claudiu Manoil08511332014-02-24 12:13:45 +02002109
2110 /* Start Rx/Tx DMA and enable the interrupts */
Claudiu Manoilc10650b2014-02-17 12:53:18 +02002111 gfar_start(priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002112
Anton Vorontsov826aa4a2009-10-12 06:00:34 +00002113 phy_start(priv->phydev);
2114
Claudiu Manoil08511332014-02-24 12:13:45 +02002115 enable_napi(priv);
2116
2117 netif_tx_wake_all_queues(ndev);
2118
Linus Torvalds1da177e2005-04-16 15:20:36 -07002119 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002120}
2121
Jan Ceuleers0977f812012-06-05 03:42:12 +00002122/* Called when something needs to use the ethernet device
2123 * Returns 0 for success.
2124 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002125static int gfar_enet_open(struct net_device *dev)
2126{
Li Yang94e8cc32007-10-12 21:53:51 +08002127 struct gfar_private *priv = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002128 int err;
2129
Linus Torvalds1da177e2005-04-16 15:20:36 -07002130 err = init_phy(dev);
Claudiu Manoil08511332014-02-24 12:13:45 +02002131 if (err)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002132 return err;
2133
Claudiu Manoil80ec3962014-02-24 12:13:44 +02002134 err = gfar_request_irq(priv);
2135 if (err)
2136 return err;
2137
Linus Torvalds1da177e2005-04-16 15:20:36 -07002138 err = startup_gfar(dev);
Claudiu Manoil08511332014-02-24 12:13:45 +02002139 if (err)
Anton Vorontsovdb0e8e32007-10-17 23:57:46 +04002140 return err;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002141
Anton Vorontsov2884e5c2009-02-01 00:52:34 -08002142 device_set_wakeup_enable(&dev->dev, priv->wol_en);
2143
Linus Torvalds1da177e2005-04-16 15:20:36 -07002144 return err;
2145}
2146
Stephen Hemminger54dc79f2009-03-27 00:38:45 -07002147static inline struct txfcb *gfar_add_fcb(struct sk_buff *skb)
Kumar Gala0bbaf062005-06-20 10:54:21 -05002148{
Stephen Hemminger54dc79f2009-03-27 00:38:45 -07002149 struct txfcb *fcb = (struct txfcb *)skb_push(skb, GMAC_FCB_LEN);
Kumar Gala6c31d552009-04-28 08:04:10 -07002150
2151 memset(fcb, 0, GMAC_FCB_LEN);
Kumar Gala0bbaf062005-06-20 10:54:21 -05002152
Kumar Gala0bbaf062005-06-20 10:54:21 -05002153 return fcb;
2154}
2155
Manfred Rudigier9c4886e2012-01-09 23:26:51 +00002156static inline void gfar_tx_checksum(struct sk_buff *skb, struct txfcb *fcb,
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00002157 int fcb_length)
Kumar Gala0bbaf062005-06-20 10:54:21 -05002158{
Kumar Gala0bbaf062005-06-20 10:54:21 -05002159 /* If we're here, it's a IP packet with a TCP or UDP
2160 * payload. We set it to checksum, using a pseudo-header
2161 * we provide
2162 */
Jan Ceuleers3a2e16c2012-06-05 03:42:14 +00002163 u8 flags = TXFCB_DEFAULT;
Kumar Gala0bbaf062005-06-20 10:54:21 -05002164
Jan Ceuleers0977f812012-06-05 03:42:12 +00002165 /* Tell the controller what the protocol is
2166 * And provide the already calculated phcs
2167 */
Arnaldo Carvalho de Meloeddc9ec2007-04-20 22:47:35 -07002168 if (ip_hdr(skb)->protocol == IPPROTO_UDP) {
Andy Fleming7f7f5312005-11-11 12:38:59 -06002169 flags |= TXFCB_UDP;
Arnaldo Carvalho de Melo4bedb452007-03-13 14:28:48 -03002170 fcb->phcs = udp_hdr(skb)->check;
Andy Fleming7f7f5312005-11-11 12:38:59 -06002171 } else
Kumar Gala8da32de2007-06-29 00:12:04 -05002172 fcb->phcs = tcp_hdr(skb)->check;
Kumar Gala0bbaf062005-06-20 10:54:21 -05002173
2174 /* l3os is the distance between the start of the
2175 * frame (skb->data) and the start of the IP hdr.
2176 * l4os is the distance between the start of the
Jan Ceuleers0977f812012-06-05 03:42:12 +00002177 * l3 hdr and the l4 hdr
2178 */
Manfred Rudigier9c4886e2012-01-09 23:26:51 +00002179 fcb->l3os = (u16)(skb_network_offset(skb) - fcb_length);
Arnaldo Carvalho de Melocfe1fc72007-03-16 17:26:39 -03002180 fcb->l4os = skb_network_header_len(skb);
Kumar Gala0bbaf062005-06-20 10:54:21 -05002181
Andy Fleming7f7f5312005-11-11 12:38:59 -06002182 fcb->flags = flags;
Kumar Gala0bbaf062005-06-20 10:54:21 -05002183}
2184
Andy Fleming7f7f5312005-11-11 12:38:59 -06002185void inline gfar_tx_vlan(struct sk_buff *skb, struct txfcb *fcb)
Kumar Gala0bbaf062005-06-20 10:54:21 -05002186{
Andy Fleming7f7f5312005-11-11 12:38:59 -06002187 fcb->flags |= TXFCB_VLN;
Jiri Pirkodf8a39d2015-01-13 17:13:44 +01002188 fcb->vlctl = skb_vlan_tag_get(skb);
Kumar Gala0bbaf062005-06-20 10:54:21 -05002189}
2190
Dai Haruki4669bc92008-12-17 16:51:04 -08002191static inline struct txbd8 *skip_txbd(struct txbd8 *bdp, int stride,
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00002192 struct txbd8 *base, int ring_size)
Dai Haruki4669bc92008-12-17 16:51:04 -08002193{
2194 struct txbd8 *new_bd = bdp + stride;
2195
2196 return (new_bd >= (base + ring_size)) ? (new_bd - ring_size) : new_bd;
2197}
2198
2199static inline struct txbd8 *next_txbd(struct txbd8 *bdp, struct txbd8 *base,
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00002200 int ring_size)
Dai Haruki4669bc92008-12-17 16:51:04 -08002201{
2202 return skip_txbd(bdp, 1, base, ring_size);
2203}
2204
Claudiu Manoil02d88fb2013-08-05 17:20:09 +03002205/* eTSEC12: csum generation not supported for some fcb offsets */
2206static inline bool gfar_csum_errata_12(struct gfar_private *priv,
2207 unsigned long fcb_addr)
2208{
2209 return (gfar_has_errata(priv, GFAR_ERRATA_12) &&
2210 (fcb_addr % 0x20) > 0x18);
2211}
2212
2213/* eTSEC76: csum generation for frames larger than 2500 may
2214 * cause excess delays before start of transmission
2215 */
2216static inline bool gfar_csum_errata_76(struct gfar_private *priv,
2217 unsigned int len)
2218{
2219 return (gfar_has_errata(priv, GFAR_ERRATA_76) &&
2220 (len > 2500));
2221}
2222
Jan Ceuleers0977f812012-06-05 03:42:12 +00002223/* This is called by the kernel when a frame is ready for transmission.
2224 * It is pointed to by the dev->hard_start_xmit function pointer
2225 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002226static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
2227{
2228 struct gfar_private *priv = netdev_priv(dev);
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002229 struct gfar_priv_tx_q *tx_queue = NULL;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00002230 struct netdev_queue *txq;
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00002231 struct gfar __iomem *regs = NULL;
Kumar Gala0bbaf062005-06-20 10:54:21 -05002232 struct txfcb *fcb = NULL;
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002233 struct txbd8 *txbdp, *txbdp_start, *base, *txbdp_tstamp = NULL;
Dai Haruki5a5efed2008-12-16 15:34:50 -08002234 u32 lstatus;
Claudiu Manoil0d0cffd2013-08-05 17:20:10 +03002235 int i, rq = 0;
2236 int do_tstamp, do_csum, do_vlan;
Dai Haruki4669bc92008-12-17 16:51:04 -08002237 u32 bufaddr;
Andy Flemingfef61082006-04-20 16:44:29 -05002238 unsigned long flags;
Claudiu Manoil50ad0762013-08-30 15:01:15 +03002239 unsigned int nr_frags, nr_txbds, bytes_sent, fcb_len = 0;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00002240
2241 rq = skb->queue_mapping;
2242 tx_queue = priv->tx_queue[rq];
2243 txq = netdev_get_tx_queue(dev, rq);
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002244 base = tx_queue->tx_bd_base;
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00002245 regs = tx_queue->grp->regs;
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002246
Claudiu Manoil0d0cffd2013-08-05 17:20:10 +03002247 do_csum = (CHECKSUM_PARTIAL == skb->ip_summed);
Jiri Pirkodf8a39d2015-01-13 17:13:44 +01002248 do_vlan = skb_vlan_tag_present(skb);
Claudiu Manoil0d0cffd2013-08-05 17:20:10 +03002249 do_tstamp = (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
2250 priv->hwts_tx_en;
2251
2252 if (do_csum || do_vlan)
2253 fcb_len = GMAC_FCB_LEN;
2254
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002255 /* check if time stamp should be generated */
Claudiu Manoil0d0cffd2013-08-05 17:20:10 +03002256 if (unlikely(do_tstamp))
2257 fcb_len = GMAC_FCB_LEN + GMAC_TXPAL_LEN;
Dai Haruki4669bc92008-12-17 16:51:04 -08002258
Li Yang5b28bea2009-03-27 15:54:30 -07002259 /* make space for additional header when fcb is needed */
Claudiu Manoil0d0cffd2013-08-05 17:20:10 +03002260 if (fcb_len && unlikely(skb_headroom(skb) < fcb_len)) {
Stephen Hemminger54dc79f2009-03-27 00:38:45 -07002261 struct sk_buff *skb_new;
2262
Claudiu Manoil0d0cffd2013-08-05 17:20:10 +03002263 skb_new = skb_realloc_headroom(skb, fcb_len);
Stephen Hemminger54dc79f2009-03-27 00:38:45 -07002264 if (!skb_new) {
2265 dev->stats.tx_errors++;
Eric W. Biedermanc9974ad2014-03-11 14:20:26 -07002266 dev_kfree_skb_any(skb);
Stephen Hemminger54dc79f2009-03-27 00:38:45 -07002267 return NETDEV_TX_OK;
2268 }
Manfred Rudigierdb83d132012-01-09 23:26:50 +00002269
Eric Dumazet313b0372012-07-05 11:45:13 +00002270 if (skb->sk)
2271 skb_set_owner_w(skb_new, skb->sk);
Eric W. Biedermanc9974ad2014-03-11 14:20:26 -07002272 dev_consume_skb_any(skb);
Stephen Hemminger54dc79f2009-03-27 00:38:45 -07002273 skb = skb_new;
2274 }
2275
Dai Haruki4669bc92008-12-17 16:51:04 -08002276 /* total number of fragments in the SKB */
2277 nr_frags = skb_shinfo(skb)->nr_frags;
2278
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002279 /* calculate the required number of TxBDs for this skb */
2280 if (unlikely(do_tstamp))
2281 nr_txbds = nr_frags + 2;
2282 else
2283 nr_txbds = nr_frags + 1;
2284
Dai Haruki4669bc92008-12-17 16:51:04 -08002285 /* check if there is space to queue this packet */
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002286 if (nr_txbds > tx_queue->num_txbdfree) {
Dai Haruki4669bc92008-12-17 16:51:04 -08002287 /* no space, stop the queue */
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00002288 netif_tx_stop_queue(txq);
Dai Haruki4669bc92008-12-17 16:51:04 -08002289 dev->stats.tx_fifo_errors++;
Dai Haruki4669bc92008-12-17 16:51:04 -08002290 return NETDEV_TX_BUSY;
2291 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002292
2293 /* Update transmit stats */
Claudiu Manoil50ad0762013-08-30 15:01:15 +03002294 bytes_sent = skb->len;
2295 tx_queue->stats.tx_bytes += bytes_sent;
2296 /* keep Tx bytes on wire for BQL accounting */
2297 GFAR_CB(skb)->bytes_sent = bytes_sent;
Eric Dumazet1ac9ad12011-01-12 12:13:14 +00002298 tx_queue->stats.tx_packets++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002299
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002300 txbdp = txbdp_start = tx_queue->cur_tx;
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002301 lstatus = txbdp->lstatus;
2302
2303 /* Time stamp insertion requires one additional TxBD */
2304 if (unlikely(do_tstamp))
2305 txbdp_tstamp = txbdp = next_txbd(txbdp, base,
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00002306 tx_queue->tx_ring_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002307
Dai Haruki4669bc92008-12-17 16:51:04 -08002308 if (nr_frags == 0) {
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002309 if (unlikely(do_tstamp))
2310 txbdp_tstamp->lstatus |= BD_LFLAG(TXBD_LAST |
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00002311 TXBD_INTERRUPT);
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002312 else
2313 lstatus |= BD_LFLAG(TXBD_LAST | TXBD_INTERRUPT);
Dai Haruki4669bc92008-12-17 16:51:04 -08002314 } else {
2315 /* Place the fragment addresses and lengths into the TxBDs */
2316 for (i = 0; i < nr_frags; i++) {
Claudiu Manoil50ad0762013-08-30 15:01:15 +03002317 unsigned int frag_len;
Dai Haruki4669bc92008-12-17 16:51:04 -08002318 /* Point at the next BD, wrapping as needed */
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002319 txbdp = next_txbd(txbdp, base, tx_queue->tx_ring_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002320
Claudiu Manoil50ad0762013-08-30 15:01:15 +03002321 frag_len = skb_shinfo(skb)->frags[i].size;
Dai Haruki4669bc92008-12-17 16:51:04 -08002322
Claudiu Manoil50ad0762013-08-30 15:01:15 +03002323 lstatus = txbdp->lstatus | frag_len |
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00002324 BD_LFLAG(TXBD_READY);
Dai Haruki4669bc92008-12-17 16:51:04 -08002325
2326 /* Handle the last BD specially */
2327 if (i == nr_frags - 1)
2328 lstatus |= BD_LFLAG(TXBD_LAST | TXBD_INTERRUPT);
2329
Claudiu Manoil369ec162013-02-14 05:00:02 +00002330 bufaddr = skb_frag_dma_map(priv->dev,
Ian Campbell2234a722011-08-29 23:18:29 +00002331 &skb_shinfo(skb)->frags[i],
2332 0,
Claudiu Manoil50ad0762013-08-30 15:01:15 +03002333 frag_len,
Ian Campbell2234a722011-08-29 23:18:29 +00002334 DMA_TO_DEVICE);
Kevin Hao0a4b5a22014-12-11 14:08:41 +08002335 if (unlikely(dma_mapping_error(priv->dev, bufaddr)))
2336 goto dma_map_err;
Dai Haruki4669bc92008-12-17 16:51:04 -08002337
2338 /* set the TxBD length and buffer pointer */
2339 txbdp->bufPtr = bufaddr;
2340 txbdp->lstatus = lstatus;
2341 }
2342
2343 lstatus = txbdp_start->lstatus;
2344 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002345
Manfred Rudigier9c4886e2012-01-09 23:26:51 +00002346 /* Add TxPAL between FCB and frame if required */
2347 if (unlikely(do_tstamp)) {
2348 skb_push(skb, GMAC_TXPAL_LEN);
2349 memset(skb->data, 0, GMAC_TXPAL_LEN);
2350 }
2351
Claudiu Manoil0d0cffd2013-08-05 17:20:10 +03002352 /* Add TxFCB if required */
2353 if (fcb_len) {
Stephen Hemminger54dc79f2009-03-27 00:38:45 -07002354 fcb = gfar_add_fcb(skb);
Claudiu Manoil02d88fb2013-08-05 17:20:09 +03002355 lstatus |= BD_LFLAG(TXBD_TOE);
Claudiu Manoil0d0cffd2013-08-05 17:20:10 +03002356 }
2357
2358 /* Set up checksumming */
2359 if (do_csum) {
2360 gfar_tx_checksum(skb, fcb, fcb_len);
Claudiu Manoil02d88fb2013-08-05 17:20:09 +03002361
2362 if (unlikely(gfar_csum_errata_12(priv, (unsigned long)fcb)) ||
2363 unlikely(gfar_csum_errata_76(priv, skb->len))) {
Alex Dubov4363c2f2011-03-16 17:57:13 +00002364 __skb_pull(skb, GMAC_FCB_LEN);
2365 skb_checksum_help(skb);
Claudiu Manoil0d0cffd2013-08-05 17:20:10 +03002366 if (do_vlan || do_tstamp) {
2367 /* put back a new fcb for vlan/tstamp TOE */
2368 fcb = gfar_add_fcb(skb);
2369 } else {
2370 /* Tx TOE not used */
2371 lstatus &= ~(BD_LFLAG(TXBD_TOE));
2372 fcb = NULL;
2373 }
Alex Dubov4363c2f2011-03-16 17:57:13 +00002374 }
Kumar Gala0bbaf062005-06-20 10:54:21 -05002375 }
2376
Claudiu Manoil0d0cffd2013-08-05 17:20:10 +03002377 if (do_vlan)
Stephen Hemminger54dc79f2009-03-27 00:38:45 -07002378 gfar_tx_vlan(skb, fcb);
Kumar Gala0bbaf062005-06-20 10:54:21 -05002379
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002380 /* Setup tx hardware time stamping if requested */
2381 if (unlikely(do_tstamp)) {
Oliver Hartkopp2244d072010-08-17 08:59:14 +00002382 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002383 fcb->ptp = 1;
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002384 }
2385
Kevin Hao0a4b5a22014-12-11 14:08:41 +08002386 bufaddr = dma_map_single(priv->dev, skb->data, skb_headlen(skb),
2387 DMA_TO_DEVICE);
2388 if (unlikely(dma_mapping_error(priv->dev, bufaddr)))
2389 goto dma_map_err;
2390
2391 txbdp_start->bufPtr = bufaddr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002392
Jan Ceuleers0977f812012-06-05 03:42:12 +00002393 /* If time stamping is requested one additional TxBD must be set up. The
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002394 * first TxBD points to the FCB and must have a data length of
2395 * GMAC_FCB_LEN. The second TxBD points to the actual frame data with
2396 * the full frame length.
2397 */
2398 if (unlikely(do_tstamp)) {
Claudiu Manoil0d0cffd2013-08-05 17:20:10 +03002399 txbdp_tstamp->bufPtr = txbdp_start->bufPtr + fcb_len;
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002400 txbdp_tstamp->lstatus |= BD_LFLAG(TXBD_READY) |
Claudiu Manoil0d0cffd2013-08-05 17:20:10 +03002401 (skb_headlen(skb) - fcb_len);
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002402 lstatus |= BD_LFLAG(TXBD_CRC | TXBD_READY) | GMAC_FCB_LEN;
2403 } else {
2404 lstatus |= BD_LFLAG(TXBD_CRC | TXBD_READY) | skb_headlen(skb);
2405 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002406
Claudiu Manoil50ad0762013-08-30 15:01:15 +03002407 netdev_tx_sent_queue(txq, bytes_sent);
Paul Gortmakerd8a0f1b2012-01-06 13:51:03 -05002408
Jan Ceuleers0977f812012-06-05 03:42:12 +00002409 /* We can work in parallel with gfar_clean_tx_ring(), except
Anton Vorontsova3bc1f12009-11-10 14:11:10 +00002410 * when modifying num_txbdfree. Note that we didn't grab the lock
2411 * when we were reading the num_txbdfree and checking for available
2412 * space, that's because outside of this function it can only grow,
2413 * and once we've got needed space, it cannot suddenly disappear.
2414 *
2415 * The lock also protects us from gfar_error(), which can modify
2416 * regs->tstat and thus retrigger the transfers, which is why we
2417 * also must grab the lock before setting ready bit for the first
2418 * to be transmitted BD.
2419 */
2420 spin_lock_irqsave(&tx_queue->txlock, flags);
2421
Claudiu Manoild55398b2014-10-07 10:44:35 +03002422 gfar_wmb();
Andy Fleming7f7f5312005-11-11 12:38:59 -06002423
Dai Haruki4669bc92008-12-17 16:51:04 -08002424 txbdp_start->lstatus = lstatus;
2425
Claudiu Manoild55398b2014-10-07 10:44:35 +03002426 gfar_wmb(); /* force lstatus write before tx_skbuff */
Anton Vorontsov0eddba52010-03-03 08:18:58 +00002427
2428 tx_queue->tx_skbuff[tx_queue->skb_curtx] = skb;
2429
Dai Haruki4669bc92008-12-17 16:51:04 -08002430 /* Update the current skb pointer to the next entry we will use
Jan Ceuleers0977f812012-06-05 03:42:12 +00002431 * (wrapping if necessary)
2432 */
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002433 tx_queue->skb_curtx = (tx_queue->skb_curtx + 1) &
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00002434 TX_RING_MOD_MASK(tx_queue->tx_ring_size);
Dai Haruki4669bc92008-12-17 16:51:04 -08002435
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002436 tx_queue->cur_tx = next_txbd(txbdp, base, tx_queue->tx_ring_size);
Dai Haruki4669bc92008-12-17 16:51:04 -08002437
2438 /* reduce TxBD free count */
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002439 tx_queue->num_txbdfree -= (nr_txbds);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002440
2441 /* If the next BD still needs to be cleaned up, then the bds
Jan Ceuleers0977f812012-06-05 03:42:12 +00002442 * are full. We need to tell the kernel to stop sending us stuff.
2443 */
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002444 if (!tx_queue->num_txbdfree) {
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00002445 netif_tx_stop_queue(txq);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002446
Jeff Garzik09f75cd2007-10-03 17:41:50 -07002447 dev->stats.tx_fifo_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002448 }
2449
Linus Torvalds1da177e2005-04-16 15:20:36 -07002450 /* Tell the DMA to go go go */
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00002451 gfar_write(&regs->tstat, TSTAT_CLEAR_THALT >> tx_queue->qindex);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002452
2453 /* Unlock priv */
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002454 spin_unlock_irqrestore(&tx_queue->txlock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002455
Stephen Hemminger54dc79f2009-03-27 00:38:45 -07002456 return NETDEV_TX_OK;
Kevin Hao0a4b5a22014-12-11 14:08:41 +08002457
2458dma_map_err:
2459 txbdp = next_txbd(txbdp_start, base, tx_queue->tx_ring_size);
2460 if (do_tstamp)
2461 txbdp = next_txbd(txbdp, base, tx_queue->tx_ring_size);
2462 for (i = 0; i < nr_frags; i++) {
2463 lstatus = txbdp->lstatus;
2464 if (!(lstatus & BD_LFLAG(TXBD_READY)))
2465 break;
2466
2467 txbdp->lstatus = lstatus & ~BD_LFLAG(TXBD_READY);
2468 bufaddr = txbdp->bufPtr;
2469 dma_unmap_page(priv->dev, bufaddr, txbdp->length,
2470 DMA_TO_DEVICE);
2471 txbdp = next_txbd(txbdp, base, tx_queue->tx_ring_size);
2472 }
2473 gfar_wmb();
2474 dev_kfree_skb_any(skb);
2475 return NETDEV_TX_OK;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002476}
2477
2478/* Stops the kernel queue, and halts the controller */
2479static int gfar_close(struct net_device *dev)
2480{
2481 struct gfar_private *priv = netdev_priv(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002482
Sebastian Siewiorab939902008-08-19 21:12:45 +02002483 cancel_work_sync(&priv->reset_task);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002484 stop_gfar(dev);
2485
Andy Flemingbb40dcb2005-09-23 22:54:21 -04002486 /* Disconnect from the PHY */
2487 phy_disconnect(priv->phydev);
2488 priv->phydev = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002489
Claudiu Manoil80ec3962014-02-24 12:13:44 +02002490 gfar_free_irq(priv);
2491
Linus Torvalds1da177e2005-04-16 15:20:36 -07002492 return 0;
2493}
2494
Linus Torvalds1da177e2005-04-16 15:20:36 -07002495/* Changes the mac address if the controller is not running. */
Andy Flemingf162b9d2008-05-02 13:00:30 -05002496static int gfar_set_mac_address(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002497{
Andy Fleming7f7f5312005-11-11 12:38:59 -06002498 gfar_set_mac_for_addr(dev, 0, dev->dev_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002499
2500 return 0;
2501}
2502
Linus Torvalds1da177e2005-04-16 15:20:36 -07002503static int gfar_change_mtu(struct net_device *dev, int new_mtu)
2504{
Linus Torvalds1da177e2005-04-16 15:20:36 -07002505 struct gfar_private *priv = netdev_priv(dev);
Kumar Gala0bbaf062005-06-20 10:54:21 -05002506 int frame_size = new_mtu + ETH_HLEN;
2507
Linus Torvalds1da177e2005-04-16 15:20:36 -07002508 if ((frame_size < 64) || (frame_size > JUMBO_FRAME_SIZE)) {
Joe Perches59deab22011-06-14 08:57:47 +00002509 netif_err(priv, drv, dev, "Invalid MTU setting\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07002510 return -EINVAL;
2511 }
2512
Claudiu Manoil08511332014-02-24 12:13:45 +02002513 while (test_and_set_bit_lock(GFAR_RESETTING, &priv->state))
2514 cpu_relax();
2515
Claudiu Manoil88302642014-02-24 12:13:43 +02002516 if (dev->flags & IFF_UP)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002517 stop_gfar(dev);
2518
Linus Torvalds1da177e2005-04-16 15:20:36 -07002519 dev->mtu = new_mtu;
2520
Claudiu Manoil88302642014-02-24 12:13:43 +02002521 if (dev->flags & IFF_UP)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002522 startup_gfar(dev);
2523
Claudiu Manoil08511332014-02-24 12:13:45 +02002524 clear_bit_unlock(GFAR_RESETTING, &priv->state);
2525
Linus Torvalds1da177e2005-04-16 15:20:36 -07002526 return 0;
2527}
2528
Claudiu Manoil08511332014-02-24 12:13:45 +02002529void reset_gfar(struct net_device *ndev)
2530{
2531 struct gfar_private *priv = netdev_priv(ndev);
2532
2533 while (test_and_set_bit_lock(GFAR_RESETTING, &priv->state))
2534 cpu_relax();
2535
2536 stop_gfar(ndev);
2537 startup_gfar(ndev);
2538
2539 clear_bit_unlock(GFAR_RESETTING, &priv->state);
2540}
2541
Sebastian Siewiorab939902008-08-19 21:12:45 +02002542/* gfar_reset_task gets scheduled when a packet has not been
Linus Torvalds1da177e2005-04-16 15:20:36 -07002543 * transmitted after a set amount of time.
2544 * For now, assume that clearing out all the structures, and
Sebastian Siewiorab939902008-08-19 21:12:45 +02002545 * starting over will fix the problem.
2546 */
2547static void gfar_reset_task(struct work_struct *work)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002548{
Sebastian Siewiorab939902008-08-19 21:12:45 +02002549 struct gfar_private *priv = container_of(work, struct gfar_private,
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00002550 reset_task);
Claudiu Manoil08511332014-02-24 12:13:45 +02002551 reset_gfar(priv->ndev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002552}
2553
Sebastian Siewiorab939902008-08-19 21:12:45 +02002554static void gfar_timeout(struct net_device *dev)
2555{
2556 struct gfar_private *priv = netdev_priv(dev);
2557
2558 dev->stats.tx_errors++;
2559 schedule_work(&priv->reset_task);
2560}
2561
Eran Libertyacbc0f02010-07-07 15:54:54 -07002562static void gfar_align_skb(struct sk_buff *skb)
2563{
2564 /* We need the data buffer to be aligned properly. We will reserve
2565 * as many bytes as needed to align the data properly
2566 */
2567 skb_reserve(skb, RXBUF_ALIGNMENT -
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00002568 (((unsigned long) skb->data) & (RXBUF_ALIGNMENT - 1)));
Eran Libertyacbc0f02010-07-07 15:54:54 -07002569}
2570
Linus Torvalds1da177e2005-04-16 15:20:36 -07002571/* Interrupt Handler for Transmit complete */
Claudiu Manoilc233cf402013-03-19 07:40:02 +00002572static void gfar_clean_tx_ring(struct gfar_priv_tx_q *tx_queue)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002573{
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002574 struct net_device *dev = tx_queue->dev;
Paul Gortmakerd8a0f1b2012-01-06 13:51:03 -05002575 struct netdev_queue *txq;
Dai Harukid080cd62008-04-09 19:37:51 -05002576 struct gfar_private *priv = netdev_priv(dev);
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002577 struct txbd8 *bdp, *next = NULL;
Dai Haruki4669bc92008-12-17 16:51:04 -08002578 struct txbd8 *lbdp = NULL;
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002579 struct txbd8 *base = tx_queue->tx_bd_base;
Dai Haruki4669bc92008-12-17 16:51:04 -08002580 struct sk_buff *skb;
2581 int skb_dirtytx;
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002582 int tx_ring_size = tx_queue->tx_ring_size;
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002583 int frags = 0, nr_txbds = 0;
Dai Haruki4669bc92008-12-17 16:51:04 -08002584 int i;
Dai Harukid080cd62008-04-09 19:37:51 -05002585 int howmany = 0;
Paul Gortmakerd8a0f1b2012-01-06 13:51:03 -05002586 int tqi = tx_queue->qindex;
2587 unsigned int bytes_sent = 0;
Dai Haruki4669bc92008-12-17 16:51:04 -08002588 u32 lstatus;
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002589 size_t buflen;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002590
Paul Gortmakerd8a0f1b2012-01-06 13:51:03 -05002591 txq = netdev_get_tx_queue(dev, tqi);
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002592 bdp = tx_queue->dirty_tx;
2593 skb_dirtytx = tx_queue->skb_dirtytx;
Dai Haruki4669bc92008-12-17 16:51:04 -08002594
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002595 while ((skb = tx_queue->tx_skbuff[skb_dirtytx])) {
Anton Vorontsova3bc1f12009-11-10 14:11:10 +00002596 unsigned long flags;
2597
Dai Haruki4669bc92008-12-17 16:51:04 -08002598 frags = skb_shinfo(skb)->nr_frags;
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002599
Jan Ceuleers0977f812012-06-05 03:42:12 +00002600 /* When time stamping, one additional TxBD must be freed.
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002601 * Also, we need to dma_unmap_single() the TxPAL.
2602 */
Oliver Hartkopp2244d072010-08-17 08:59:14 +00002603 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS))
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002604 nr_txbds = frags + 2;
2605 else
2606 nr_txbds = frags + 1;
2607
2608 lbdp = skip_txbd(bdp, nr_txbds - 1, base, tx_ring_size);
Dai Haruki4669bc92008-12-17 16:51:04 -08002609
2610 lstatus = lbdp->lstatus;
2611
2612 /* Only clean completed frames */
2613 if ((lstatus & BD_LFLAG(TXBD_READY)) &&
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00002614 (lstatus & BD_LENGTH_MASK))
Linus Torvalds1da177e2005-04-16 15:20:36 -07002615 break;
2616
Oliver Hartkopp2244d072010-08-17 08:59:14 +00002617 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS)) {
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002618 next = next_txbd(bdp, base, tx_ring_size);
Manfred Rudigier9c4886e2012-01-09 23:26:51 +00002619 buflen = next->length + GMAC_FCB_LEN + GMAC_TXPAL_LEN;
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002620 } else
2621 buflen = bdp->length;
2622
Claudiu Manoil369ec162013-02-14 05:00:02 +00002623 dma_unmap_single(priv->dev, bdp->bufPtr,
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00002624 buflen, DMA_TO_DEVICE);
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002625
Oliver Hartkopp2244d072010-08-17 08:59:14 +00002626 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS)) {
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002627 struct skb_shared_hwtstamps shhwtstamps;
2628 u64 *ns = (u64*) (((u32)skb->data + 0x10) & ~0x7);
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00002629
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002630 memset(&shhwtstamps, 0, sizeof(shhwtstamps));
2631 shhwtstamps.hwtstamp = ns_to_ktime(*ns);
Manfred Rudigier9c4886e2012-01-09 23:26:51 +00002632 skb_pull(skb, GMAC_FCB_LEN + GMAC_TXPAL_LEN);
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002633 skb_tstamp_tx(skb, &shhwtstamps);
2634 bdp->lstatus &= BD_LFLAG(TXBD_WRAP);
2635 bdp = next;
2636 }
Dai Haruki4669bc92008-12-17 16:51:04 -08002637
2638 bdp->lstatus &= BD_LFLAG(TXBD_WRAP);
2639 bdp = next_txbd(bdp, base, tx_ring_size);
2640
2641 for (i = 0; i < frags; i++) {
Claudiu Manoil369ec162013-02-14 05:00:02 +00002642 dma_unmap_page(priv->dev, bdp->bufPtr,
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00002643 bdp->length, DMA_TO_DEVICE);
Dai Haruki4669bc92008-12-17 16:51:04 -08002644 bdp->lstatus &= BD_LFLAG(TXBD_WRAP);
2645 bdp = next_txbd(bdp, base, tx_ring_size);
2646 }
2647
Claudiu Manoil50ad0762013-08-30 15:01:15 +03002648 bytes_sent += GFAR_CB(skb)->bytes_sent;
Paul Gortmakerd8a0f1b2012-01-06 13:51:03 -05002649
Eric Dumazetacb600d2012-10-05 06:23:55 +00002650 dev_kfree_skb_any(skb);
Andy Fleming0fd56bb2009-02-04 16:43:16 -08002651
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002652 tx_queue->tx_skbuff[skb_dirtytx] = NULL;
Dai Haruki4669bc92008-12-17 16:51:04 -08002653
2654 skb_dirtytx = (skb_dirtytx + 1) &
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00002655 TX_RING_MOD_MASK(tx_ring_size);
Dai Haruki4669bc92008-12-17 16:51:04 -08002656
Dai Harukid080cd62008-04-09 19:37:51 -05002657 howmany++;
Anton Vorontsova3bc1f12009-11-10 14:11:10 +00002658 spin_lock_irqsave(&tx_queue->txlock, flags);
Manfred Rudigierf0ee7ac2010-04-08 23:10:35 +00002659 tx_queue->num_txbdfree += nr_txbds;
Anton Vorontsova3bc1f12009-11-10 14:11:10 +00002660 spin_unlock_irqrestore(&tx_queue->txlock, flags);
Dai Haruki4669bc92008-12-17 16:51:04 -08002661 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002662
Dai Haruki4669bc92008-12-17 16:51:04 -08002663 /* If we freed a buffer, we can restart transmission, if necessary */
Claudiu Manoil08511332014-02-24 12:13:45 +02002664 if (tx_queue->num_txbdfree &&
2665 netif_tx_queue_stopped(txq) &&
2666 !(test_bit(GFAR_DOWN, &priv->state)))
2667 netif_wake_subqueue(priv->ndev, tqi);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002668
Dai Haruki4669bc92008-12-17 16:51:04 -08002669 /* Update dirty indicators */
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002670 tx_queue->skb_dirtytx = skb_dirtytx;
2671 tx_queue->dirty_tx = bdp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002672
Paul Gortmakerd8a0f1b2012-01-06 13:51:03 -05002673 netdev_tx_completed_queue(txq, howmany, bytes_sent);
Dai Harukid080cd62008-04-09 19:37:51 -05002674}
2675
Jan Ceuleers2281a0f2012-06-05 03:42:11 +00002676static struct sk_buff *gfar_alloc_skb(struct net_device *dev)
Eran Libertyacbc0f02010-07-07 15:54:54 -07002677{
2678 struct gfar_private *priv = netdev_priv(dev);
Eric Dumazetacb600d2012-10-05 06:23:55 +00002679 struct sk_buff *skb;
Eran Libertyacbc0f02010-07-07 15:54:54 -07002680
2681 skb = netdev_alloc_skb(dev, priv->rx_buffer_size + RXBUF_ALIGNMENT);
2682 if (!skb)
2683 return NULL;
2684
2685 gfar_align_skb(skb);
2686
2687 return skb;
2688}
Andy Fleming815b97c2008-04-22 17:18:29 -05002689
Kevin Hao91c53f762014-12-24 14:05:44 +08002690static struct sk_buff *gfar_new_skb(struct net_device *dev, dma_addr_t *bufaddr)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002691{
Kevin Hao0a4b5a22014-12-11 14:08:41 +08002692 struct gfar_private *priv = netdev_priv(dev);
2693 struct sk_buff *skb;
2694 dma_addr_t addr;
2695
2696 skb = gfar_alloc_skb(dev);
2697 if (!skb)
2698 return NULL;
2699
2700 addr = dma_map_single(priv->dev, skb->data,
2701 priv->rx_buffer_size, DMA_FROM_DEVICE);
2702 if (unlikely(dma_mapping_error(priv->dev, addr))) {
2703 dev_kfree_skb_any(skb);
2704 return NULL;
2705 }
2706
2707 *bufaddr = addr;
2708 return skb;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002709}
2710
Li Yang298e1a92007-10-16 14:18:13 +08002711static inline void count_errors(unsigned short status, struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002712{
Li Yang298e1a92007-10-16 14:18:13 +08002713 struct gfar_private *priv = netdev_priv(dev);
Jeff Garzik09f75cd2007-10-03 17:41:50 -07002714 struct net_device_stats *stats = &dev->stats;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002715 struct gfar_extra_stats *estats = &priv->extra_stats;
2716
Jan Ceuleers0977f812012-06-05 03:42:12 +00002717 /* If the packet was truncated, none of the other errors matter */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002718 if (status & RXBD_TRUNCATED) {
2719 stats->rx_length_errors++;
2720
Paul Gortmaker212079d2013-02-12 15:38:19 -05002721 atomic64_inc(&estats->rx_trunc);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002722
2723 return;
2724 }
2725 /* Count the errors, if there were any */
2726 if (status & (RXBD_LARGE | RXBD_SHORT)) {
2727 stats->rx_length_errors++;
2728
2729 if (status & RXBD_LARGE)
Paul Gortmaker212079d2013-02-12 15:38:19 -05002730 atomic64_inc(&estats->rx_large);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002731 else
Paul Gortmaker212079d2013-02-12 15:38:19 -05002732 atomic64_inc(&estats->rx_short);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002733 }
2734 if (status & RXBD_NONOCTET) {
2735 stats->rx_frame_errors++;
Paul Gortmaker212079d2013-02-12 15:38:19 -05002736 atomic64_inc(&estats->rx_nonoctet);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002737 }
2738 if (status & RXBD_CRCERR) {
Paul Gortmaker212079d2013-02-12 15:38:19 -05002739 atomic64_inc(&estats->rx_crcerr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002740 stats->rx_crc_errors++;
2741 }
2742 if (status & RXBD_OVERRUN) {
Paul Gortmaker212079d2013-02-12 15:38:19 -05002743 atomic64_inc(&estats->rx_overrun);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002744 stats->rx_crc_errors++;
2745 }
2746}
2747
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00002748irqreturn_t gfar_receive(int irq, void *grp_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002749{
Claudiu Manoilaeb12c52014-03-07 14:42:45 +02002750 struct gfar_priv_grp *grp = (struct gfar_priv_grp *)grp_id;
2751 unsigned long flags;
2752 u32 imask;
2753
2754 if (likely(napi_schedule_prep(&grp->napi_rx))) {
2755 spin_lock_irqsave(&grp->grplock, flags);
2756 imask = gfar_read(&grp->regs->imask);
2757 imask &= IMASK_RX_DISABLED;
2758 gfar_write(&grp->regs->imask, imask);
2759 spin_unlock_irqrestore(&grp->grplock, flags);
2760 __napi_schedule(&grp->napi_rx);
2761 } else {
2762 /* Clear IEVENT, so interrupts aren't called again
2763 * because of the packets that have already arrived.
2764 */
2765 gfar_write(&grp->regs->ievent, IEVENT_RX_MASK);
2766 }
2767
2768 return IRQ_HANDLED;
2769}
2770
2771/* Interrupt Handler for Transmit complete */
2772static irqreturn_t gfar_transmit(int irq, void *grp_id)
2773{
2774 struct gfar_priv_grp *grp = (struct gfar_priv_grp *)grp_id;
2775 unsigned long flags;
2776 u32 imask;
2777
2778 if (likely(napi_schedule_prep(&grp->napi_tx))) {
2779 spin_lock_irqsave(&grp->grplock, flags);
2780 imask = gfar_read(&grp->regs->imask);
2781 imask &= IMASK_TX_DISABLED;
2782 gfar_write(&grp->regs->imask, imask);
2783 spin_unlock_irqrestore(&grp->grplock, flags);
2784 __napi_schedule(&grp->napi_tx);
2785 } else {
2786 /* Clear IEVENT, so interrupts aren't called again
2787 * because of the packets that have already arrived.
2788 */
2789 gfar_write(&grp->regs->ievent, IEVENT_TX_MASK);
2790 }
2791
Linus Torvalds1da177e2005-04-16 15:20:36 -07002792 return IRQ_HANDLED;
2793}
2794
Kumar Gala0bbaf062005-06-20 10:54:21 -05002795static inline void gfar_rx_checksum(struct sk_buff *skb, struct rxfcb *fcb)
2796{
2797 /* If valid headers were found, and valid sums
2798 * were verified, then we tell the kernel that no
Jan Ceuleers0977f812012-06-05 03:42:12 +00002799 * checksumming is necessary. Otherwise, it is [FIXME]
2800 */
Andy Fleming7f7f5312005-11-11 12:38:59 -06002801 if ((fcb->flags & RXFCB_CSUM_MASK) == (RXFCB_CIP | RXFCB_CTU))
Kumar Gala0bbaf062005-06-20 10:54:21 -05002802 skb->ip_summed = CHECKSUM_UNNECESSARY;
2803 else
Eric Dumazetbc8acf22010-09-02 13:07:41 -07002804 skb_checksum_none_assert(skb);
Kumar Gala0bbaf062005-06-20 10:54:21 -05002805}
2806
2807
Jan Ceuleers0977f812012-06-05 03:42:12 +00002808/* gfar_process_frame() -- handle one incoming packet if skb isn't NULL. */
Claudiu Manoil61db26c2013-02-14 05:00:05 +00002809static void gfar_process_frame(struct net_device *dev, struct sk_buff *skb,
2810 int amount_pull, struct napi_struct *napi)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002811{
2812 struct gfar_private *priv = netdev_priv(dev);
Kumar Gala0bbaf062005-06-20 10:54:21 -05002813 struct rxfcb *fcb = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002814
Dai Haruki2c2db482008-12-16 15:31:15 -08002815 /* fcb is at the beginning if exists */
2816 fcb = (struct rxfcb *)skb->data;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002817
Jan Ceuleers0977f812012-06-05 03:42:12 +00002818 /* Remove the FCB from the skb
2819 * Remove the padded bytes, if there are any
2820 */
Sandeep Gopalpetf74dac02009-12-24 03:13:06 +00002821 if (amount_pull) {
2822 skb_record_rx_queue(skb, fcb->rq);
Dai Haruki2c2db482008-12-16 15:31:15 -08002823 skb_pull(skb, amount_pull);
Sandeep Gopalpetf74dac02009-12-24 03:13:06 +00002824 }
Kumar Gala0bbaf062005-06-20 10:54:21 -05002825
Manfred Rudigiercc772ab2010-04-08 23:10:03 +00002826 /* Get receive timestamp from the skb */
2827 if (priv->hwts_rx_en) {
2828 struct skb_shared_hwtstamps *shhwtstamps = skb_hwtstamps(skb);
2829 u64 *ns = (u64 *) skb->data;
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00002830
Manfred Rudigiercc772ab2010-04-08 23:10:03 +00002831 memset(shhwtstamps, 0, sizeof(*shhwtstamps));
2832 shhwtstamps->hwtstamp = ns_to_ktime(*ns);
2833 }
2834
2835 if (priv->padding)
2836 skb_pull(skb, priv->padding);
2837
Michał Mirosław8b3afe92011-04-15 04:50:50 +00002838 if (dev->features & NETIF_F_RXCSUM)
Dai Haruki2c2db482008-12-16 15:31:15 -08002839 gfar_rx_checksum(skb, fcb);
Kumar Gala0bbaf062005-06-20 10:54:21 -05002840
Dai Haruki2c2db482008-12-16 15:31:15 -08002841 /* Tell the skb what kind of packet this is */
2842 skb->protocol = eth_type_trans(skb, dev);
Kumar Gala0bbaf062005-06-20 10:54:21 -05002843
Patrick McHardyf6469682013-04-19 02:04:27 +00002844 /* There's need to check for NETIF_F_HW_VLAN_CTAG_RX here.
David S. Miller823dcd22011-08-20 10:39:12 -07002845 * Even if vlan rx accel is disabled, on some chips
2846 * RXFCB_VLN is pseudo randomly set.
2847 */
Patrick McHardyf6469682013-04-19 02:04:27 +00002848 if (dev->features & NETIF_F_HW_VLAN_CTAG_RX &&
David S. Miller823dcd22011-08-20 10:39:12 -07002849 fcb->flags & RXFCB_VLN)
David S. Millere5905c82013-04-22 19:24:19 -04002850 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), fcb->vlctl);
Jiri Pirko87c288c2011-07-20 04:54:19 +00002851
Dai Haruki2c2db482008-12-16 15:31:15 -08002852 /* Send the packet up the stack */
Claudiu Manoil953d2762013-03-21 03:12:15 +00002853 napi_gro_receive(napi, skb);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002854
Linus Torvalds1da177e2005-04-16 15:20:36 -07002855}
2856
2857/* gfar_clean_rx_ring() -- Processes each frame in the rx ring
Jan Ceuleers2281a0f2012-06-05 03:42:11 +00002858 * until the budget/quota has been reached. Returns the number
2859 * of frames handled
Linus Torvalds1da177e2005-04-16 15:20:36 -07002860 */
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002861int gfar_clean_rx_ring(struct gfar_priv_rx_q *rx_queue, int rx_work_limit)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002862{
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002863 struct net_device *dev = rx_queue->dev;
Andy Fleming31de1982008-12-16 15:33:40 -08002864 struct rxbd8 *bdp, *base;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002865 struct sk_buff *skb;
Dai Haruki2c2db482008-12-16 15:31:15 -08002866 int pkt_len;
2867 int amount_pull;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002868 int howmany = 0;
2869 struct gfar_private *priv = netdev_priv(dev);
2870
2871 /* Get the first full descriptor */
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002872 bdp = rx_queue->cur_rx;
2873 base = rx_queue->rx_bd_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002874
Claudiu Manoilba779712013-02-14 05:00:07 +00002875 amount_pull = priv->uses_rxfcb ? GMAC_FCB_LEN : 0;
Dai Haruki2c2db482008-12-16 15:31:15 -08002876
Linus Torvalds1da177e2005-04-16 15:20:36 -07002877 while (!((bdp->status & RXBD_EMPTY) || (--rx_work_limit < 0))) {
Andy Fleming815b97c2008-04-22 17:18:29 -05002878 struct sk_buff *newskb;
Kevin Hao0a4b5a22014-12-11 14:08:41 +08002879 dma_addr_t bufaddr;
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00002880
Scott Wood3b6330c2007-05-16 15:06:59 -05002881 rmb();
Andy Fleming815b97c2008-04-22 17:18:29 -05002882
2883 /* Add another skb for the future */
Kevin Hao0a4b5a22014-12-11 14:08:41 +08002884 newskb = gfar_new_skb(dev, &bufaddr);
Andy Fleming815b97c2008-04-22 17:18:29 -05002885
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002886 skb = rx_queue->rx_skbuff[rx_queue->skb_currx];
Linus Torvalds1da177e2005-04-16 15:20:36 -07002887
Claudiu Manoil369ec162013-02-14 05:00:02 +00002888 dma_unmap_single(priv->dev, bdp->bufPtr,
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00002889 priv->rx_buffer_size, DMA_FROM_DEVICE);
Andy Fleming81183052008-11-12 10:07:11 -06002890
Anton Vorontsov63b88b92010-06-11 10:51:03 +00002891 if (unlikely(!(bdp->status & RXBD_ERR) &&
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00002892 bdp->length > priv->rx_buffer_size))
Anton Vorontsov63b88b92010-06-11 10:51:03 +00002893 bdp->status = RXBD_LARGE;
2894
Andy Fleming815b97c2008-04-22 17:18:29 -05002895 /* We drop the frame if we failed to allocate a new buffer */
2896 if (unlikely(!newskb || !(bdp->status & RXBD_LAST) ||
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00002897 bdp->status & RXBD_ERR)) {
Andy Fleming815b97c2008-04-22 17:18:29 -05002898 count_errors(bdp->status, dev);
2899
Kevin Hao0a4b5a22014-12-11 14:08:41 +08002900 if (unlikely(!newskb)) {
Andy Fleming815b97c2008-04-22 17:18:29 -05002901 newskb = skb;
Kevin Hao0a4b5a22014-12-11 14:08:41 +08002902 bufaddr = bdp->bufPtr;
2903 } else if (skb)
Eric Dumazetacb600d2012-10-05 06:23:55 +00002904 dev_kfree_skb(skb);
Andy Fleming815b97c2008-04-22 17:18:29 -05002905 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002906 /* Increment the number of packets */
Sandeep Gopalpeta7f38042009-12-16 01:15:07 +00002907 rx_queue->stats.rx_packets++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002908 howmany++;
2909
Dai Haruki2c2db482008-12-16 15:31:15 -08002910 if (likely(skb)) {
2911 pkt_len = bdp->length - ETH_FCS_LEN;
2912 /* Remove the FCS from the packet length */
2913 skb_put(skb, pkt_len);
Sandeep Gopalpeta7f38042009-12-16 01:15:07 +00002914 rx_queue->stats.rx_bytes += pkt_len;
Sandeep Gopalpetf74dac02009-12-24 03:13:06 +00002915 skb_record_rx_queue(skb, rx_queue->qindex);
Wu Jiajun-B06378cd754a52012-04-19 22:54:35 +00002916 gfar_process_frame(dev, skb, amount_pull,
Claudiu Manoilaeb12c52014-03-07 14:42:45 +02002917 &rx_queue->grp->napi_rx);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002918
Dai Haruki2c2db482008-12-16 15:31:15 -08002919 } else {
Joe Perches59deab22011-06-14 08:57:47 +00002920 netif_warn(priv, rx_err, dev, "Missing skb!\n");
Sandeep Gopalpeta7f38042009-12-16 01:15:07 +00002921 rx_queue->stats.rx_dropped++;
Paul Gortmaker212079d2013-02-12 15:38:19 -05002922 atomic64_inc(&priv->extra_stats.rx_skbmissing);
Dai Haruki2c2db482008-12-16 15:31:15 -08002923 }
2924
Linus Torvalds1da177e2005-04-16 15:20:36 -07002925 }
2926
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002927 rx_queue->rx_skbuff[rx_queue->skb_currx] = newskb;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002928
Andy Fleming815b97c2008-04-22 17:18:29 -05002929 /* Setup the new bdp */
Kevin Hao0a4b5a22014-12-11 14:08:41 +08002930 gfar_init_rxbdp(rx_queue, bdp, bufaddr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002931
Matei Pavaluca45b679c92014-10-27 10:42:44 +02002932 /* Update Last Free RxBD pointer for LFC */
2933 if (unlikely(rx_queue->rfbptr && priv->tx_actual_en))
2934 gfar_write(rx_queue->rfbptr, (u32)bdp);
2935
Linus Torvalds1da177e2005-04-16 15:20:36 -07002936 /* Update to the next pointer */
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002937 bdp = next_bd(bdp, base, rx_queue->rx_ring_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002938
2939 /* update to point at the next skb */
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00002940 rx_queue->skb_currx = (rx_queue->skb_currx + 1) &
2941 RX_RING_MOD_MASK(rx_queue->rx_ring_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002942 }
2943
2944 /* Update the current rxbd pointer to be the next one */
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00002945 rx_queue->cur_rx = bdp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002946
Linus Torvalds1da177e2005-04-16 15:20:36 -07002947 return howmany;
2948}
2949
Claudiu Manoilaeb12c52014-03-07 14:42:45 +02002950static int gfar_poll_rx_sq(struct napi_struct *napi, int budget)
Claudiu Manoil5eaedf32013-06-10 20:19:48 +03002951{
2952 struct gfar_priv_grp *gfargrp =
Claudiu Manoilaeb12c52014-03-07 14:42:45 +02002953 container_of(napi, struct gfar_priv_grp, napi_rx);
Claudiu Manoil5eaedf32013-06-10 20:19:48 +03002954 struct gfar __iomem *regs = gfargrp->regs;
Claudiu Manoil71ff9e32014-03-07 14:42:46 +02002955 struct gfar_priv_rx_q *rx_queue = gfargrp->rx_queue;
Claudiu Manoil5eaedf32013-06-10 20:19:48 +03002956 int work_done = 0;
2957
2958 /* Clear IEVENT, so interrupts aren't called again
2959 * because of the packets that have already arrived
2960 */
Claudiu Manoilaeb12c52014-03-07 14:42:45 +02002961 gfar_write(&regs->ievent, IEVENT_RX_MASK);
Claudiu Manoil5eaedf32013-06-10 20:19:48 +03002962
2963 work_done = gfar_clean_rx_ring(rx_queue, budget);
2964
2965 if (work_done < budget) {
Claudiu Manoilaeb12c52014-03-07 14:42:45 +02002966 u32 imask;
Claudiu Manoil5eaedf32013-06-10 20:19:48 +03002967 napi_complete(napi);
2968 /* Clear the halt bit in RSTAT */
2969 gfar_write(&regs->rstat, gfargrp->rstat);
2970
Claudiu Manoilaeb12c52014-03-07 14:42:45 +02002971 spin_lock_irq(&gfargrp->grplock);
2972 imask = gfar_read(&regs->imask);
2973 imask |= IMASK_RX_DEFAULT;
2974 gfar_write(&regs->imask, imask);
2975 spin_unlock_irq(&gfargrp->grplock);
Claudiu Manoil5eaedf32013-06-10 20:19:48 +03002976 }
2977
2978 return work_done;
2979}
2980
Claudiu Manoilaeb12c52014-03-07 14:42:45 +02002981static int gfar_poll_tx_sq(struct napi_struct *napi, int budget)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002982{
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00002983 struct gfar_priv_grp *gfargrp =
Claudiu Manoilaeb12c52014-03-07 14:42:45 +02002984 container_of(napi, struct gfar_priv_grp, napi_tx);
2985 struct gfar __iomem *regs = gfargrp->regs;
Claudiu Manoil71ff9e32014-03-07 14:42:46 +02002986 struct gfar_priv_tx_q *tx_queue = gfargrp->tx_queue;
Claudiu Manoilaeb12c52014-03-07 14:42:45 +02002987 u32 imask;
2988
2989 /* Clear IEVENT, so interrupts aren't called again
2990 * because of the packets that have already arrived
2991 */
2992 gfar_write(&regs->ievent, IEVENT_TX_MASK);
2993
2994 /* run Tx cleanup to completion */
2995 if (tx_queue->tx_skbuff[tx_queue->skb_dirtytx])
2996 gfar_clean_tx_ring(tx_queue);
2997
2998 napi_complete(napi);
2999
3000 spin_lock_irq(&gfargrp->grplock);
3001 imask = gfar_read(&regs->imask);
3002 imask |= IMASK_TX_DEFAULT;
3003 gfar_write(&regs->imask, imask);
3004 spin_unlock_irq(&gfargrp->grplock);
3005
3006 return 0;
3007}
3008
3009static int gfar_poll_rx(struct napi_struct *napi, int budget)
3010{
3011 struct gfar_priv_grp *gfargrp =
3012 container_of(napi, struct gfar_priv_grp, napi_rx);
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00003013 struct gfar_private *priv = gfargrp->priv;
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00003014 struct gfar __iomem *regs = gfargrp->regs;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00003015 struct gfar_priv_rx_q *rx_queue = NULL;
Claudiu Manoilc233cf402013-03-19 07:40:02 +00003016 int work_done = 0, work_done_per_q = 0;
Claudiu Manoil39c0a0d2013-03-21 03:12:13 +00003017 int i, budget_per_q = 0;
Claudiu Manoil6be5ed32013-03-19 07:40:03 +00003018 unsigned long rstat_rxf;
3019 int num_act_queues;
Dai Harukid080cd62008-04-09 19:37:51 -05003020
Dai Haruki8c7396a2008-12-17 16:52:00 -08003021 /* Clear IEVENT, so interrupts aren't called again
Jan Ceuleers0977f812012-06-05 03:42:12 +00003022 * because of the packets that have already arrived
3023 */
Claudiu Manoilaeb12c52014-03-07 14:42:45 +02003024 gfar_write(&regs->ievent, IEVENT_RX_MASK);
Dai Haruki8c7396a2008-12-17 16:52:00 -08003025
Claudiu Manoil6be5ed32013-03-19 07:40:03 +00003026 rstat_rxf = gfar_read(&regs->rstat) & RSTAT_RXF_MASK;
3027
3028 num_act_queues = bitmap_weight(&rstat_rxf, MAX_RX_QS);
3029 if (num_act_queues)
3030 budget_per_q = budget/num_act_queues;
3031
Claudiu Manoil3ba405d2013-10-14 17:05:09 +03003032 for_each_set_bit(i, &gfargrp->rx_bit_map, priv->num_rx_queues) {
3033 /* skip queue if not active */
3034 if (!(rstat_rxf & (RSTAT_CLEAR_RXF0 >> i)))
3035 continue;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00003036
Claudiu Manoil3ba405d2013-10-14 17:05:09 +03003037 rx_queue = priv->rx_queue[i];
3038 work_done_per_q =
3039 gfar_clean_rx_ring(rx_queue, budget_per_q);
3040 work_done += work_done_per_q;
Claudiu Manoilc233cf402013-03-19 07:40:02 +00003041
Claudiu Manoil3ba405d2013-10-14 17:05:09 +03003042 /* finished processing this queue */
3043 if (work_done_per_q < budget_per_q) {
3044 /* clear active queue hw indication */
3045 gfar_write(&regs->rstat,
3046 RSTAT_CLEAR_RXF0 >> i);
3047 num_act_queues--;
Claudiu Manoil6be5ed32013-03-19 07:40:03 +00003048
Claudiu Manoil3ba405d2013-10-14 17:05:09 +03003049 if (!num_act_queues)
3050 break;
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00003051 }
Claudiu Manoil3ba405d2013-10-14 17:05:09 +03003052 }
Claudiu Manoilc233cf402013-03-19 07:40:02 +00003053
Claudiu Manoilaeb12c52014-03-07 14:42:45 +02003054 if (!num_act_queues) {
3055 u32 imask;
Claudiu Manoil3ba405d2013-10-14 17:05:09 +03003056 napi_complete(napi);
Claudiu Manoilc233cf402013-03-19 07:40:02 +00003057
Claudiu Manoil3ba405d2013-10-14 17:05:09 +03003058 /* Clear the halt bit in RSTAT */
3059 gfar_write(&regs->rstat, gfargrp->rstat);
Claudiu Manoilc233cf402013-03-19 07:40:02 +00003060
Claudiu Manoilaeb12c52014-03-07 14:42:45 +02003061 spin_lock_irq(&gfargrp->grplock);
3062 imask = gfar_read(&regs->imask);
3063 imask |= IMASK_RX_DEFAULT;
3064 gfar_write(&regs->imask, imask);
3065 spin_unlock_irq(&gfargrp->grplock);
Dai Harukid080cd62008-04-09 19:37:51 -05003066 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07003067
Claudiu Manoilc233cf402013-03-19 07:40:02 +00003068 return work_done;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003069}
Linus Torvalds1da177e2005-04-16 15:20:36 -07003070
Claudiu Manoilaeb12c52014-03-07 14:42:45 +02003071static int gfar_poll_tx(struct napi_struct *napi, int budget)
3072{
3073 struct gfar_priv_grp *gfargrp =
3074 container_of(napi, struct gfar_priv_grp, napi_tx);
3075 struct gfar_private *priv = gfargrp->priv;
3076 struct gfar __iomem *regs = gfargrp->regs;
3077 struct gfar_priv_tx_q *tx_queue = NULL;
3078 int has_tx_work = 0;
3079 int i;
3080
3081 /* Clear IEVENT, so interrupts aren't called again
3082 * because of the packets that have already arrived
3083 */
3084 gfar_write(&regs->ievent, IEVENT_TX_MASK);
3085
3086 for_each_set_bit(i, &gfargrp->tx_bit_map, priv->num_tx_queues) {
3087 tx_queue = priv->tx_queue[i];
3088 /* run Tx cleanup to completion */
3089 if (tx_queue->tx_skbuff[tx_queue->skb_dirtytx]) {
3090 gfar_clean_tx_ring(tx_queue);
3091 has_tx_work = 1;
3092 }
3093 }
3094
3095 if (!has_tx_work) {
3096 u32 imask;
3097 napi_complete(napi);
3098
3099 spin_lock_irq(&gfargrp->grplock);
3100 imask = gfar_read(&regs->imask);
3101 imask |= IMASK_TX_DEFAULT;
3102 gfar_write(&regs->imask, imask);
3103 spin_unlock_irq(&gfargrp->grplock);
3104 }
3105
3106 return 0;
3107}
3108
3109
Vitaly Woolf2d71c22006-11-07 13:27:02 +03003110#ifdef CONFIG_NET_POLL_CONTROLLER
Jan Ceuleers0977f812012-06-05 03:42:12 +00003111/* Polling 'interrupt' - used by things like netconsole to send skbs
Vitaly Woolf2d71c22006-11-07 13:27:02 +03003112 * without having to re-enable interrupts. It's not called while
3113 * the interrupt routine is executing.
3114 */
3115static void gfar_netpoll(struct net_device *dev)
3116{
3117 struct gfar_private *priv = netdev_priv(dev);
Jan Ceuleers3a2e16c2012-06-05 03:42:14 +00003118 int i;
Vitaly Woolf2d71c22006-11-07 13:27:02 +03003119
3120 /* If the device has multiple interrupts, run tx/rx */
Andy Flemingb31a1d82008-12-16 15:29:15 -08003121 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00003122 for (i = 0; i < priv->num_grps; i++) {
Paul Gortmaker62ed8392013-02-24 05:38:31 +00003123 struct gfar_priv_grp *grp = &priv->gfargrp[i];
3124
3125 disable_irq(gfar_irq(grp, TX)->irq);
3126 disable_irq(gfar_irq(grp, RX)->irq);
3127 disable_irq(gfar_irq(grp, ER)->irq);
3128 gfar_interrupt(gfar_irq(grp, TX)->irq, grp);
3129 enable_irq(gfar_irq(grp, ER)->irq);
3130 enable_irq(gfar_irq(grp, RX)->irq);
3131 enable_irq(gfar_irq(grp, TX)->irq);
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00003132 }
Vitaly Woolf2d71c22006-11-07 13:27:02 +03003133 } else {
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00003134 for (i = 0; i < priv->num_grps; i++) {
Paul Gortmaker62ed8392013-02-24 05:38:31 +00003135 struct gfar_priv_grp *grp = &priv->gfargrp[i];
3136
3137 disable_irq(gfar_irq(grp, TX)->irq);
3138 gfar_interrupt(gfar_irq(grp, TX)->irq, grp);
3139 enable_irq(gfar_irq(grp, TX)->irq);
Anton Vorontsov43de0042009-12-09 02:52:19 -08003140 }
Vitaly Woolf2d71c22006-11-07 13:27:02 +03003141 }
3142}
3143#endif
3144
Linus Torvalds1da177e2005-04-16 15:20:36 -07003145/* The interrupt handler for devices with one interrupt */
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00003146static irqreturn_t gfar_interrupt(int irq, void *grp_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003147{
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00003148 struct gfar_priv_grp *gfargrp = grp_id;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003149
3150 /* Save ievent for future reference */
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00003151 u32 events = gfar_read(&gfargrp->regs->ievent);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003152
Linus Torvalds1da177e2005-04-16 15:20:36 -07003153 /* Check for reception */
Sergei Shtylyov538cc7e2007-02-15 17:56:01 +04003154 if (events & IEVENT_RX_MASK)
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00003155 gfar_receive(irq, grp_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003156
3157 /* Check for transmit completion */
Sergei Shtylyov538cc7e2007-02-15 17:56:01 +04003158 if (events & IEVENT_TX_MASK)
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00003159 gfar_transmit(irq, grp_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003160
Sergei Shtylyov538cc7e2007-02-15 17:56:01 +04003161 /* Check for errors */
3162 if (events & IEVENT_ERR_MASK)
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00003163 gfar_error(irq, grp_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003164
3165 return IRQ_HANDLED;
3166}
3167
Linus Torvalds1da177e2005-04-16 15:20:36 -07003168/* Called every time the controller might need to be made
3169 * aware of new link state. The PHY code conveys this
Andy Flemingbb40dcb2005-09-23 22:54:21 -04003170 * information through variables in the phydev structure, and this
Linus Torvalds1da177e2005-04-16 15:20:36 -07003171 * function converts those variables into the appropriate
3172 * register values, and can bring down the device if needed.
3173 */
3174static void adjust_link(struct net_device *dev)
3175{
3176 struct gfar_private *priv = netdev_priv(dev);
Andy Flemingbb40dcb2005-09-23 22:54:21 -04003177 struct phy_device *phydev = priv->phydev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003178
Claudiu Manoil6ce29b02014-04-30 14:27:21 +03003179 if (unlikely(phydev->link != priv->oldlink ||
Guenter Roeck0ae93b22015-03-02 12:03:27 -08003180 (phydev->link && (phydev->duplex != priv->oldduplex ||
3181 phydev->speed != priv->oldspeed))))
Claudiu Manoil6ce29b02014-04-30 14:27:21 +03003182 gfar_update_link_state(priv);
Andy Flemingbb40dcb2005-09-23 22:54:21 -04003183}
Linus Torvalds1da177e2005-04-16 15:20:36 -07003184
3185/* Update the hash table based on the current list of multicast
3186 * addresses we subscribe to. Also, change the promiscuity of
3187 * the device based on the flags (this function is called
Jan Ceuleers0977f812012-06-05 03:42:12 +00003188 * whenever dev->flags is changed
3189 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07003190static void gfar_set_multi(struct net_device *dev)
3191{
Jiri Pirko22bedad32010-04-01 21:22:57 +00003192 struct netdev_hw_addr *ha;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003193 struct gfar_private *priv = netdev_priv(dev);
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00003194 struct gfar __iomem *regs = priv->gfargrp[0].regs;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003195 u32 tempval;
3196
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00003197 if (dev->flags & IFF_PROMISC) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003198 /* Set RCTRL to PROM */
3199 tempval = gfar_read(&regs->rctrl);
3200 tempval |= RCTRL_PROM;
3201 gfar_write(&regs->rctrl, tempval);
3202 } else {
3203 /* Set RCTRL to not PROM */
3204 tempval = gfar_read(&regs->rctrl);
3205 tempval &= ~(RCTRL_PROM);
3206 gfar_write(&regs->rctrl, tempval);
3207 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003208
Sandeep Gopalpeta12f8012009-11-02 07:03:00 +00003209 if (dev->flags & IFF_ALLMULTI) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003210 /* Set the hash to rx all multicast frames */
Kumar Gala0bbaf062005-06-20 10:54:21 -05003211 gfar_write(&regs->igaddr0, 0xffffffff);
3212 gfar_write(&regs->igaddr1, 0xffffffff);
3213 gfar_write(&regs->igaddr2, 0xffffffff);
3214 gfar_write(&regs->igaddr3, 0xffffffff);
3215 gfar_write(&regs->igaddr4, 0xffffffff);
3216 gfar_write(&regs->igaddr5, 0xffffffff);
3217 gfar_write(&regs->igaddr6, 0xffffffff);
3218 gfar_write(&regs->igaddr7, 0xffffffff);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003219 gfar_write(&regs->gaddr0, 0xffffffff);
3220 gfar_write(&regs->gaddr1, 0xffffffff);
3221 gfar_write(&regs->gaddr2, 0xffffffff);
3222 gfar_write(&regs->gaddr3, 0xffffffff);
3223 gfar_write(&regs->gaddr4, 0xffffffff);
3224 gfar_write(&regs->gaddr5, 0xffffffff);
3225 gfar_write(&regs->gaddr6, 0xffffffff);
3226 gfar_write(&regs->gaddr7, 0xffffffff);
3227 } else {
Andy Fleming7f7f5312005-11-11 12:38:59 -06003228 int em_num;
3229 int idx;
3230
Linus Torvalds1da177e2005-04-16 15:20:36 -07003231 /* zero out the hash */
Kumar Gala0bbaf062005-06-20 10:54:21 -05003232 gfar_write(&regs->igaddr0, 0x0);
3233 gfar_write(&regs->igaddr1, 0x0);
3234 gfar_write(&regs->igaddr2, 0x0);
3235 gfar_write(&regs->igaddr3, 0x0);
3236 gfar_write(&regs->igaddr4, 0x0);
3237 gfar_write(&regs->igaddr5, 0x0);
3238 gfar_write(&regs->igaddr6, 0x0);
3239 gfar_write(&regs->igaddr7, 0x0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003240 gfar_write(&regs->gaddr0, 0x0);
3241 gfar_write(&regs->gaddr1, 0x0);
3242 gfar_write(&regs->gaddr2, 0x0);
3243 gfar_write(&regs->gaddr3, 0x0);
3244 gfar_write(&regs->gaddr4, 0x0);
3245 gfar_write(&regs->gaddr5, 0x0);
3246 gfar_write(&regs->gaddr6, 0x0);
3247 gfar_write(&regs->gaddr7, 0x0);
3248
Andy Fleming7f7f5312005-11-11 12:38:59 -06003249 /* If we have extended hash tables, we need to
3250 * clear the exact match registers to prepare for
Jan Ceuleers0977f812012-06-05 03:42:12 +00003251 * setting them
3252 */
Andy Fleming7f7f5312005-11-11 12:38:59 -06003253 if (priv->extended_hash) {
3254 em_num = GFAR_EM_NUM + 1;
3255 gfar_clear_exact_match(dev);
3256 idx = 1;
3257 } else {
3258 idx = 0;
3259 em_num = 0;
3260 }
3261
Jiri Pirko4cd24ea2010-02-08 04:30:35 +00003262 if (netdev_mc_empty(dev))
Linus Torvalds1da177e2005-04-16 15:20:36 -07003263 return;
3264
3265 /* Parse the list, and set the appropriate bits */
Jiri Pirko22bedad32010-04-01 21:22:57 +00003266 netdev_for_each_mc_addr(ha, dev) {
Andy Fleming7f7f5312005-11-11 12:38:59 -06003267 if (idx < em_num) {
Jiri Pirko22bedad32010-04-01 21:22:57 +00003268 gfar_set_mac_for_addr(dev, idx, ha->addr);
Andy Fleming7f7f5312005-11-11 12:38:59 -06003269 idx++;
3270 } else
Jiri Pirko22bedad32010-04-01 21:22:57 +00003271 gfar_set_hash_for_addr(dev, ha->addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003272 }
3273 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07003274}
3275
Andy Fleming7f7f5312005-11-11 12:38:59 -06003276
3277/* Clears each of the exact match registers to zero, so they
Jan Ceuleers0977f812012-06-05 03:42:12 +00003278 * don't interfere with normal reception
3279 */
Andy Fleming7f7f5312005-11-11 12:38:59 -06003280static void gfar_clear_exact_match(struct net_device *dev)
3281{
3282 int idx;
Joe Perches6a3c9102011-11-16 09:38:02 +00003283 static const u8 zero_arr[ETH_ALEN] = {0, 0, 0, 0, 0, 0};
Andy Fleming7f7f5312005-11-11 12:38:59 -06003284
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00003285 for (idx = 1; idx < GFAR_EM_NUM + 1; idx++)
Joe Perchesb6bc7652010-12-21 02:16:08 -08003286 gfar_set_mac_for_addr(dev, idx, zero_arr);
Andy Fleming7f7f5312005-11-11 12:38:59 -06003287}
3288
Linus Torvalds1da177e2005-04-16 15:20:36 -07003289/* Set the appropriate hash bit for the given addr */
3290/* The algorithm works like so:
3291 * 1) Take the Destination Address (ie the multicast address), and
3292 * do a CRC on it (little endian), and reverse the bits of the
3293 * result.
3294 * 2) Use the 8 most significant bits as a hash into a 256-entry
3295 * table. The table is controlled through 8 32-bit registers:
3296 * gaddr0-7. gaddr0's MSB is entry 0, and gaddr7's LSB is
3297 * gaddr7. This means that the 3 most significant bits in the
3298 * hash index which gaddr register to use, and the 5 other bits
3299 * indicate which bit (assuming an IBM numbering scheme, which
3300 * for PowerPC (tm) is usually the case) in the register holds
Jan Ceuleers0977f812012-06-05 03:42:12 +00003301 * the entry.
3302 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07003303static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr)
3304{
3305 u32 tempval;
3306 struct gfar_private *priv = netdev_priv(dev);
Joe Perches6a3c9102011-11-16 09:38:02 +00003307 u32 result = ether_crc(ETH_ALEN, addr);
Kumar Gala0bbaf062005-06-20 10:54:21 -05003308 int width = priv->hash_width;
3309 u8 whichbit = (result >> (32 - width)) & 0x1f;
3310 u8 whichreg = result >> (32 - width + 5);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003311 u32 value = (1 << (31-whichbit));
3312
Kumar Gala0bbaf062005-06-20 10:54:21 -05003313 tempval = gfar_read(priv->hash_regs[whichreg]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003314 tempval |= value;
Kumar Gala0bbaf062005-06-20 10:54:21 -05003315 gfar_write(priv->hash_regs[whichreg], tempval);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003316}
3317
Andy Fleming7f7f5312005-11-11 12:38:59 -06003318
3319/* There are multiple MAC Address register pairs on some controllers
3320 * This function sets the numth pair to a given address
3321 */
Joe Perchesb6bc7652010-12-21 02:16:08 -08003322static void gfar_set_mac_for_addr(struct net_device *dev, int num,
3323 const u8 *addr)
Andy Fleming7f7f5312005-11-11 12:38:59 -06003324{
3325 struct gfar_private *priv = netdev_priv(dev);
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00003326 struct gfar __iomem *regs = priv->gfargrp[0].regs;
Andy Fleming7f7f5312005-11-11 12:38:59 -06003327 u32 tempval;
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00003328 u32 __iomem *macptr = &regs->macstnaddr1;
Andy Fleming7f7f5312005-11-11 12:38:59 -06003329
3330 macptr += num*2;
3331
Claudiu Manoil83bfc3c2014-10-07 10:44:33 +03003332 /* For a station address of 0x12345678ABCD in transmission
3333 * order (BE), MACnADDR1 is set to 0xCDAB7856 and
3334 * MACnADDR2 is set to 0x34120000.
Jan Ceuleers0977f812012-06-05 03:42:12 +00003335 */
Claudiu Manoil83bfc3c2014-10-07 10:44:33 +03003336 tempval = (addr[5] << 24) | (addr[4] << 16) |
3337 (addr[3] << 8) | addr[2];
Andy Fleming7f7f5312005-11-11 12:38:59 -06003338
Claudiu Manoil83bfc3c2014-10-07 10:44:33 +03003339 gfar_write(macptr, tempval);
Andy Fleming7f7f5312005-11-11 12:38:59 -06003340
Claudiu Manoil83bfc3c2014-10-07 10:44:33 +03003341 tempval = (addr[1] << 24) | (addr[0] << 16);
Andy Fleming7f7f5312005-11-11 12:38:59 -06003342
3343 gfar_write(macptr+1, tempval);
3344}
3345
Linus Torvalds1da177e2005-04-16 15:20:36 -07003346/* GFAR error interrupt handler */
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00003347static irqreturn_t gfar_error(int irq, void *grp_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003348{
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00003349 struct gfar_priv_grp *gfargrp = grp_id;
3350 struct gfar __iomem *regs = gfargrp->regs;
3351 struct gfar_private *priv= gfargrp->priv;
3352 struct net_device *dev = priv->ndev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003353
3354 /* Save ievent for future reference */
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00003355 u32 events = gfar_read(&regs->ievent);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003356
3357 /* Clear IEVENT */
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00003358 gfar_write(&regs->ievent, events & IEVENT_ERR_MASK);
Scott Woodd87eb122008-07-11 18:04:45 -05003359
3360 /* Magic Packet is not an error. */
Andy Flemingb31a1d82008-12-16 15:29:15 -08003361 if ((priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET) &&
Scott Woodd87eb122008-07-11 18:04:45 -05003362 (events & IEVENT_MAG))
3363 events &= ~IEVENT_MAG;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003364
3365 /* Hmm... */
Kumar Gala0bbaf062005-06-20 10:54:21 -05003366 if (netif_msg_rx_err(priv) || netif_msg_tx_err(priv))
Jan Ceuleersbc4598b2012-06-05 03:42:13 +00003367 netdev_dbg(dev,
3368 "error interrupt (ievent=0x%08x imask=0x%08x)\n",
Joe Perches59deab22011-06-14 08:57:47 +00003369 events, gfar_read(&regs->imask));
Linus Torvalds1da177e2005-04-16 15:20:36 -07003370
3371 /* Update the error counters */
3372 if (events & IEVENT_TXE) {
Jeff Garzik09f75cd2007-10-03 17:41:50 -07003373 dev->stats.tx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003374
3375 if (events & IEVENT_LC)
Jeff Garzik09f75cd2007-10-03 17:41:50 -07003376 dev->stats.tx_window_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003377 if (events & IEVENT_CRL)
Jeff Garzik09f75cd2007-10-03 17:41:50 -07003378 dev->stats.tx_aborted_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003379 if (events & IEVENT_XFUN) {
Anton Vorontsov836cf7f2009-11-10 14:11:08 +00003380 unsigned long flags;
3381
Joe Perches59deab22011-06-14 08:57:47 +00003382 netif_dbg(priv, tx_err, dev,
3383 "TX FIFO underrun, packet dropped\n");
Jeff Garzik09f75cd2007-10-03 17:41:50 -07003384 dev->stats.tx_dropped++;
Paul Gortmaker212079d2013-02-12 15:38:19 -05003385 atomic64_inc(&priv->extra_stats.tx_underrun);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003386
Anton Vorontsov836cf7f2009-11-10 14:11:08 +00003387 local_irq_save(flags);
3388 lock_tx_qs(priv);
3389
Linus Torvalds1da177e2005-04-16 15:20:36 -07003390 /* Reactivate the Tx Queues */
Sandeep Gopalpetfba4ed02009-11-02 07:03:15 +00003391 gfar_write(&regs->tstat, gfargrp->tstat);
Anton Vorontsov836cf7f2009-11-10 14:11:08 +00003392
3393 unlock_tx_qs(priv);
3394 local_irq_restore(flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003395 }
Joe Perches59deab22011-06-14 08:57:47 +00003396 netif_dbg(priv, tx_err, dev, "Transmit Error\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07003397 }
3398 if (events & IEVENT_BSY) {
Jeff Garzik09f75cd2007-10-03 17:41:50 -07003399 dev->stats.rx_errors++;
Paul Gortmaker212079d2013-02-12 15:38:19 -05003400 atomic64_inc(&priv->extra_stats.rx_bsy);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003401
Sandeep Gopalpetf4983702009-11-02 07:03:09 +00003402 gfar_receive(irq, grp_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003403
Joe Perches59deab22011-06-14 08:57:47 +00003404 netif_dbg(priv, rx_err, dev, "busy error (rstat: %x)\n",
3405 gfar_read(&regs->rstat));
Linus Torvalds1da177e2005-04-16 15:20:36 -07003406 }
3407 if (events & IEVENT_BABR) {
Jeff Garzik09f75cd2007-10-03 17:41:50 -07003408 dev->stats.rx_errors++;
Paul Gortmaker212079d2013-02-12 15:38:19 -05003409 atomic64_inc(&priv->extra_stats.rx_babr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003410
Joe Perches59deab22011-06-14 08:57:47 +00003411 netif_dbg(priv, rx_err, dev, "babbling RX error\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07003412 }
3413 if (events & IEVENT_EBERR) {
Paul Gortmaker212079d2013-02-12 15:38:19 -05003414 atomic64_inc(&priv->extra_stats.eberr);
Joe Perches59deab22011-06-14 08:57:47 +00003415 netif_dbg(priv, rx_err, dev, "bus error\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07003416 }
Joe Perches59deab22011-06-14 08:57:47 +00003417 if (events & IEVENT_RXC)
3418 netif_dbg(priv, rx_status, dev, "control frame\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07003419
3420 if (events & IEVENT_BABT) {
Paul Gortmaker212079d2013-02-12 15:38:19 -05003421 atomic64_inc(&priv->extra_stats.tx_babt);
Joe Perches59deab22011-06-14 08:57:47 +00003422 netif_dbg(priv, tx_err, dev, "babbling TX error\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07003423 }
3424 return IRQ_HANDLED;
3425}
3426
Claudiu Manoil6ce29b02014-04-30 14:27:21 +03003427static u32 gfar_get_flowctrl_cfg(struct gfar_private *priv)
3428{
3429 struct phy_device *phydev = priv->phydev;
3430 u32 val = 0;
3431
3432 if (!phydev->duplex)
3433 return val;
3434
3435 if (!priv->pause_aneg_en) {
3436 if (priv->tx_pause_en)
3437 val |= MACCFG1_TX_FLOW;
3438 if (priv->rx_pause_en)
3439 val |= MACCFG1_RX_FLOW;
3440 } else {
3441 u16 lcl_adv, rmt_adv;
3442 u8 flowctrl;
3443 /* get link partner capabilities */
3444 rmt_adv = 0;
3445 if (phydev->pause)
3446 rmt_adv = LPA_PAUSE_CAP;
3447 if (phydev->asym_pause)
3448 rmt_adv |= LPA_PAUSE_ASYM;
3449
Pavaluca Matei-B4661043ef8d22014-10-27 10:42:43 +02003450 lcl_adv = 0;
3451 if (phydev->advertising & ADVERTISED_Pause)
3452 lcl_adv |= ADVERTISE_PAUSE_CAP;
3453 if (phydev->advertising & ADVERTISED_Asym_Pause)
3454 lcl_adv |= ADVERTISE_PAUSE_ASYM;
Claudiu Manoil6ce29b02014-04-30 14:27:21 +03003455
3456 flowctrl = mii_resolve_flowctrl_fdx(lcl_adv, rmt_adv);
3457 if (flowctrl & FLOW_CTRL_TX)
3458 val |= MACCFG1_TX_FLOW;
3459 if (flowctrl & FLOW_CTRL_RX)
3460 val |= MACCFG1_RX_FLOW;
3461 }
3462
3463 return val;
3464}
3465
3466static noinline void gfar_update_link_state(struct gfar_private *priv)
3467{
3468 struct gfar __iomem *regs = priv->gfargrp[0].regs;
3469 struct phy_device *phydev = priv->phydev;
Matei Pavaluca45b679c92014-10-27 10:42:44 +02003470 struct gfar_priv_rx_q *rx_queue = NULL;
3471 int i;
3472 struct rxbd8 *bdp;
Claudiu Manoil6ce29b02014-04-30 14:27:21 +03003473
3474 if (unlikely(test_bit(GFAR_RESETTING, &priv->state)))
3475 return;
3476
3477 if (phydev->link) {
3478 u32 tempval1 = gfar_read(&regs->maccfg1);
3479 u32 tempval = gfar_read(&regs->maccfg2);
3480 u32 ecntrl = gfar_read(&regs->ecntrl);
Matei Pavaluca45b679c92014-10-27 10:42:44 +02003481 u32 tx_flow_oldval = (tempval & MACCFG1_TX_FLOW);
Claudiu Manoil6ce29b02014-04-30 14:27:21 +03003482
3483 if (phydev->duplex != priv->oldduplex) {
3484 if (!(phydev->duplex))
3485 tempval &= ~(MACCFG2_FULL_DUPLEX);
3486 else
3487 tempval |= MACCFG2_FULL_DUPLEX;
3488
3489 priv->oldduplex = phydev->duplex;
3490 }
3491
3492 if (phydev->speed != priv->oldspeed) {
3493 switch (phydev->speed) {
3494 case 1000:
3495 tempval =
3496 ((tempval & ~(MACCFG2_IF)) | MACCFG2_GMII);
3497
3498 ecntrl &= ~(ECNTRL_R100);
3499 break;
3500 case 100:
3501 case 10:
3502 tempval =
3503 ((tempval & ~(MACCFG2_IF)) | MACCFG2_MII);
3504
3505 /* Reduced mode distinguishes
3506 * between 10 and 100
3507 */
3508 if (phydev->speed == SPEED_100)
3509 ecntrl |= ECNTRL_R100;
3510 else
3511 ecntrl &= ~(ECNTRL_R100);
3512 break;
3513 default:
3514 netif_warn(priv, link, priv->ndev,
3515 "Ack! Speed (%d) is not 10/100/1000!\n",
3516 phydev->speed);
3517 break;
3518 }
3519
3520 priv->oldspeed = phydev->speed;
3521 }
3522
3523 tempval1 &= ~(MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
3524 tempval1 |= gfar_get_flowctrl_cfg(priv);
3525
Matei Pavaluca45b679c92014-10-27 10:42:44 +02003526 /* Turn last free buffer recording on */
3527 if ((tempval1 & MACCFG1_TX_FLOW) && !tx_flow_oldval) {
3528 for (i = 0; i < priv->num_rx_queues; i++) {
3529 rx_queue = priv->rx_queue[i];
3530 bdp = rx_queue->cur_rx;
3531 /* skip to previous bd */
3532 bdp = skip_bd(bdp, rx_queue->rx_ring_size - 1,
3533 rx_queue->rx_bd_base,
3534 rx_queue->rx_ring_size);
3535
3536 if (rx_queue->rfbptr)
3537 gfar_write(rx_queue->rfbptr, (u32)bdp);
3538 }
3539
3540 priv->tx_actual_en = 1;
3541 }
3542
3543 if (unlikely(!(tempval1 & MACCFG1_TX_FLOW) && tx_flow_oldval))
3544 priv->tx_actual_en = 0;
3545
Claudiu Manoil6ce29b02014-04-30 14:27:21 +03003546 gfar_write(&regs->maccfg1, tempval1);
3547 gfar_write(&regs->maccfg2, tempval);
3548 gfar_write(&regs->ecntrl, ecntrl);
3549
3550 if (!priv->oldlink)
3551 priv->oldlink = 1;
3552
3553 } else if (priv->oldlink) {
3554 priv->oldlink = 0;
3555 priv->oldspeed = 0;
3556 priv->oldduplex = -1;
3557 }
3558
3559 if (netif_msg_link(priv))
3560 phy_print_status(phydev);
3561}
3562
Andy Flemingb31a1d82008-12-16 15:29:15 -08003563static struct of_device_id gfar_match[] =
3564{
3565 {
3566 .type = "network",
3567 .compatible = "gianfar",
3568 },
Sandeep Gopalpet46ceb602009-11-02 07:03:34 +00003569 {
3570 .compatible = "fsl,etsec2",
3571 },
Andy Flemingb31a1d82008-12-16 15:29:15 -08003572 {},
3573};
Anton Vorontsove72701a2009-10-14 14:54:52 -07003574MODULE_DEVICE_TABLE(of, gfar_match);
Andy Flemingb31a1d82008-12-16 15:29:15 -08003575
Linus Torvalds1da177e2005-04-16 15:20:36 -07003576/* Structure for a device driver */
Grant Likely74888762011-02-22 21:05:51 -07003577static struct platform_driver gfar_driver = {
Grant Likely40182942010-04-13 16:13:02 -07003578 .driver = {
3579 .name = "fsl-gianfar",
Grant Likely40182942010-04-13 16:13:02 -07003580 .pm = GFAR_PM_OPS,
3581 .of_match_table = gfar_match,
3582 },
Linus Torvalds1da177e2005-04-16 15:20:36 -07003583 .probe = gfar_probe,
3584 .remove = gfar_remove,
3585};
3586
Axel Lindb62f682011-11-27 16:44:17 +00003587module_platform_driver(gfar_driver);