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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* Low-level parallel-port routines for 8255-based PC-style hardware.
2 *
3 * Authors: Phil Blundell <philb@gnu.org>
4 * Tim Waugh <tim@cyberelk.demon.co.uk>
5 * Jose Renau <renau@acm.org>
Adrian Bunkbdca3f22006-06-26 18:19:23 +02006 * David Campbell
Linus Torvalds1da177e2005-04-16 15:20:36 -07007 * Andrea Arcangeli
8 *
9 * based on work by Grant Guenther <grant@torque.net> and Phil Blundell.
10 *
11 * Cleaned up include files - Russell King <linux@arm.uk.linux.org>
12 * DMA support - Bert De Jonghe <bert@sophis.be>
13 * Many ECP bugs fixed. Fred Barnes & Jamie Lokier, 1999
14 * More PCI support now conditional on CONFIG_PCI, 03/2001, Paul G.
15 * Various hacks, Fred Barnes, 04/2001
16 * Updated probing logic - Adam Belay <ambx1@neo.rr.com>
17 */
18
19/* This driver should work with any hardware that is broadly compatible
20 * with that in the IBM PC. This applies to the majority of integrated
21 * I/O chipsets that are commonly available. The expected register
22 * layout is:
23 *
24 * base+0 data
25 * base+1 status
26 * base+2 control
27 *
28 * In addition, there are some optional registers:
29 *
30 * base+3 EPP address
31 * base+4 EPP data
32 * base+0x400 ECP config A
33 * base+0x401 ECP config B
34 * base+0x402 ECP control
35 *
36 * All registers are 8 bits wide and read/write. If your hardware differs
37 * only in register addresses (eg because your registers are on 32-bit
38 * word boundaries) then you can alter the constants in parport_pc.h to
39 * accommodate this.
40 *
41 * Note that the ECP registers may not start at offset 0x400 for PCI cards,
42 * but rather will start at port->base_hi.
43 */
44
Linus Torvalds1da177e2005-04-16 15:20:36 -070045#include <linux/module.h>
46#include <linux/init.h>
47#include <linux/sched.h>
48#include <linux/delay.h>
49#include <linux/errno.h>
50#include <linux/interrupt.h>
51#include <linux/ioport.h>
52#include <linux/kernel.h>
53#include <linux/slab.h>
54#include <linux/pci.h>
55#include <linux/pnp.h>
Jean Delvarea7d801a2007-05-08 00:27:40 -070056#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070057#include <linux/sysctl.h>
58
59#include <asm/io.h>
60#include <asm/dma.h>
61#include <asm/uaccess.h>
62
63#include <linux/parport.h>
64#include <linux/parport_pc.h>
65#include <linux/via.h>
66#include <asm/parport.h>
67
68#define PARPORT_PC_MAX_PORTS PARPORT_MAX
69
Al Viro7fbacd52005-05-04 05:39:32 +010070#ifdef CONFIG_ISA_DMA_API
71#define HAS_DMA
72#endif
73
Linus Torvalds1da177e2005-04-16 15:20:36 -070074/* ECR modes */
75#define ECR_SPP 00
76#define ECR_PS2 01
77#define ECR_PPF 02
78#define ECR_ECP 03
79#define ECR_EPP 04
80#define ECR_VND 05
81#define ECR_TST 06
82#define ECR_CNF 07
83#define ECR_MODE_MASK 0xe0
84#define ECR_WRITE(p,v) frob_econtrol((p),0xff,(v))
85
86#undef DEBUG
87
88#ifdef DEBUG
89#define DPRINTK printk
90#else
91#define DPRINTK(stuff...)
92#endif
93
94
95#define NR_SUPERIOS 3
96static struct superio_struct { /* For Super-IO chips autodetection */
97 int io;
98 int irq;
99 int dma;
Randy.Dunlap96766a32006-04-18 22:21:57 -0700100} superios[NR_SUPERIOS] = { {0,},};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101
102static int user_specified;
103#if defined(CONFIG_PARPORT_PC_SUPERIO) || \
104 (defined(CONFIG_PARPORT_1284) && defined(CONFIG_PARPORT_PC_FIFO))
105static int verbose_probing;
106#endif
107static int pci_registered_parport;
108static int pnp_registered_parport;
109
110/* frob_control, but for ECR */
111static void frob_econtrol (struct parport *pb, unsigned char m,
112 unsigned char v)
113{
114 unsigned char ectr = 0;
115
116 if (m != 0xff)
117 ectr = inb (ECONTROL (pb));
118
119 DPRINTK (KERN_DEBUG "frob_econtrol(%02x,%02x): %02x -> %02x\n",
120 m, v, ectr, (ectr & ~m) ^ v);
121
122 outb ((ectr & ~m) ^ v, ECONTROL (pb));
123}
124
125static __inline__ void frob_set_mode (struct parport *p, int mode)
126{
127 frob_econtrol (p, ECR_MODE_MASK, mode << 5);
128}
129
130#ifdef CONFIG_PARPORT_PC_FIFO
131/* Safely change the mode bits in the ECR
132 Returns:
133 0 : Success
134 -EBUSY: Could not drain FIFO in some finite amount of time,
135 mode not changed!
136 */
137static int change_mode(struct parport *p, int m)
138{
139 const struct parport_pc_private *priv = p->physport->private_data;
140 unsigned char oecr;
141 int mode;
142
143 DPRINTK(KERN_INFO "parport change_mode ECP-ISA to mode 0x%02x\n",m);
144
145 if (!priv->ecr) {
146 printk (KERN_DEBUG "change_mode: but there's no ECR!\n");
147 return 0;
148 }
149
150 /* Bits <7:5> contain the mode. */
151 oecr = inb (ECONTROL (p));
152 mode = (oecr >> 5) & 0x7;
153 if (mode == m) return 0;
154
155 if (mode >= 2 && !(priv->ctr & 0x20)) {
156 /* This mode resets the FIFO, so we may
157 * have to wait for it to drain first. */
158 unsigned long expire = jiffies + p->physport->cad->timeout;
159 int counter;
160 switch (mode) {
161 case ECR_PPF: /* Parallel Port FIFO mode */
162 case ECR_ECP: /* ECP Parallel Port mode */
163 /* Busy wait for 200us */
164 for (counter = 0; counter < 40; counter++) {
165 if (inb (ECONTROL (p)) & 0x01)
166 break;
167 if (signal_pending (current)) break;
168 udelay (5);
169 }
170
171 /* Poll slowly. */
172 while (!(inb (ECONTROL (p)) & 0x01)) {
173 if (time_after_eq (jiffies, expire))
174 /* The FIFO is stuck. */
175 return -EBUSY;
Nishanth Aravamudan7b4ccf82005-09-10 00:27:31 -0700176 schedule_timeout_interruptible(msecs_to_jiffies(10));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700177 if (signal_pending (current))
178 break;
179 }
180 }
181 }
182
183 if (mode >= 2 && m >= 2) {
184 /* We have to go through mode 001 */
185 oecr &= ~(7 << 5);
186 oecr |= ECR_PS2 << 5;
187 ECR_WRITE (p, oecr);
188 }
189
190 /* Set the mode. */
191 oecr &= ~(7 << 5);
192 oecr |= m << 5;
193 ECR_WRITE (p, oecr);
194 return 0;
195}
196
197#ifdef CONFIG_PARPORT_1284
198/* Find FIFO lossage; FIFO is reset */
199#if 0
200static int get_fifo_residue (struct parport *p)
201{
202 int residue;
203 int cnfga;
204 const struct parport_pc_private *priv = p->physport->private_data;
205
206 /* Adjust for the contents of the FIFO. */
207 for (residue = priv->fifo_depth; ; residue--) {
208 if (inb (ECONTROL (p)) & 0x2)
209 /* Full up. */
210 break;
211
212 outb (0, FIFO (p));
213 }
214
215 printk (KERN_DEBUG "%s: %d PWords were left in FIFO\n", p->name,
216 residue);
217
218 /* Reset the FIFO. */
219 frob_set_mode (p, ECR_PS2);
220
221 /* Now change to config mode and clean up. FIXME */
222 frob_set_mode (p, ECR_CNF);
223 cnfga = inb (CONFIGA (p));
224 printk (KERN_DEBUG "%s: cnfgA contains 0x%02x\n", p->name, cnfga);
225
226 if (!(cnfga & (1<<2))) {
227 printk (KERN_DEBUG "%s: Accounting for extra byte\n", p->name);
228 residue++;
229 }
230
231 /* Don't care about partial PWords until support is added for
232 * PWord != 1 byte. */
233
234 /* Back to PS2 mode. */
235 frob_set_mode (p, ECR_PS2);
236
237 DPRINTK (KERN_DEBUG "*** get_fifo_residue: done residue collecting (ecr = 0x%2.2x)\n", inb (ECONTROL (p)));
238 return residue;
239}
240#endif /* 0 */
241#endif /* IEEE 1284 support */
242#endif /* FIFO support */
243
244/*
245 * Clear TIMEOUT BIT in EPP MODE
246 *
247 * This is also used in SPP detection.
248 */
249static int clear_epp_timeout(struct parport *pb)
250{
251 unsigned char r;
252
253 if (!(parport_pc_read_status(pb) & 0x01))
254 return 1;
255
256 /* To clear timeout some chips require double read */
257 parport_pc_read_status(pb);
258 r = parport_pc_read_status(pb);
259 outb (r | 0x01, STATUS (pb)); /* Some reset by writing 1 */
260 outb (r & 0xfe, STATUS (pb)); /* Others by writing 0 */
261 r = parport_pc_read_status(pb);
262
263 return !(r & 0x01);
264}
265
266/*
267 * Access functions.
268 *
269 * Most of these aren't static because they may be used by the
270 * parport_xxx_yyy macros. extern __inline__ versions of several
271 * of these are in parport_pc.h.
272 */
273
David Howells7d12e782006-10-05 14:55:46 +0100274static irqreturn_t parport_pc_interrupt(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700275{
David Howells7d12e782006-10-05 14:55:46 +0100276 parport_generic_irq(irq, (struct parport *) dev_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700277 /* FIXME! Was it really ours? */
278 return IRQ_HANDLED;
279}
280
281static void parport_pc_init_state(struct pardevice *dev, struct parport_state *s)
282{
283 s->u.pc.ctr = 0xc;
284 if (dev->irq_func &&
285 dev->port->irq != PARPORT_IRQ_NONE)
286 /* Set ackIntEn */
287 s->u.pc.ctr |= 0x10;
288
289 s->u.pc.ecr = 0x34; /* NetMos chip can cause problems 0x24;
290 * D.Gruszka VScom */
291}
292
293static void parport_pc_save_state(struct parport *p, struct parport_state *s)
294{
295 const struct parport_pc_private *priv = p->physport->private_data;
296 s->u.pc.ctr = priv->ctr;
297 if (priv->ecr)
298 s->u.pc.ecr = inb (ECONTROL (p));
299}
300
301static void parport_pc_restore_state(struct parport *p, struct parport_state *s)
302{
303 struct parport_pc_private *priv = p->physport->private_data;
304 register unsigned char c = s->u.pc.ctr & priv->ctr_writable;
305 outb (c, CONTROL (p));
306 priv->ctr = c;
307 if (priv->ecr)
308 ECR_WRITE (p, s->u.pc.ecr);
309}
310
311#ifdef CONFIG_PARPORT_1284
312static size_t parport_pc_epp_read_data (struct parport *port, void *buf,
313 size_t length, int flags)
314{
315 size_t got = 0;
316
317 if (flags & PARPORT_W91284PIC) {
318 unsigned char status;
319 size_t left = length;
320
321 /* use knowledge about data lines..:
322 * nFault is 0 if there is at least 1 byte in the Warp's FIFO
323 * pError is 1 if there are 16 bytes in the Warp's FIFO
324 */
325 status = inb (STATUS (port));
326
327 while (!(status & 0x08) && (got < length)) {
328 if ((left >= 16) && (status & 0x20) && !(status & 0x08)) {
329 /* can grab 16 bytes from warp fifo */
330 if (!((long)buf & 0x03)) {
331 insl (EPPDATA (port), buf, 4);
332 } else {
333 insb (EPPDATA (port), buf, 16);
334 }
335 buf += 16;
336 got += 16;
337 left -= 16;
338 } else {
339 /* grab single byte from the warp fifo */
340 *((char *)buf) = inb (EPPDATA (port));
341 buf++;
342 got++;
343 left--;
344 }
345 status = inb (STATUS (port));
346 if (status & 0x01) {
347 /* EPP timeout should never occur... */
348 printk (KERN_DEBUG "%s: EPP timeout occurred while talking to "
349 "w91284pic (should not have done)\n", port->name);
350 clear_epp_timeout (port);
351 }
352 }
353 return got;
354 }
355 if ((flags & PARPORT_EPP_FAST) && (length > 1)) {
356 if (!(((long)buf | length) & 0x03)) {
357 insl (EPPDATA (port), buf, (length >> 2));
358 } else {
359 insb (EPPDATA (port), buf, length);
360 }
361 if (inb (STATUS (port)) & 0x01) {
362 clear_epp_timeout (port);
363 return -EIO;
364 }
365 return length;
366 }
367 for (; got < length; got++) {
368 *((char*)buf) = inb (EPPDATA(port));
369 buf++;
370 if (inb (STATUS (port)) & 0x01) {
371 /* EPP timeout */
372 clear_epp_timeout (port);
373 break;
374 }
375 }
376
377 return got;
378}
379
380static size_t parport_pc_epp_write_data (struct parport *port, const void *buf,
381 size_t length, int flags)
382{
383 size_t written = 0;
384
385 if ((flags & PARPORT_EPP_FAST) && (length > 1)) {
386 if (!(((long)buf | length) & 0x03)) {
387 outsl (EPPDATA (port), buf, (length >> 2));
388 } else {
389 outsb (EPPDATA (port), buf, length);
390 }
391 if (inb (STATUS (port)) & 0x01) {
392 clear_epp_timeout (port);
393 return -EIO;
394 }
395 return length;
396 }
397 for (; written < length; written++) {
398 outb (*((char*)buf), EPPDATA(port));
399 buf++;
400 if (inb (STATUS(port)) & 0x01) {
401 clear_epp_timeout (port);
402 break;
403 }
404 }
405
406 return written;
407}
408
409static size_t parport_pc_epp_read_addr (struct parport *port, void *buf,
410 size_t length, int flags)
411{
412 size_t got = 0;
413
414 if ((flags & PARPORT_EPP_FAST) && (length > 1)) {
415 insb (EPPADDR (port), buf, length);
416 if (inb (STATUS (port)) & 0x01) {
417 clear_epp_timeout (port);
418 return -EIO;
419 }
420 return length;
421 }
422 for (; got < length; got++) {
423 *((char*)buf) = inb (EPPADDR (port));
424 buf++;
425 if (inb (STATUS (port)) & 0x01) {
426 clear_epp_timeout (port);
427 break;
428 }
429 }
430
431 return got;
432}
433
434static size_t parport_pc_epp_write_addr (struct parport *port,
435 const void *buf, size_t length,
436 int flags)
437{
438 size_t written = 0;
439
440 if ((flags & PARPORT_EPP_FAST) && (length > 1)) {
441 outsb (EPPADDR (port), buf, length);
442 if (inb (STATUS (port)) & 0x01) {
443 clear_epp_timeout (port);
444 return -EIO;
445 }
446 return length;
447 }
448 for (; written < length; written++) {
449 outb (*((char*)buf), EPPADDR (port));
450 buf++;
451 if (inb (STATUS (port)) & 0x01) {
452 clear_epp_timeout (port);
453 break;
454 }
455 }
456
457 return written;
458}
459
460static size_t parport_pc_ecpepp_read_data (struct parport *port, void *buf,
461 size_t length, int flags)
462{
463 size_t got;
464
465 frob_set_mode (port, ECR_EPP);
466 parport_pc_data_reverse (port);
467 parport_pc_write_control (port, 0x4);
468 got = parport_pc_epp_read_data (port, buf, length, flags);
469 frob_set_mode (port, ECR_PS2);
470
471 return got;
472}
473
474static size_t parport_pc_ecpepp_write_data (struct parport *port,
475 const void *buf, size_t length,
476 int flags)
477{
478 size_t written;
479
480 frob_set_mode (port, ECR_EPP);
481 parport_pc_write_control (port, 0x4);
482 parport_pc_data_forward (port);
483 written = parport_pc_epp_write_data (port, buf, length, flags);
484 frob_set_mode (port, ECR_PS2);
485
486 return written;
487}
488
489static size_t parport_pc_ecpepp_read_addr (struct parport *port, void *buf,
490 size_t length, int flags)
491{
492 size_t got;
493
494 frob_set_mode (port, ECR_EPP);
495 parport_pc_data_reverse (port);
496 parport_pc_write_control (port, 0x4);
497 got = parport_pc_epp_read_addr (port, buf, length, flags);
498 frob_set_mode (port, ECR_PS2);
499
500 return got;
501}
502
503static size_t parport_pc_ecpepp_write_addr (struct parport *port,
504 const void *buf, size_t length,
505 int flags)
506{
507 size_t written;
508
509 frob_set_mode (port, ECR_EPP);
510 parport_pc_write_control (port, 0x4);
511 parport_pc_data_forward (port);
512 written = parport_pc_epp_write_addr (port, buf, length, flags);
513 frob_set_mode (port, ECR_PS2);
514
515 return written;
516}
517#endif /* IEEE 1284 support */
518
519#ifdef CONFIG_PARPORT_PC_FIFO
520static size_t parport_pc_fifo_write_block_pio (struct parport *port,
521 const void *buf, size_t length)
522{
523 int ret = 0;
524 const unsigned char *bufp = buf;
525 size_t left = length;
526 unsigned long expire = jiffies + port->physport->cad->timeout;
527 const int fifo = FIFO (port);
528 int poll_for = 8; /* 80 usecs */
529 const struct parport_pc_private *priv = port->physport->private_data;
530 const int fifo_depth = priv->fifo_depth;
531
532 port = port->physport;
533
534 /* We don't want to be interrupted every character. */
535 parport_pc_disable_irq (port);
536 /* set nErrIntrEn and serviceIntr */
537 frob_econtrol (port, (1<<4) | (1<<2), (1<<4) | (1<<2));
538
539 /* Forward mode. */
540 parport_pc_data_forward (port); /* Must be in PS2 mode */
541
542 while (left) {
543 unsigned char byte;
544 unsigned char ecrval = inb (ECONTROL (port));
545 int i = 0;
546
547 if (need_resched() && time_before (jiffies, expire))
548 /* Can't yield the port. */
549 schedule ();
550
551 /* Anyone else waiting for the port? */
552 if (port->waithead) {
553 printk (KERN_DEBUG "Somebody wants the port\n");
554 break;
555 }
556
557 if (ecrval & 0x02) {
558 /* FIFO is full. Wait for interrupt. */
559
560 /* Clear serviceIntr */
561 ECR_WRITE (port, ecrval & ~(1<<2));
562 false_alarm:
563 ret = parport_wait_event (port, HZ);
564 if (ret < 0) break;
565 ret = 0;
566 if (!time_before (jiffies, expire)) {
567 /* Timed out. */
568 printk (KERN_DEBUG "FIFO write timed out\n");
569 break;
570 }
571 ecrval = inb (ECONTROL (port));
572 if (!(ecrval & (1<<2))) {
573 if (need_resched() &&
574 time_before (jiffies, expire))
575 schedule ();
576
577 goto false_alarm;
578 }
579
580 continue;
581 }
582
583 /* Can't fail now. */
584 expire = jiffies + port->cad->timeout;
585
586 poll:
587 if (signal_pending (current))
588 break;
589
590 if (ecrval & 0x01) {
591 /* FIFO is empty. Blast it full. */
592 const int n = left < fifo_depth ? left : fifo_depth;
593 outsb (fifo, bufp, n);
594 bufp += n;
595 left -= n;
596
597 /* Adjust the poll time. */
598 if (i < (poll_for - 2)) poll_for--;
599 continue;
600 } else if (i++ < poll_for) {
601 udelay (10);
602 ecrval = inb (ECONTROL (port));
603 goto poll;
604 }
605
606 /* Half-full (call me an optimist) */
607 byte = *bufp++;
608 outb (byte, fifo);
609 left--;
610 }
611
612dump_parport_state ("leave fifo_write_block_pio", port);
613 return length - left;
614}
615
Al Viro7fbacd52005-05-04 05:39:32 +0100616#ifdef HAS_DMA
Linus Torvalds1da177e2005-04-16 15:20:36 -0700617static size_t parport_pc_fifo_write_block_dma (struct parport *port,
618 const void *buf, size_t length)
619{
620 int ret = 0;
621 unsigned long dmaflag;
622 size_t left = length;
623 const struct parport_pc_private *priv = port->physport->private_data;
David Brownellc15a3832007-05-08 00:27:35 -0700624 struct device *dev = port->physport->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700625 dma_addr_t dma_addr, dma_handle;
626 size_t maxlen = 0x10000; /* max 64k per DMA transfer */
627 unsigned long start = (unsigned long) buf;
628 unsigned long end = (unsigned long) buf + length - 1;
629
630dump_parport_state ("enter fifo_write_block_dma", port);
631 if (end < MAX_DMA_ADDRESS) {
632 /* If it would cross a 64k boundary, cap it at the end. */
633 if ((start ^ end) & ~0xffffUL)
634 maxlen = 0x10000 - (start & 0xffff);
635
David Brownellc15a3832007-05-08 00:27:35 -0700636 dma_addr = dma_handle = dma_map_single(dev, (void *)buf, length,
637 DMA_TO_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700638 } else {
639 /* above 16 MB we use a bounce buffer as ISA-DMA is not possible */
640 maxlen = PAGE_SIZE; /* sizeof(priv->dma_buf) */
641 dma_addr = priv->dma_handle;
642 dma_handle = 0;
643 }
644
645 port = port->physport;
646
647 /* We don't want to be interrupted every character. */
648 parport_pc_disable_irq (port);
649 /* set nErrIntrEn and serviceIntr */
650 frob_econtrol (port, (1<<4) | (1<<2), (1<<4) | (1<<2));
651
652 /* Forward mode. */
653 parport_pc_data_forward (port); /* Must be in PS2 mode */
654
655 while (left) {
656 unsigned long expire = jiffies + port->physport->cad->timeout;
657
658 size_t count = left;
659
660 if (count > maxlen)
661 count = maxlen;
662
663 if (!dma_handle) /* bounce buffer ! */
664 memcpy(priv->dma_buf, buf, count);
665
666 dmaflag = claim_dma_lock();
667 disable_dma(port->dma);
668 clear_dma_ff(port->dma);
669 set_dma_mode(port->dma, DMA_MODE_WRITE);
670 set_dma_addr(port->dma, dma_addr);
671 set_dma_count(port->dma, count);
672
673 /* Set DMA mode */
674 frob_econtrol (port, 1<<3, 1<<3);
675
676 /* Clear serviceIntr */
677 frob_econtrol (port, 1<<2, 0);
678
679 enable_dma(port->dma);
680 release_dma_lock(dmaflag);
681
682 /* assume DMA will be successful */
683 left -= count;
684 buf += count;
685 if (dma_handle) dma_addr += count;
686
687 /* Wait for interrupt. */
688 false_alarm:
689 ret = parport_wait_event (port, HZ);
690 if (ret < 0) break;
691 ret = 0;
692 if (!time_before (jiffies, expire)) {
693 /* Timed out. */
694 printk (KERN_DEBUG "DMA write timed out\n");
695 break;
696 }
697 /* Is serviceIntr set? */
698 if (!(inb (ECONTROL (port)) & (1<<2))) {
699 cond_resched();
700
701 goto false_alarm;
702 }
703
704 dmaflag = claim_dma_lock();
705 disable_dma(port->dma);
706 clear_dma_ff(port->dma);
707 count = get_dma_residue(port->dma);
708 release_dma_lock(dmaflag);
709
710 cond_resched(); /* Can't yield the port. */
711
712 /* Anyone else waiting for the port? */
713 if (port->waithead) {
714 printk (KERN_DEBUG "Somebody wants the port\n");
715 break;
716 }
717
718 /* update for possible DMA residue ! */
719 buf -= count;
720 left += count;
721 if (dma_handle) dma_addr -= count;
722 }
723
724 /* Maybe got here through break, so adjust for DMA residue! */
725 dmaflag = claim_dma_lock();
726 disable_dma(port->dma);
727 clear_dma_ff(port->dma);
728 left += get_dma_residue(port->dma);
729 release_dma_lock(dmaflag);
730
731 /* Turn off DMA mode */
732 frob_econtrol (port, 1<<3, 0);
David Brownellc15a3832007-05-08 00:27:35 -0700733
Linus Torvalds1da177e2005-04-16 15:20:36 -0700734 if (dma_handle)
David Brownellc15a3832007-05-08 00:27:35 -0700735 dma_unmap_single(dev, dma_handle, length, DMA_TO_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700736
737dump_parport_state ("leave fifo_write_block_dma", port);
738 return length - left;
739}
Al Viro7fbacd52005-05-04 05:39:32 +0100740#endif
741
742static inline size_t parport_pc_fifo_write_block(struct parport *port,
743 const void *buf, size_t length)
744{
745#ifdef HAS_DMA
746 if (port->dma != PARPORT_DMA_NONE)
747 return parport_pc_fifo_write_block_dma (port, buf, length);
748#endif
749 return parport_pc_fifo_write_block_pio (port, buf, length);
750}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700751
752/* Parallel Port FIFO mode (ECP chipsets) */
753static size_t parport_pc_compat_write_block_pio (struct parport *port,
754 const void *buf, size_t length,
755 int flags)
756{
757 size_t written;
758 int r;
759 unsigned long expire;
760 const struct parport_pc_private *priv = port->physport->private_data;
761
762 /* Special case: a timeout of zero means we cannot call schedule().
763 * Also if O_NONBLOCK is set then use the default implementation. */
764 if (port->physport->cad->timeout <= PARPORT_INACTIVITY_O_NONBLOCK)
765 return parport_ieee1284_write_compat (port, buf,
766 length, flags);
767
768 /* Set up parallel port FIFO mode.*/
769 parport_pc_data_forward (port); /* Must be in PS2 mode */
770 parport_pc_frob_control (port, PARPORT_CONTROL_STROBE, 0);
771 r = change_mode (port, ECR_PPF); /* Parallel port FIFO */
772 if (r) printk (KERN_DEBUG "%s: Warning change_mode ECR_PPF failed\n", port->name);
773
774 port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA;
775
776 /* Write the data to the FIFO. */
Al Viro7fbacd52005-05-04 05:39:32 +0100777 written = parport_pc_fifo_write_block(port, buf, length);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700778
779 /* Finish up. */
780 /* For some hardware we don't want to touch the mode until
781 * the FIFO is empty, so allow 4 seconds for each position
782 * in the fifo.
783 */
784 expire = jiffies + (priv->fifo_depth * HZ * 4);
785 do {
786 /* Wait for the FIFO to empty */
787 r = change_mode (port, ECR_PS2);
788 if (r != -EBUSY) {
789 break;
790 }
791 } while (time_before (jiffies, expire));
792 if (r == -EBUSY) {
793
794 printk (KERN_DEBUG "%s: FIFO is stuck\n", port->name);
795
796 /* Prevent further data transfer. */
797 frob_set_mode (port, ECR_TST);
798
799 /* Adjust for the contents of the FIFO. */
800 for (written -= priv->fifo_depth; ; written++) {
801 if (inb (ECONTROL (port)) & 0x2) {
802 /* Full up. */
803 break;
804 }
805 outb (0, FIFO (port));
806 }
807
808 /* Reset the FIFO and return to PS2 mode. */
809 frob_set_mode (port, ECR_PS2);
810 }
811
812 r = parport_wait_peripheral (port,
813 PARPORT_STATUS_BUSY,
814 PARPORT_STATUS_BUSY);
815 if (r)
816 printk (KERN_DEBUG
817 "%s: BUSY timeout (%d) in compat_write_block_pio\n",
818 port->name, r);
819
820 port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
821
822 return written;
823}
824
825/* ECP */
826#ifdef CONFIG_PARPORT_1284
827static size_t parport_pc_ecp_write_block_pio (struct parport *port,
828 const void *buf, size_t length,
829 int flags)
830{
831 size_t written;
832 int r;
833 unsigned long expire;
834 const struct parport_pc_private *priv = port->physport->private_data;
835
836 /* Special case: a timeout of zero means we cannot call schedule().
837 * Also if O_NONBLOCK is set then use the default implementation. */
838 if (port->physport->cad->timeout <= PARPORT_INACTIVITY_O_NONBLOCK)
839 return parport_ieee1284_ecp_write_data (port, buf,
840 length, flags);
841
842 /* Switch to forward mode if necessary. */
843 if (port->physport->ieee1284.phase != IEEE1284_PH_FWD_IDLE) {
844 /* Event 47: Set nInit high. */
845 parport_frob_control (port,
846 PARPORT_CONTROL_INIT
847 | PARPORT_CONTROL_AUTOFD,
848 PARPORT_CONTROL_INIT
849 | PARPORT_CONTROL_AUTOFD);
850
851 /* Event 49: PError goes high. */
852 r = parport_wait_peripheral (port,
853 PARPORT_STATUS_PAPEROUT,
854 PARPORT_STATUS_PAPEROUT);
855 if (r) {
856 printk (KERN_DEBUG "%s: PError timeout (%d) "
857 "in ecp_write_block_pio\n", port->name, r);
858 }
859 }
860
861 /* Set up ECP parallel port mode.*/
862 parport_pc_data_forward (port); /* Must be in PS2 mode */
863 parport_pc_frob_control (port,
864 PARPORT_CONTROL_STROBE |
865 PARPORT_CONTROL_AUTOFD,
866 0);
867 r = change_mode (port, ECR_ECP); /* ECP FIFO */
868 if (r) printk (KERN_DEBUG "%s: Warning change_mode ECR_ECP failed\n", port->name);
869 port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA;
870
871 /* Write the data to the FIFO. */
Al Viro7fbacd52005-05-04 05:39:32 +0100872 written = parport_pc_fifo_write_block(port, buf, length);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700873
874 /* Finish up. */
875 /* For some hardware we don't want to touch the mode until
876 * the FIFO is empty, so allow 4 seconds for each position
877 * in the fifo.
878 */
879 expire = jiffies + (priv->fifo_depth * (HZ * 4));
880 do {
881 /* Wait for the FIFO to empty */
882 r = change_mode (port, ECR_PS2);
883 if (r != -EBUSY) {
884 break;
885 }
886 } while (time_before (jiffies, expire));
887 if (r == -EBUSY) {
888
889 printk (KERN_DEBUG "%s: FIFO is stuck\n", port->name);
890
891 /* Prevent further data transfer. */
892 frob_set_mode (port, ECR_TST);
893
894 /* Adjust for the contents of the FIFO. */
895 for (written -= priv->fifo_depth; ; written++) {
896 if (inb (ECONTROL (port)) & 0x2) {
897 /* Full up. */
898 break;
899 }
900 outb (0, FIFO (port));
901 }
902
903 /* Reset the FIFO and return to PS2 mode. */
904 frob_set_mode (port, ECR_PS2);
905
906 /* Host transfer recovery. */
907 parport_pc_data_reverse (port); /* Must be in PS2 mode */
908 udelay (5);
909 parport_frob_control (port, PARPORT_CONTROL_INIT, 0);
910 r = parport_wait_peripheral (port, PARPORT_STATUS_PAPEROUT, 0);
911 if (r)
912 printk (KERN_DEBUG "%s: PE,1 timeout (%d) "
913 "in ecp_write_block_pio\n", port->name, r);
914
915 parport_frob_control (port,
916 PARPORT_CONTROL_INIT,
917 PARPORT_CONTROL_INIT);
918 r = parport_wait_peripheral (port,
919 PARPORT_STATUS_PAPEROUT,
920 PARPORT_STATUS_PAPEROUT);
921 if (r)
922 printk (KERN_DEBUG "%s: PE,2 timeout (%d) "
923 "in ecp_write_block_pio\n", port->name, r);
924 }
925
926 r = parport_wait_peripheral (port,
927 PARPORT_STATUS_BUSY,
928 PARPORT_STATUS_BUSY);
929 if(r)
930 printk (KERN_DEBUG
931 "%s: BUSY timeout (%d) in ecp_write_block_pio\n",
932 port->name, r);
933
934 port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
935
936 return written;
937}
938
939#if 0
940static size_t parport_pc_ecp_read_block_pio (struct parport *port,
941 void *buf, size_t length,
942 int flags)
943{
944 size_t left = length;
945 size_t fifofull;
946 int r;
947 const int fifo = FIFO(port);
948 const struct parport_pc_private *priv = port->physport->private_data;
949 const int fifo_depth = priv->fifo_depth;
950 char *bufp = buf;
951
952 port = port->physport;
953DPRINTK (KERN_DEBUG "parport_pc: parport_pc_ecp_read_block_pio\n");
954dump_parport_state ("enter fcn", port);
955
956 /* Special case: a timeout of zero means we cannot call schedule().
957 * Also if O_NONBLOCK is set then use the default implementation. */
958 if (port->cad->timeout <= PARPORT_INACTIVITY_O_NONBLOCK)
959 return parport_ieee1284_ecp_read_data (port, buf,
960 length, flags);
961
962 if (port->ieee1284.mode == IEEE1284_MODE_ECPRLE) {
963 /* If the peripheral is allowed to send RLE compressed
964 * data, it is possible for a byte to expand to 128
965 * bytes in the FIFO. */
966 fifofull = 128;
967 } else {
968 fifofull = fifo_depth;
969 }
970
971 /* If the caller wants less than a full FIFO's worth of data,
972 * go through software emulation. Otherwise we may have to throw
973 * away data. */
974 if (length < fifofull)
975 return parport_ieee1284_ecp_read_data (port, buf,
976 length, flags);
977
978 if (port->ieee1284.phase != IEEE1284_PH_REV_IDLE) {
979 /* change to reverse-idle phase (must be in forward-idle) */
980
981 /* Event 38: Set nAutoFd low (also make sure nStrobe is high) */
982 parport_frob_control (port,
983 PARPORT_CONTROL_AUTOFD
984 | PARPORT_CONTROL_STROBE,
985 PARPORT_CONTROL_AUTOFD);
986 parport_pc_data_reverse (port); /* Must be in PS2 mode */
987 udelay (5);
988 /* Event 39: Set nInit low to initiate bus reversal */
989 parport_frob_control (port,
990 PARPORT_CONTROL_INIT,
991 0);
992 /* Event 40: Wait for nAckReverse (PError) to go low */
993 r = parport_wait_peripheral (port, PARPORT_STATUS_PAPEROUT, 0);
994 if (r) {
995 printk (KERN_DEBUG "%s: PE timeout Event 40 (%d) "
996 "in ecp_read_block_pio\n", port->name, r);
997 return 0;
998 }
999 }
1000
1001 /* Set up ECP FIFO mode.*/
1002/* parport_pc_frob_control (port,
1003 PARPORT_CONTROL_STROBE |
1004 PARPORT_CONTROL_AUTOFD,
1005 PARPORT_CONTROL_AUTOFD); */
1006 r = change_mode (port, ECR_ECP); /* ECP FIFO */
1007 if (r) printk (KERN_DEBUG "%s: Warning change_mode ECR_ECP failed\n", port->name);
1008
1009 port->ieee1284.phase = IEEE1284_PH_REV_DATA;
1010
1011 /* the first byte must be collected manually */
1012dump_parport_state ("pre 43", port);
1013 /* Event 43: Wait for nAck to go low */
1014 r = parport_wait_peripheral (port, PARPORT_STATUS_ACK, 0);
1015 if (r) {
1016 /* timed out while reading -- no data */
1017 printk (KERN_DEBUG "PIO read timed out (initial byte)\n");
1018 goto out_no_data;
1019 }
1020 /* read byte */
1021 *bufp++ = inb (DATA (port));
1022 left--;
1023dump_parport_state ("43-44", port);
1024 /* Event 44: nAutoFd (HostAck) goes high to acknowledge */
1025 parport_pc_frob_control (port,
1026 PARPORT_CONTROL_AUTOFD,
1027 0);
1028dump_parport_state ("pre 45", port);
1029 /* Event 45: Wait for nAck to go high */
1030/* r = parport_wait_peripheral (port, PARPORT_STATUS_ACK, PARPORT_STATUS_ACK); */
1031dump_parport_state ("post 45", port);
1032r = 0;
1033 if (r) {
1034 /* timed out while waiting for peripheral to respond to ack */
1035 printk (KERN_DEBUG "ECP PIO read timed out (waiting for nAck)\n");
1036
1037 /* keep hold of the byte we've got already */
1038 goto out_no_data;
1039 }
1040 /* Event 46: nAutoFd (HostAck) goes low to accept more data */
1041 parport_pc_frob_control (port,
1042 PARPORT_CONTROL_AUTOFD,
1043 PARPORT_CONTROL_AUTOFD);
1044
1045
1046dump_parport_state ("rev idle", port);
1047 /* Do the transfer. */
1048 while (left > fifofull) {
1049 int ret;
1050 unsigned long expire = jiffies + port->cad->timeout;
1051 unsigned char ecrval = inb (ECONTROL (port));
1052
1053 if (need_resched() && time_before (jiffies, expire))
1054 /* Can't yield the port. */
1055 schedule ();
1056
1057 /* At this point, the FIFO may already be full. In
1058 * that case ECP is already holding back the
1059 * peripheral (assuming proper design) with a delayed
1060 * handshake. Work fast to avoid a peripheral
1061 * timeout. */
1062
1063 if (ecrval & 0x01) {
1064 /* FIFO is empty. Wait for interrupt. */
1065dump_parport_state ("FIFO empty", port);
1066
1067 /* Anyone else waiting for the port? */
1068 if (port->waithead) {
1069 printk (KERN_DEBUG "Somebody wants the port\n");
1070 break;
1071 }
1072
1073 /* Clear serviceIntr */
1074 ECR_WRITE (port, ecrval & ~(1<<2));
1075 false_alarm:
1076dump_parport_state ("waiting", port);
1077 ret = parport_wait_event (port, HZ);
1078DPRINTK (KERN_DEBUG "parport_wait_event returned %d\n", ret);
1079 if (ret < 0)
1080 break;
1081 ret = 0;
1082 if (!time_before (jiffies, expire)) {
1083 /* Timed out. */
1084dump_parport_state ("timeout", port);
1085 printk (KERN_DEBUG "PIO read timed out\n");
1086 break;
1087 }
1088 ecrval = inb (ECONTROL (port));
1089 if (!(ecrval & (1<<2))) {
1090 if (need_resched() &&
1091 time_before (jiffies, expire)) {
1092 schedule ();
1093 }
1094 goto false_alarm;
1095 }
1096
1097 /* Depending on how the FIFO threshold was
1098 * set, how long interrupt service took, and
1099 * how fast the peripheral is, we might be
1100 * lucky and have a just filled FIFO. */
1101 continue;
1102 }
1103
1104 if (ecrval & 0x02) {
1105 /* FIFO is full. */
1106dump_parport_state ("FIFO full", port);
1107 insb (fifo, bufp, fifo_depth);
1108 bufp += fifo_depth;
1109 left -= fifo_depth;
1110 continue;
1111 }
1112
1113DPRINTK (KERN_DEBUG "*** ecp_read_block_pio: reading one byte from the FIFO\n");
1114
1115 /* FIFO not filled. We will cycle this loop for a while
1116 * and either the peripheral will fill it faster,
1117 * tripping a fast empty with insb, or we empty it. */
1118 *bufp++ = inb (fifo);
1119 left--;
1120 }
1121
1122 /* scoop up anything left in the FIFO */
1123 while (left && !(inb (ECONTROL (port) & 0x01))) {
1124 *bufp++ = inb (fifo);
1125 left--;
1126 }
1127
1128 port->ieee1284.phase = IEEE1284_PH_REV_IDLE;
1129dump_parport_state ("rev idle2", port);
1130
1131out_no_data:
1132
1133 /* Go to forward idle mode to shut the peripheral up (event 47). */
1134 parport_frob_control (port, PARPORT_CONTROL_INIT, PARPORT_CONTROL_INIT);
1135
1136 /* event 49: PError goes high */
1137 r = parport_wait_peripheral (port,
1138 PARPORT_STATUS_PAPEROUT,
1139 PARPORT_STATUS_PAPEROUT);
1140 if (r) {
1141 printk (KERN_DEBUG
1142 "%s: PE timeout FWDIDLE (%d) in ecp_read_block_pio\n",
1143 port->name, r);
1144 }
1145
1146 port->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
1147
1148 /* Finish up. */
1149 {
1150 int lost = get_fifo_residue (port);
1151 if (lost)
1152 /* Shouldn't happen with compliant peripherals. */
1153 printk (KERN_DEBUG "%s: DATA LOSS (%d bytes)!\n",
1154 port->name, lost);
1155 }
1156
1157dump_parport_state ("fwd idle", port);
1158 return length - left;
1159}
1160#endif /* 0 */
1161#endif /* IEEE 1284 support */
1162#endif /* Allowed to use FIFO/DMA */
1163
1164
1165/*
1166 * ******************************************
1167 * INITIALISATION AND MODULE STUFF BELOW HERE
1168 * ******************************************
1169 */
1170
1171/* GCC is not inlining extern inline function later overwriten to non-inline,
1172 so we use outlined_ variants here. */
Marko Kohtalaa6767b72006-01-06 00:19:48 -08001173static const struct parport_operations parport_pc_ops =
Linus Torvalds1da177e2005-04-16 15:20:36 -07001174{
1175 .write_data = parport_pc_write_data,
1176 .read_data = parport_pc_read_data,
1177
1178 .write_control = parport_pc_write_control,
1179 .read_control = parport_pc_read_control,
1180 .frob_control = parport_pc_frob_control,
1181
1182 .read_status = parport_pc_read_status,
1183
1184 .enable_irq = parport_pc_enable_irq,
1185 .disable_irq = parport_pc_disable_irq,
1186
1187 .data_forward = parport_pc_data_forward,
1188 .data_reverse = parport_pc_data_reverse,
1189
1190 .init_state = parport_pc_init_state,
1191 .save_state = parport_pc_save_state,
1192 .restore_state = parport_pc_restore_state,
1193
1194 .epp_write_data = parport_ieee1284_epp_write_data,
1195 .epp_read_data = parport_ieee1284_epp_read_data,
1196 .epp_write_addr = parport_ieee1284_epp_write_addr,
1197 .epp_read_addr = parport_ieee1284_epp_read_addr,
1198
1199 .ecp_write_data = parport_ieee1284_ecp_write_data,
1200 .ecp_read_data = parport_ieee1284_ecp_read_data,
1201 .ecp_write_addr = parport_ieee1284_ecp_write_addr,
1202
1203 .compat_write_data = parport_ieee1284_write_compat,
1204 .nibble_read_data = parport_ieee1284_read_nibble,
1205 .byte_read_data = parport_ieee1284_read_byte,
1206
1207 .owner = THIS_MODULE,
1208};
1209
1210#ifdef CONFIG_PARPORT_PC_SUPERIO
1211/* Super-IO chipset detection, Winbond, SMSC */
1212static void __devinit show_parconfig_smsc37c669(int io, int key)
1213{
1214 int cr1,cr4,cra,cr23,cr26,cr27,i=0;
Marko Kohtalaa6767b72006-01-06 00:19:48 -08001215 static const char *const modes[]={
1216 "SPP and Bidirectional (PS/2)",
1217 "EPP and SPP",
1218 "ECP",
1219 "ECP and EPP" };
Linus Torvalds1da177e2005-04-16 15:20:36 -07001220
1221 outb(key,io);
1222 outb(key,io);
1223 outb(1,io);
1224 cr1=inb(io+1);
1225 outb(4,io);
1226 cr4=inb(io+1);
1227 outb(0x0a,io);
1228 cra=inb(io+1);
1229 outb(0x23,io);
1230 cr23=inb(io+1);
1231 outb(0x26,io);
1232 cr26=inb(io+1);
1233 outb(0x27,io);
1234 cr27=inb(io+1);
1235 outb(0xaa,io);
1236
1237 if (verbose_probing) {
1238 printk (KERN_INFO "SMSC 37c669 LPT Config: cr_1=0x%02x, 4=0x%02x, "
1239 "A=0x%2x, 23=0x%02x, 26=0x%02x, 27=0x%02x\n",
1240 cr1,cr4,cra,cr23,cr26,cr27);
1241
1242 /* The documentation calls DMA and IRQ-Lines by letters, so
1243 the board maker can/will wire them
1244 appropriately/randomly... G=reserved H=IDE-irq, */
1245 printk (KERN_INFO "SMSC LPT Config: io=0x%04x, irq=%c, dma=%c, "
1246 "fifo threshold=%d\n", cr23*4,
1247 (cr27 &0x0f) ? 'A'-1+(cr27 &0x0f): '-',
1248 (cr26 &0x0f) ? 'A'-1+(cr26 &0x0f): '-', cra & 0x0f);
1249 printk(KERN_INFO "SMSC LPT Config: enabled=%s power=%s\n",
1250 (cr23*4 >=0x100) ?"yes":"no", (cr1 & 4) ? "yes" : "no");
1251 printk(KERN_INFO "SMSC LPT Config: Port mode=%s, EPP version =%s\n",
1252 (cr1 & 0x08 ) ? "Standard mode only (SPP)" : modes[cr4 & 0x03],
1253 (cr4 & 0x40) ? "1.7" : "1.9");
1254 }
1255
1256 /* Heuristics ! BIOS setup for this mainboard device limits
1257 the choices to standard settings, i.e. io-address and IRQ
1258 are related, however DMA can be 1 or 3, assume DMA_A=DMA1,
1259 DMA_C=DMA3 (this is true e.g. for TYAN 1564D Tomcat IV) */
1260 if(cr23*4 >=0x100) { /* if active */
1261 while((superios[i].io!= 0) && (i<NR_SUPERIOS))
1262 i++;
1263 if(i==NR_SUPERIOS)
1264 printk(KERN_INFO "Super-IO: too many chips!\n");
1265 else {
1266 int d;
1267 switch (cr23*4) {
1268 case 0x3bc:
1269 superios[i].io = 0x3bc;
1270 superios[i].irq = 7;
1271 break;
1272 case 0x378:
1273 superios[i].io = 0x378;
1274 superios[i].irq = 7;
1275 break;
1276 case 0x278:
1277 superios[i].io = 0x278;
1278 superios[i].irq = 5;
1279 }
1280 d=(cr26 &0x0f);
1281 if((d==1) || (d==3))
1282 superios[i].dma= d;
1283 else
1284 superios[i].dma= PARPORT_DMA_NONE;
1285 }
1286 }
1287}
1288
1289
1290static void __devinit show_parconfig_winbond(int io, int key)
1291{
1292 int cr30,cr60,cr61,cr70,cr74,crf0,i=0;
Marko Kohtalaa6767b72006-01-06 00:19:48 -08001293 static const char *const modes[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001294 "Standard (SPP) and Bidirectional(PS/2)", /* 0 */
1295 "EPP-1.9 and SPP",
1296 "ECP",
1297 "ECP and EPP-1.9",
1298 "Standard (SPP)",
1299 "EPP-1.7 and SPP", /* 5 */
1300 "undefined!",
1301 "ECP and EPP-1.7" };
Marko Kohtalaa6767b72006-01-06 00:19:48 -08001302 static char *const irqtypes[] = {
1303 "pulsed low, high-Z",
1304 "follows nACK" };
Linus Torvalds1da177e2005-04-16 15:20:36 -07001305
1306 /* The registers are called compatible-PnP because the
1307 register layout is modelled after ISA-PnP, the access
1308 method is just another ... */
1309 outb(key,io);
1310 outb(key,io);
1311 outb(0x07,io); /* Register 7: Select Logical Device */
1312 outb(0x01,io+1); /* LD1 is Parallel Port */
1313 outb(0x30,io);
1314 cr30=inb(io+1);
1315 outb(0x60,io);
1316 cr60=inb(io+1);
1317 outb(0x61,io);
1318 cr61=inb(io+1);
1319 outb(0x70,io);
1320 cr70=inb(io+1);
1321 outb(0x74,io);
1322 cr74=inb(io+1);
1323 outb(0xf0,io);
1324 crf0=inb(io+1);
1325 outb(0xaa,io);
1326
1327 if (verbose_probing) {
1328 printk(KERN_INFO "Winbond LPT Config: cr_30=%02x 60,61=%02x%02x "
1329 "70=%02x 74=%02x, f0=%02x\n", cr30,cr60,cr61,cr70,cr74,crf0);
1330 printk(KERN_INFO "Winbond LPT Config: active=%s, io=0x%02x%02x irq=%d, ",
1331 (cr30 & 0x01) ? "yes":"no", cr60,cr61,cr70&0x0f );
1332 if ((cr74 & 0x07) > 3)
1333 printk("dma=none\n");
1334 else
1335 printk("dma=%d\n",cr74 & 0x07);
1336 printk(KERN_INFO "Winbond LPT Config: irqtype=%s, ECP fifo threshold=%d\n",
1337 irqtypes[crf0>>7], (crf0>>3)&0x0f);
1338 printk(KERN_INFO "Winbond LPT Config: Port mode=%s\n", modes[crf0 & 0x07]);
1339 }
1340
1341 if(cr30 & 0x01) { /* the settings can be interrogated later ... */
1342 while((superios[i].io!= 0) && (i<NR_SUPERIOS))
1343 i++;
1344 if(i==NR_SUPERIOS)
1345 printk(KERN_INFO "Super-IO: too many chips!\n");
1346 else {
1347 superios[i].io = (cr60<<8)|cr61;
1348 superios[i].irq = cr70&0x0f;
1349 superios[i].dma = (((cr74 & 0x07) > 3) ?
1350 PARPORT_DMA_NONE : (cr74 & 0x07));
1351 }
1352 }
1353}
1354
1355static void __devinit decode_winbond(int efer, int key, int devid, int devrev, int oldid)
1356{
1357 const char *type = "unknown";
1358 int id,progif=2;
1359
1360 if (devid == devrev)
1361 /* simple heuristics, we happened to read some
1362 non-winbond register */
1363 return;
1364
1365 id=(devid<<8) | devrev;
1366
1367 /* Values are from public data sheets pdf files, I can just
1368 confirm 83977TF is correct :-) */
1369 if (id == 0x9771) type="83977F/AF";
1370 else if (id == 0x9773) type="83977TF / SMSC 97w33x/97w34x";
1371 else if (id == 0x9774) type="83977ATF";
1372 else if ((id & ~0x0f) == 0x5270) type="83977CTF / SMSC 97w36x";
1373 else if ((id & ~0x0f) == 0x52f0) type="83977EF / SMSC 97w35x";
1374 else if ((id & ~0x0f) == 0x5210) type="83627";
1375 else if ((id & ~0x0f) == 0x6010) type="83697HF";
1376 else if ((oldid &0x0f ) == 0x0a) { type="83877F"; progif=1;}
1377 else if ((oldid &0x0f ) == 0x0b) { type="83877AF"; progif=1;}
1378 else if ((oldid &0x0f ) == 0x0c) { type="83877TF"; progif=1;}
1379 else if ((oldid &0x0f ) == 0x0d) { type="83877ATF"; progif=1;}
1380 else progif=0;
1381
1382 if (verbose_probing)
1383 printk(KERN_INFO "Winbond chip at EFER=0x%x key=0x%02x "
1384 "devid=%02x devrev=%02x oldid=%02x type=%s\n",
1385 efer, key, devid, devrev, oldid, type);
1386
1387 if (progif == 2)
1388 show_parconfig_winbond(efer,key);
1389}
1390
1391static void __devinit decode_smsc(int efer, int key, int devid, int devrev)
1392{
1393 const char *type = "unknown";
1394 void (*func)(int io, int key);
1395 int id;
1396
1397 if (devid == devrev)
1398 /* simple heuristics, we happened to read some
1399 non-smsc register */
1400 return;
1401
1402 func=NULL;
1403 id=(devid<<8) | devrev;
1404
1405 if (id==0x0302) {type="37c669"; func=show_parconfig_smsc37c669;}
1406 else if (id==0x6582) type="37c665IR";
1407 else if (devid==0x65) type="37c665GT";
1408 else if (devid==0x66) type="37c666GT";
1409
1410 if (verbose_probing)
1411 printk(KERN_INFO "SMSC chip at EFER=0x%x "
1412 "key=0x%02x devid=%02x devrev=%02x type=%s\n",
1413 efer, key, devid, devrev, type);
1414
1415 if (func)
1416 func(efer,key);
1417}
1418
1419
1420static void __devinit winbond_check(int io, int key)
1421{
1422 int devid,devrev,oldid,x_devid,x_devrev,x_oldid;
1423
1424 if (!request_region(io, 3, __FUNCTION__))
1425 return;
1426
1427 /* First probe without key */
1428 outb(0x20,io);
1429 x_devid=inb(io+1);
1430 outb(0x21,io);
1431 x_devrev=inb(io+1);
1432 outb(0x09,io);
1433 x_oldid=inb(io+1);
1434
1435 outb(key,io);
1436 outb(key,io); /* Write Magic Sequence to EFER, extended
1437 funtion enable register */
1438 outb(0x20,io); /* Write EFIR, extended function index register */
1439 devid=inb(io+1); /* Read EFDR, extended function data register */
1440 outb(0x21,io);
1441 devrev=inb(io+1);
1442 outb(0x09,io);
1443 oldid=inb(io+1);
1444 outb(0xaa,io); /* Magic Seal */
1445
1446 if ((x_devid == devid) && (x_devrev == devrev) && (x_oldid == oldid))
1447 goto out; /* protection against false positives */
1448
1449 decode_winbond(io,key,devid,devrev,oldid);
1450out:
1451 release_region(io, 3);
1452}
1453
1454static void __devinit winbond_check2(int io,int key)
1455{
1456 int devid,devrev,oldid,x_devid,x_devrev,x_oldid;
1457
1458 if (!request_region(io, 3, __FUNCTION__))
1459 return;
1460
1461 /* First probe without the key */
1462 outb(0x20,io+2);
1463 x_devid=inb(io+2);
1464 outb(0x21,io+1);
1465 x_devrev=inb(io+2);
1466 outb(0x09,io+1);
1467 x_oldid=inb(io+2);
1468
1469 outb(key,io); /* Write Magic Byte to EFER, extended
1470 funtion enable register */
1471 outb(0x20,io+2); /* Write EFIR, extended function index register */
1472 devid=inb(io+2); /* Read EFDR, extended function data register */
1473 outb(0x21,io+1);
1474 devrev=inb(io+2);
1475 outb(0x09,io+1);
1476 oldid=inb(io+2);
1477 outb(0xaa,io); /* Magic Seal */
1478
1479 if ((x_devid == devid) && (x_devrev == devrev) && (x_oldid == oldid))
1480 goto out; /* protection against false positives */
1481
1482 decode_winbond(io,key,devid,devrev,oldid);
1483out:
1484 release_region(io, 3);
1485}
1486
1487static void __devinit smsc_check(int io, int key)
1488{
1489 int id,rev,oldid,oldrev,x_id,x_rev,x_oldid,x_oldrev;
1490
1491 if (!request_region(io, 3, __FUNCTION__))
1492 return;
1493
1494 /* First probe without the key */
1495 outb(0x0d,io);
1496 x_oldid=inb(io+1);
1497 outb(0x0e,io);
1498 x_oldrev=inb(io+1);
1499 outb(0x20,io);
1500 x_id=inb(io+1);
1501 outb(0x21,io);
1502 x_rev=inb(io+1);
1503
1504 outb(key,io);
1505 outb(key,io); /* Write Magic Sequence to EFER, extended
1506 funtion enable register */
1507 outb(0x0d,io); /* Write EFIR, extended function index register */
1508 oldid=inb(io+1); /* Read EFDR, extended function data register */
1509 outb(0x0e,io);
1510 oldrev=inb(io+1);
1511 outb(0x20,io);
1512 id=inb(io+1);
1513 outb(0x21,io);
1514 rev=inb(io+1);
1515 outb(0xaa,io); /* Magic Seal */
1516
1517 if ((x_id == id) && (x_oldrev == oldrev) &&
1518 (x_oldid == oldid) && (x_rev == rev))
1519 goto out; /* protection against false positives */
1520
1521 decode_smsc(io,key,oldid,oldrev);
1522out:
1523 release_region(io, 3);
1524}
1525
1526
1527static void __devinit detect_and_report_winbond (void)
1528{
1529 if (verbose_probing)
1530 printk(KERN_DEBUG "Winbond Super-IO detection, now testing ports 3F0,370,250,4E,2E ...\n");
1531 winbond_check(0x3f0,0x87);
1532 winbond_check(0x370,0x87);
1533 winbond_check(0x2e ,0x87);
1534 winbond_check(0x4e ,0x87);
1535 winbond_check(0x3f0,0x86);
1536 winbond_check2(0x250,0x88);
1537 winbond_check2(0x250,0x89);
1538}
1539
1540static void __devinit detect_and_report_smsc (void)
1541{
1542 if (verbose_probing)
1543 printk(KERN_DEBUG "SMSC Super-IO detection, now testing Ports 2F0, 370 ...\n");
1544 smsc_check(0x3f0,0x55);
1545 smsc_check(0x370,0x55);
1546 smsc_check(0x3f0,0x44);
1547 smsc_check(0x370,0x44);
1548}
1549#endif /* CONFIG_PARPORT_PC_SUPERIO */
1550
Jean Delvare0bb92e62007-02-20 13:58:18 -08001551static int get_superio_dma (struct parport *p)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001552{
1553 int i=0;
1554 while( (superios[i].io != p->base) && (i<NR_SUPERIOS))
1555 i++;
1556 if (i!=NR_SUPERIOS)
1557 return superios[i].dma;
1558 return PARPORT_DMA_NONE;
1559}
1560
Randy.Dunlap96766a32006-04-18 22:21:57 -07001561static int get_superio_irq (struct parport *p)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001562{
1563 int i=0;
1564 while( (superios[i].io != p->base) && (i<NR_SUPERIOS))
1565 i++;
1566 if (i!=NR_SUPERIOS)
1567 return superios[i].irq;
1568 return PARPORT_IRQ_NONE;
1569}
1570
1571
1572/* --- Mode detection ------------------------------------- */
1573
1574/*
1575 * Checks for port existence, all ports support SPP MODE
1576 * Returns:
1577 * 0 : No parallel port at this address
1578 * PARPORT_MODE_PCSPP : SPP port detected
1579 * (if the user specified an ioport himself,
1580 * this shall always be the case!)
1581 *
1582 */
Randy.Dunlap96766a32006-04-18 22:21:57 -07001583static int parport_SPP_supported(struct parport *pb)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001584{
1585 unsigned char r, w;
1586
1587 /*
1588 * first clear an eventually pending EPP timeout
1589 * I (sailer@ife.ee.ethz.ch) have an SMSC chipset
1590 * that does not even respond to SPP cycles if an EPP
1591 * timeout is pending
1592 */
1593 clear_epp_timeout(pb);
1594
1595 /* Do a simple read-write test to make sure the port exists. */
1596 w = 0xc;
1597 outb (w, CONTROL (pb));
1598
1599 /* Is there a control register that we can read from? Some
1600 * ports don't allow reads, so read_control just returns a
1601 * software copy. Some ports _do_ allow reads, so bypass the
1602 * software copy here. In addition, some bits aren't
1603 * writable. */
1604 r = inb (CONTROL (pb));
1605 if ((r & 0xf) == w) {
1606 w = 0xe;
1607 outb (w, CONTROL (pb));
1608 r = inb (CONTROL (pb));
1609 outb (0xc, CONTROL (pb));
1610 if ((r & 0xf) == w)
1611 return PARPORT_MODE_PCSPP;
1612 }
1613
1614 if (user_specified)
1615 /* That didn't work, but the user thinks there's a
1616 * port here. */
1617 printk (KERN_INFO "parport 0x%lx (WARNING): CTR: "
1618 "wrote 0x%02x, read 0x%02x\n", pb->base, w, r);
1619
1620 /* Try the data register. The data lines aren't tri-stated at
1621 * this stage, so we expect back what we wrote. */
1622 w = 0xaa;
1623 parport_pc_write_data (pb, w);
1624 r = parport_pc_read_data (pb);
1625 if (r == w) {
1626 w = 0x55;
1627 parport_pc_write_data (pb, w);
1628 r = parport_pc_read_data (pb);
1629 if (r == w)
1630 return PARPORT_MODE_PCSPP;
1631 }
1632
1633 if (user_specified) {
1634 /* Didn't work, but the user is convinced this is the
1635 * place. */
1636 printk (KERN_INFO "parport 0x%lx (WARNING): DATA: "
1637 "wrote 0x%02x, read 0x%02x\n", pb->base, w, r);
1638 printk (KERN_INFO "parport 0x%lx: You gave this address, "
1639 "but there is probably no parallel port there!\n",
1640 pb->base);
1641 }
1642
1643 /* It's possible that we can't read the control register or
1644 * the data register. In that case just believe the user. */
1645 if (user_specified)
1646 return PARPORT_MODE_PCSPP;
1647
1648 return 0;
1649}
1650
1651/* Check for ECR
1652 *
1653 * Old style XT ports alias io ports every 0x400, hence accessing ECR
1654 * on these cards actually accesses the CTR.
1655 *
1656 * Modern cards don't do this but reading from ECR will return 0xff
1657 * regardless of what is written here if the card does NOT support
1658 * ECP.
1659 *
1660 * We first check to see if ECR is the same as CTR. If not, the low
1661 * two bits of ECR aren't writable, so we check by writing ECR and
1662 * reading it back to see if it's what we expect.
1663 */
Randy.Dunlap96766a32006-04-18 22:21:57 -07001664static int parport_ECR_present(struct parport *pb)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001665{
1666 struct parport_pc_private *priv = pb->private_data;
1667 unsigned char r = 0xc;
1668
1669 outb (r, CONTROL (pb));
1670 if ((inb (ECONTROL (pb)) & 0x3) == (r & 0x3)) {
1671 outb (r ^ 0x2, CONTROL (pb)); /* Toggle bit 1 */
1672
1673 r = inb (CONTROL (pb));
1674 if ((inb (ECONTROL (pb)) & 0x2) == (r & 0x2))
1675 goto no_reg; /* Sure that no ECR register exists */
1676 }
1677
1678 if ((inb (ECONTROL (pb)) & 0x3 ) != 0x1)
1679 goto no_reg;
1680
1681 ECR_WRITE (pb, 0x34);
1682 if (inb (ECONTROL (pb)) != 0x35)
1683 goto no_reg;
1684
1685 priv->ecr = 1;
1686 outb (0xc, CONTROL (pb));
1687
1688 /* Go to mode 000 */
1689 frob_set_mode (pb, ECR_SPP);
1690
1691 return 1;
1692
1693 no_reg:
1694 outb (0xc, CONTROL (pb));
1695 return 0;
1696}
1697
1698#ifdef CONFIG_PARPORT_1284
1699/* Detect PS/2 support.
1700 *
1701 * Bit 5 (0x20) sets the PS/2 data direction; setting this high
1702 * allows us to read data from the data lines. In theory we would get back
1703 * 0xff but any peripheral attached to the port may drag some or all of the
1704 * lines down to zero. So if we get back anything that isn't the contents
1705 * of the data register we deem PS/2 support to be present.
1706 *
1707 * Some SPP ports have "half PS/2" ability - you can't turn off the line
1708 * drivers, but an external peripheral with sufficiently beefy drivers of
1709 * its own can overpower them and assert its own levels onto the bus, from
1710 * where they can then be read back as normal. Ports with this property
1711 * and the right type of device attached are likely to fail the SPP test,
1712 * (as they will appear to have stuck bits) and so the fact that they might
1713 * be misdetected here is rather academic.
1714 */
1715
Randy.Dunlap96766a32006-04-18 22:21:57 -07001716static int parport_PS2_supported(struct parport *pb)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001717{
1718 int ok = 0;
1719
1720 clear_epp_timeout(pb);
1721
1722 /* try to tri-state the buffer */
1723 parport_pc_data_reverse (pb);
1724
1725 parport_pc_write_data(pb, 0x55);
1726 if (parport_pc_read_data(pb) != 0x55) ok++;
1727
1728 parport_pc_write_data(pb, 0xaa);
1729 if (parport_pc_read_data(pb) != 0xaa) ok++;
1730
1731 /* cancel input mode */
1732 parport_pc_data_forward (pb);
1733
1734 if (ok) {
1735 pb->modes |= PARPORT_MODE_TRISTATE;
1736 } else {
1737 struct parport_pc_private *priv = pb->private_data;
1738 priv->ctr_writable &= ~0x20;
1739 }
1740
1741 return ok;
1742}
1743
1744#ifdef CONFIG_PARPORT_PC_FIFO
1745static int __devinit parport_ECP_supported(struct parport *pb)
1746{
1747 int i;
1748 int config, configb;
1749 int pword;
1750 struct parport_pc_private *priv = pb->private_data;
1751 /* Translate ECP intrLine to ISA irq value */
1752 static const int intrline[]= { 0, 7, 9, 10, 11, 14, 15, 5 };
1753
1754 /* If there is no ECR, we have no hope of supporting ECP. */
1755 if (!priv->ecr)
1756 return 0;
1757
1758 /* Find out FIFO depth */
1759 ECR_WRITE (pb, ECR_SPP << 5); /* Reset FIFO */
1760 ECR_WRITE (pb, ECR_TST << 5); /* TEST FIFO */
1761 for (i=0; i < 1024 && !(inb (ECONTROL (pb)) & 0x02); i++)
1762 outb (0xaa, FIFO (pb));
1763
1764 /*
1765 * Using LGS chipset it uses ECR register, but
1766 * it doesn't support ECP or FIFO MODE
1767 */
1768 if (i == 1024) {
1769 ECR_WRITE (pb, ECR_SPP << 5);
1770 return 0;
1771 }
1772
1773 priv->fifo_depth = i;
1774 if (verbose_probing)
1775 printk (KERN_DEBUG "0x%lx: FIFO is %d bytes\n", pb->base, i);
1776
1777 /* Find out writeIntrThreshold */
1778 frob_econtrol (pb, 1<<2, 1<<2);
1779 frob_econtrol (pb, 1<<2, 0);
1780 for (i = 1; i <= priv->fifo_depth; i++) {
1781 inb (FIFO (pb));
1782 udelay (50);
1783 if (inb (ECONTROL (pb)) & (1<<2))
1784 break;
1785 }
1786
1787 if (i <= priv->fifo_depth) {
1788 if (verbose_probing)
1789 printk (KERN_DEBUG "0x%lx: writeIntrThreshold is %d\n",
1790 pb->base, i);
1791 } else
1792 /* Number of bytes we know we can write if we get an
1793 interrupt. */
1794 i = 0;
1795
1796 priv->writeIntrThreshold = i;
1797
1798 /* Find out readIntrThreshold */
1799 frob_set_mode (pb, ECR_PS2); /* Reset FIFO and enable PS2 */
1800 parport_pc_data_reverse (pb); /* Must be in PS2 mode */
1801 frob_set_mode (pb, ECR_TST); /* Test FIFO */
1802 frob_econtrol (pb, 1<<2, 1<<2);
1803 frob_econtrol (pb, 1<<2, 0);
1804 for (i = 1; i <= priv->fifo_depth; i++) {
1805 outb (0xaa, FIFO (pb));
1806 if (inb (ECONTROL (pb)) & (1<<2))
1807 break;
1808 }
1809
1810 if (i <= priv->fifo_depth) {
1811 if (verbose_probing)
1812 printk (KERN_INFO "0x%lx: readIntrThreshold is %d\n",
1813 pb->base, i);
1814 } else
1815 /* Number of bytes we can read if we get an interrupt. */
1816 i = 0;
1817
1818 priv->readIntrThreshold = i;
1819
1820 ECR_WRITE (pb, ECR_SPP << 5); /* Reset FIFO */
1821 ECR_WRITE (pb, 0xf4); /* Configuration mode */
1822 config = inb (CONFIGA (pb));
1823 pword = (config >> 4) & 0x7;
1824 switch (pword) {
1825 case 0:
1826 pword = 2;
1827 printk (KERN_WARNING "0x%lx: Unsupported pword size!\n",
1828 pb->base);
1829 break;
1830 case 2:
1831 pword = 4;
1832 printk (KERN_WARNING "0x%lx: Unsupported pword size!\n",
1833 pb->base);
1834 break;
1835 default:
1836 printk (KERN_WARNING "0x%lx: Unknown implementation ID\n",
1837 pb->base);
1838 /* Assume 1 */
1839 case 1:
1840 pword = 1;
1841 }
1842 priv->pword = pword;
1843
1844 if (verbose_probing) {
1845 printk (KERN_DEBUG "0x%lx: PWord is %d bits\n", pb->base, 8 * pword);
1846
1847 printk (KERN_DEBUG "0x%lx: Interrupts are ISA-%s\n", pb->base,
1848 config & 0x80 ? "Level" : "Pulses");
1849
1850 configb = inb (CONFIGB (pb));
1851 printk (KERN_DEBUG "0x%lx: ECP port cfgA=0x%02x cfgB=0x%02x\n",
1852 pb->base, config, configb);
1853 printk (KERN_DEBUG "0x%lx: ECP settings irq=", pb->base);
1854 if ((configb >>3) & 0x07)
1855 printk("%d",intrline[(configb >>3) & 0x07]);
1856 else
1857 printk("<none or set by other means>");
1858 printk (" dma=");
1859 if( (configb & 0x03 ) == 0x00)
1860 printk("<none or set by other means>\n");
1861 else
1862 printk("%d\n",configb & 0x07);
1863 }
1864
1865 /* Go back to mode 000 */
1866 frob_set_mode (pb, ECR_SPP);
1867
1868 return 1;
1869}
1870#endif
1871
Randy.Dunlap96766a32006-04-18 22:21:57 -07001872static int parport_ECPPS2_supported(struct parport *pb)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001873{
1874 const struct parport_pc_private *priv = pb->private_data;
1875 int result;
1876 unsigned char oecr;
1877
1878 if (!priv->ecr)
1879 return 0;
1880
1881 oecr = inb (ECONTROL (pb));
1882 ECR_WRITE (pb, ECR_PS2 << 5);
1883 result = parport_PS2_supported(pb);
1884 ECR_WRITE (pb, oecr);
1885 return result;
1886}
1887
1888/* EPP mode detection */
1889
Randy.Dunlap96766a32006-04-18 22:21:57 -07001890static int parport_EPP_supported(struct parport *pb)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001891{
1892 const struct parport_pc_private *priv = pb->private_data;
1893
1894 /*
1895 * Theory:
1896 * Bit 0 of STR is the EPP timeout bit, this bit is 0
1897 * when EPP is possible and is set high when an EPP timeout
1898 * occurs (EPP uses the HALT line to stop the CPU while it does
1899 * the byte transfer, an EPP timeout occurs if the attached
1900 * device fails to respond after 10 micro seconds).
1901 *
1902 * This bit is cleared by either reading it (National Semi)
1903 * or writing a 1 to the bit (SMC, UMC, WinBond), others ???
1904 * This bit is always high in non EPP modes.
1905 */
1906
1907 /* If EPP timeout bit clear then EPP available */
1908 if (!clear_epp_timeout(pb)) {
1909 return 0; /* No way to clear timeout */
1910 }
1911
1912 /* Check for Intel bug. */
1913 if (priv->ecr) {
1914 unsigned char i;
1915 for (i = 0x00; i < 0x80; i += 0x20) {
1916 ECR_WRITE (pb, i);
1917 if (clear_epp_timeout (pb)) {
1918 /* Phony EPP in ECP. */
1919 return 0;
1920 }
1921 }
1922 }
1923
1924 pb->modes |= PARPORT_MODE_EPP;
1925
1926 /* Set up access functions to use EPP hardware. */
1927 pb->ops->epp_read_data = parport_pc_epp_read_data;
1928 pb->ops->epp_write_data = parport_pc_epp_write_data;
1929 pb->ops->epp_read_addr = parport_pc_epp_read_addr;
1930 pb->ops->epp_write_addr = parport_pc_epp_write_addr;
1931
1932 return 1;
1933}
1934
Randy.Dunlap96766a32006-04-18 22:21:57 -07001935static int parport_ECPEPP_supported(struct parport *pb)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001936{
1937 struct parport_pc_private *priv = pb->private_data;
1938 int result;
1939 unsigned char oecr;
1940
1941 if (!priv->ecr) {
1942 return 0;
1943 }
1944
1945 oecr = inb (ECONTROL (pb));
1946 /* Search for SMC style EPP+ECP mode */
1947 ECR_WRITE (pb, 0x80);
1948 outb (0x04, CONTROL (pb));
1949 result = parport_EPP_supported(pb);
1950
1951 ECR_WRITE (pb, oecr);
1952
1953 if (result) {
1954 /* Set up access functions to use ECP+EPP hardware. */
1955 pb->ops->epp_read_data = parport_pc_ecpepp_read_data;
1956 pb->ops->epp_write_data = parport_pc_ecpepp_write_data;
1957 pb->ops->epp_read_addr = parport_pc_ecpepp_read_addr;
1958 pb->ops->epp_write_addr = parport_pc_ecpepp_write_addr;
1959 }
1960
1961 return result;
1962}
1963
1964#else /* No IEEE 1284 support */
1965
1966/* Don't bother probing for modes we know we won't use. */
1967static int __devinit parport_PS2_supported(struct parport *pb) { return 0; }
1968#ifdef CONFIG_PARPORT_PC_FIFO
1969static int __devinit parport_ECP_supported(struct parport *pb) { return 0; }
1970#endif
1971static int __devinit parport_EPP_supported(struct parport *pb) { return 0; }
1972static int __devinit parport_ECPEPP_supported(struct parport *pb){return 0;}
1973static int __devinit parport_ECPPS2_supported(struct parport *pb){return 0;}
1974
1975#endif /* No IEEE 1284 support */
1976
1977/* --- IRQ detection -------------------------------------- */
1978
1979/* Only if supports ECP mode */
Randy Dunlap44389822006-12-06 20:38:33 -08001980static int programmable_irq_support(struct parport *pb)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001981{
1982 int irq, intrLine;
1983 unsigned char oecr = inb (ECONTROL (pb));
1984 static const int lookup[8] = {
1985 PARPORT_IRQ_NONE, 7, 9, 10, 11, 14, 15, 5
1986 };
1987
1988 ECR_WRITE (pb, ECR_CNF << 5); /* Configuration MODE */
1989
1990 intrLine = (inb (CONFIGB (pb)) >> 3) & 0x07;
1991 irq = lookup[intrLine];
1992
1993 ECR_WRITE (pb, oecr);
1994 return irq;
1995}
1996
Randy Dunlap44389822006-12-06 20:38:33 -08001997static int irq_probe_ECP(struct parport *pb)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001998{
1999 int i;
2000 unsigned long irqs;
2001
2002 irqs = probe_irq_on();
2003
2004 ECR_WRITE (pb, ECR_SPP << 5); /* Reset FIFO */
2005 ECR_WRITE (pb, (ECR_TST << 5) | 0x04);
2006 ECR_WRITE (pb, ECR_TST << 5);
2007
2008 /* If Full FIFO sure that writeIntrThreshold is generated */
2009 for (i=0; i < 1024 && !(inb (ECONTROL (pb)) & 0x02) ; i++)
2010 outb (0xaa, FIFO (pb));
2011
2012 pb->irq = probe_irq_off(irqs);
2013 ECR_WRITE (pb, ECR_SPP << 5);
2014
2015 if (pb->irq <= 0)
2016 pb->irq = PARPORT_IRQ_NONE;
2017
2018 return pb->irq;
2019}
2020
2021/*
2022 * This detection seems that only works in National Semiconductors
2023 * This doesn't work in SMC, LGS, and Winbond
2024 */
Randy Dunlap44389822006-12-06 20:38:33 -08002025static int irq_probe_EPP(struct parport *pb)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002026{
2027#ifndef ADVANCED_DETECT
2028 return PARPORT_IRQ_NONE;
2029#else
2030 int irqs;
2031 unsigned char oecr;
2032
2033 if (pb->modes & PARPORT_MODE_PCECR)
2034 oecr = inb (ECONTROL (pb));
2035
2036 irqs = probe_irq_on();
2037
2038 if (pb->modes & PARPORT_MODE_PCECR)
2039 frob_econtrol (pb, 0x10, 0x10);
2040
2041 clear_epp_timeout(pb);
2042 parport_pc_frob_control (pb, 0x20, 0x20);
2043 parport_pc_frob_control (pb, 0x10, 0x10);
2044 clear_epp_timeout(pb);
2045
2046 /* Device isn't expecting an EPP read
2047 * and generates an IRQ.
2048 */
2049 parport_pc_read_epp(pb);
2050 udelay(20);
2051
2052 pb->irq = probe_irq_off (irqs);
2053 if (pb->modes & PARPORT_MODE_PCECR)
2054 ECR_WRITE (pb, oecr);
2055 parport_pc_write_control(pb, 0xc);
2056
2057 if (pb->irq <= 0)
2058 pb->irq = PARPORT_IRQ_NONE;
2059
2060 return pb->irq;
2061#endif /* Advanced detection */
2062}
2063
Randy Dunlap44389822006-12-06 20:38:33 -08002064static int irq_probe_SPP(struct parport *pb)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002065{
2066 /* Don't even try to do this. */
2067 return PARPORT_IRQ_NONE;
2068}
2069
2070/* We will attempt to share interrupt requests since other devices
2071 * such as sound cards and network cards seem to like using the
2072 * printer IRQs.
2073 *
2074 * When ECP is available we can autoprobe for IRQs.
2075 * NOTE: If we can autoprobe it, we can register the IRQ.
2076 */
Randy.Dunlap96766a32006-04-18 22:21:57 -07002077static int parport_irq_probe(struct parport *pb)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002078{
2079 struct parport_pc_private *priv = pb->private_data;
2080
2081 if (priv->ecr) {
2082 pb->irq = programmable_irq_support(pb);
2083
2084 if (pb->irq == PARPORT_IRQ_NONE)
2085 pb->irq = irq_probe_ECP(pb);
2086 }
2087
2088 if ((pb->irq == PARPORT_IRQ_NONE) && priv->ecr &&
2089 (pb->modes & PARPORT_MODE_EPP))
2090 pb->irq = irq_probe_EPP(pb);
2091
2092 clear_epp_timeout(pb);
2093
2094 if (pb->irq == PARPORT_IRQ_NONE && (pb->modes & PARPORT_MODE_EPP))
2095 pb->irq = irq_probe_EPP(pb);
2096
2097 clear_epp_timeout(pb);
2098
2099 if (pb->irq == PARPORT_IRQ_NONE)
2100 pb->irq = irq_probe_SPP(pb);
2101
2102 if (pb->irq == PARPORT_IRQ_NONE)
2103 pb->irq = get_superio_irq(pb);
2104
2105 return pb->irq;
2106}
2107
2108/* --- DMA detection -------------------------------------- */
2109
2110/* Only if chipset conforms to ECP ISA Interface Standard */
Jean Delvare0bb92e62007-02-20 13:58:18 -08002111static int programmable_dma_support (struct parport *p)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002112{
2113 unsigned char oecr = inb (ECONTROL (p));
2114 int dma;
2115
2116 frob_set_mode (p, ECR_CNF);
2117
2118 dma = inb (CONFIGB(p)) & 0x07;
2119 /* 000: Indicates jumpered 8-bit DMA if read-only.
2120 100: Indicates jumpered 16-bit DMA if read-only. */
2121 if ((dma & 0x03) == 0)
2122 dma = PARPORT_DMA_NONE;
2123
2124 ECR_WRITE (p, oecr);
2125 return dma;
2126}
2127
Jean Delvare0bb92e62007-02-20 13:58:18 -08002128static int parport_dma_probe (struct parport *p)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002129{
2130 const struct parport_pc_private *priv = p->private_data;
2131 if (priv->ecr)
2132 p->dma = programmable_dma_support(p); /* ask ECP chipset first */
2133 if (p->dma == PARPORT_DMA_NONE) {
2134 /* ask known Super-IO chips proper, although these
2135 claim ECP compatible, some don't report their DMA
2136 conforming to ECP standards */
2137 p->dma = get_superio_dma(p);
2138 }
2139
2140 return p->dma;
2141}
2142
2143/* --- Initialisation code -------------------------------- */
2144
2145static LIST_HEAD(ports_list);
2146static DEFINE_SPINLOCK(ports_lock);
2147
2148struct parport *parport_pc_probe_port (unsigned long int base,
2149 unsigned long int base_hi,
2150 int irq, int dma,
David Brownellc15a3832007-05-08 00:27:35 -07002151 struct device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002152{
2153 struct parport_pc_private *priv;
2154 struct parport_operations *ops;
2155 struct parport *p;
2156 int probedirq = PARPORT_IRQ_NONE;
2157 struct resource *base_res;
2158 struct resource *ECR_res = NULL;
2159 struct resource *EPP_res = NULL;
Jean Delvarea7d801a2007-05-08 00:27:40 -07002160 struct platform_device *pdev = NULL;
2161
2162 if (!dev) {
2163 /* We need a physical device to attach to, but none was
2164 * provided. Create our own. */
2165 pdev = platform_device_register_simple("parport_pc",
2166 base, NULL, 0);
2167 if (IS_ERR(pdev))
2168 return NULL;
2169 dev = &pdev->dev;
2170 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002171
2172 ops = kmalloc(sizeof (struct parport_operations), GFP_KERNEL);
2173 if (!ops)
2174 goto out1;
2175
2176 priv = kmalloc (sizeof (struct parport_pc_private), GFP_KERNEL);
2177 if (!priv)
2178 goto out2;
2179
2180 /* a misnomer, actually - it's allocate and reserve parport number */
2181 p = parport_register_port(base, irq, dma, ops);
2182 if (!p)
2183 goto out3;
2184
2185 base_res = request_region(base, 3, p->name);
2186 if (!base_res)
2187 goto out4;
2188
2189 memcpy(ops, &parport_pc_ops, sizeof (struct parport_operations));
2190 priv->ctr = 0xc;
2191 priv->ctr_writable = ~0x10;
2192 priv->ecr = 0;
2193 priv->fifo_depth = 0;
2194 priv->dma_buf = NULL;
2195 priv->dma_handle = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002196 INIT_LIST_HEAD(&priv->list);
2197 priv->port = p;
David Brownellc15a3832007-05-08 00:27:35 -07002198
2199 p->dev = dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002200 p->base_hi = base_hi;
2201 p->modes = PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT;
2202 p->private_data = priv;
2203
2204 if (base_hi) {
2205 ECR_res = request_region(base_hi, 3, p->name);
2206 if (ECR_res)
2207 parport_ECR_present(p);
2208 }
2209
2210 if (base != 0x3bc) {
2211 EPP_res = request_region(base+0x3, 5, p->name);
2212 if (EPP_res)
2213 if (!parport_EPP_supported(p))
2214 parport_ECPEPP_supported(p);
2215 }
2216 if (!parport_SPP_supported (p))
2217 /* No port. */
2218 goto out5;
2219 if (priv->ecr)
2220 parport_ECPPS2_supported(p);
2221 else
2222 parport_PS2_supported(p);
2223
2224 p->size = (p->modes & PARPORT_MODE_EPP)?8:3;
2225
2226 printk(KERN_INFO "%s: PC-style at 0x%lx", p->name, p->base);
2227 if (p->base_hi && priv->ecr)
2228 printk(" (0x%lx)", p->base_hi);
2229 if (p->irq == PARPORT_IRQ_AUTO) {
2230 p->irq = PARPORT_IRQ_NONE;
2231 parport_irq_probe(p);
2232 } else if (p->irq == PARPORT_IRQ_PROBEONLY) {
2233 p->irq = PARPORT_IRQ_NONE;
2234 parport_irq_probe(p);
2235 probedirq = p->irq;
2236 p->irq = PARPORT_IRQ_NONE;
2237 }
2238 if (p->irq != PARPORT_IRQ_NONE) {
2239 printk(", irq %d", p->irq);
2240 priv->ctr_writable |= 0x10;
2241
2242 if (p->dma == PARPORT_DMA_AUTO) {
2243 p->dma = PARPORT_DMA_NONE;
2244 parport_dma_probe(p);
2245 }
2246 }
2247 if (p->dma == PARPORT_DMA_AUTO) /* To use DMA, giving the irq
2248 is mandatory (see above) */
2249 p->dma = PARPORT_DMA_NONE;
2250
2251#ifdef CONFIG_PARPORT_PC_FIFO
2252 if (parport_ECP_supported(p) &&
2253 p->dma != PARPORT_DMA_NOFIFO &&
2254 priv->fifo_depth > 0 && p->irq != PARPORT_IRQ_NONE) {
2255 p->modes |= PARPORT_MODE_ECP | PARPORT_MODE_COMPAT;
2256 p->ops->compat_write_data = parport_pc_compat_write_block_pio;
2257#ifdef CONFIG_PARPORT_1284
2258 p->ops->ecp_write_data = parport_pc_ecp_write_block_pio;
2259 /* currently broken, but working on it.. (FB) */
2260 /* p->ops->ecp_read_data = parport_pc_ecp_read_block_pio; */
2261#endif /* IEEE 1284 support */
2262 if (p->dma != PARPORT_DMA_NONE) {
2263 printk(", dma %d", p->dma);
2264 p->modes |= PARPORT_MODE_DMA;
2265 }
2266 else printk(", using FIFO");
2267 }
2268 else
2269 /* We can't use the DMA channel after all. */
2270 p->dma = PARPORT_DMA_NONE;
2271#endif /* Allowed to use FIFO/DMA */
2272
2273 printk(" [");
2274#define printmode(x) {if(p->modes&PARPORT_MODE_##x){printk("%s%s",f?",":"",#x);f++;}}
2275 {
2276 int f = 0;
2277 printmode(PCSPP);
2278 printmode(TRISTATE);
2279 printmode(COMPAT)
2280 printmode(EPP);
2281 printmode(ECP);
2282 printmode(DMA);
2283 }
2284#undef printmode
2285#ifndef CONFIG_PARPORT_1284
2286 printk ("(,...)");
2287#endif /* CONFIG_PARPORT_1284 */
2288 printk("]\n");
2289 if (probedirq != PARPORT_IRQ_NONE)
2290 printk(KERN_INFO "%s: irq %d detected\n", p->name, probedirq);
2291
2292 /* If No ECP release the ports grabbed above. */
2293 if (ECR_res && (p->modes & PARPORT_MODE_ECP) == 0) {
2294 release_region(base_hi, 3);
2295 ECR_res = NULL;
2296 }
2297 /* Likewise for EEP ports */
2298 if (EPP_res && (p->modes & PARPORT_MODE_EPP) == 0) {
2299 release_region(base+3, 5);
2300 EPP_res = NULL;
2301 }
2302 if (p->irq != PARPORT_IRQ_NONE) {
2303 if (request_irq (p->irq, parport_pc_interrupt,
2304 0, p->name, p)) {
2305 printk (KERN_WARNING "%s: irq %d in use, "
2306 "resorting to polled operation\n",
2307 p->name, p->irq);
2308 p->irq = PARPORT_IRQ_NONE;
2309 p->dma = PARPORT_DMA_NONE;
2310 }
2311
2312#ifdef CONFIG_PARPORT_PC_FIFO
Al Viro7fbacd52005-05-04 05:39:32 +01002313#ifdef HAS_DMA
Linus Torvalds1da177e2005-04-16 15:20:36 -07002314 if (p->dma != PARPORT_DMA_NONE) {
2315 if (request_dma (p->dma, p->name)) {
2316 printk (KERN_WARNING "%s: dma %d in use, "
2317 "resorting to PIO operation\n",
2318 p->name, p->dma);
2319 p->dma = PARPORT_DMA_NONE;
2320 } else {
2321 priv->dma_buf =
David Brownellc15a3832007-05-08 00:27:35 -07002322 dma_alloc_coherent(dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -07002323 PAGE_SIZE,
David Brownellc15a3832007-05-08 00:27:35 -07002324 &priv->dma_handle,
2325 GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002326 if (! priv->dma_buf) {
2327 printk (KERN_WARNING "%s: "
2328 "cannot get buffer for DMA, "
2329 "resorting to PIO operation\n",
2330 p->name);
2331 free_dma(p->dma);
2332 p->dma = PARPORT_DMA_NONE;
2333 }
2334 }
2335 }
Al Viro7fbacd52005-05-04 05:39:32 +01002336#endif
2337#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07002338 }
2339
2340 /* Done probing. Now put the port into a sensible start-up state. */
2341 if (priv->ecr)
2342 /*
2343 * Put the ECP detected port in PS2 mode.
2344 * Do this also for ports that have ECR but don't do ECP.
2345 */
2346 ECR_WRITE (p, 0x34);
2347
2348 parport_pc_write_data(p, 0);
2349 parport_pc_data_forward (p);
2350
2351 /* Now that we've told the sharing engine about the port, and
2352 found out its characteristics, let the high-level drivers
2353 know about it. */
2354 spin_lock(&ports_lock);
2355 list_add(&priv->list, &ports_list);
2356 spin_unlock(&ports_lock);
2357 parport_announce_port (p);
2358
2359 return p;
2360
2361out5:
2362 if (ECR_res)
2363 release_region(base_hi, 3);
2364 if (EPP_res)
2365 release_region(base+0x3, 5);
2366 release_region(base, 3);
2367out4:
2368 parport_put_port(p);
2369out3:
2370 kfree (priv);
2371out2:
2372 kfree (ops);
2373out1:
Jean Delvarea7d801a2007-05-08 00:27:40 -07002374 if (pdev)
2375 platform_device_unregister(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002376 return NULL;
2377}
2378
2379EXPORT_SYMBOL (parport_pc_probe_port);
2380
2381void parport_pc_unregister_port (struct parport *p)
2382{
2383 struct parport_pc_private *priv = p->private_data;
2384 struct parport_operations *ops = p->ops;
2385
2386 parport_remove_port(p);
2387 spin_lock(&ports_lock);
2388 list_del_init(&priv->list);
2389 spin_unlock(&ports_lock);
Andrew Mortond1c4ac42006-01-08 01:05:05 -08002390#if defined(CONFIG_PARPORT_PC_FIFO) && defined(HAS_DMA)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002391 if (p->dma != PARPORT_DMA_NONE)
2392 free_dma(p->dma);
Andrew Mortond1c4ac42006-01-08 01:05:05 -08002393#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07002394 if (p->irq != PARPORT_IRQ_NONE)
2395 free_irq(p->irq, p);
2396 release_region(p->base, 3);
2397 if (p->size > 3)
2398 release_region(p->base + 3, p->size - 3);
2399 if (p->modes & PARPORT_MODE_ECP)
2400 release_region(p->base_hi, 3);
Andrew Mortond1c4ac42006-01-08 01:05:05 -08002401#if defined(CONFIG_PARPORT_PC_FIFO) && defined(HAS_DMA)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002402 if (priv->dma_buf)
David Brownellc15a3832007-05-08 00:27:35 -07002403 dma_free_coherent(p->physport->dev, PAGE_SIZE,
Linus Torvalds1da177e2005-04-16 15:20:36 -07002404 priv->dma_buf,
2405 priv->dma_handle);
Al Viro7fbacd52005-05-04 05:39:32 +01002406#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07002407 kfree (p->private_data);
2408 parport_put_port(p);
2409 kfree (ops); /* hope no-one cached it */
2410}
2411
2412EXPORT_SYMBOL (parport_pc_unregister_port);
2413
2414#ifdef CONFIG_PCI
2415
2416/* ITE support maintained by Rich Liu <richliu@poorman.org> */
2417static int __devinit sio_ite_8872_probe (struct pci_dev *pdev, int autoirq,
Marko Kohtalaa6767b72006-01-06 00:19:48 -08002418 int autodma,
2419 const struct parport_pc_via_data *via)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002420{
2421 short inta_addr[6] = { 0x2A0, 0x2C0, 0x220, 0x240, 0x1E0 };
2422 struct resource *base_res;
2423 u32 ite8872set;
2424 u32 ite8872_lpt, ite8872_lpthi;
2425 u8 ite8872_irq, type;
2426 char *fake_name = "parport probe";
2427 int irq;
2428 int i;
2429
2430 DPRINTK (KERN_DEBUG "sio_ite_8872_probe()\n");
2431
2432 // make sure which one chip
2433 for(i = 0; i < 5; i++) {
2434 base_res = request_region(inta_addr[i], 0x8, fake_name);
2435 if (base_res) {
2436 int test;
2437 pci_write_config_dword (pdev, 0x60,
2438 0xe7000000 | inta_addr[i]);
2439 pci_write_config_dword (pdev, 0x78,
2440 0x00000000 | inta_addr[i]);
2441 test = inb (inta_addr[i]);
2442 if (test != 0xff) break;
2443 release_region(inta_addr[i], 0x8);
2444 }
2445 }
2446 if(i >= 5) {
2447 printk (KERN_INFO "parport_pc: cannot find ITE8872 INTA\n");
2448 return 0;
2449 }
2450
2451 type = inb (inta_addr[i] + 0x18);
2452 type &= 0x0f;
2453
2454 switch (type) {
2455 case 0x2:
2456 printk (KERN_INFO "parport_pc: ITE8871 found (1P)\n");
2457 ite8872set = 0x64200000;
2458 break;
2459 case 0xa:
2460 printk (KERN_INFO "parport_pc: ITE8875 found (1P)\n");
2461 ite8872set = 0x64200000;
2462 break;
2463 case 0xe:
2464 printk (KERN_INFO "parport_pc: ITE8872 found (2S1P)\n");
2465 ite8872set = 0x64e00000;
2466 break;
2467 case 0x6:
2468 printk (KERN_INFO "parport_pc: ITE8873 found (1S)\n");
2469 return 0;
2470 case 0x8:
2471 DPRINTK (KERN_DEBUG "parport_pc: ITE8874 found (2S)\n");
2472 return 0;
2473 default:
2474 printk (KERN_INFO "parport_pc: unknown ITE887x\n");
2475 printk (KERN_INFO "parport_pc: please mail 'lspci -nvv' "
2476 "output to Rich.Liu@ite.com.tw\n");
2477 return 0;
2478 }
2479
2480 pci_read_config_byte (pdev, 0x3c, &ite8872_irq);
2481 pci_read_config_dword (pdev, 0x1c, &ite8872_lpt);
2482 ite8872_lpt &= 0x0000ff00;
2483 pci_read_config_dword (pdev, 0x20, &ite8872_lpthi);
2484 ite8872_lpthi &= 0x0000ff00;
2485 pci_write_config_dword (pdev, 0x6c, 0xe3000000 | ite8872_lpt);
2486 pci_write_config_dword (pdev, 0x70, 0xe3000000 | ite8872_lpthi);
2487 pci_write_config_dword (pdev, 0x80, (ite8872_lpthi<<16) | ite8872_lpt);
2488 // SET SPP&EPP , Parallel Port NO DMA , Enable All Function
2489 // SET Parallel IRQ
2490 pci_write_config_dword (pdev, 0x9c,
2491 ite8872set | (ite8872_irq * 0x11111));
2492
2493 DPRINTK (KERN_DEBUG "ITE887x: The IRQ is %d.\n", ite8872_irq);
2494 DPRINTK (KERN_DEBUG "ITE887x: The PARALLEL I/O port is 0x%x.\n",
2495 ite8872_lpt);
2496 DPRINTK (KERN_DEBUG "ITE887x: The PARALLEL I/O porthi is 0x%x.\n",
2497 ite8872_lpthi);
2498
2499 /* Let the user (or defaults) steer us away from interrupts */
2500 irq = ite8872_irq;
2501 if (autoirq != PARPORT_IRQ_AUTO)
2502 irq = PARPORT_IRQ_NONE;
2503
2504 /*
2505 * Release the resource so that parport_pc_probe_port can get it.
2506 */
2507 release_resource(base_res);
2508 if (parport_pc_probe_port (ite8872_lpt, ite8872_lpthi,
David Brownellc15a3832007-05-08 00:27:35 -07002509 irq, PARPORT_DMA_NONE, &pdev->dev)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002510 printk (KERN_INFO
2511 "parport_pc: ITE 8872 parallel port: io=0x%X",
2512 ite8872_lpt);
2513 if (irq != PARPORT_IRQ_NONE)
2514 printk (", irq=%d", irq);
2515 printk ("\n");
2516 return 1;
2517 }
2518
2519 return 0;
2520}
2521
2522/* VIA 8231 support by Pavel Fedin <sonic_amiga@rambler.ru>
2523 based on VIA 686a support code by Jeff Garzik <jgarzik@pobox.com> */
2524static int __devinitdata parport_init_mode = 0;
2525
2526/* Data for two known VIA chips */
2527static struct parport_pc_via_data via_686a_data __devinitdata = {
2528 0x51,
2529 0x50,
2530 0x85,
2531 0x02,
2532 0xE2,
2533 0xF0,
2534 0xE6
2535};
2536static struct parport_pc_via_data via_8231_data __devinitdata = {
2537 0x45,
2538 0x44,
2539 0x50,
2540 0x04,
2541 0xF2,
2542 0xFA,
2543 0xF6
2544};
2545
2546static int __devinit sio_via_probe (struct pci_dev *pdev, int autoirq,
Marko Kohtalaa6767b72006-01-06 00:19:48 -08002547 int autodma,
2548 const struct parport_pc_via_data *via)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002549{
2550 u8 tmp, tmp2, siofunc;
2551 u8 ppcontrol = 0;
2552 int dma, irq;
2553 unsigned port1, port2;
2554 unsigned have_epp = 0;
2555
2556 printk(KERN_DEBUG "parport_pc: VIA 686A/8231 detected\n");
2557
2558 switch(parport_init_mode)
2559 {
2560 case 1:
2561 printk(KERN_DEBUG "parport_pc: setting SPP mode\n");
2562 siofunc = VIA_FUNCTION_PARPORT_SPP;
2563 break;
2564 case 2:
2565 printk(KERN_DEBUG "parport_pc: setting PS/2 mode\n");
2566 siofunc = VIA_FUNCTION_PARPORT_SPP;
2567 ppcontrol = VIA_PARPORT_BIDIR;
2568 break;
2569 case 3:
2570 printk(KERN_DEBUG "parport_pc: setting EPP mode\n");
2571 siofunc = VIA_FUNCTION_PARPORT_EPP;
2572 ppcontrol = VIA_PARPORT_BIDIR;
2573 have_epp = 1;
2574 break;
2575 case 4:
2576 printk(KERN_DEBUG "parport_pc: setting ECP mode\n");
2577 siofunc = VIA_FUNCTION_PARPORT_ECP;
2578 ppcontrol = VIA_PARPORT_BIDIR;
2579 break;
2580 case 5:
2581 printk(KERN_DEBUG "parport_pc: setting EPP+ECP mode\n");
2582 siofunc = VIA_FUNCTION_PARPORT_ECP;
2583 ppcontrol = VIA_PARPORT_BIDIR|VIA_PARPORT_ECPEPP;
2584 have_epp = 1;
2585 break;
2586 default:
2587 printk(KERN_DEBUG "parport_pc: probing current configuration\n");
2588 siofunc = VIA_FUNCTION_PROBE;
2589 break;
2590 }
2591 /*
2592 * unlock super i/o configuration
2593 */
2594 pci_read_config_byte(pdev, via->via_pci_superio_config_reg, &tmp);
2595 tmp |= via->via_pci_superio_config_data;
2596 pci_write_config_byte(pdev, via->via_pci_superio_config_reg, tmp);
2597
2598 /* Bits 1-0: Parallel Port Mode / Enable */
2599 outb(via->viacfg_function, VIA_CONFIG_INDEX);
2600 tmp = inb (VIA_CONFIG_DATA);
2601 /* Bit 5: EPP+ECP enable; bit 7: PS/2 bidirectional port enable */
2602 outb(via->viacfg_parport_control, VIA_CONFIG_INDEX);
2603 tmp2 = inb (VIA_CONFIG_DATA);
2604 if (siofunc == VIA_FUNCTION_PROBE)
2605 {
2606 siofunc = tmp & VIA_FUNCTION_PARPORT_DISABLE;
2607 ppcontrol = tmp2;
2608 }
2609 else
2610 {
2611 tmp &= ~VIA_FUNCTION_PARPORT_DISABLE;
2612 tmp |= siofunc;
2613 outb(via->viacfg_function, VIA_CONFIG_INDEX);
2614 outb(tmp, VIA_CONFIG_DATA);
2615 tmp2 &= ~(VIA_PARPORT_BIDIR|VIA_PARPORT_ECPEPP);
2616 tmp2 |= ppcontrol;
2617 outb(via->viacfg_parport_control, VIA_CONFIG_INDEX);
2618 outb(tmp2, VIA_CONFIG_DATA);
2619 }
2620
2621 /* Parallel Port I/O Base Address, bits 9-2 */
2622 outb(via->viacfg_parport_base, VIA_CONFIG_INDEX);
2623 port1 = inb(VIA_CONFIG_DATA) << 2;
2624
2625 printk (KERN_DEBUG "parport_pc: Current parallel port base: 0x%X\n",port1);
2626 if ((port1 == 0x3BC) && have_epp)
2627 {
2628 outb(via->viacfg_parport_base, VIA_CONFIG_INDEX);
2629 outb((0x378 >> 2), VIA_CONFIG_DATA);
2630 printk(KERN_DEBUG "parport_pc: Parallel port base changed to 0x378\n");
2631 port1 = 0x378;
2632 }
2633
2634 /*
2635 * lock super i/o configuration
2636 */
2637 pci_read_config_byte(pdev, via->via_pci_superio_config_reg, &tmp);
2638 tmp &= ~via->via_pci_superio_config_data;
2639 pci_write_config_byte(pdev, via->via_pci_superio_config_reg, tmp);
2640
2641 if (siofunc == VIA_FUNCTION_PARPORT_DISABLE) {
2642 printk(KERN_INFO "parport_pc: VIA parallel port disabled in BIOS\n");
2643 return 0;
2644 }
2645
2646 /* Bits 7-4: PnP Routing for Parallel Port IRQ */
2647 pci_read_config_byte(pdev, via->via_pci_parport_irq_reg, &tmp);
2648 irq = ((tmp & VIA_IRQCONTROL_PARALLEL) >> 4);
2649
2650 if (siofunc == VIA_FUNCTION_PARPORT_ECP)
2651 {
2652 /* Bits 3-2: PnP Routing for Parallel Port DMA */
2653 pci_read_config_byte(pdev, via->via_pci_parport_dma_reg, &tmp);
2654 dma = ((tmp & VIA_DMACONTROL_PARALLEL) >> 2);
2655 }
2656 else
2657 /* if ECP not enabled, DMA is not enabled, assumed bogus 'dma' value */
2658 dma = PARPORT_DMA_NONE;
2659
2660 /* Let the user (or defaults) steer us away from interrupts and DMA */
2661 if (autoirq == PARPORT_IRQ_NONE) {
2662 irq = PARPORT_IRQ_NONE;
2663 dma = PARPORT_DMA_NONE;
2664 }
2665 if (autodma == PARPORT_DMA_NONE)
2666 dma = PARPORT_DMA_NONE;
2667
2668 switch (port1) {
2669 case 0x3bc: port2 = 0x7bc; break;
2670 case 0x378: port2 = 0x778; break;
2671 case 0x278: port2 = 0x678; break;
2672 default:
2673 printk(KERN_INFO "parport_pc: Weird VIA parport base 0x%X, ignoring\n",
2674 port1);
2675 return 0;
2676 }
2677
2678 /* filter bogus IRQs */
2679 switch (irq) {
2680 case 0:
2681 case 2:
2682 case 8:
2683 case 13:
2684 irq = PARPORT_IRQ_NONE;
2685 break;
2686
2687 default: /* do nothing */
2688 break;
2689 }
2690
2691 /* finally, do the probe with values obtained */
David Brownellc15a3832007-05-08 00:27:35 -07002692 if (parport_pc_probe_port (port1, port2, irq, dma, &pdev->dev)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002693 printk (KERN_INFO
2694 "parport_pc: VIA parallel port: io=0x%X", port1);
2695 if (irq != PARPORT_IRQ_NONE)
2696 printk (", irq=%d", irq);
2697 if (dma != PARPORT_DMA_NONE)
2698 printk (", dma=%d", dma);
2699 printk ("\n");
2700 return 1;
2701 }
2702
2703 printk(KERN_WARNING "parport_pc: Strange, can't probe VIA parallel port: io=0x%X, irq=%d, dma=%d\n",
2704 port1, irq, dma);
2705 return 0;
2706}
2707
2708
2709enum parport_pc_sio_types {
2710 sio_via_686a = 0, /* Via VT82C686A motherboard Super I/O */
2711 sio_via_8231, /* Via VT8231 south bridge integrated Super IO */
2712 sio_ite_8872,
2713 last_sio
2714};
2715
2716/* each element directly indexed from enum list, above */
2717static struct parport_pc_superio {
Marko Kohtalaa6767b72006-01-06 00:19:48 -08002718 int (*probe) (struct pci_dev *pdev, int autoirq, int autodma,
2719 const struct parport_pc_via_data *via);
2720 const struct parport_pc_via_data *via;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002721} parport_pc_superio_info[] __devinitdata = {
2722 { sio_via_probe, &via_686a_data, },
2723 { sio_via_probe, &via_8231_data, },
2724 { sio_ite_8872_probe, NULL, },
2725};
2726
2727enum parport_pc_pci_cards {
2728 siig_1p_10x = last_sio,
2729 siig_2p_10x,
2730 siig_1p_20x,
2731 siig_2p_20x,
2732 lava_parallel,
2733 lava_parallel_dual_a,
2734 lava_parallel_dual_b,
2735 boca_ioppar,
2736 plx_9050,
2737 timedia_4078a,
2738 timedia_4079h,
2739 timedia_4085h,
2740 timedia_4088a,
2741 timedia_4089a,
2742 timedia_4095a,
2743 timedia_4096a,
2744 timedia_4078u,
2745 timedia_4079a,
2746 timedia_4085u,
2747 timedia_4079r,
2748 timedia_4079s,
2749 timedia_4079d,
2750 timedia_4079e,
2751 timedia_4079f,
2752 timedia_9079a,
2753 timedia_9079b,
2754 timedia_9079c,
2755 timedia_4006a,
2756 timedia_4014,
2757 timedia_4008a,
2758 timedia_4018,
2759 timedia_9018a,
2760 syba_2p_epp,
2761 syba_1p_ecp,
2762 titan_010l,
Maximilian Attems85747f02005-09-06 15:17:21 -07002763 titan_1284p1,
Linus Torvalds1da177e2005-04-16 15:20:36 -07002764 titan_1284p2,
2765 avlab_1p,
2766 avlab_2p,
Ryan Underwoodc140e112006-12-06 20:36:38 -08002767 oxsemi_952,
Linus Torvalds1da177e2005-04-16 15:20:36 -07002768 oxsemi_954,
2769 oxsemi_840,
2770 aks_0100,
2771 mobility_pp,
2772 netmos_9705,
2773 netmos_9715,
2774 netmos_9755,
2775 netmos_9805,
2776 netmos_9815,
Linus Torvalds1da177e2005-04-16 15:20:36 -07002777};
2778
2779
2780/* each element directly indexed from enum list, above
2781 * (but offset by last_sio) */
2782static struct parport_pc_pci {
2783 int numports;
2784 struct { /* BAR (base address registers) numbers in the config
2785 space header */
2786 int lo;
2787 int hi; /* -1 if not there, >6 for offset-method (max
2788 BAR is 6) */
2789 } addr[4];
2790
2791 /* If set, this is called immediately after pci_enable_device.
2792 * If it returns non-zero, no probing will take place and the
2793 * ports will not be used. */
2794 int (*preinit_hook) (struct pci_dev *pdev, int autoirq, int autodma);
2795
2796 /* If set, this is called after probing for ports. If 'failed'
2797 * is non-zero we couldn't use any of the ports. */
2798 void (*postinit_hook) (struct pci_dev *pdev, int failed);
Randy.Dunlap96766a32006-04-18 22:21:57 -07002799} cards[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002800 /* siig_1p_10x */ { 1, { { 2, 3 }, } },
2801 /* siig_2p_10x */ { 2, { { 2, 3 }, { 4, 5 }, } },
2802 /* siig_1p_20x */ { 1, { { 0, 1 }, } },
2803 /* siig_2p_20x */ { 2, { { 0, 1 }, { 2, 3 }, } },
2804 /* lava_parallel */ { 1, { { 0, -1 }, } },
2805 /* lava_parallel_dual_a */ { 1, { { 0, -1 }, } },
2806 /* lava_parallel_dual_b */ { 1, { { 0, -1 }, } },
2807 /* boca_ioppar */ { 1, { { 0, -1 }, } },
2808 /* plx_9050 */ { 2, { { 4, -1 }, { 5, -1 }, } },
2809 /* timedia_4078a */ { 1, { { 2, -1 }, } },
2810 /* timedia_4079h */ { 1, { { 2, 3 }, } },
2811 /* timedia_4085h */ { 2, { { 2, -1 }, { 4, -1 }, } },
2812 /* timedia_4088a */ { 2, { { 2, 3 }, { 4, 5 }, } },
2813 /* timedia_4089a */ { 2, { { 2, 3 }, { 4, 5 }, } },
2814 /* timedia_4095a */ { 2, { { 2, 3 }, { 4, 5 }, } },
2815 /* timedia_4096a */ { 2, { { 2, 3 }, { 4, 5 }, } },
2816 /* timedia_4078u */ { 1, { { 2, -1 }, } },
2817 /* timedia_4079a */ { 1, { { 2, 3 }, } },
2818 /* timedia_4085u */ { 2, { { 2, -1 }, { 4, -1 }, } },
2819 /* timedia_4079r */ { 1, { { 2, 3 }, } },
2820 /* timedia_4079s */ { 1, { { 2, 3 }, } },
2821 /* timedia_4079d */ { 1, { { 2, 3 }, } },
2822 /* timedia_4079e */ { 1, { { 2, 3 }, } },
2823 /* timedia_4079f */ { 1, { { 2, 3 }, } },
2824 /* timedia_9079a */ { 1, { { 2, 3 }, } },
2825 /* timedia_9079b */ { 1, { { 2, 3 }, } },
2826 /* timedia_9079c */ { 1, { { 2, 3 }, } },
2827 /* timedia_4006a */ { 1, { { 0, -1 }, } },
2828 /* timedia_4014 */ { 2, { { 0, -1 }, { 2, -1 }, } },
2829 /* timedia_4008a */ { 1, { { 0, 1 }, } },
2830 /* timedia_4018 */ { 2, { { 0, 1 }, { 2, 3 }, } },
2831 /* timedia_9018a */ { 2, { { 0, 1 }, { 2, 3 }, } },
2832 /* SYBA uses fixed offsets in
2833 a 1K io window */
2834 /* syba_2p_epp AP138B */ { 2, { { 0, 0x078 }, { 0, 0x178 }, } },
2835 /* syba_1p_ecp W83787 */ { 1, { { 0, 0x078 }, } },
2836 /* titan_010l */ { 1, { { 3, -1 }, } },
Maximilian Attems85747f02005-09-06 15:17:21 -07002837 /* titan_1284p1 */ { 1, { { 0, 1 }, } },
Linus Torvalds1da177e2005-04-16 15:20:36 -07002838 /* titan_1284p2 */ { 2, { { 0, 1 }, { 2, 3 }, } },
2839 /* avlab_1p */ { 1, { { 0, 1}, } },
2840 /* avlab_2p */ { 2, { { 0, 1}, { 2, 3 },} },
2841 /* The Oxford Semi cards are unusual: 954 doesn't support ECP,
2842 * and 840 locks up if you write 1 to bit 2! */
Ryan Underwoodc140e112006-12-06 20:36:38 -08002843 /* oxsemi_952 */ { 1, { { 0, 1 }, } },
Linus Torvalds1da177e2005-04-16 15:20:36 -07002844 /* oxsemi_954 */ { 1, { { 0, -1 }, } },
2845 /* oxsemi_840 */ { 1, { { 0, -1 }, } },
2846 /* aks_0100 */ { 1, { { 0, -1 }, } },
2847 /* mobility_pp */ { 1, { { 0, 1 }, } },
2848 /* netmos_9705 */ { 1, { { 0, -1 }, } }, /* untested */
2849 /* netmos_9715 */ { 2, { { 0, 1 }, { 2, 3 },} }, /* untested */
2850 /* netmos_9755 */ { 2, { { 0, 1 }, { 2, 3 },} }, /* untested */
2851 /* netmos_9805 */ { 1, { { 0, -1 }, } }, /* untested */
2852 /* netmos_9815 */ { 2, { { 0, -1 }, { 2, -1 }, } }, /* untested */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002853};
2854
Marko Kohtalaa6767b72006-01-06 00:19:48 -08002855static const struct pci_device_id parport_pc_pci_tbl[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002856 /* Super-IO onboard chips */
2857 { 0x1106, 0x0686, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sio_via_686a },
2858 { 0x1106, 0x8231, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sio_via_8231 },
2859 { PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8872,
2860 PCI_ANY_ID, PCI_ANY_ID, 0, 0, sio_ite_8872 },
2861
2862 /* PCI cards */
2863 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1P_10x,
2864 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1p_10x },
2865 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P_10x,
2866 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p_10x },
2867 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1P_20x,
2868 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1p_20x },
2869 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P_20x,
2870 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p_20x },
2871 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_PARALLEL,
2872 PCI_ANY_ID, PCI_ANY_ID, 0, 0, lava_parallel },
2873 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_DUAL_PAR_A,
2874 PCI_ANY_ID, PCI_ANY_ID, 0, 0, lava_parallel_dual_a },
2875 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_DUAL_PAR_B,
2876 PCI_ANY_ID, PCI_ANY_ID, 0, 0, lava_parallel_dual_b },
2877 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_BOCA_IOPPAR,
2878 PCI_ANY_ID, PCI_ANY_ID, 0, 0, boca_ioppar },
2879 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
2880 PCI_SUBVENDOR_ID_EXSYS, PCI_SUBDEVICE_ID_EXSYS_4014, 0,0, plx_9050 },
2881 /* PCI_VENDOR_ID_TIMEDIA/SUNIX has many differing cards ...*/
2882 { 0x1409, 0x7168, 0x1409, 0x4078, 0, 0, timedia_4078a },
2883 { 0x1409, 0x7168, 0x1409, 0x4079, 0, 0, timedia_4079h },
2884 { 0x1409, 0x7168, 0x1409, 0x4085, 0, 0, timedia_4085h },
2885 { 0x1409, 0x7168, 0x1409, 0x4088, 0, 0, timedia_4088a },
2886 { 0x1409, 0x7168, 0x1409, 0x4089, 0, 0, timedia_4089a },
2887 { 0x1409, 0x7168, 0x1409, 0x4095, 0, 0, timedia_4095a },
2888 { 0x1409, 0x7168, 0x1409, 0x4096, 0, 0, timedia_4096a },
2889 { 0x1409, 0x7168, 0x1409, 0x5078, 0, 0, timedia_4078u },
2890 { 0x1409, 0x7168, 0x1409, 0x5079, 0, 0, timedia_4079a },
2891 { 0x1409, 0x7168, 0x1409, 0x5085, 0, 0, timedia_4085u },
2892 { 0x1409, 0x7168, 0x1409, 0x6079, 0, 0, timedia_4079r },
2893 { 0x1409, 0x7168, 0x1409, 0x7079, 0, 0, timedia_4079s },
2894 { 0x1409, 0x7168, 0x1409, 0x8079, 0, 0, timedia_4079d },
2895 { 0x1409, 0x7168, 0x1409, 0x9079, 0, 0, timedia_4079e },
2896 { 0x1409, 0x7168, 0x1409, 0xa079, 0, 0, timedia_4079f },
2897 { 0x1409, 0x7168, 0x1409, 0xb079, 0, 0, timedia_9079a },
2898 { 0x1409, 0x7168, 0x1409, 0xc079, 0, 0, timedia_9079b },
2899 { 0x1409, 0x7168, 0x1409, 0xd079, 0, 0, timedia_9079c },
2900 { 0x1409, 0x7268, 0x1409, 0x0101, 0, 0, timedia_4006a },
2901 { 0x1409, 0x7268, 0x1409, 0x0102, 0, 0, timedia_4014 },
2902 { 0x1409, 0x7268, 0x1409, 0x0103, 0, 0, timedia_4008a },
2903 { 0x1409, 0x7268, 0x1409, 0x0104, 0, 0, timedia_4018 },
2904 { 0x1409, 0x7268, 0x1409, 0x9018, 0, 0, timedia_9018a },
2905 { 0x14f2, 0x0121, PCI_ANY_ID, PCI_ANY_ID, 0, 0, mobility_pp },
2906 { PCI_VENDOR_ID_SYBA, PCI_DEVICE_ID_SYBA_2P_EPP,
2907 PCI_ANY_ID, PCI_ANY_ID, 0, 0, syba_2p_epp },
2908 { PCI_VENDOR_ID_SYBA, PCI_DEVICE_ID_SYBA_1P_ECP,
2909 PCI_ANY_ID, PCI_ANY_ID, 0, 0, syba_1p_ecp },
2910 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_010L,
2911 PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_010l },
Maximilian Attems85747f02005-09-06 15:17:21 -07002912 { 0x9710, 0x9805, 0x1000, 0x0010, 0, 0, titan_1284p1 },
Linus Torvalds1da177e2005-04-16 15:20:36 -07002913 { 0x9710, 0x9815, 0x1000, 0x0020, 0, 0, titan_1284p2 },
2914 /* PCI_VENDOR_ID_AVLAB/Intek21 has another bunch of cards ...*/
2915 { 0x14db, 0x2120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1p}, /* AFAVLAB_TK9902 */
2916 { 0x14db, 0x2121, PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2p},
Ryan Underwoodc140e112006-12-06 20:36:38 -08002917 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI952PP,
2918 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_952 },
Linus Torvalds1da177e2005-04-16 15:20:36 -07002919 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954PP,
2920 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_954 },
2921 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_12PCI840,
2922 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_840 },
2923 { PCI_VENDOR_ID_AKS, PCI_DEVICE_ID_AKS_ALADDINCARD,
2924 PCI_ANY_ID, PCI_ANY_ID, 0, 0, aks_0100 },
2925 /* NetMos communication controllers */
2926 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9705,
2927 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9705 },
2928 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9715,
2929 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9715 },
2930 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9755,
2931 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9755 },
2932 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9805,
2933 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9805 },
2934 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9815,
2935 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9815 },
Linus Torvalds1da177e2005-04-16 15:20:36 -07002936 { 0, } /* terminate list */
2937};
2938MODULE_DEVICE_TABLE(pci,parport_pc_pci_tbl);
2939
2940struct pci_parport_data {
2941 int num;
2942 struct parport *ports[2];
2943};
2944
2945static int parport_pc_pci_probe (struct pci_dev *dev,
2946 const struct pci_device_id *id)
2947{
2948 int err, count, n, i = id->driver_data;
2949 struct pci_parport_data *data;
2950
2951 if (i < last_sio)
2952 /* This is an onboard Super-IO and has already been probed */
2953 return 0;
2954
2955 /* This is a PCI card */
2956 i -= last_sio;
2957 count = 0;
2958 if ((err = pci_enable_device (dev)) != 0)
2959 return err;
2960
2961 data = kmalloc(sizeof(struct pci_parport_data), GFP_KERNEL);
2962 if (!data)
2963 return -ENOMEM;
2964
2965 if (cards[i].preinit_hook &&
2966 cards[i].preinit_hook (dev, PARPORT_IRQ_NONE, PARPORT_DMA_NONE)) {
2967 kfree(data);
2968 return -ENODEV;
2969 }
2970
2971 for (n = 0; n < cards[i].numports; n++) {
2972 int lo = cards[i].addr[n].lo;
2973 int hi = cards[i].addr[n].hi;
2974 unsigned long io_lo, io_hi;
2975 io_lo = pci_resource_start (dev, lo);
2976 io_hi = 0;
2977 if ((hi >= 0) && (hi <= 6))
2978 io_hi = pci_resource_start (dev, hi);
2979 else if (hi > 6)
2980 io_lo += hi; /* Reinterpret the meaning of
2981 "hi" as an offset (see SYBA
2982 def.) */
2983 /* TODO: test if sharing interrupts works */
2984 printk (KERN_DEBUG "PCI parallel port detected: %04x:%04x, "
2985 "I/O at %#lx(%#lx)\n",
2986 parport_pc_pci_tbl[i + last_sio].vendor,
2987 parport_pc_pci_tbl[i + last_sio].device, io_lo, io_hi);
2988 data->ports[count] =
2989 parport_pc_probe_port (io_lo, io_hi, PARPORT_IRQ_NONE,
David Brownellc15a3832007-05-08 00:27:35 -07002990 PARPORT_DMA_NONE, &dev->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002991 if (data->ports[count])
2992 count++;
2993 }
2994
2995 data->num = count;
2996
2997 if (cards[i].postinit_hook)
2998 cards[i].postinit_hook (dev, count == 0);
2999
3000 if (count) {
3001 pci_set_drvdata(dev, data);
3002 return 0;
3003 }
3004
3005 kfree(data);
3006
3007 return -ENODEV;
3008}
3009
3010static void __devexit parport_pc_pci_remove(struct pci_dev *dev)
3011{
3012 struct pci_parport_data *data = pci_get_drvdata(dev);
3013 int i;
3014
3015 pci_set_drvdata(dev, NULL);
3016
3017 if (data) {
3018 for (i = data->num - 1; i >= 0; i--)
3019 parport_pc_unregister_port(data->ports[i]);
3020
3021 kfree(data);
3022 }
3023}
3024
3025static struct pci_driver parport_pc_pci_driver = {
3026 .name = "parport_pc",
3027 .id_table = parport_pc_pci_tbl,
3028 .probe = parport_pc_pci_probe,
3029 .remove = __devexit_p(parport_pc_pci_remove),
3030};
3031
3032static int __init parport_pc_init_superio (int autoirq, int autodma)
3033{
3034 const struct pci_device_id *id;
3035 struct pci_dev *pdev = NULL;
3036 int ret = 0;
3037
Jiri Slabyc9d80732005-08-10 02:09:39 +02003038 for_each_pci_dev(pdev) {
Greg Kroah-Hartman75865852005-06-30 02:18:12 -07003039 id = pci_match_id(parport_pc_pci_tbl, pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003040 if (id == NULL || id->driver_data >= last_sio)
3041 continue;
3042
3043 if (parport_pc_superio_info[id->driver_data].probe
3044 (pdev, autoirq, autodma,parport_pc_superio_info[id->driver_data].via)) {
3045 ret++;
3046 }
3047 }
3048
3049 return ret; /* number of devices found */
3050}
3051#else
3052static struct pci_driver parport_pc_pci_driver;
3053static int __init parport_pc_init_superio(int autoirq, int autodma) {return 0;}
3054#endif /* CONFIG_PCI */
3055
3056
3057static const struct pnp_device_id parport_pc_pnp_tbl[] = {
3058 /* Standard LPT Printer Port */
3059 {.id = "PNP0400", .driver_data = 0},
3060 /* ECP Printer Port */
3061 {.id = "PNP0401", .driver_data = 0},
3062 { }
3063};
3064
3065MODULE_DEVICE_TABLE(pnp,parport_pc_pnp_tbl);
3066
3067static int parport_pc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id)
3068{
3069 struct parport *pdata;
3070 unsigned long io_lo, io_hi;
3071 int dma, irq;
3072
3073 if (pnp_port_valid(dev,0) &&
3074 !(pnp_port_flags(dev,0) & IORESOURCE_DISABLED)) {
3075 io_lo = pnp_port_start(dev,0);
3076 } else
3077 return -EINVAL;
3078
3079 if (pnp_port_valid(dev,1) &&
3080 !(pnp_port_flags(dev,1) & IORESOURCE_DISABLED)) {
3081 io_hi = pnp_port_start(dev,1);
3082 } else
3083 io_hi = 0;
3084
3085 if (pnp_irq_valid(dev,0) &&
3086 !(pnp_irq_flags(dev,0) & IORESOURCE_DISABLED)) {
3087 irq = pnp_irq(dev,0);
3088 } else
3089 irq = PARPORT_IRQ_NONE;
3090
3091 if (pnp_dma_valid(dev,0) &&
3092 !(pnp_dma_flags(dev,0) & IORESOURCE_DISABLED)) {
3093 dma = pnp_dma(dev,0);
3094 } else
3095 dma = PARPORT_DMA_NONE;
3096
David Brownellc15a3832007-05-08 00:27:35 -07003097 dev_info(&dev->dev, "reported by %s\n", dev->protocol->name);
3098 if (!(pdata = parport_pc_probe_port (io_lo, io_hi, irq, dma, &dev->dev)))
Linus Torvalds1da177e2005-04-16 15:20:36 -07003099 return -ENODEV;
3100
3101 pnp_set_drvdata(dev,pdata);
3102 return 0;
3103}
3104
3105static void parport_pc_pnp_remove(struct pnp_dev *dev)
3106{
3107 struct parport *pdata = (struct parport *)pnp_get_drvdata(dev);
3108 if (!pdata)
3109 return;
3110
3111 parport_pc_unregister_port(pdata);
3112}
3113
3114/* we only need the pnp layer to activate the device, at least for now */
3115static struct pnp_driver parport_pc_pnp_driver = {
3116 .name = "parport_pc",
3117 .id_table = parport_pc_pnp_tbl,
3118 .probe = parport_pc_pnp_probe,
3119 .remove = parport_pc_pnp_remove,
3120};
3121
3122
Jean Delvarea7d801a2007-05-08 00:27:40 -07003123static int __devinit parport_pc_platform_probe(struct platform_device *pdev)
3124{
3125 /* Always succeed, the actual probing is done in
3126 * parport_pc_probe_port(). */
3127 return 0;
3128}
3129
3130static struct platform_driver parport_pc_platform_driver = {
3131 .driver = {
3132 .owner = THIS_MODULE,
3133 .name = "parport_pc",
3134 },
3135 .probe = parport_pc_platform_probe,
3136};
3137
Linus Torvalds1da177e2005-04-16 15:20:36 -07003138/* This is called by parport_pc_find_nonpci_ports (in asm/parport.h) */
3139static int __devinit __attribute__((unused))
3140parport_pc_find_isa_ports (int autoirq, int autodma)
3141{
3142 int count = 0;
3143
3144 if (parport_pc_probe_port(0x3bc, 0x7bc, autoirq, autodma, NULL))
3145 count++;
3146 if (parport_pc_probe_port(0x378, 0x778, autoirq, autodma, NULL))
3147 count++;
3148 if (parport_pc_probe_port(0x278, 0x678, autoirq, autodma, NULL))
3149 count++;
3150
3151 return count;
3152}
3153
3154/* This function is called by parport_pc_init if the user didn't
3155 * specify any ports to probe. Its job is to find some ports. Order
3156 * is important here -- we want ISA ports to be registered first,
3157 * followed by PCI cards (for least surprise), but before that we want
3158 * to do chipset-specific tests for some onboard ports that we know
3159 * about.
3160 *
3161 * autoirq is PARPORT_IRQ_NONE, PARPORT_IRQ_AUTO, or PARPORT_IRQ_PROBEONLY
3162 * autodma is PARPORT_DMA_NONE or PARPORT_DMA_AUTO
3163 */
Bjorn Helgaas7597fee2006-03-27 01:17:02 -08003164static void __init parport_pc_find_ports (int autoirq, int autodma)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003165{
Bjorn Helgaas7597fee2006-03-27 01:17:02 -08003166 int count = 0, err;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003167
3168#ifdef CONFIG_PARPORT_PC_SUPERIO
3169 detect_and_report_winbond ();
3170 detect_and_report_smsc ();
3171#endif
3172
3173 /* Onboard SuperIO chipsets that show themselves on the PCI bus. */
3174 count += parport_pc_init_superio (autoirq, autodma);
3175
3176 /* PnP ports, skip detection if SuperIO already found them */
3177 if (!count) {
Bjorn Helgaas7597fee2006-03-27 01:17:02 -08003178 err = pnp_register_driver (&parport_pc_pnp_driver);
3179 if (!err)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003180 pnp_registered_parport = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003181 }
3182
3183 /* ISA ports and whatever (see asm/parport.h). */
Bjorn Helgaas7597fee2006-03-27 01:17:02 -08003184 parport_pc_find_nonpci_ports (autoirq, autodma);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003185
Bjorn Helgaas7597fee2006-03-27 01:17:02 -08003186 err = pci_register_driver (&parport_pc_pci_driver);
3187 if (!err)
3188 pci_registered_parport = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003189}
3190
3191/*
3192 * Piles of crap below pretend to be a parser for module and kernel
3193 * parameters. Say "thank you" to whoever had come up with that
3194 * syntax and keep in mind that code below is a cleaned up version.
3195 */
3196
3197static int __initdata io[PARPORT_PC_MAX_PORTS+1] = { [0 ... PARPORT_PC_MAX_PORTS] = 0 };
3198static int __initdata io_hi[PARPORT_PC_MAX_PORTS+1] =
3199 { [0 ... PARPORT_PC_MAX_PORTS] = PARPORT_IOHI_AUTO };
3200static int __initdata dmaval[PARPORT_PC_MAX_PORTS] = { [0 ... PARPORT_PC_MAX_PORTS-1] = PARPORT_DMA_NONE };
3201static int __initdata irqval[PARPORT_PC_MAX_PORTS] = { [0 ... PARPORT_PC_MAX_PORTS-1] = PARPORT_IRQ_PROBEONLY };
3202
3203static int __init parport_parse_param(const char *s, int *val,
3204 int automatic, int none, int nofifo)
3205{
3206 if (!s)
3207 return 0;
3208 if (!strncmp(s, "auto", 4))
3209 *val = automatic;
3210 else if (!strncmp(s, "none", 4))
3211 *val = none;
3212 else if (nofifo && !strncmp(s, "nofifo", 4))
3213 *val = nofifo;
3214 else {
3215 char *ep;
3216 unsigned long r = simple_strtoul(s, &ep, 0);
3217 if (ep != s)
3218 *val = r;
3219 else {
3220 printk(KERN_ERR "parport: bad specifier `%s'\n", s);
3221 return -1;
3222 }
3223 }
3224 return 0;
3225}
3226
3227static int __init parport_parse_irq(const char *irqstr, int *val)
3228{
3229 return parport_parse_param(irqstr, val, PARPORT_IRQ_AUTO,
3230 PARPORT_IRQ_NONE, 0);
3231}
3232
3233static int __init parport_parse_dma(const char *dmastr, int *val)
3234{
3235 return parport_parse_param(dmastr, val, PARPORT_DMA_AUTO,
3236 PARPORT_DMA_NONE, PARPORT_DMA_NOFIFO);
3237}
3238
3239#ifdef CONFIG_PCI
3240static int __init parport_init_mode_setup(char *str)
3241{
3242 printk(KERN_DEBUG "parport_pc.c: Specified parameter parport_init_mode=%s\n", str);
3243
3244 if (!strcmp (str, "spp"))
3245 parport_init_mode=1;
3246 if (!strcmp (str, "ps2"))
3247 parport_init_mode=2;
3248 if (!strcmp (str, "epp"))
3249 parport_init_mode=3;
3250 if (!strcmp (str, "ecp"))
3251 parport_init_mode=4;
3252 if (!strcmp (str, "ecpepp"))
3253 parport_init_mode=5;
3254 return 1;
3255}
3256#endif
3257
3258#ifdef MODULE
3259static const char *irq[PARPORT_PC_MAX_PORTS];
3260static const char *dma[PARPORT_PC_MAX_PORTS];
3261
3262MODULE_PARM_DESC(io, "Base I/O address (SPP regs)");
3263module_param_array(io, int, NULL, 0);
3264MODULE_PARM_DESC(io_hi, "Base I/O address (ECR)");
3265module_param_array(io_hi, int, NULL, 0);
3266MODULE_PARM_DESC(irq, "IRQ line");
3267module_param_array(irq, charp, NULL, 0);
3268MODULE_PARM_DESC(dma, "DMA channel");
3269module_param_array(dma, charp, NULL, 0);
3270#if defined(CONFIG_PARPORT_PC_SUPERIO) || \
3271 (defined(CONFIG_PARPORT_1284) && defined(CONFIG_PARPORT_PC_FIFO))
3272MODULE_PARM_DESC(verbose_probing, "Log chit-chat during initialisation");
3273module_param(verbose_probing, int, 0644);
3274#endif
3275#ifdef CONFIG_PCI
3276static char *init_mode;
3277MODULE_PARM_DESC(init_mode, "Initialise mode for VIA VT8231 port (spp, ps2, epp, ecp or ecpepp)");
3278module_param(init_mode, charp, 0);
3279#endif
3280
3281static int __init parse_parport_params(void)
3282{
3283 unsigned int i;
3284 int val;
3285
3286#ifdef CONFIG_PCI
3287 if (init_mode)
3288 parport_init_mode_setup(init_mode);
3289#endif
3290
3291 for (i = 0; i < PARPORT_PC_MAX_PORTS && io[i]; i++) {
3292 if (parport_parse_irq(irq[i], &val))
3293 return 1;
3294 irqval[i] = val;
3295 if (parport_parse_dma(dma[i], &val))
3296 return 1;
3297 dmaval[i] = val;
3298 }
3299 if (!io[0]) {
3300 /* The user can make us use any IRQs or DMAs we find. */
3301 if (irq[0] && !parport_parse_irq(irq[0], &val))
3302 switch (val) {
3303 case PARPORT_IRQ_NONE:
3304 case PARPORT_IRQ_AUTO:
3305 irqval[0] = val;
3306 break;
3307 default:
3308 printk (KERN_WARNING
3309 "parport_pc: irq specified "
3310 "without base address. Use 'io=' "
3311 "to specify one\n");
3312 }
3313
3314 if (dma[0] && !parport_parse_dma(dma[0], &val))
3315 switch (val) {
3316 case PARPORT_DMA_NONE:
3317 case PARPORT_DMA_AUTO:
3318 dmaval[0] = val;
3319 break;
3320 default:
3321 printk (KERN_WARNING
3322 "parport_pc: dma specified "
3323 "without base address. Use 'io=' "
3324 "to specify one\n");
3325 }
3326 }
3327 return 0;
3328}
3329
3330#else
3331
3332static int parport_setup_ptr __initdata = 0;
3333
3334/*
3335 * Acceptable parameters:
3336 *
3337 * parport=0
3338 * parport=auto
3339 * parport=0xBASE[,IRQ[,DMA]]
3340 *
3341 * IRQ/DMA may be numeric or 'auto' or 'none'
3342 */
3343static int __init parport_setup (char *str)
3344{
3345 char *endptr;
3346 char *sep;
3347 int val;
3348
3349 if (!str || !*str || (*str == '0' && !*(str+1))) {
3350 /* Disable parport if "parport=0" in cmdline */
3351 io[0] = PARPORT_DISABLE;
3352 return 1;
3353 }
3354
3355 if (!strncmp (str, "auto", 4)) {
3356 irqval[0] = PARPORT_IRQ_AUTO;
3357 dmaval[0] = PARPORT_DMA_AUTO;
3358 return 1;
3359 }
3360
3361 val = simple_strtoul (str, &endptr, 0);
3362 if (endptr == str) {
3363 printk (KERN_WARNING "parport=%s not understood\n", str);
3364 return 1;
3365 }
3366
3367 if (parport_setup_ptr == PARPORT_PC_MAX_PORTS) {
3368 printk(KERN_ERR "parport=%s ignored, too many ports\n", str);
3369 return 1;
3370 }
3371
3372 io[parport_setup_ptr] = val;
3373 irqval[parport_setup_ptr] = PARPORT_IRQ_NONE;
3374 dmaval[parport_setup_ptr] = PARPORT_DMA_NONE;
3375
3376 sep = strchr(str, ',');
3377 if (sep++) {
3378 if (parport_parse_irq(sep, &val))
3379 return 1;
3380 irqval[parport_setup_ptr] = val;
3381 sep = strchr(sep, ',');
3382 if (sep++) {
3383 if (parport_parse_dma(sep, &val))
3384 return 1;
3385 dmaval[parport_setup_ptr] = val;
3386 }
3387 }
3388 parport_setup_ptr++;
3389 return 1;
3390}
3391
3392static int __init parse_parport_params(void)
3393{
3394 return io[0] == PARPORT_DISABLE;
3395}
3396
3397__setup ("parport=", parport_setup);
3398
3399/*
3400 * Acceptable parameters:
3401 *
3402 * parport_init_mode=[spp|ps2|epp|ecp|ecpepp]
3403 */
3404#ifdef CONFIG_PCI
3405__setup("parport_init_mode=",parport_init_mode_setup);
3406#endif
3407#endif
3408
3409/* "Parser" ends here */
3410
3411static int __init parport_pc_init(void)
3412{
Jean Delvarea7d801a2007-05-08 00:27:40 -07003413 int err;
3414
Linus Torvalds1da177e2005-04-16 15:20:36 -07003415 if (parse_parport_params())
3416 return -EINVAL;
3417
Jean Delvarea7d801a2007-05-08 00:27:40 -07003418 err = platform_driver_register(&parport_pc_platform_driver);
3419 if (err)
3420 return err;
3421
Linus Torvalds1da177e2005-04-16 15:20:36 -07003422 if (io[0]) {
3423 int i;
3424 /* Only probe the ports we were given. */
3425 user_specified = 1;
3426 for (i = 0; i < PARPORT_PC_MAX_PORTS; i++) {
3427 if (!io[i])
3428 break;
3429 if ((io_hi[i]) == PARPORT_IOHI_AUTO)
3430 io_hi[i] = 0x400 + io[i];
Bjorn Helgaas7597fee2006-03-27 01:17:02 -08003431 parport_pc_probe_port(io[i], io_hi[i],
3432 irqval[i], dmaval[i], NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003433 }
3434 } else
Bjorn Helgaas7597fee2006-03-27 01:17:02 -08003435 parport_pc_find_ports (irqval[0], dmaval[0]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003436
3437 return 0;
3438}
3439
3440static void __exit parport_pc_exit(void)
3441{
3442 if (pci_registered_parport)
3443 pci_unregister_driver (&parport_pc_pci_driver);
3444 if (pnp_registered_parport)
3445 pnp_unregister_driver (&parport_pc_pnp_driver);
Jean Delvarea7d801a2007-05-08 00:27:40 -07003446 platform_driver_unregister(&parport_pc_platform_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003447
3448 spin_lock(&ports_lock);
3449 while (!list_empty(&ports_list)) {
3450 struct parport_pc_private *priv;
3451 struct parport *port;
3452 priv = list_entry(ports_list.next,
3453 struct parport_pc_private, list);
3454 port = priv->port;
Jean Delvarea7d801a2007-05-08 00:27:40 -07003455 if (port->dev && port->dev->bus == &platform_bus_type)
3456 platform_device_unregister(
3457 to_platform_device(port->dev));
Linus Torvalds1da177e2005-04-16 15:20:36 -07003458 spin_unlock(&ports_lock);
3459 parport_pc_unregister_port(port);
3460 spin_lock(&ports_lock);
3461 }
3462 spin_unlock(&ports_lock);
3463}
3464
3465MODULE_AUTHOR("Phil Blundell, Tim Waugh, others");
3466MODULE_DESCRIPTION("PC-style parallel port driver");
3467MODULE_LICENSE("GPL");
3468module_init(parport_pc_init)
3469module_exit(parport_pc_exit)