Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/m68knommu/platform/68360/config.c |
| 3 | * |
| 4 | * Copyright (c) 2000 Michael Leslie <mleslie@lineo.com> |
| 5 | * Copyright (C) 1993 Hamish Macdonald |
| 6 | * Copyright (C) 1999 D. Jeff Dionne <jeff@uclinux.org> |
| 7 | * |
| 8 | * This file is subject to the terms and conditions of the GNU General Public |
| 9 | * License. See the file COPYING in the main directory of this archive |
| 10 | * for more details. |
| 11 | */ |
| 12 | |
| 13 | #include <stdarg.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | #include <linux/types.h> |
| 15 | #include <linux/kernel.h> |
| 16 | #include <linux/mm.h> |
| 17 | #include <linux/tty.h> |
| 18 | #include <linux/console.h> |
Greg Ungerer | b032fde | 2007-03-07 11:28:13 +1000 | [diff] [blame] | 19 | #include <linux/interrupt.h> |
Greg Ungerer | aa1f1d1 | 2007-07-27 01:09:00 +1000 | [diff] [blame^] | 20 | #include <linux/irq.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | |
| 22 | #include <asm/setup.h> |
| 23 | #include <asm/system.h> |
| 24 | #include <asm/pgtable.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | #include <asm/machdep.h> |
| 26 | #include <asm/m68360.h> |
| 27 | |
| 28 | #ifdef CONFIG_UCQUICC |
| 29 | #include <asm/bootstd.h> |
| 30 | #endif |
| 31 | |
| 32 | extern void m360_cpm_reset(void); |
| 33 | |
| 34 | // Mask to select if the PLL prescaler is enabled. |
| 35 | #define MCU_PREEN ((unsigned short)(0x0001 << 13)) |
| 36 | |
| 37 | #if defined(CONFIG_UCQUICC) |
| 38 | #define OSCILLATOR (unsigned long int)33000000 |
| 39 | #endif |
| 40 | |
| 41 | unsigned long int system_clock; |
| 42 | |
| 43 | void M68360_init_IRQ(void); |
| 44 | |
| 45 | extern QUICC *pquicc; |
| 46 | |
| 47 | /* TODO DON"T Hard Code this */ |
| 48 | /* calculate properly using the right PLL and prescaller */ |
| 49 | // unsigned int system_clock = 33000000l; |
| 50 | extern unsigned long int system_clock; //In kernel setup.c |
| 51 | |
| 52 | extern void config_M68360_irq(void); |
| 53 | |
Greg Ungerer | aa1f1d1 | 2007-07-27 01:09:00 +1000 | [diff] [blame^] | 54 | static struct irqaction m68360_timer_irq = { |
| 55 | .name = "timer", |
| 56 | .flags = IRQF_DISABLED | IRQF_TIMER, |
| 57 | }; |
| 58 | |
Greg Ungerer | b032fde | 2007-03-07 11:28:13 +1000 | [diff] [blame] | 59 | void BSP_sched_init(irq_handler_t timer_routine) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | { |
| 61 | unsigned char prescaler; |
| 62 | unsigned short tgcr_save; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | |
| 64 | #if 0 |
| 65 | /* Restart mode, Enable int, 32KHz, Enable timer */ |
| 66 | TCTL = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ | TCTL_TEN; |
| 67 | /* Set prescaler (Divide 32KHz by 32)*/ |
| 68 | TPRER = 31; |
| 69 | /* Set compare register 32Khz / 32 / 10 = 100 */ |
| 70 | TCMP = 10; |
| 71 | |
| 72 | request_irq(IRQ_MACHSPEC | 1, timer_routine, IRQ_FLG_LOCK, "timer", NULL); |
| 73 | #endif |
| 74 | |
| 75 | /* General purpose quicc timers: MC68360UM p7-20 */ |
| 76 | |
| 77 | /* Set up timer 1 (in [1..4]) to do 100Hz */ |
| 78 | tgcr_save = pquicc->timer_tgcr & 0xfff0; |
| 79 | pquicc->timer_tgcr = tgcr_save; /* stop and reset timer 1 */ |
| 80 | /* pquicc->timer_tgcr |= 0x4444; */ /* halt timers when FREEZE (ie bdm freeze) */ |
| 81 | |
| 82 | prescaler = 8; |
| 83 | pquicc->timer_tmr1 = 0x001a | /* or=1, frr=1, iclk=01b */ |
| 84 | (unsigned short)((prescaler - 1) << 8); |
| 85 | |
| 86 | pquicc->timer_tcn1 = 0x0000; /* initial count */ |
| 87 | /* calculate interval for 100Hz based on the _system_clock: */ |
| 88 | pquicc->timer_trr1 = (system_clock/ prescaler) / HZ; /* reference count */ |
| 89 | |
| 90 | pquicc->timer_ter1 = 0x0003; /* clear timer events */ |
| 91 | |
| 92 | /* enable timer 1 interrupt in CIMR */ |
Greg Ungerer | aa1f1d1 | 2007-07-27 01:09:00 +1000 | [diff] [blame^] | 93 | m68360_timer_irq.handler = timer_routine; |
| 94 | setup_irq(CPMVEC_TIMER1, &m68360_timer_irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 95 | |
| 96 | /* Start timer 1: */ |
| 97 | tgcr_save = (pquicc->timer_tgcr & 0xfff0) | 0x0001; |
| 98 | pquicc->timer_tgcr = tgcr_save; |
| 99 | } |
| 100 | |
| 101 | |
| 102 | void BSP_tick(void) |
| 103 | { |
| 104 | /* Reset Timer1 */ |
| 105 | /* TSTAT &= 0; */ |
| 106 | |
| 107 | pquicc->timer_ter1 = 0x0002; /* clear timer event */ |
| 108 | } |
| 109 | |
| 110 | unsigned long BSP_gettimeoffset (void) |
| 111 | { |
| 112 | return 0; |
| 113 | } |
| 114 | |
| 115 | void BSP_gettod (int *yearp, int *monp, int *dayp, |
| 116 | int *hourp, int *minp, int *secp) |
| 117 | { |
| 118 | } |
| 119 | |
Greg Ungerer | dcb1477 | 2006-12-06 11:43:14 +1000 | [diff] [blame] | 120 | int BSP_hwclk(int op, struct rtc_time *t) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 121 | { |
| 122 | if (!op) { |
| 123 | /* read */ |
| 124 | } else { |
| 125 | /* write */ |
| 126 | } |
| 127 | return 0; |
| 128 | } |
| 129 | |
| 130 | int BSP_set_clock_mmss (unsigned long nowtime) |
| 131 | { |
| 132 | #if 0 |
| 133 | short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60; |
| 134 | |
| 135 | tod->second1 = real_seconds / 10; |
| 136 | tod->second2 = real_seconds % 10; |
| 137 | tod->minute1 = real_minutes / 10; |
| 138 | tod->minute2 = real_minutes % 10; |
| 139 | #endif |
| 140 | return 0; |
| 141 | } |
| 142 | |
| 143 | void BSP_reset (void) |
| 144 | { |
| 145 | local_irq_disable(); |
Greg Ungerer | bda6583 | 2006-06-28 16:21:38 +1000 | [diff] [blame] | 146 | asm volatile ( |
| 147 | "moveal #_start, %a0;\n" |
| 148 | "moveb #0, 0xFFFFF300;\n" |
| 149 | "moveal 0(%a0), %sp;\n" |
| 150 | "moveal 4(%a0), %a0;\n" |
| 151 | "jmp (%a0);\n" |
| 152 | ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 153 | } |
| 154 | |
| 155 | unsigned char *scc1_hwaddr; |
| 156 | static int errno; |
| 157 | |
| 158 | #if defined (CONFIG_UCQUICC) |
| 159 | _bsc0(char *, getserialnum) |
| 160 | _bsc1(unsigned char *, gethwaddr, int, a) |
| 161 | _bsc1(char *, getbenv, char *, a) |
| 162 | #endif |
| 163 | |
| 164 | |
| 165 | void config_BSP(char *command, int len) |
| 166 | { |
| 167 | unsigned char *p; |
| 168 | |
| 169 | m360_cpm_reset(); |
| 170 | |
| 171 | /* Calculate the real system clock value. */ |
| 172 | { |
| 173 | unsigned int local_pllcr = (unsigned int)(pquicc->sim_pllcr); |
| 174 | if( local_pllcr & MCU_PREEN ) // If the prescaler is dividing by 128 |
| 175 | { |
| 176 | int mf = (int)(pquicc->sim_pllcr & 0x0fff); |
| 177 | system_clock = (OSCILLATOR / 128) * (mf + 1); |
| 178 | } |
| 179 | else |
| 180 | { |
| 181 | int mf = (int)(pquicc->sim_pllcr & 0x0fff); |
| 182 | system_clock = (OSCILLATOR) * (mf + 1); |
| 183 | } |
| 184 | } |
| 185 | |
| 186 | printk(KERN_INFO "\n68360 QUICC support (C) 2000 Lineo Inc.\n"); |
| 187 | |
| 188 | #if defined(CONFIG_UCQUICC) && 0 |
| 189 | printk(KERN_INFO "uCquicc serial string [%s]\n",getserialnum()); |
| 190 | p = scc1_hwaddr = gethwaddr(0); |
| 191 | printk(KERN_INFO "uCquicc hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n", |
| 192 | p[0], p[1], p[2], p[3], p[4], p[5]); |
| 193 | |
| 194 | p = getbenv("APPEND"); |
| 195 | if (p) |
| 196 | strcpy(p,command); |
| 197 | else |
| 198 | command[0] = 0; |
| 199 | #else |
| 200 | scc1_hwaddr = "\00\01\02\03\04\05"; |
| 201 | #endif |
| 202 | |
| 203 | mach_sched_init = BSP_sched_init; |
| 204 | mach_tick = BSP_tick; |
| 205 | mach_gettimeoffset = BSP_gettimeoffset; |
| 206 | mach_gettod = BSP_gettod; |
| 207 | mach_hwclk = NULL; |
| 208 | mach_set_clock_mmss = NULL; |
| 209 | mach_reset = BSP_reset; |
| 210 | } |