Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 1 | /* linux/arch/arm/mach-s3c64xx/mach-crag6410.c |
| 2 | * |
| 3 | * Copyright 2011 Wolfson Microelectronics plc |
| 4 | * Mark Brown <broonie@opensource.wolfsonmicro.com> |
| 5 | * |
| 6 | * Copyright 2011 Simtec Electronics |
| 7 | * Ben Dooks <ben@simtec.co.uk> |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/kernel.h> |
| 15 | #include <linux/list.h> |
| 16 | #include <linux/serial_core.h> |
| 17 | #include <linux/platform_device.h> |
| 18 | #include <linux/fb.h> |
| 19 | #include <linux/io.h> |
| 20 | #include <linux/init.h> |
| 21 | #include <linux/gpio.h> |
| 22 | #include <linux/delay.h> |
| 23 | #include <linux/regulator/machine.h> |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 24 | #include <linux/regulator/fixed.h> |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 25 | #include <linux/pwm_backlight.h> |
| 26 | #include <linux/dm9000.h> |
| 27 | #include <linux/gpio_keys.h> |
| 28 | #include <linux/basic_mmio_gpio.h> |
| 29 | #include <linux/spi/spi.h> |
| 30 | |
| 31 | #include <linux/i2c/pca953x.h> |
| 32 | |
| 33 | #include <video/platform_lcd.h> |
| 34 | |
| 35 | #include <linux/mfd/wm831x/core.h> |
| 36 | #include <linux/mfd/wm831x/pdata.h> |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 37 | #include <linux/mfd/wm831x/irq.h> |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 38 | #include <linux/mfd/wm831x/gpio.h> |
| 39 | |
| 40 | #include <asm/mach/arch.h> |
| 41 | #include <asm/mach-types.h> |
| 42 | |
| 43 | #include <mach/hardware.h> |
| 44 | #include <mach/map.h> |
| 45 | |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 46 | #include <mach/regs-sys.h> |
| 47 | #include <mach/regs-gpio.h> |
| 48 | #include <mach/regs-modem.h> |
Mark Brown | d0f0b43 | 2011-08-19 22:40:07 +0900 | [diff] [blame] | 49 | #include <mach/crag6410.h> |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 50 | |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 51 | #include <mach/regs-gpio-memport.h> |
| 52 | |
Kukjin Kim | 3cd7b62 | 2011-09-10 10:09:21 +0900 | [diff] [blame] | 53 | #include <plat/s3c6410.h> |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 54 | #include <plat/regs-serial.h> |
| 55 | #include <plat/regs-fb-v4.h> |
| 56 | #include <plat/fb.h> |
| 57 | #include <plat/sdhci.h> |
| 58 | #include <plat/gpio-cfg.h> |
| 59 | #include <plat/s3c64xx-spi.h> |
| 60 | |
| 61 | #include <plat/keypad.h> |
| 62 | #include <plat/clock.h> |
| 63 | #include <plat/devs.h> |
| 64 | #include <plat/cpu.h> |
| 65 | #include <plat/adc.h> |
| 66 | #include <plat/iic.h> |
| 67 | #include <plat/pm.h> |
| 68 | |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 69 | /* serial port setup */ |
| 70 | |
| 71 | #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) |
| 72 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) |
| 73 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) |
| 74 | |
| 75 | static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = { |
| 76 | [0] = { |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 77 | .hwport = 0, |
| 78 | .flags = 0, |
| 79 | .ucon = UCON, |
| 80 | .ulcon = ULCON, |
| 81 | .ufcon = UFCON, |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 82 | }, |
| 83 | [1] = { |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 84 | .hwport = 1, |
| 85 | .flags = 0, |
| 86 | .ucon = UCON, |
| 87 | .ulcon = ULCON, |
| 88 | .ufcon = UFCON, |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 89 | }, |
| 90 | [2] = { |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 91 | .hwport = 2, |
| 92 | .flags = 0, |
| 93 | .ucon = UCON, |
| 94 | .ulcon = ULCON, |
| 95 | .ufcon = UFCON, |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 96 | }, |
| 97 | [3] = { |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 98 | .hwport = 3, |
| 99 | .flags = 0, |
| 100 | .ucon = UCON, |
| 101 | .ulcon = ULCON, |
| 102 | .ufcon = UFCON, |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 103 | }, |
| 104 | }; |
| 105 | |
| 106 | static struct platform_pwm_backlight_data crag6410_backlight_data = { |
| 107 | .pwm_id = 0, |
| 108 | .max_brightness = 1000, |
| 109 | .dft_brightness = 600, |
| 110 | .pwm_period_ns = 100000, /* about 1kHz */ |
| 111 | }; |
| 112 | |
| 113 | static struct platform_device crag6410_backlight_device = { |
| 114 | .name = "pwm-backlight", |
| 115 | .id = -1, |
| 116 | .dev = { |
| 117 | .parent = &s3c_device_timer[0].dev, |
| 118 | .platform_data = &crag6410_backlight_data, |
| 119 | }, |
| 120 | }; |
| 121 | |
| 122 | static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power) |
| 123 | { |
| 124 | pr_debug("%s: setting power %d\n", __func__, power); |
| 125 | |
| 126 | if (power) { |
| 127 | gpio_set_value(S3C64XX_GPB(0), 1); |
| 128 | msleep(1); |
| 129 | s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2)); |
| 130 | } else { |
| 131 | gpio_direction_output(S3C64XX_GPF(14), 0); |
| 132 | gpio_set_value(S3C64XX_GPB(0), 0); |
| 133 | } |
| 134 | } |
| 135 | |
| 136 | static struct platform_device crag6410_lcd_powerdev = { |
| 137 | .name = "platform-lcd", |
| 138 | .id = -1, |
| 139 | .dev.parent = &s3c_device_fb.dev, |
| 140 | .dev.platform_data = &(struct plat_lcd_data) { |
| 141 | .set_power = crag6410_lcd_power_set, |
| 142 | }, |
| 143 | }; |
| 144 | |
| 145 | /* 640x480 URT */ |
| 146 | static struct s3c_fb_pd_win crag6410_fb_win0 = { |
| 147 | /* this is to ensure we use win0 */ |
| 148 | .win_mode = { |
| 149 | .left_margin = 150, |
| 150 | .right_margin = 80, |
| 151 | .upper_margin = 40, |
| 152 | .lower_margin = 5, |
| 153 | .hsync_len = 40, |
| 154 | .vsync_len = 5, |
| 155 | .xres = 640, |
| 156 | .yres = 480, |
| 157 | }, |
| 158 | .max_bpp = 32, |
| 159 | .default_bpp = 16, |
| 160 | .virtual_y = 480 * 2, |
| 161 | .virtual_x = 640, |
| 162 | }; |
| 163 | |
| 164 | /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */ |
| 165 | static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = { |
| 166 | .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, |
| 167 | .win[0] = &crag6410_fb_win0, |
| 168 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, |
| 169 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, |
| 170 | }; |
| 171 | |
| 172 | /* 2x6 keypad */ |
| 173 | |
| 174 | static uint32_t crag6410_keymap[] __initdata = { |
| 175 | /* KEY(row, col, keycode) */ |
| 176 | KEY(0, 0, KEY_VOLUMEUP), |
| 177 | KEY(0, 1, KEY_HOME), |
| 178 | KEY(0, 2, KEY_VOLUMEDOWN), |
| 179 | KEY(0, 3, KEY_HELP), |
| 180 | KEY(0, 4, KEY_MENU), |
| 181 | KEY(0, 5, KEY_MEDIA), |
| 182 | KEY(1, 0, 232), |
| 183 | KEY(1, 1, KEY_DOWN), |
| 184 | KEY(1, 2, KEY_LEFT), |
| 185 | KEY(1, 3, KEY_UP), |
| 186 | KEY(1, 4, KEY_RIGHT), |
| 187 | KEY(1, 5, KEY_CAMERA), |
| 188 | }; |
| 189 | |
| 190 | static struct matrix_keymap_data crag6410_keymap_data __initdata = { |
| 191 | .keymap = crag6410_keymap, |
| 192 | .keymap_size = ARRAY_SIZE(crag6410_keymap), |
| 193 | }; |
| 194 | |
| 195 | static struct samsung_keypad_platdata crag6410_keypad_data __initdata = { |
| 196 | .keymap_data = &crag6410_keymap_data, |
| 197 | .rows = 2, |
| 198 | .cols = 6, |
| 199 | }; |
| 200 | |
| 201 | static struct gpio_keys_button crag6410_gpio_keys[] = { |
| 202 | [0] = { |
| 203 | .code = KEY_SUSPEND, |
| 204 | .gpio = S3C64XX_GPL(10), /* EINT 18 */ |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 205 | .type = EV_KEY, |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 206 | .wakeup = 1, |
| 207 | .active_low = 1, |
| 208 | }, |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 209 | [1] = { |
| 210 | .code = SW_FRONT_PROXIMITY, |
| 211 | .gpio = S3C64XX_GPN(11), /* EINT 11 */ |
| 212 | .type = EV_SW, |
| 213 | }, |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 214 | }; |
| 215 | |
| 216 | static struct gpio_keys_platform_data crag6410_gpio_keydata = { |
| 217 | .buttons = crag6410_gpio_keys, |
| 218 | .nbuttons = ARRAY_SIZE(crag6410_gpio_keys), |
| 219 | }; |
| 220 | |
| 221 | static struct platform_device crag6410_gpio_keydev = { |
| 222 | .name = "gpio-keys", |
| 223 | .id = 0, |
| 224 | .dev.platform_data = &crag6410_gpio_keydata, |
| 225 | }; |
| 226 | |
| 227 | static struct resource crag6410_dm9k_resource[] = { |
| 228 | [0] = { |
| 229 | .start = S3C64XX_PA_XM0CSN5, |
| 230 | .end = S3C64XX_PA_XM0CSN5 + 1, |
| 231 | .flags = IORESOURCE_MEM, |
| 232 | }, |
| 233 | [1] = { |
| 234 | .start = S3C64XX_PA_XM0CSN5 + (1 << 8), |
| 235 | .end = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1, |
| 236 | .flags = IORESOURCE_MEM, |
| 237 | }, |
| 238 | [2] = { |
| 239 | .start = S3C_EINT(17), |
| 240 | .end = S3C_EINT(17), |
| 241 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
| 242 | }, |
| 243 | }; |
| 244 | |
| 245 | static struct dm9000_plat_data mini6410_dm9k_pdata = { |
| 246 | .flags = DM9000_PLATF_16BITONLY, |
| 247 | }; |
| 248 | |
| 249 | static struct platform_device crag6410_dm9k_device = { |
| 250 | .name = "dm9000", |
| 251 | .id = -1, |
| 252 | .num_resources = ARRAY_SIZE(crag6410_dm9k_resource), |
| 253 | .resource = crag6410_dm9k_resource, |
| 254 | .dev.platform_data = &mini6410_dm9k_pdata, |
| 255 | }; |
| 256 | |
| 257 | static struct resource crag6410_mmgpio_resource[] = { |
| 258 | [0] = { |
| 259 | .start = S3C64XX_PA_XM0CSN4 + 1, |
| 260 | .end = S3C64XX_PA_XM0CSN4 + 1, |
| 261 | .flags = IORESOURCE_MEM, |
| 262 | }, |
| 263 | }; |
| 264 | |
| 265 | static struct platform_device crag6410_mmgpio = { |
| 266 | .name = "basic-mmio-gpio", |
| 267 | .id = -1, |
| 268 | .resource = crag6410_mmgpio_resource, |
| 269 | .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource), |
| 270 | .dev.platform_data = &(struct bgpio_pdata) { |
| 271 | .base = -1, |
| 272 | }, |
| 273 | }; |
| 274 | |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 275 | static struct platform_device speyside_device = { |
| 276 | .name = "speyside", |
| 277 | .id = -1, |
| 278 | }; |
| 279 | |
Mark Brown | 8c051ab | 2011-09-05 14:50:02 +0900 | [diff] [blame] | 280 | static struct platform_device lowland_device = { |
| 281 | .name = "lowland", |
| 282 | .id = -1, |
| 283 | }; |
| 284 | |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 285 | static struct platform_device speyside_wm8962_device = { |
| 286 | .name = "speyside-wm8962", |
| 287 | .id = -1, |
| 288 | }; |
| 289 | |
| 290 | static struct regulator_consumer_supply wallvdd_consumers[] = { |
| 291 | REGULATOR_SUPPLY("SPKVDD1", "1-001a"), |
| 292 | REGULATOR_SUPPLY("SPKVDD2", "1-001a"), |
Mark Brown | 4ed12b5 | 2011-08-31 08:03:11 +0900 | [diff] [blame] | 293 | REGULATOR_SUPPLY("SPKVDDL", "1-001a"), |
| 294 | REGULATOR_SUPPLY("SPKVDDR", "1-001a"), |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 295 | }; |
| 296 | |
| 297 | static struct regulator_init_data wallvdd_data = { |
| 298 | .constraints = { |
| 299 | .always_on = 1, |
| 300 | }, |
| 301 | .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers), |
| 302 | .consumer_supplies = wallvdd_consumers, |
| 303 | }; |
| 304 | |
| 305 | static struct fixed_voltage_config wallvdd_pdata = { |
| 306 | .supply_name = "WALLVDD", |
| 307 | .microvolts = 5000000, |
| 308 | .init_data = &wallvdd_data, |
| 309 | .gpio = -EINVAL, |
| 310 | }; |
| 311 | |
| 312 | static struct platform_device wallvdd_device = { |
| 313 | .name = "reg-fixed-voltage", |
| 314 | .id = -1, |
| 315 | .dev = { |
| 316 | .platform_data = &wallvdd_pdata, |
| 317 | }, |
| 318 | }; |
| 319 | |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 320 | static struct platform_device *crag6410_devices[] __initdata = { |
| 321 | &s3c_device_hsmmc0, |
| 322 | &s3c_device_hsmmc1, |
| 323 | &s3c_device_hsmmc2, |
| 324 | &s3c_device_i2c0, |
| 325 | &s3c_device_i2c1, |
| 326 | &s3c_device_fb, |
| 327 | &s3c_device_ohci, |
| 328 | &s3c_device_usb_hsotg, |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 329 | &s3c_device_timer[0], |
| 330 | &s3c64xx_device_iis0, |
| 331 | &s3c64xx_device_iis1, |
| 332 | &samsung_asoc_dma, |
| 333 | &samsung_device_keypad, |
| 334 | &crag6410_gpio_keydev, |
| 335 | &crag6410_dm9k_device, |
| 336 | &s3c64xx_device_spi0, |
| 337 | &crag6410_mmgpio, |
| 338 | &crag6410_lcd_powerdev, |
| 339 | &crag6410_backlight_device, |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 340 | &speyside_device, |
| 341 | &speyside_wm8962_device, |
Mark Brown | 8c051ab | 2011-09-05 14:50:02 +0900 | [diff] [blame] | 342 | &lowland_device, |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 343 | &wallvdd_device, |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 344 | }; |
| 345 | |
| 346 | static struct pca953x_platform_data crag6410_pca_data = { |
| 347 | .gpio_base = PCA935X_GPIO_BASE, |
| 348 | .irq_base = 0, |
| 349 | }; |
| 350 | |
Mark Brown | 986afc9 | 2011-08-12 18:08:17 +0900 | [diff] [blame] | 351 | /* VDDARM is controlled by DVS1 connected to GPK(0) */ |
| 352 | static struct wm831x_buckv_pdata vddarm_pdata = { |
| 353 | .dvs_control_src = 1, |
| 354 | .dvs_gpio = S3C64XX_GPK(0), |
| 355 | }; |
| 356 | |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 357 | static struct regulator_consumer_supply vddarm_consumers[] __initdata = { |
| 358 | REGULATOR_SUPPLY("vddarm", NULL), |
| 359 | }; |
| 360 | |
| 361 | static struct regulator_init_data vddarm __initdata = { |
| 362 | .constraints = { |
| 363 | .name = "VDDARM", |
| 364 | .min_uV = 1000000, |
| 365 | .max_uV = 1300000, |
| 366 | .always_on = 1, |
| 367 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, |
| 368 | }, |
| 369 | .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers), |
| 370 | .consumer_supplies = vddarm_consumers, |
Mark Brown | 3512729 | 2011-06-22 13:08:17 +0900 | [diff] [blame] | 371 | .supply_regulator = "WALLVDD", |
Mark Brown | 986afc9 | 2011-08-12 18:08:17 +0900 | [diff] [blame] | 372 | .driver_data = &vddarm_pdata, |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 373 | }; |
| 374 | |
| 375 | static struct regulator_init_data vddint __initdata = { |
| 376 | .constraints = { |
| 377 | .name = "VDDINT", |
| 378 | .min_uV = 1000000, |
| 379 | .max_uV = 1200000, |
| 380 | .always_on = 1, |
| 381 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, |
| 382 | }, |
| 383 | }; |
| 384 | |
| 385 | static struct regulator_init_data vddmem __initdata = { |
| 386 | .constraints = { |
| 387 | .name = "VDDMEM", |
| 388 | .always_on = 1, |
| 389 | }, |
| 390 | }; |
| 391 | |
| 392 | static struct regulator_init_data vddsys __initdata = { |
| 393 | .constraints = { |
| 394 | .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS", |
| 395 | .always_on = 1, |
| 396 | }, |
| 397 | }; |
| 398 | |
| 399 | static struct regulator_consumer_supply vddmmc_consumers[] __initdata = { |
| 400 | REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"), |
| 401 | REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"), |
| 402 | REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"), |
| 403 | }; |
| 404 | |
| 405 | static struct regulator_init_data vddmmc __initdata = { |
| 406 | .constraints = { |
| 407 | .name = "VDDMMC,UH", |
| 408 | .always_on = 1, |
| 409 | }, |
| 410 | .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers), |
| 411 | .consumer_supplies = vddmmc_consumers, |
Mark Brown | 3512729 | 2011-06-22 13:08:17 +0900 | [diff] [blame] | 412 | .supply_regulator = "WALLVDD", |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 413 | }; |
| 414 | |
| 415 | static struct regulator_init_data vddotgi __initdata = { |
| 416 | .constraints = { |
| 417 | .name = "VDDOTGi", |
| 418 | .always_on = 1, |
| 419 | }, |
Mark Brown | 3512729 | 2011-06-22 13:08:17 +0900 | [diff] [blame] | 420 | .supply_regulator = "WALLVDD", |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 421 | }; |
| 422 | |
| 423 | static struct regulator_init_data vddotg __initdata = { |
| 424 | .constraints = { |
| 425 | .name = "VDDOTG", |
| 426 | .always_on = 1, |
| 427 | }, |
Mark Brown | 3512729 | 2011-06-22 13:08:17 +0900 | [diff] [blame] | 428 | .supply_regulator = "WALLVDD", |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 429 | }; |
| 430 | |
| 431 | static struct regulator_init_data vddhi __initdata = { |
| 432 | .constraints = { |
| 433 | .name = "VDDHI", |
| 434 | .always_on = 1, |
| 435 | }, |
Mark Brown | 3512729 | 2011-06-22 13:08:17 +0900 | [diff] [blame] | 436 | .supply_regulator = "WALLVDD", |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 437 | }; |
| 438 | |
| 439 | static struct regulator_init_data vddadc __initdata = { |
| 440 | .constraints = { |
| 441 | .name = "VDDADC,VDDDAC", |
| 442 | .always_on = 1, |
| 443 | }, |
Mark Brown | 3512729 | 2011-06-22 13:08:17 +0900 | [diff] [blame] | 444 | .supply_regulator = "WALLVDD", |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 445 | }; |
| 446 | |
| 447 | static struct regulator_init_data vddmem0 __initdata = { |
| 448 | .constraints = { |
| 449 | .name = "VDDMEM0", |
| 450 | .always_on = 1, |
| 451 | }, |
Mark Brown | 3512729 | 2011-06-22 13:08:17 +0900 | [diff] [blame] | 452 | .supply_regulator = "WALLVDD", |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 453 | }; |
| 454 | |
| 455 | static struct regulator_init_data vddpll __initdata = { |
| 456 | .constraints = { |
| 457 | .name = "VDDPLL", |
| 458 | .always_on = 1, |
| 459 | }, |
Mark Brown | 3512729 | 2011-06-22 13:08:17 +0900 | [diff] [blame] | 460 | .supply_regulator = "WALLVDD", |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 461 | }; |
| 462 | |
| 463 | static struct regulator_init_data vddlcd __initdata = { |
| 464 | .constraints = { |
| 465 | .name = "VDDLCD", |
| 466 | .always_on = 1, |
| 467 | }, |
Mark Brown | 3512729 | 2011-06-22 13:08:17 +0900 | [diff] [blame] | 468 | .supply_regulator = "WALLVDD", |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 469 | }; |
| 470 | |
| 471 | static struct regulator_init_data vddalive __initdata = { |
| 472 | .constraints = { |
| 473 | .name = "VDDALIVE", |
| 474 | .always_on = 1, |
| 475 | }, |
Mark Brown | 3512729 | 2011-06-22 13:08:17 +0900 | [diff] [blame] | 476 | .supply_regulator = "WALLVDD", |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 477 | }; |
| 478 | |
Mark Brown | 89e1c3d | 2011-07-21 01:26:24 +0900 | [diff] [blame] | 479 | static struct wm831x_backup_pdata banff_backup_pdata __initdata = { |
| 480 | .charger_enable = 1, |
| 481 | .vlim = 2500, /* mV */ |
| 482 | .ilim = 200, /* uA */ |
| 483 | }; |
| 484 | |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 485 | static struct wm831x_status_pdata banff_red_led __initdata = { |
| 486 | .name = "banff:red:", |
| 487 | .default_src = WM831X_STATUS_MANUAL, |
| 488 | }; |
| 489 | |
| 490 | static struct wm831x_status_pdata banff_green_led __initdata = { |
| 491 | .name = "banff:green:", |
| 492 | .default_src = WM831X_STATUS_MANUAL, |
| 493 | }; |
| 494 | |
| 495 | static struct wm831x_touch_pdata touch_pdata __initdata = { |
| 496 | .data_irq = S3C_EINT(26), |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 497 | .pd_irq = S3C_EINT(27), |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 498 | }; |
| 499 | |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 500 | static struct wm831x_pdata crag_pmic_pdata __initdata = { |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 501 | .wm831x_num = 1, |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 502 | .irq_base = BANFF_PMIC_IRQ_BASE, |
Mark Brown | aaed44e | 2011-11-03 16:28:15 +0900 | [diff] [blame^] | 503 | .gpio_base = BANFF_PMIC_GPIO_BASE, |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 504 | |
Mark Brown | 89e1c3d | 2011-07-21 01:26:24 +0900 | [diff] [blame] | 505 | .backup = &banff_backup_pdata, |
| 506 | |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 507 | .gpio_defaults = { |
Mark Brown | 986afc9 | 2011-08-12 18:08:17 +0900 | [diff] [blame] | 508 | /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */ |
| 509 | [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8, |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 510 | /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/ |
| 511 | [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6, |
| 512 | /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/ |
| 513 | [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7, |
| 514 | }, |
| 515 | |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 516 | .dcdc = { |
| 517 | &vddarm, /* DCDC1 */ |
| 518 | &vddint, /* DCDC2 */ |
| 519 | &vddmem, /* DCDC3 */ |
| 520 | }, |
| 521 | |
| 522 | .ldo = { |
| 523 | &vddsys, /* LDO1 */ |
| 524 | &vddmmc, /* LDO2 */ |
| 525 | NULL, /* LDO3 */ |
| 526 | &vddotgi, /* LDO4 */ |
| 527 | &vddotg, /* LDO5 */ |
| 528 | &vddhi, /* LDO6 */ |
| 529 | &vddadc, /* LDO7 */ |
| 530 | &vddmem0, /* LDO8 */ |
| 531 | &vddpll, /* LDO9 */ |
| 532 | &vddlcd, /* LDO10 */ |
| 533 | &vddalive, /* LDO11 */ |
| 534 | }, |
| 535 | |
| 536 | .status = { |
| 537 | &banff_green_led, |
| 538 | &banff_red_led, |
| 539 | }, |
| 540 | |
| 541 | .touch = &touch_pdata, |
| 542 | }; |
| 543 | |
| 544 | static struct i2c_board_info i2c_devs0[] __initdata = { |
| 545 | { I2C_BOARD_INFO("24c08", 0x50), }, |
| 546 | { I2C_BOARD_INFO("tca6408", 0x20), |
| 547 | .platform_data = &crag6410_pca_data, |
| 548 | }, |
| 549 | { I2C_BOARD_INFO("wm8312", 0x34), |
| 550 | .platform_data = &crag_pmic_pdata, |
| 551 | .irq = S3C_EINT(23), |
| 552 | }, |
| 553 | }; |
| 554 | |
| 555 | static struct s3c2410_platform_i2c i2c0_pdata = { |
| 556 | .frequency = 400000, |
| 557 | }; |
| 558 | |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 559 | static struct regulator_init_data pvdd_1v2 __initdata = { |
| 560 | .constraints = { |
| 561 | .name = "PVDD_1V2", |
| 562 | .always_on = 1, |
| 563 | }, |
| 564 | }; |
| 565 | |
| 566 | static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = { |
Mark Brown | d5160ec | 2011-09-26 13:18:28 +0900 | [diff] [blame] | 567 | REGULATOR_SUPPLY("LDOVDD", "1-001a"), |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 568 | REGULATOR_SUPPLY("PLLVDD", "1-001a"), |
| 569 | REGULATOR_SUPPLY("DBVDD", "1-001a"), |
Mark Brown | 4ed12b5 | 2011-08-31 08:03:11 +0900 | [diff] [blame] | 570 | REGULATOR_SUPPLY("DBVDD1", "1-001a"), |
| 571 | REGULATOR_SUPPLY("DBVDD2", "1-001a"), |
| 572 | REGULATOR_SUPPLY("DBVDD3", "1-001a"), |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 573 | REGULATOR_SUPPLY("CPVDD", "1-001a"), |
| 574 | REGULATOR_SUPPLY("AVDD2", "1-001a"), |
| 575 | REGULATOR_SUPPLY("DCVDD", "1-001a"), |
| 576 | REGULATOR_SUPPLY("AVDD", "1-001a"), |
| 577 | }; |
| 578 | |
| 579 | static struct regulator_init_data pvdd_1v8 __initdata = { |
| 580 | .constraints = { |
| 581 | .name = "PVDD_1V8", |
| 582 | .always_on = 1, |
| 583 | }, |
| 584 | |
| 585 | .consumer_supplies = pvdd_1v8_consumers, |
| 586 | .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers), |
| 587 | }; |
| 588 | |
| 589 | static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = { |
| 590 | REGULATOR_SUPPLY("MICVDD", "1-001a"), |
| 591 | REGULATOR_SUPPLY("AVDD1", "1-001a"), |
| 592 | }; |
| 593 | |
| 594 | static struct regulator_init_data pvdd_3v3 __initdata = { |
| 595 | .constraints = { |
| 596 | .name = "PVDD_3V3", |
| 597 | .always_on = 1, |
| 598 | }, |
| 599 | |
| 600 | .consumer_supplies = pvdd_3v3_consumers, |
| 601 | .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers), |
| 602 | }; |
| 603 | |
| 604 | static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = { |
| 605 | .wm831x_num = 2, |
| 606 | .irq_base = GLENFARCLAS_PMIC_IRQ_BASE, |
| 607 | .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE, |
| 608 | |
| 609 | .gpio_defaults = { |
| 610 | /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */ |
| 611 | [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA, |
| 612 | [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA, |
| 613 | [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA, |
| 614 | }, |
| 615 | |
| 616 | .dcdc = { |
| 617 | &pvdd_1v2, /* DCDC1 */ |
| 618 | &pvdd_1v8, /* DCDC2 */ |
| 619 | &pvdd_3v3, /* DCDC3 */ |
| 620 | }, |
| 621 | |
| 622 | .disable_touch = true, |
| 623 | }; |
| 624 | |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 625 | static struct i2c_board_info i2c_devs1[] __initdata = { |
| 626 | { I2C_BOARD_INFO("wm8311", 0x34), |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 627 | .irq = S3C_EINT(0), |
| 628 | .platform_data = &glenfarclas_pmic_pdata }, |
| 629 | |
Mark Brown | d0f0b43 | 2011-08-19 22:40:07 +0900 | [diff] [blame] | 630 | { I2C_BOARD_INFO("wlf-gf-module", 0x24) }, |
| 631 | { I2C_BOARD_INFO("wlf-gf-module", 0x25) }, |
| 632 | { I2C_BOARD_INFO("wlf-gf-module", 0x26) }, |
| 633 | |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 634 | { I2C_BOARD_INFO("wm1250-ev1", 0x27) }, |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 635 | }; |
| 636 | |
| 637 | static void __init crag6410_map_io(void) |
| 638 | { |
| 639 | s3c64xx_init_io(NULL, 0); |
| 640 | s3c24xx_init_clocks(12000000); |
| 641 | s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs)); |
| 642 | |
| 643 | /* LCD type and Bypass set by bootloader */ |
| 644 | } |
| 645 | |
| 646 | static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = { |
| 647 | .max_width = 4, |
| 648 | .cd_type = S3C_SDHCI_CD_PERMANENT, |
| 649 | }; |
| 650 | |
| 651 | static struct s3c_sdhci_platdata crag6410_hsmmc1_pdata = { |
| 652 | .max_width = 4, |
| 653 | .cd_type = S3C_SDHCI_CD_GPIO, |
| 654 | .ext_cd_gpio = S3C64XX_GPF(11), |
| 655 | }; |
| 656 | |
| 657 | static void crag6410_cfg_sdhci0(struct platform_device *dev, int width) |
| 658 | { |
| 659 | /* Set all the necessary GPG pins to special-function 2 */ |
| 660 | s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2)); |
| 661 | |
| 662 | /* force card-detected for prototype 0 */ |
| 663 | s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN); |
| 664 | } |
| 665 | |
| 666 | static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = { |
| 667 | .max_width = 4, |
| 668 | .cd_type = S3C_SDHCI_CD_INTERNAL, |
| 669 | .cfg_gpio = crag6410_cfg_sdhci0, |
| 670 | }; |
| 671 | |
| 672 | static void __init crag6410_machine_init(void) |
| 673 | { |
| 674 | /* Open drain IRQs need pullups */ |
| 675 | s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP); |
| 676 | s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP); |
| 677 | |
| 678 | gpio_request(S3C64XX_GPB(0), "LCD power"); |
| 679 | gpio_direction_output(S3C64XX_GPB(0), 0); |
| 680 | |
| 681 | gpio_request(S3C64XX_GPF(14), "LCD PWM"); |
| 682 | gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */ |
| 683 | |
| 684 | gpio_request(S3C64XX_GPB(1), "SD power"); |
| 685 | gpio_direction_output(S3C64XX_GPB(1), 0); |
| 686 | |
| 687 | gpio_request(S3C64XX_GPF(10), "nRESETSEL"); |
| 688 | gpio_direction_output(S3C64XX_GPF(10), 1); |
| 689 | |
| 690 | s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata); |
| 691 | s3c_sdhci1_set_platdata(&crag6410_hsmmc1_pdata); |
| 692 | s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata); |
| 693 | |
| 694 | s3c_i2c0_set_platdata(&i2c0_pdata); |
| 695 | s3c_i2c1_set_platdata(NULL); |
| 696 | s3c_fb_set_platdata(&crag6410_lcd_pdata); |
| 697 | |
| 698 | i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); |
| 699 | i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); |
| 700 | |
| 701 | samsung_keypad_set_platdata(&crag6410_keypad_data); |
| 702 | |
| 703 | platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices)); |
| 704 | |
Mark Brown | ae24c26 | 2011-06-22 13:08:13 +0900 | [diff] [blame] | 705 | regulator_has_full_constraints(); |
| 706 | |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 707 | s3c_pm_init(); |
| 708 | } |
| 709 | |
| 710 | MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410") |
| 711 | /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */ |
Nicolas Pitre | 170a590 | 2011-07-05 22:38:17 -0400 | [diff] [blame] | 712 | .atag_offset = 0x100, |
Mark Brown | e1a3c74 | 2011-05-06 09:45:13 +0900 | [diff] [blame] | 713 | .init_irq = s3c6410_init_irq, |
| 714 | .map_io = crag6410_map_io, |
| 715 | .init_machine = crag6410_machine_init, |
| 716 | .timer = &s3c24xx_timer, |
| 717 | MACHINE_END |