Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-pxa/irq.c |
| 3 | * |
eric miao | e3630db | 2008-03-04 11:42:26 +0800 | [diff] [blame] | 4 | * Generic PXA IRQ handling |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | * |
| 6 | * Author: Nicolas Pitre |
| 7 | * Created: Jun 15, 2001 |
| 8 | * Copyright: MontaVista Software Inc. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as |
| 12 | * published by the Free Software Foundation. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/init.h> |
| 16 | #include <linux/module.h> |
| 17 | #include <linux/interrupt.h> |
eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 18 | #include <linux/sysdev.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | |
| 20 | #include <asm/hardware.h> |
| 21 | #include <asm/irq.h> |
| 22 | #include <asm/mach/irq.h> |
| 23 | #include <asm/arch/pxa-regs.h> |
| 24 | |
| 25 | #include "generic.h" |
| 26 | |
eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 27 | #define IRQ_BIT(n) (((n) - PXA_IRQ(0)) & 0x1f) |
| 28 | #define _ICMR(n) (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICMR2 : &ICMR)) |
| 29 | #define _ICLR(n) (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICLR2 : &ICLR)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | |
| 31 | /* |
| 32 | * This is for peripheral IRQs internal to the PXA chip. |
| 33 | */ |
| 34 | |
eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 35 | static int pxa_internal_irq_nr; |
| 36 | |
| 37 | static void pxa_mask_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | { |
eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 39 | _ICMR(irq) &= ~(1 << IRQ_BIT(irq)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | } |
| 41 | |
eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 42 | static void pxa_unmask_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | { |
eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 44 | _ICMR(irq) |= 1 << IRQ_BIT(irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | } |
| 46 | |
eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 47 | static struct irq_chip pxa_internal_irq_chip = { |
David Brownell | 38c677c | 2006-08-01 22:26:25 +0100 | [diff] [blame] | 48 | .name = "SC", |
eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 49 | .ack = pxa_mask_irq, |
| 50 | .mask = pxa_mask_irq, |
| 51 | .unmask = pxa_unmask_irq, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | }; |
| 53 | |
eric miao | b9e25ac | 2008-03-04 14:19:58 +0800 | [diff] [blame] | 54 | void __init pxa_init_irq(int irq_nr, set_wake_t fn) |
Eric Miao | 53665a5 | 2007-06-06 06:36:04 +0100 | [diff] [blame] | 55 | { |
| 56 | int irq; |
| 57 | |
eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 58 | pxa_internal_irq_nr = irq_nr; |
Eric Miao | 53665a5 | 2007-06-06 06:36:04 +0100 | [diff] [blame] | 59 | |
eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 60 | for (irq = 0; irq < irq_nr; irq += 32) { |
| 61 | _ICMR(irq) = 0; /* disable all IRQs */ |
| 62 | _ICLR(irq) = 0; /* all IRQs are IRQ, not FIQ */ |
| 63 | } |
Eric Miao | 53665a5 | 2007-06-06 06:36:04 +0100 | [diff] [blame] | 64 | |
| 65 | /* only unmasked interrupts kick us out of idle */ |
| 66 | ICCR = 1; |
| 67 | |
eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 68 | for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq++) { |
| 69 | set_irq_chip(irq, &pxa_internal_irq_chip); |
Eric Miao | 53665a5 | 2007-06-06 06:36:04 +0100 | [diff] [blame] | 70 | set_irq_handler(irq, handle_level_irq); |
| 71 | set_irq_flags(irq, IRQF_VALID); |
| 72 | } |
Eric Miao | 53665a5 | 2007-06-06 06:36:04 +0100 | [diff] [blame] | 73 | |
eric miao | b9e25ac | 2008-03-04 14:19:58 +0800 | [diff] [blame] | 74 | pxa_internal_irq_chip.set_wake = fn; |
eric miao | c95530c | 2007-08-29 10:22:17 +0100 | [diff] [blame] | 75 | } |
eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 76 | |
| 77 | #ifdef CONFIG_PM |
| 78 | static unsigned long saved_icmr[2]; |
| 79 | |
| 80 | static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state) |
| 81 | { |
eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 82 | int i, irq = PXA_IRQ(0); |
| 83 | |
| 84 | for (i = 0; irq < PXA_IRQ(pxa_internal_irq_nr); i++, irq += 32) { |
| 85 | saved_icmr[i] = _ICMR(irq); |
| 86 | _ICMR(irq) = 0; |
eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 87 | } |
| 88 | |
| 89 | return 0; |
| 90 | } |
| 91 | |
| 92 | static int pxa_irq_resume(struct sys_device *dev) |
| 93 | { |
eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 94 | int i, irq = PXA_IRQ(0); |
| 95 | |
| 96 | for (i = 0; irq < PXA_IRQ(pxa_internal_irq_nr); i++, irq += 32) { |
| 97 | _ICMR(irq) = saved_icmr[i]; |
| 98 | _ICLR(irq) = 0; |
eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 99 | } |
| 100 | |
eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 101 | ICCR = 1; |
eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 102 | return 0; |
| 103 | } |
| 104 | #else |
| 105 | #define pxa_irq_suspend NULL |
| 106 | #define pxa_irq_resume NULL |
| 107 | #endif |
| 108 | |
| 109 | struct sysdev_class pxa_irq_sysclass = { |
| 110 | .name = "irq", |
| 111 | .suspend = pxa_irq_suspend, |
| 112 | .resume = pxa_irq_resume, |
| 113 | }; |
| 114 | |
| 115 | static int __init pxa_irq_init(void) |
| 116 | { |
| 117 | return sysdev_class_register(&pxa_irq_sysclass); |
| 118 | } |
| 119 | |
| 120 | core_initcall(pxa_irq_init); |