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Sudeep Duttb170d8c2013-09-05 16:41:31 -07001/*
2 * Intel MIC Platform Software Stack (MPSS)
3 *
4 * Copyright(c) 2013 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License, version 2, as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * The full GNU General Public License is included in this distribution in
16 * the file called "COPYING".
17 *
18 * Intel MIC driver.
19 *
20 */
Sudeep Dutt4aa79962013-09-27 09:49:42 -070021#ifndef __MIC_DEV_H__
22#define __MIC_DEV_H__
Sudeep Duttb170d8c2013-09-05 16:41:31 -070023
Ashutosh Dixitd411e792015-09-29 18:13:54 -070024/* The maximum number of MIC devices supported in a single host system. */
25#define MIC_MAX_NUM_DEVS 128
26
27/**
28 * enum mic_hw_family - The hardware family to which a device belongs.
29 */
30enum mic_hw_family {
31 MIC_FAMILY_X100 = 0,
32 MIC_FAMILY_X200,
33 MIC_FAMILY_UNKNOWN,
34 MIC_FAMILY_LAST
35};
36
Sudeep Duttb170d8c2013-09-05 16:41:31 -070037/**
38 * struct mic_mw - MIC memory window
39 *
40 * @pa: Base physical address.
41 * @va: Base ioremap'd virtual address.
42 * @len: Size of the memory window.
43 */
44struct mic_mw {
45 phys_addr_t pa;
46 void __iomem *va;
47 resource_size_t len;
48};
49
Sudeep Dutt3a6a9202013-09-05 16:41:55 -070050/*
51 * Scratch pad register offsets used by the host to communicate
52 * device page DMA address to the card.
53 */
54#define MIC_DPLO_SPAD 14
55#define MIC_DPHI_SPAD 15
56
Ashutosh Dixitf69bcbf2013-09-05 16:42:18 -070057/*
58 * These values are supposed to be in the config_change field of the
59 * device page when the host sends a config change interrupt to the card.
60 */
61#define MIC_VIRTIO_PARAM_DEV_REMOVE 0x1
62#define MIC_VIRTIO_PARAM_CONFIG_CHANGED 0x2
63
Sudeep Duttc9d5c532015-04-29 05:32:32 -070064/* Maximum number of DMA channels */
65#define MIC_MAX_DMA_CHAN 4
66
Sudeep Duttb170d8c2013-09-05 16:41:31 -070067#endif