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H. Peter Anvin1965aae2008-10-22 22:26:29 -07001#ifndef _ASM_X86_TLBFLUSH_H
2#define _ASM_X86_TLBFLUSH_H
Thomas Gleixnerd291cf82008-01-30 13:30:35 +01003
4#include <linux/mm.h>
5#include <linux/sched.h>
6
7#include <asm/processor.h>
David Howellsf05e7982012-03-28 18:11:12 +01008#include <asm/special_insns.h>
Thomas Gleixnerd291cf82008-01-30 13:30:35 +01009
10#ifdef CONFIG_PARAVIRT
11#include <asm/paravirt.h>
Thomas Gleixner96a388d2007-10-11 11:20:03 +020012#else
Thomas Gleixnerd291cf82008-01-30 13:30:35 +010013#define __flush_tlb() __native_flush_tlb()
14#define __flush_tlb_global() __native_flush_tlb_global()
15#define __flush_tlb_single(addr) __native_flush_tlb_single(addr)
Thomas Gleixner96a388d2007-10-11 11:20:03 +020016#endif
Thomas Gleixnerd291cf82008-01-30 13:30:35 +010017
18static inline void __native_flush_tlb(void)
19{
Chris Wrightd7285c62009-04-23 10:21:38 -070020 native_write_cr3(native_read_cr3());
Thomas Gleixnerd291cf82008-01-30 13:30:35 +010021}
22
Fenghua Yu086fc8f2012-12-20 23:44:27 -080023static inline void __native_flush_tlb_global_irq_disabled(void)
24{
25 unsigned long cr4;
26
27 cr4 = native_read_cr4();
28 /* clear PGE */
29 native_write_cr4(cr4 & ~X86_CR4_PGE);
30 /* write old PGE again and flush TLBs */
31 native_write_cr4(cr4);
32}
33
Thomas Gleixnerd291cf82008-01-30 13:30:35 +010034static inline void __native_flush_tlb_global(void)
35{
Ingo Molnarb1979a52008-05-12 21:21:15 +020036 unsigned long flags;
Thomas Gleixnerd291cf82008-01-30 13:30:35 +010037
Ingo Molnarb1979a52008-05-12 21:21:15 +020038 /*
39 * Read-modify-write to CR4 - protect it from preemption and
40 * from interrupts. (Use the raw variant because this code can
41 * be called from deep inside debugging code.)
42 */
43 raw_local_irq_save(flags);
44
Fenghua Yu086fc8f2012-12-20 23:44:27 -080045 __native_flush_tlb_global_irq_disabled();
Ingo Molnarb1979a52008-05-12 21:21:15 +020046
47 raw_local_irq_restore(flags);
Thomas Gleixnerd291cf82008-01-30 13:30:35 +010048}
49
50static inline void __native_flush_tlb_single(unsigned long addr)
51{
Joe Perches94cf8de2008-03-23 01:03:45 -070052 asm volatile("invlpg (%0)" ::"r" (addr) : "memory");
Thomas Gleixnerd291cf82008-01-30 13:30:35 +010053}
54
55static inline void __flush_tlb_all(void)
56{
57 if (cpu_has_pge)
58 __flush_tlb_global();
59 else
60 __flush_tlb();
61}
62
63static inline void __flush_tlb_one(unsigned long addr)
64{
Dave Hansen6df46862013-09-11 14:20:24 -070065 count_vm_event(NR_TLB_LOCAL_FLUSH_ONE);
Michael Wange8747f12013-06-04 14:28:18 +080066 __flush_tlb_single(addr);
Thomas Gleixnerd291cf82008-01-30 13:30:35 +010067}
68
Alex Shi3e7f3db2012-05-10 18:01:59 +080069#define TLB_FLUSH_ALL -1UL
Thomas Gleixnerd291cf82008-01-30 13:30:35 +010070
71/*
72 * TLB flushing:
73 *
74 * - flush_tlb() flushes the current mm struct TLBs
75 * - flush_tlb_all() flushes all processes TLBs
76 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
77 * - flush_tlb_page(vma, vmaddr) flushes one page
78 * - flush_tlb_range(vma, start, end) flushes a range of pages
79 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
Alex Shie7b52ff2012-06-28 09:02:17 +080080 * - flush_tlb_others(cpumask, mm, start, end) flushes TLBs on other cpus
Thomas Gleixnerd291cf82008-01-30 13:30:35 +010081 *
82 * ..but the i386 has somewhat limited tlb flushing capabilities,
83 * and page-granular flushes are available only on i486 and up.
Thomas Gleixnerd291cf82008-01-30 13:30:35 +010084 */
85
86#ifndef CONFIG_SMP
87
Dave Hansen6df46862013-09-11 14:20:24 -070088/* "_up" is for UniProcessor.
89 *
90 * This is a helper for other header functions. *Not* intended to be called
91 * directly. All global TLB flushes need to either call this, or to bump the
92 * vm statistics themselves.
93 */
94static inline void __flush_tlb_up(void)
95{
96 count_vm_event(NR_TLB_LOCAL_FLUSH_ALL);
97 __flush_tlb();
98}
99
100static inline void flush_tlb_all(void)
101{
102 count_vm_event(NR_TLB_LOCAL_FLUSH_ALL);
103 __flush_tlb_all();
104}
105
106static inline void flush_tlb(void)
107{
108 __flush_tlb_up();
109}
110
111static inline void local_flush_tlb(void)
112{
113 __flush_tlb_up();
114}
Thomas Gleixnerd291cf82008-01-30 13:30:35 +0100115
116static inline void flush_tlb_mm(struct mm_struct *mm)
117{
118 if (mm == current->active_mm)
Dave Hansen6df46862013-09-11 14:20:24 -0700119 __flush_tlb_up();
Thomas Gleixnerd291cf82008-01-30 13:30:35 +0100120}
121
122static inline void flush_tlb_page(struct vm_area_struct *vma,
123 unsigned long addr)
124{
125 if (vma->vm_mm == current->active_mm)
126 __flush_tlb_one(addr);
127}
128
129static inline void flush_tlb_range(struct vm_area_struct *vma,
130 unsigned long start, unsigned long end)
131{
132 if (vma->vm_mm == current->active_mm)
Dave Hansen6df46862013-09-11 14:20:24 -0700133 __flush_tlb_up();
Thomas Gleixnerd291cf82008-01-30 13:30:35 +0100134}
135
Alex Shi7efa1c82012-07-20 09:18:23 +0800136static inline void flush_tlb_mm_range(struct mm_struct *mm,
Alex Shi611ae8e2012-06-28 09:02:22 +0800137 unsigned long start, unsigned long end, unsigned long vmflag)
138{
Alex Shi7efa1c82012-07-20 09:18:23 +0800139 if (mm == current->active_mm)
Dave Hansen6df46862013-09-11 14:20:24 -0700140 __flush_tlb_up();
Alex Shi611ae8e2012-06-28 09:02:22 +0800141}
142
Rusty Russell4595f962009-01-10 21:58:09 -0800143static inline void native_flush_tlb_others(const struct cpumask *cpumask,
Thomas Gleixnerd291cf82008-01-30 13:30:35 +0100144 struct mm_struct *mm,
Alex Shie7b52ff2012-06-28 09:02:17 +0800145 unsigned long start,
146 unsigned long end)
Thomas Gleixnerd291cf82008-01-30 13:30:35 +0100147{
148}
149
Alex Nixon913da642008-09-03 14:30:23 +0100150static inline void reset_lazy_tlbstate(void)
151{
152}
153
Alex Shieffee4b2012-06-28 09:02:24 +0800154static inline void flush_tlb_kernel_range(unsigned long start,
155 unsigned long end)
156{
157 flush_tlb_all();
158}
159
Thomas Gleixnerd291cf82008-01-30 13:30:35 +0100160#else /* SMP */
161
162#include <asm/smp.h>
163
164#define local_flush_tlb() __flush_tlb()
165
Alex Shi611ae8e2012-06-28 09:02:22 +0800166#define flush_tlb_mm(mm) flush_tlb_mm_range(mm, 0UL, TLB_FLUSH_ALL, 0UL)
167
168#define flush_tlb_range(vma, start, end) \
169 flush_tlb_mm_range(vma->vm_mm, start, end, vma->vm_flags)
170
Thomas Gleixnerd291cf82008-01-30 13:30:35 +0100171extern void flush_tlb_all(void);
172extern void flush_tlb_current_task(void);
Thomas Gleixnerd291cf82008-01-30 13:30:35 +0100173extern void flush_tlb_page(struct vm_area_struct *, unsigned long);
Alex Shi611ae8e2012-06-28 09:02:22 +0800174extern void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
175 unsigned long end, unsigned long vmflag);
Alex Shieffee4b2012-06-28 09:02:24 +0800176extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
Thomas Gleixnerd291cf82008-01-30 13:30:35 +0100177
178#define flush_tlb() flush_tlb_current_task()
179
Rusty Russell4595f962009-01-10 21:58:09 -0800180void native_flush_tlb_others(const struct cpumask *cpumask,
Alex Shie7b52ff2012-06-28 09:02:17 +0800181 struct mm_struct *mm,
182 unsigned long start, unsigned long end);
Thomas Gleixnerd291cf82008-01-30 13:30:35 +0100183
184#define TLBSTATE_OK 1
185#define TLBSTATE_LAZY 2
186
Joe Perches94cf8de2008-03-23 01:03:45 -0700187struct tlb_state {
Thomas Gleixnerd291cf82008-01-30 13:30:35 +0100188 struct mm_struct *active_mm;
189 int state;
Thomas Gleixnerd291cf82008-01-30 13:30:35 +0100190};
David Howells9b8de742009-04-21 23:00:24 +0100191DECLARE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate);
Alex Nixon913da642008-09-03 14:30:23 +0100192
Alex Nixon913da642008-09-03 14:30:23 +0100193static inline void reset_lazy_tlbstate(void)
194{
Alex Shic6ae41e2012-05-11 15:35:27 +0800195 this_cpu_write(cpu_tlbstate.state, 0);
196 this_cpu_write(cpu_tlbstate.active_mm, &init_mm);
Alex Nixon913da642008-09-03 14:30:23 +0100197}
Thomas Gleixnerd291cf82008-01-30 13:30:35 +0100198
199#endif /* SMP */
200
201#ifndef CONFIG_PARAVIRT
Alex Shie7b52ff2012-06-28 09:02:17 +0800202#define flush_tlb_others(mask, mm, start, end) \
203 native_flush_tlb_others(mask, mm, start, end)
Thomas Gleixnerd291cf82008-01-30 13:30:35 +0100204#endif
205
H. Peter Anvin1965aae2008-10-22 22:26:29 -0700206#endif /* _ASM_X86_TLBFLUSH_H */